1 /*
2 * Copyright (c) 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
4 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
28 #include "gc/shenandoah/mode/shenandoahMode.hpp"
29 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
31 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
32 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
33 #include "gc/shenandoah/shenandoahNMethod.inline.hpp"
34 #include "gc/shenandoah/shenandoahRuntime.hpp"
35 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
36 #include "interpreter/interp_masm.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "nativeInst_aarch64.hpp"
39 #include "runtime/javaThread.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #ifdef COMPILER1
42 #include "c1/c1_LIRAssembler.hpp"
43 #include "c1/c1_MacroAssembler.hpp"
44 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
45 #endif
46 #ifdef COMPILER2
47 #include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
48 #include "opto/output.hpp"
49 #endif
50
51 #define __ masm->
52
53 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
54 Register src, Register dst, Register count, RegSet saved_regs) {
55 if (is_oop) {
56 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
57 if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {
58
59 Label done;
60
61 // Avoid calling runtime if count == 0
62 __ cbz(count, done);
63
64 // Is GC active?
65 assert(!saved_regs.contains(rscratch1), "Sanity: about to clobber rscratch1");
66 assert(!saved_regs.contains(rscratch2), "Sanity: about to clobber rscratch2");
67 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
68 __ ldrb(rscratch1, gc_state);
69 if (ShenandoahSATBBarrier && dest_uninitialized) {
70 __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done);
71 } else {
72 __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING);
73 __ tst(rscratch1, rscratch2);
74 __ br(Assembler::EQ, done);
75 }
76
77 __ push_call_clobbered_registers();
78 // If arguments are not in proper places, shuffle them.
79 // Doing this via the stack is the most straight-forward way to avoid
80 // accidentally smashing any register.
81 if (c_rarg0 != src || c_rarg1 != dst || c_rarg2 != count) {
82 __ push(RegSet::of(src), sp);
83 __ push(RegSet::of(dst), sp);
84 __ push(RegSet::of(count), sp);
85 __ pop(RegSet::of(c_rarg2), sp);
86 __ pop(RegSet::of(c_rarg1), sp);
87 __ pop(RegSet::of(c_rarg0), sp);
88 }
89 address target = nullptr;
90 if (UseCompressedOops) {
91 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop);
92 } else {
93 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop);
94 }
95 __ call_VM_leaf(target, 3);
96 __ pop_call_clobbered_registers();
97 __ bind(done);
98 }
99 }
100 }
101
102 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
103 Register start, Register count, Register tmp) {
104 if (ShenandoahCardBarrier && is_oop) {
105 gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp);
106 }
107 }
108
109 void ShenandoahBarrierSetAssembler::satb_barrier(MacroAssembler* masm,
110 Register obj,
111 Register pre_val,
112 Register thread,
113 Register tmp1,
114 Register tmp2) {
115 assert(ShenandoahSATBBarrier, "Should be checked by caller");
116 assert(thread == rthread, "must be");
117
118 Label done;
119 Label runtime;
120
121 assert_different_registers(obj, pre_val, tmp1, tmp2);
122 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
123
124 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
125 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
126
127 // Is marking active?
128 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
129 __ ldrb(tmp1, gc_state);
130 __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
131
132 // Do we need to load the previous value?
133 if (obj != noreg) {
134 if (UseCompressedOops) {
135 __ ldrw(pre_val, Address(obj, 0));
136 __ decode_heap_oop(pre_val);
137 } else {
138 __ ldr(pre_val, Address(obj, 0));
139 }
140 }
141
142 // Is the previous value null?
143 __ cbz(pre_val, done);
144
145 // Can we store original value in the thread's buffer?
146 // Is index == 0?
147 // (The index field is typed as size_t.)
148
149 __ ldr(tmp1, index); // tmp := *index_adr
150 __ cbz(tmp1, runtime); // tmp == 0?
151 // If yes, goto runtime
152
153 __ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
154 __ str(tmp1, index); // *index_adr := tmp
155 __ ldr(tmp2, buffer);
156 __ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
157
158 // Record the previous value
159 __ str(pre_val, Address(tmp1, 0));
160 __ b(done);
161
162 __ bind(runtime);
163
164 // Slow-path call
165 __ enter(/* strip_ret_addr = */ true);
166 __ push_call_clobbered_registers();
167 if (c_rarg0 != pre_val) {
168 __ mov(c_rarg0, pre_val);
169 }
170 // Calling with super_call_VM_leaf with c_rarg0 bypasses interpreter checks and avoids any moves.
171 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), c_rarg0);
172 __ pop_call_clobbered_registers();
173 __ leave();
174
175 __ bind(done);
176 }
177
178 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) {
179 assert(ShenandoahLoadRefBarrier, "Should be enabled");
180 assert(dst != rscratch2, "need rscratch2");
181 assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2);
182
183 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
184 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
185 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
186 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
187 bool is_narrow = UseCompressedOops && !is_native;
188
189 Label heap_stable, not_cset;
190 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
191 __ ldrb(rscratch2, gc_state);
192
193 // Check for heap stability
194 if (is_strong) {
195 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
196 } else {
197 Label lrb;
198 __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb);
199 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
200 __ bind(lrb);
201 }
202
203 // use r1 for load address
204 Register result_dst = dst;
205 if (dst == r1) {
206 __ mov(rscratch1, dst);
207 dst = rscratch1;
208 }
209
210 // Save r0 and r1, unless it is an output register
211 RegSet to_save = RegSet::of(r0, r1) - result_dst;
212 __ push(to_save, sp);
213 __ lea(r1, load_addr);
214 __ mov(r0, dst);
215
216 // Test for in-cset
217 if (is_strong) {
218 if (AOTCodeCache::is_on_for_dump()) {
219 __ lea(rscratch2, ExternalAddress(AOTRuntimeConstants::cset_base_address()));
220 __ ldr(rscratch2, Address(rscratch2));
221 __ lea(rscratch1, ExternalAddress(AOTRuntimeConstants::grain_shift_address()));
222 __ ldrw(rscratch1, Address(rscratch1));
223 __ lsrv(rscratch1, r0, rscratch1);
224 } else {
225 __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr());
226 __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint());
227 }
228 __ ldrb(rscratch2, Address(rscratch2, rscratch1));
229 __ tbz(rscratch2, 0, not_cset);
230 }
231
232 // Slow-path call
233 __ enter(/* strip_ret_addr = */ true);
234 __ push_call_clobbered_registers();
235 address target = nullptr;
236 if (is_strong) {
237 if (is_narrow) {
238 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow);
239 } else {
240 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong);
241 }
242 } else if (is_weak) {
243 if (is_narrow) {
244 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow);
245 } else {
246 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak);
247 }
248 } else {
249 assert(is_phantom, "only remaining strength");
250 assert(!is_narrow, "phantom access cannot be narrow");
251 target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom);
252 }
253 // Calling with super_call_VM_leaf with c_rarg0/1 bypasses interpreter checks and avoids any moves.
254 __ super_call_VM_leaf(target, c_rarg0, c_rarg1);
255 __ mov(rscratch1, r0);
256 __ pop_call_clobbered_registers();
257 __ mov(r0, rscratch1);
258 __ leave();
259
260 __ bind(not_cset);
261
262 __ mov(result_dst, r0);
263 __ pop(to_save, sp);
264
265 __ bind(heap_stable);
266 }
267
268 //
269 // Arguments:
270 //
271 // Inputs:
272 // src: oop location to load from, might be clobbered
273 //
274 // Output:
275 // dst: oop loaded from src location
276 //
277 // Kill:
278 // rscratch1 (scratch reg)
279 //
280 // Alias:
281 // dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
282 //
283 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
284 Register dst, Address src, Register tmp1, Register tmp2) {
285 // 1: non-reference load, no additional barrier is needed
286 if (!is_reference_type(type)) {
287 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
288 return;
289 }
290
291 // 2: load a reference from src location and apply LRB if needed
292 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
293 Register result_dst = dst;
294
295 // Preserve src location for LRB
296 if (dst == src.base() || dst == src.index()) {
297 dst = rscratch1;
298 }
299 assert_different_registers(dst, src.base(), src.index());
300
301 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
302
303 load_reference_barrier(masm, dst, src, decorators);
304
305 if (dst != result_dst) {
306 __ mov(result_dst, dst);
307 dst = result_dst;
308 }
309 } else {
310 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
311 }
312
313 // 3: apply keep-alive barrier if needed
314 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
315 satb_barrier(masm /* masm */,
316 noreg /* obj */,
317 dst /* pre_val */,
318 rthread /* thread */,
319 tmp1 /* tmp1 */,
320 tmp2 /* tmp2 */);
321 }
322 }
323
324 void ShenandoahBarrierSetAssembler::card_barrier(MacroAssembler* masm, Register obj) {
325 assert(ShenandoahCardBarrier, "Should have been checked by caller");
326
327 __ lsr(obj, obj, CardTable::card_shift());
328
329 assert(CardTable::dirty_card_val() == 0, "must be");
330
331 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
332 __ ldr(rscratch1, curr_ct_holder_addr);
333
334 if (UseCondCardMark) {
335 Label L_already_dirty;
336 __ ldrb(rscratch2, Address(obj, rscratch1));
337 __ cbz(rscratch2, L_already_dirty);
338 __ strb(zr, Address(obj, rscratch1));
339 __ bind(L_already_dirty);
340 } else {
341 __ strb(zr, Address(obj, rscratch1));
342 }
343 }
344
345 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
346 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
347 // 1: non-reference types require no barriers
348 if (!is_reference_type(type)) {
349 BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
350 return;
351 }
352
353 // Flatten object address right away for simplicity: likely needed by barriers
354 if (dst.index() == noreg && dst.offset() == 0) {
355 if (dst.base() != tmp3) {
356 __ mov(tmp3, dst.base());
357 }
358 } else {
359 __ lea(tmp3, dst);
360 }
361
362 // 2: pre-barrier: SATB needs the previous value
363 if (ShenandoahBarrierSet::need_satb_barrier(decorators, type)) {
364 satb_barrier(masm,
365 tmp3 /* obj */,
366 tmp2 /* pre_val */,
367 rthread /* thread */,
368 tmp1 /* tmp */,
369 rscratch1 /* tmp2 */);
370 }
371
372 // Store!
373 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
374
375 // 3: post-barrier: card barrier needs store address
376 bool storing_non_null = (val != noreg);
377 if (ShenandoahBarrierSet::need_card_barrier(decorators, type) && storing_non_null) {
378 card_barrier(masm, tmp3);
379 }
380 }
381
382 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
383 Register obj, Register tmp, Label& slowpath) {
384 Label done;
385 // Resolve jobject
386 BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
387
388 // Check for null.
389 __ cbz(obj, done);
390
391 assert(obj != rscratch2, "need rscratch2");
392 Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
393 __ lea(rscratch2, gc_state);
394 __ ldrb(rscratch2, Address(rscratch2));
395
396 // Check for heap in evacuation phase
397 __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
398
399 __ bind(done);
400 }
401
402 void ShenandoahBarrierSetAssembler::try_peek_weak_handle_in_nmethod(MacroAssembler* masm, Register weak_handle, Register obj,
403 Register tmp, Label& slow_path) {
404 assert_different_registers(weak_handle, tmp, noreg);
405 assert_different_registers(obj, tmp, noreg);
406
407 Label done;
408
409 // Peek weak handle using the standard implementation.
410 BarrierSetAssembler::try_peek_weak_handle_in_nmethod(masm, weak_handle, obj, tmp, slow_path);
411
412 // Check if the reference is null, and if it is, take the fast path.
413 __ cbz(obj, done);
414
415 Address gc_state(rthread, ShenandoahThreadLocalData::gc_state_offset());
416 __ lea(tmp, gc_state);
417 __ ldrb(tmp, __ legitimize_address(gc_state, 1, tmp));
418
419 // Check if the heap is under weak-reference/roots processing, in
420 // which case we need to take the slow path.
421 __ tbnz(tmp, ShenandoahHeap::WEAK_ROOTS_BITPOS, slow_path);
422 __ bind(done);
423 }
424
425 void ShenandoahBarrierSetAssembler::check_oop(MacroAssembler* masm, Register obj, Register tmp1, Register tmp2, Label& L_error) {
426 // Check if the oop is in the right area of memory
427 __ mov(tmp2, (intptr_t) Universe::verify_oop_mask());
428 __ andr(tmp1, obj, tmp2);
429 __ mov(tmp2, (intptr_t) Universe::verify_oop_bits());
430
431 // Compare tmp1 and tmp2. We don't use a compare
432 // instruction here because the flags register is live.
433 __ eor(tmp1, tmp1, tmp2);
434 __ cbnz(tmp1, L_error);
435
436 // This routine is sometimes called before applying GC barriers.
437 // With +COH, loading the klass may end up loading forwarding pointer instead.
438 Label L_skip;
439 if (UseCompactObjectHeaders) {
440 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
441 __ ldrb(tmp1, gc_state);
442 __ tbnz(tmp1, ShenandoahHeap::HAS_FORWARDED_BITPOS, L_skip);
443 }
444
445 // Make sure klass is 'reasonable', which is not zero.
446 __ load_narrow_klass(tmp1, obj);
447 __ cbz(tmp1, L_error);
448 __ bind(L_skip);
449 }
450
451 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
452 Register start, Register count, Register scratch) {
453 assert(ShenandoahCardBarrier, "Should have been checked by caller");
454
455 Label L_loop, L_done;
456 const Register end = count;
457
458 // Zero count? Nothing to do.
459 __ cbz(count, L_done);
460
461 // end = start + count << LogBytesPerHeapOop
462 // last element address to make inclusive
463 __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
464 __ sub(end, end, BytesPerHeapOop);
465 __ lsr(start, start, CardTable::card_shift());
466 __ lsr(end, end, CardTable::card_shift());
467
468 // number of bytes to copy
469 __ sub(count, end, start);
470
471 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
472 __ ldr(scratch, curr_ct_holder_addr);
473 __ add(start, start, scratch);
474 __ bind(L_loop);
475 __ strb(zr, Address(start, count));
476 __ subs(count, count, 1);
477 __ br(Assembler::GE, L_loop);
478 __ bind(L_done);
479 }
480
481 #undef __
482
483 address ShenandoahBarrierSetAssembler::parse_jump_address(address pc) {
484 NativeInstruction* ni = nativeInstruction_at(pc);
485 assert(ni->is_jump(), "Initial code version: GC barrier fastpath must be a jump");
486 NativeJump* jmp = nativeJump_at(pc);
487 return jmp->jump_destination();
488 }
489
490 static uint32_t encode_patchable_nop() {
491 return 0xD503201F;
492 }
493
494 static uint32_t encode_patchable_jump(address pc, address target_pc) {
495 int32_t disp = checked_cast<int32_t>((intptr_t)target_pc - (intptr_t)pc);
496 int64_t imm26 = disp >> 2;
497 assert(Assembler::is_simm(imm26, 26), "maximum offset is 128MiB");
498 return 0x14000000 | (imm26 & 0x03FFFFFF);
499 }
500
501 void ShenandoahBarrierSetAssembler::insert_patchable_nop(address pc) {
502 *((uint32_t*)pc) = encode_patchable_nop();
503 }
504
505 void ShenandoahBarrierSetAssembler::insert_patchable_jump(address pc, address target_pc) {
506 *((uint32_t*)pc) = encode_patchable_jump(pc, target_pc);
507 }
508
509 bool ShenandoahBarrierSetAssembler::is_patchable_nop(address pc) {
510 return *((uint32_t*)pc) == encode_patchable_nop();
511 }
512
513 bool ShenandoahBarrierSetAssembler::is_patchable_jump(address pc, address target_pc) {
514 return *((uint32_t*)pc) == encode_patchable_jump(pc, target_pc);
515 }
516
517 #ifdef COMPILER1
518
519 #define __ ce->masm()->
520
521 void ShenandoahBarrierSetAssembler::keepalive_barrier_c1_stub(LIR_Assembler* ce, ShenandoahKeepaliveBarrierStub* stub) {
522 __ bind(*stub->entry());
523
524 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
525
526 Register obj = stub->obj()->as_register();
527
528 if (stub->do_load()) {
529 ce->mem2reg(stub->addr(), stub->obj(), T_OBJECT, lir_patch_none, nullptr, /* wide = */ false);
530 }
531 __ cbz(obj, *stub->continuation());
532 ce->store_parameter(obj, 0);
533 __ far_call(RuntimeAddress(bs->keepalive_barrier_stub()));
534 __ b(*stub->continuation());
535 }
536
537 void ShenandoahBarrierSetAssembler::load_reference_barrier_c1_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
538 __ bind(*stub->entry());
539
540 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
541
542 Register obj = stub->obj()->as_register();
543 Register addr = stub->addr()->as_pointer_register();
544 Register slow_result = stub->slow_result()->as_register();
545 assert_different_registers(obj, addr, slow_result);
546 assert(slow_result == r0, "C1 must know about our slow call result register");
547
548 ce->store_parameter(obj, 0);
549 ce->store_parameter(addr, 1);
550 __ far_call(RuntimeAddress(bs->load_reference_barrier_stub(stub->decorators())));
551 if (obj != slow_result) {
552 __ mov(obj, slow_result);
553 }
554
555 __ b(*stub->continuation());
556 }
557
558 #undef __
559
560 #define __ sasm->
561
562 void ShenandoahBarrierSetAssembler::keepalive_barrier_c1_runtime_stub(StubAssembler* sasm) {
563 __ prologue("shenandoah_keepalive_barrier", false);
564 const Register tmp_obj = r0;
565 const Register tmp1 = r1;
566 const Register tmp2 = r2;
567 __ push(RegSet::of(tmp1, tmp2, tmp_obj), sp);
568 __ load_parameter(0, tmp_obj);
569 satb_barrier(sasm, noreg, tmp_obj, rthread, tmp1, tmp2);
570 __ pop(RegSet::of(tmp1, tmp2, tmp_obj), sp);
571 __ epilogue();
572 }
573
574 void ShenandoahBarrierSetAssembler::load_reference_barrier_c1_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
575 __ prologue("shenandoah_load_reference_barrier", false);
576 const Register tmp_obj = r0;
577 const Register tmp_addr = r1;
578 __ push(RegSet::of(tmp_addr), sp);
579 __ load_parameter(0, tmp_obj);
580 __ load_parameter(1, tmp_addr);
581 load_reference_barrier(sasm, tmp_obj, Address(tmp_addr, 0), decorators);
582 __ pop(RegSet::of(tmp_addr), sp);
583 __ epilogue();
584 }
585
586 #undef __
587
588 #endif // COMPILER1
589
590 #ifdef COMPILER2
591
592 #undef __
593 #define __ masm->
594
595
596 void ShenandoahBarrierSetAssembler::load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address src, Register tmp1, Register tmp2, bool is_narrow, bool is_acquire) {
597 // Do the actual load. This load is the candidate for implicit null check, and MUST come first.
598 if (is_narrow) {
599 if (is_acquire) {
600 assert(src.getMode() == Address::base_plus_offset && src.offset() == 0,
601 "is_acquire path requires address to be base-only");
602 __ ldarw(dst, src.base());
603 } else {
604 __ ldrw(dst, src);
605 }
606 } else {
607 if (is_acquire) {
608 assert(src.getMode() == Address::base_plus_offset && src.offset() == 0,
609 "is_acquire path requires address to be base-only");
610 __ ldar(dst, src.base());
611 } else {
612 __ ldr(dst, src);
613 }
614 }
615
616 ShenandoahBarrierStubC2::load_post(masm, node, dst, src, tmp1, tmp2, is_narrow);
617 }
618
619 void ShenandoahBarrierSetAssembler::store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow,
620 Register src, bool src_narrow, Register tmp1, Register tmp2, Register tmp3, bool is_volatile) {
621
622 ShenandoahBarrierStubC2::store_pre(masm, node, dst, tmp1, tmp2, tmp3, dst_narrow);
623
624 // Do the actual store
625 if (dst_narrow) {
626 if (!src_narrow) {
627 // Need to encode into rscratch, because we cannot clobber src.
628 if ((node->barrier_data() & ShenandoahBitNotNull) == 0) {
629 __ encode_heap_oop(tmp2, src);
630 } else {
631 __ encode_heap_oop_not_null(tmp2, src);
632 }
633 src = tmp2;
634 }
635
636 if (is_volatile) {
637 assert(dst.getMode() == Address::base_plus_offset && dst.offset() == 0,
638 "is_acquire path requires address to be base-only");
639 __ stlrw(src, dst.base());
640 } else {
641 __ strw(src, dst);
642 }
643 } else {
644 if (is_volatile) {
645 assert(dst.getMode() == Address::base_plus_offset && dst.offset() == 0,
646 "is_acquire path requires address to be base-only");
647 __ stlr(src, dst.base());
648 } else {
649 __ str(src, dst);
650 }
651 }
652
653 ShenandoahBarrierStubC2::store_post(masm, node, dst, tmp2, tmp3);
654 }
655
656 void ShenandoahBarrierSetAssembler::compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr,
657 Register oldval, Register newval, Register tmp1, Register tmp2, Register tmp3, bool exchange, bool narrow, bool weak, bool acquire) {
658 Assembler::operand_size op_size = narrow ? Assembler::word : Assembler::xword;
659
660 ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp1, tmp2, tmp3, narrow);
661
662 atomic_memory_order order = acquire ? memory_order_seq_cst : memory_order_release;
663
664 // CAS!
665 if (weak) {
666 __ cmpxchg_weak(addr, oldval, newval, op_size, order, exchange ? res : noreg);
667 } else {
668 __ cmpxchg(addr, oldval, newval, op_size, order, exchange ? res : noreg);
669 }
670
671 // If we need a boolean result out of CAS, set the flag appropriately and promote the result.
672 if (!exchange) {
673 assert(res != noreg, "need result register");
674 __ cset(res, Assembler::EQ);
675 }
676
677 ShenandoahBarrierStubC2::load_store_post(masm, node, Address(addr, 0), tmp2, tmp3);
678 }
679
680 void ShenandoahBarrierSetAssembler::get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval,
681 Register newval, Register addr, Register tmp1, Register tmp2, Register tmp3, bool is_acquire) {
682 bool is_narrow = node->bottom_type()->isa_narrowoop();
683
684 ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp1, tmp2, tmp3, is_narrow);
685
686 if (is_narrow) {
687 if (is_acquire) {
688 __ atomic_xchgalw(preval, newval, addr);
689 } else {
690 __ atomic_xchgw(preval, newval, addr);
691 }
692 } else {
693 if (is_acquire) {
694 __ atomic_xchgal(preval, newval, addr);
695 } else {
696 __ atomic_xchg(preval, newval, addr);
697 }
698 }
699
700 ShenandoahBarrierStubC2::load_store_post(masm, node, Address(addr, 0), tmp2, tmp3);
701 }
702
703 #undef __
704 #define __ masm.
705
706 void ShenandoahBarrierStubC2::cardtable(MacroAssembler& masm, Address address, Register tmp1, Register tmp2) {
707 assert(CardTable::dirty_card_val() == 0, "must be");
708 Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
709
710 // tmp1 = card table base (holder)
711 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
712 __ ldr(tmp1, curr_ct_holder_addr);
713
714 // tmp2 = effective address
715 __ lea(tmp2, address);
716
717 // tmp2 = &card_table[ addr >> CardTable::card_shift() ] ; card index
718 __ add(tmp2, tmp1, tmp2, Assembler::LSR, CardTable::card_shift());
719
720 if (UseCondCardMark) {
721 Label L_already_dirty;
722 __ ldrb(tmp1, Address(tmp2));
723 __ cbz(tmp1, L_already_dirty);
724 __ strb(zr, Address(tmp2));
725 __ bind(L_already_dirty);
726 } else {
727 __ strb(zr, Address(tmp2));
728 }
729 }
730
731 void ShenandoahBarrierStubC2::patchable_jump(MacroAssembler& masm, const char gc_state, bool jump_when_state, Label* L_target) {
732 PhaseOutput* const output = Compile::current()->output();
733 if (output->in_scratch_emit_size()) {
734 // Avoid binding L_target in scratch emits.
735 // We know the patched check is exactly one instruction long.
736 __ nop();
737 return;
738 }
739
740 // Emit the unconditional branch in the first version of the method.
741 // Let the rest of runtime figure out how to manage it.
742 __ relocate(patchable_barrier_Relocation::spec(ShenandoahNMethod::encode_to_reloc(gc_state, jump_when_state)));
743 __ b(*L_target);
744 }
745
746 void ShenandoahBarrierStubC2::enter_if_gc_state(MacroAssembler& masm, const char test_state) {
747 Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
748 patchable_jump_if_gc_state(masm, test_state, entry());
749 __ bind(*continuation());
750 }
751
752 void ShenandoahBarrierStubC2::emit_code(MacroAssembler& masm) {
753 Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
754 assert(_needs_keep_alive_barrier || _needs_load_ref_barrier, "Why are you here?");
755 PhaseOutput* const output = Compile::current()->output();
756
757 // We piggyback on scratch_emit_size mode to compute the slowpath stub size.
758 // We'll use that information to decide whether we need a far jump to the
759 // stub entry point or not. In scratch_emit_size mode we don't bind entry()
760 // because otherwise it will be rebound when we later emit the instructions
761 // for real.
762 if (!output->in_scratch_emit_size()) {
763 __ bind(*entry());
764 }
765
766 // If we need to load ourselves, do it here.
767 if (_do_load) {
768 if (_narrow) {
769 __ ldrw(_obj, _addr);
770 } else {
771 __ ldr(_obj, _addr);
772 }
773 }
774
775 // If the object is null, there is no point in applying barriers.
776 maybe_far_jump_if_zero(masm, _obj);
777
778 // We need to make sure that loads done by callers survive across slow-path calls.
779 // For self-loads, we need to care about the case when both KA and LRB are enabled (rare).
780 bool needs_both_barriers = _needs_keep_alive_barrier && _needs_load_ref_barrier;
781 if (!_do_load || needs_both_barriers) {
782 preserve(_obj);
783 }
784
785 // Go for barriers. Barriers can return straight to continuation, as long
786 // as another barrier is not needed and we can reach the fastpath.
787 if (needs_both_barriers) {
788 // The Load match rule in the .ad file may have legitimized the load
789 // address using a TEMP register and in that case we need to explicitly
790 // preserve them here, because the RA does not consider TEMP as live-in,
791 // and the KA runtime call may clobber them and cause a crash on the
792 // subsequent LRB stub.
793 if (_addr.base() != noreg) {
794 preserve(_addr.base());
795 }
796 if (_addr.index() != noreg) {
797 preserve(_addr.index());
798 }
799 keepalive(masm, nullptr);
800 lrb(masm);
801 } else if (_needs_keep_alive_barrier) {
802 keepalive(masm, continuation());
803 } else if (_needs_load_ref_barrier) {
804 lrb(masm);
805 } else {
806 ShouldNotReachHere();
807 }
808 }
809
810 void ShenandoahBarrierStubC2::maybe_far_jump_if_zero(MacroAssembler& masm, Register reg) {
811 if (_needs_far_jump) {
812 Label L_short_jump;
813 __ cbnz(reg, L_short_jump);
814 __ b(*continuation());
815 __ bind(L_short_jump);
816 } else {
817 __ cbz(reg, *continuation());
818 }
819 }
820
821 void ShenandoahBarrierStubC2::keepalive(MacroAssembler& masm, Label* L_done) {
822 Address index(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
823 Address buffer(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
824 Label L_through, L_slowpath;
825
826 // If another barrier is enabled as well, do a check for a specific barrier.
827 if (_needs_load_ref_barrier) {
828 assert(L_done == nullptr, "Should be");
829 char state_to_check = ShenandoahHeap::MARKING;
830 patchable_jump_if_not_gc_state(masm, state_to_check, &L_through);
831 }
832
833 // Fast-path: put object into buffer.
834 // If buffer is already full, go slow.
835 __ ldr(_tmp1, index);
836 __ cbz(_tmp1, L_slowpath);
837 __ sub(_tmp1, _tmp1, wordSize);
838 __ str(_tmp1, index);
839 __ ldr(_tmp2, buffer);
840
841 // Store the object in queue.
842 // If object is narrow, we need to decode it before inserting.
843 if (_narrow) {
844 __ add(_tmp2, _tmp2, _tmp1);
845 __ decode_heap_oop_not_null(_tmp1, _obj);
846 __ str(_tmp1, Address(_tmp2));
847 } else {
848 // Buffer is 64-bit address, must be in base register.
849 __ str(_obj, Address(_tmp2, _tmp1));
850 }
851
852 // Fast-path exits here.
853 if (L_done != nullptr) {
854 __ b(*L_done);
855 } else {
856 __ b(L_through);
857 }
858
859 // Slow-path: call runtime to handle.
860 __ bind(L_slowpath);
861
862 {
863 SaveLiveRegisters slr(&masm, this);
864
865 // Go to runtime and handle the rest there.
866 __ mov(c_rarg0, _obj);
867 __ lea(lr, RuntimeAddress(keepalive_runtime_entry_addr()));
868 __ blr(lr);
869 }
870 if (L_done != nullptr) {
871 __ b(*L_done);
872 } else {
873 __ bind(L_through);
874 }
875 }
876
877 void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm) {
878 Label L_slow;
879
880 // If another barrier is enabled as well, do a check for a specific barrier.
881 if (_needs_keep_alive_barrier) {
882 char state_to_check = ShenandoahHeap::HAS_FORWARDED | (_needs_load_ref_weak_barrier ? ShenandoahHeap::WEAK_ROOTS : 0);
883 patchable_jump_if_not_gc_state(masm, state_to_check, continuation());
884 }
885
886 // If weak references are being processed, weak/phantom loads need to go slow,
887 // regardless of their cset status.
888 if (_needs_load_ref_weak_barrier) {
889 char state_to_check = ShenandoahHeap::WEAK_ROOTS;
890 patchable_jump_if_gc_state(masm, state_to_check, &L_slow);
891 }
892
893 // Cset-check. Fall-through to slow if in collection set.
894 bool is_aot = AOTCodeCache::is_on_for_dump();
895 if (!is_aot) {
896 __ mov(_tmp1, ShenandoahHeap::in_cset_fast_test_addr());
897 if (_narrow) {
898 __ decode_heap_oop_not_null(_tmp2, _obj);
899 __ add(_tmp1, _tmp1, _tmp2, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
900 } else {
901 __ add(_tmp1, _tmp1, _obj, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
902 }
903 } else {
904 // Generating AOT code, pull the cset bitmap and region shift from AOT table.
905 if (_narrow) {
906 __ decode_heap_oop_not_null(_tmp1, _obj);
907 } else {
908 __ mov(_tmp1, _obj);
909 }
910 __ lea(_tmp2, ExternalAddress(AOTRuntimeConstants::grain_shift_address()));
911 __ ldrw(_tmp2, Address(_tmp2));
912 __ lsrv(_tmp2, _tmp1, _tmp2);
913 __ lea(_tmp1, ExternalAddress(AOTRuntimeConstants::cset_base_address()));
914 __ ldr(_tmp1, Address(_tmp1));
915 __ add(_tmp1, _tmp1, _tmp2);
916 }
917 __ ldrb(_tmp1, Address(_tmp1, 0));
918 maybe_far_jump_if_zero(masm, _tmp1);
919
920 // Slow path
921 __ bind(L_slow);
922
923 // Obj is the result, need to temporarily stop preserving it.
924 bool is_obj_preserved = is_preserved(_obj);
925 if (is_obj_preserved) {
926 dont_preserve(_obj);
927 }
928 {
929 SaveLiveRegisters slr(&masm, this);
930
931 // Shuffle in the arguments. The end result should be:
932 // c_rarg0 <-- obj
933 // c_rarg1 <-- lea(addr)
934 if (c_rarg0 == _obj) {
935 __ lea(c_rarg1, _addr);
936 } else if (c_rarg1 == _obj) {
937 __ mov(_tmp1, c_rarg1);
938 __ lea(c_rarg1, _addr);
939 __ mov(c_rarg0, _tmp1);
940 } else {
941 assert_different_registers(c_rarg1, _obj);
942 __ lea(c_rarg1, _addr);
943 __ mov(c_rarg0, _obj);
944 }
945
946 // Go to runtime and handle the rest there.
947 __ lea(lr, RuntimeAddress(lrb_runtime_entry_addr()));
948 __ blr(lr);
949
950 // Save the result where needed. Narrow entries return narrowOop (32 bits)
951 // and AAPCS does not guarantee the upper 32 bits of x0 are zero.
952 if (_narrow) {
953 __ movw(_obj, r0);
954 } else if (_obj != r0) {
955 __ mov(_obj, r0);
956 }
957 }
958 if (is_obj_preserved) {
959 preserve(_obj);
960 }
961
962 __ b(*continuation());
963 }
964
965 int ShenandoahBarrierStubC2::available_gp_registers() {
966 Unimplemented(); // Not used
967 return 0;
968 }
969
970 bool ShenandoahBarrierStubC2::is_special_register(Register r) {
971 Unimplemented(); // Not used
972 return true;
973 }
974
975 static ShenandoahBarrierSetC2State* barrier_set_state() {
976 return reinterpret_cast<ShenandoahBarrierSetC2State*>(Compile::current()->barrier_set_state());
977 }
978
979 static int get_stub_size(ShenandoahBarrierStubC2* stub) {
980 PhaseOutput* const output = Compile::current()->output();
981 assert(output->in_scratch_emit_size(), "only used when in scratch_emit_size.");
982 BufferBlob* const blob = output->scratch_buffer_blob();
983 CodeBuffer cb(blob->content_begin(), (address)output->scratch_locs_memory() - blob->content_begin());
984 MacroAssembler masm(&cb);
985 stub->emit_code(masm);
986 return cb.insts_size();
987 }
988
989 void ShenandoahBarrierStubC2::post_init() {
990 // If we are in scratch emit mode we assume worst case, and force the use of
991 // far branches.
992 PhaseOutput* const output = Compile::current()->output();
993 ShenandoahBarrierSetC2State* state = barrier_set_state();
994 if (output->in_scratch_emit_size()) {
995 state->inc_stubs_current_total_size(get_stub_size(this));
996 _needs_far_jump = true;
997 return;
998 }
999
1000 // The logic implemented in this stub only uses short jumps (cbz, cbnz) if
1001 // the aggregation of all relevant code sections of a method is less than 1MB
1002 // - 2KB. We could be more aggressive and try and compute the distance
1003 // between the fastpath branch and the stub entry but in practice not many
1004 // methods reach the 1MB size.
1005 const BufferSizingData* sizing = output->buffer_sizing_data();
1006 const int code_size = sizing->_code + state->stubs_current_total_size();
1007
1008 // Maximum backward range is 1M. Maximum forward reach is 1M - 4bytes.
1009 // Subtract 2K to be ultra conservative.
1010 const int cond_branch_max_reach = (int)(1*M - 2*K);
1011 _needs_far_jump = code_size >= cond_branch_max_reach;
1012 }
1013
1014 #endif // COMPILER2