1 /*
   2  * Copyright (c) 2026, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
   4  * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
  28 #include "gc/shenandoah/mode/shenandoahMode.hpp"
  29 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
  30 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
  31 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
  32 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
  33 #include "gc/shenandoah/shenandoahNMethod.inline.hpp"
  34 #include "gc/shenandoah/shenandoahRuntime.hpp"
  35 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
  36 #include "interpreter/interp_masm.hpp"
  37 #include "interpreter/interpreter.hpp"
  38 #include "nativeInst_aarch64.hpp"
  39 #include "runtime/javaThread.hpp"
  40 #include "runtime/sharedRuntime.hpp"
  41 #ifdef COMPILER1
  42 #include "c1/c1_LIRAssembler.hpp"
  43 #include "c1/c1_MacroAssembler.hpp"
  44 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
  45 #endif
  46 #ifdef COMPILER2
  47 #include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
  48 #include "opto/output.hpp"
  49 #endif
  50 
  51 #define __ masm->
  52 
  53 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
  54                                                        Register src, Register dst, Register count, RegSet saved_regs) {
  55   if (is_oop) {
  56     bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
  57     if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {
  58 
  59       Label done;
  60 
  61       // Avoid calling runtime if count == 0
  62       __ cbz(count, done);
  63 
  64       // Is GC active?
  65       assert(!saved_regs.contains(rscratch1), "Sanity: about to clobber rscratch1");
  66       assert(!saved_regs.contains(rscratch2), "Sanity: about to clobber rscratch2");
  67       Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
  68       __ ldrb(rscratch1, gc_state);
  69       if (ShenandoahSATBBarrier && dest_uninitialized) {
  70         __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done);
  71       } else {
  72         __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING);
  73         __ tst(rscratch1, rscratch2);
  74         __ br(Assembler::EQ, done);
  75       }
  76 
  77       __ push_call_clobbered_registers();
  78       // If arguments are not in proper places, shuffle them.
  79       // Doing this via the stack is the most straight-forward way to avoid
  80       // accidentally smashing any register.
  81       if (c_rarg0 != src || c_rarg1 != dst || c_rarg2 != count) {
  82         __ push(RegSet::of(src), sp);
  83         __ push(RegSet::of(dst), sp);
  84         __ push(RegSet::of(count), sp);
  85         __ pop(RegSet::of(c_rarg2), sp);
  86         __ pop(RegSet::of(c_rarg1), sp);
  87         __ pop(RegSet::of(c_rarg0), sp);
  88       }
  89       address target = nullptr;
  90       if (UseCompressedOops) {
  91         target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop);
  92       } else {
  93         target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop);
  94       }
  95       __ call_VM_leaf(target, 3);
  96       __ pop_call_clobbered_registers();
  97       __ bind(done);
  98     }
  99   }
 100 }
 101 
 102 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
 103                                                        Register start, Register count, Register tmp) {
 104   if (ShenandoahCardBarrier && is_oop) {
 105     gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp);
 106   }
 107 }
 108 
 109 void ShenandoahBarrierSetAssembler::satb_barrier(MacroAssembler* masm,
 110                                                  Register obj,
 111                                                  Register pre_val,
 112                                                  Register thread,
 113                                                  Register tmp1,
 114                                                  Register tmp2) {
 115   assert(ShenandoahSATBBarrier, "Should be checked by caller");
 116   assert(thread == rthread, "must be");
 117 
 118   Label done;
 119   Label runtime;
 120 
 121   assert_different_registers(obj, pre_val, tmp1, tmp2);
 122   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
 123 
 124   Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 125   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 126 
 127   // Is marking active?
 128   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 129   __ ldrb(tmp1, gc_state);
 130   __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
 131 
 132   // Do we need to load the previous value?
 133   if (obj != noreg) {
 134     if (UseCompressedOops) {
 135       __ ldrw(pre_val, Address(obj, 0));
 136       __ decode_heap_oop(pre_val);
 137     } else {
 138       __ ldr(pre_val, Address(obj, 0));
 139     }
 140   }
 141 
 142   // Is the previous value null?
 143   __ cbz(pre_val, done);
 144 
 145   // Can we store original value in the thread's buffer?
 146   // Is index == 0?
 147   // (The index field is typed as size_t.)
 148 
 149   __ ldr(tmp1, index);                      // tmp := *index_adr
 150   __ cbz(tmp1, runtime);                    // tmp == 0?
 151                                         // If yes, goto runtime
 152 
 153   __ sub(tmp1, tmp1, wordSize);             // tmp := tmp - wordSize
 154   __ str(tmp1, index);                      // *index_adr := tmp
 155   __ ldr(tmp2, buffer);
 156   __ add(tmp1, tmp1, tmp2);                 // tmp := tmp + *buffer_adr
 157 
 158   // Record the previous value
 159   __ str(pre_val, Address(tmp1, 0));
 160   __ b(done);
 161 
 162   __ bind(runtime);
 163 
 164   // Slow-path call
 165   __ enter(/* strip_ret_addr = */ true);
 166   __ push_call_clobbered_registers();
 167   if (c_rarg0 != pre_val) {
 168     __ mov(c_rarg0, pre_val);
 169   }
 170   // Calling with super_call_VM_leaf with c_rarg0 bypasses interpreter checks and avoids any moves.
 171   __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), c_rarg0);
 172   __ pop_call_clobbered_registers();
 173   __ leave();
 174 
 175   __ bind(done);
 176 }
 177 
 178 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) {
 179   assert(ShenandoahLoadRefBarrier, "Should be enabled");
 180   assert(dst != rscratch2, "need rscratch2");
 181   assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2);
 182 
 183   bool is_strong  = ShenandoahBarrierSet::is_strong_access(decorators);
 184   bool is_weak    = ShenandoahBarrierSet::is_weak_access(decorators);
 185   bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
 186   bool is_native  = ShenandoahBarrierSet::is_native_access(decorators);
 187   bool is_narrow  = UseCompressedOops && !is_native;
 188 
 189   Label heap_stable, not_cset;
 190   Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 191   __ ldrb(rscratch2, gc_state);
 192 
 193   // Check for heap stability
 194   if (is_strong) {
 195     __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
 196   } else {
 197     Label lrb;
 198     __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb);
 199     __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
 200     __ bind(lrb);
 201   }
 202 
 203   // use r1 for load address
 204   Register result_dst = dst;
 205   if (dst == r1) {
 206     __ mov(rscratch1, dst);
 207     dst = rscratch1;
 208   }
 209 
 210   // Save r0 and r1, unless it is an output register
 211   RegSet to_save = RegSet::of(r0, r1) - result_dst;
 212   __ push(to_save, sp);
 213   __ lea(r1, load_addr);
 214   __ mov(r0, dst);
 215 
 216   // Test for in-cset
 217   if (is_strong) {
 218     if (AOTCodeCache::is_on_for_dump()) {
 219       __ lea(rscratch2, ExternalAddress(AOTRuntimeConstants::cset_base_address()));
 220       __ ldr(rscratch2, Address(rscratch2));
 221       __ lea(rscratch1, ExternalAddress(AOTRuntimeConstants::grain_shift_address()));
 222       __ ldrw(rscratch1, Address(rscratch1));
 223       __ lsrv(rscratch1, r0, rscratch1);
 224     } else {
 225       __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr());
 226       __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 227     }
 228     __ ldrb(rscratch2, Address(rscratch2, rscratch1));
 229     __ tbz(rscratch2, 0, not_cset);
 230   }
 231 
 232   // Slow-path call
 233   __ enter(/* strip_ret_addr = */ true);
 234   __ push_call_clobbered_registers();
 235   address target = nullptr;
 236   if (is_strong) {
 237     if (is_narrow) {
 238       target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow);
 239     } else {
 240       target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong);
 241     }
 242   } else if (is_weak) {
 243     if (is_narrow) {
 244       target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow);
 245     } else {
 246       target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak);
 247     }
 248   } else {
 249     assert(is_phantom, "only remaining strength");
 250     assert(!is_narrow, "phantom access cannot be narrow");
 251     target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom);
 252   }
 253   // Calling with super_call_VM_leaf with c_rarg0/1 bypasses interpreter checks and avoids any moves.
 254   __ super_call_VM_leaf(target, c_rarg0, c_rarg1);
 255   __ mov(rscratch1, r0);
 256   __ pop_call_clobbered_registers();
 257   __ mov(r0, rscratch1);
 258   __ leave();
 259 
 260   __ bind(not_cset);
 261 
 262   __ mov(result_dst, r0);
 263   __ pop(to_save, sp);
 264 
 265   __ bind(heap_stable);
 266 }
 267 
 268 //
 269 // Arguments:
 270 //
 271 // Inputs:
 272 //   src:        oop location to load from, might be clobbered
 273 //
 274 // Output:
 275 //   dst:        oop loaded from src location
 276 //
 277 // Kill:
 278 //   rscratch1 (scratch reg)
 279 //
 280 // Alias:
 281 //   dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
 282 //
 283 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 284                                             Register dst, Address src, Register tmp1, Register tmp2) {
 285   // 1: non-reference load, no additional barrier is needed
 286   if (!is_reference_type(type)) {
 287     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
 288     return;
 289   }
 290 
 291   // 2: load a reference from src location and apply LRB if needed
 292   if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
 293     Register result_dst = dst;
 294 
 295     // Preserve src location for LRB
 296     if (dst == src.base() || dst == src.index()) {
 297       dst = rscratch1;
 298     }
 299     assert_different_registers(dst, src.base(), src.index());
 300 
 301     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
 302 
 303     load_reference_barrier(masm, dst, src, decorators);
 304 
 305     if (dst != result_dst) {
 306       __ mov(result_dst, dst);
 307       dst = result_dst;
 308     }
 309   } else {
 310     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
 311   }
 312 
 313   // 3: apply keep-alive barrier if needed
 314   if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
 315     satb_barrier(masm /* masm */,
 316                  noreg /* obj */,
 317                  dst /* pre_val */,
 318                  rthread /* thread */,
 319                  tmp1 /* tmp1 */,
 320                  tmp2 /* tmp2 */);
 321   }
 322 }
 323 
 324 void ShenandoahBarrierSetAssembler::card_barrier(MacroAssembler* masm, Register obj) {
 325   assert(ShenandoahCardBarrier, "Should have been checked by caller");
 326 
 327   __ lsr(obj, obj, CardTable::card_shift());
 328 
 329   assert(CardTable::dirty_card_val() == 0, "must be");
 330 
 331   Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
 332   __ ldr(rscratch1, curr_ct_holder_addr);
 333 
 334   if (UseCondCardMark) {
 335     Label L_already_dirty;
 336     __ ldrb(rscratch2, Address(obj, rscratch1));
 337     __ cbz(rscratch2, L_already_dirty);
 338     __ strb(zr, Address(obj, rscratch1));
 339     __ bind(L_already_dirty);
 340   } else {
 341     __ strb(zr, Address(obj, rscratch1));
 342   }
 343 }
 344 
 345 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 346                                              Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
 347   // 1: non-reference types require no barriers
 348   if (!is_reference_type(type)) {
 349     BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
 350     return;
 351   }
 352 
 353   // Flatten object address right away for simplicity: likely needed by barriers
 354   if (dst.index() == noreg && dst.offset() == 0) {
 355     if (dst.base() != tmp3) {
 356       __ mov(tmp3, dst.base());
 357     }
 358   } else {
 359     __ lea(tmp3, dst);
 360   }
 361 
 362   // 2: pre-barrier: SATB needs the previous value
 363   if (ShenandoahBarrierSet::need_satb_barrier(decorators, type)) {
 364     satb_barrier(masm,
 365                  tmp3 /* obj */,
 366                  tmp2 /* pre_val */,
 367                  rthread /* thread */,
 368                  tmp1 /* tmp */,
 369                  rscratch1 /* tmp2 */);
 370   }
 371 
 372   // Store!
 373   BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
 374 
 375   // 3: post-barrier: card barrier needs store address
 376   bool storing_non_null = (val != noreg);
 377   if (ShenandoahBarrierSet::need_card_barrier(decorators, type) && storing_non_null) {
 378     card_barrier(masm, tmp3);
 379   }
 380 }
 381 
 382 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 383                                                                   Register obj, Register tmp, Label& slowpath) {
 384   Label done;
 385   // Resolve jobject
 386   BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
 387 
 388   // Check for null.
 389   __ cbz(obj, done);
 390 
 391   assert(obj != rscratch2, "need rscratch2");
 392   Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
 393   __ lea(rscratch2, gc_state);
 394   __ ldrb(rscratch2, Address(rscratch2));
 395 
 396   // Check for heap in evacuation phase
 397   __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
 398 
 399   __ bind(done);
 400 }
 401 
 402 void ShenandoahBarrierSetAssembler::try_peek_weak_handle_in_nmethod(MacroAssembler* masm, Register weak_handle, Register obj,
 403                                                                     Register tmp, Label& slow_path) {
 404   assert_different_registers(weak_handle, tmp, noreg);
 405   assert_different_registers(obj, tmp, noreg);
 406 
 407   Label done;
 408 
 409   // Peek weak handle using the standard implementation.
 410   BarrierSetAssembler::try_peek_weak_handle_in_nmethod(masm, weak_handle, obj, tmp, slow_path);
 411 
 412   // Check if the reference is null, and if it is, take the fast path.
 413   __ cbz(obj, done);
 414 
 415   Address gc_state(rthread, ShenandoahThreadLocalData::gc_state_offset());
 416   __ lea(tmp, gc_state);
 417   __ ldrb(tmp, __ legitimize_address(gc_state, 1, tmp));
 418 
 419   // Check if the heap is under weak-reference/roots processing, in
 420   // which case we need to take the slow path.
 421   __ tbnz(tmp, ShenandoahHeap::WEAK_ROOTS_BITPOS, slow_path);
 422   __ bind(done);
 423 }
 424 
 425 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
 426                                                                      Register start, Register count, Register scratch) {
 427   assert(ShenandoahCardBarrier, "Should have been checked by caller");
 428 
 429   Label L_loop, L_done;
 430   const Register end = count;
 431 
 432   // Zero count? Nothing to do.
 433   __ cbz(count, L_done);
 434 
 435   // end = start + count << LogBytesPerHeapOop
 436   // last element address to make inclusive
 437   __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
 438   __ sub(end, end, BytesPerHeapOop);
 439   __ lsr(start, start, CardTable::card_shift());
 440   __ lsr(end, end, CardTable::card_shift());
 441 
 442   // number of bytes to copy
 443   __ sub(count, end, start);
 444 
 445   Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
 446   __ ldr(scratch, curr_ct_holder_addr);
 447   __ add(start, start, scratch);
 448   __ bind(L_loop);
 449   __ strb(zr, Address(start, count));
 450   __ subs(count, count, 1);
 451   __ br(Assembler::GE, L_loop);
 452   __ bind(L_done);
 453 }
 454 
 455 #undef __
 456 
 457 #ifdef COMPILER1
 458 
 459 #define __ ce->masm()->
 460 
 461 void ShenandoahBarrierSetAssembler::keepalive_barrier_c1_stub(LIR_Assembler* ce, ShenandoahKeepaliveBarrierStub* stub) {
 462   __ bind(*stub->entry());
 463 
 464   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 465 
 466   Register obj = stub->obj()->as_register();
 467 
 468   if (stub->do_load()) {
 469     ce->mem2reg(stub->addr(), stub->obj(), T_OBJECT, lir_patch_none, nullptr, /* wide = */ false);
 470   }
 471   __ cbz(obj, *stub->continuation());
 472   ce->store_parameter(obj, 0);
 473   __ far_call(RuntimeAddress(bs->keepalive_barrier_stub()));
 474   __ b(*stub->continuation());
 475 }
 476 
 477 void ShenandoahBarrierSetAssembler::load_reference_barrier_c1_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
 478   __ bind(*stub->entry());
 479 
 480   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 481 
 482   Register obj = stub->obj()->as_register();
 483   Register addr = stub->addr()->as_pointer_register();
 484   Register slow_result = stub->slow_result()->as_register();
 485   assert_different_registers(obj, addr, slow_result);
 486   assert(slow_result == r0, "C1 must know about our slow call result register");
 487 
 488   ce->store_parameter(obj, 0);
 489   ce->store_parameter(addr, 1);
 490   __ far_call(RuntimeAddress(bs->load_reference_barrier_stub(stub->decorators())));
 491   if (obj != slow_result) {
 492     __ mov(obj, slow_result);
 493   }
 494 
 495   __ b(*stub->continuation());
 496 }
 497 
 498 #undef __
 499 
 500 #define __ sasm->
 501 
 502 void ShenandoahBarrierSetAssembler::keepalive_barrier_c1_runtime_stub(StubAssembler* sasm) {
 503   __ prologue("shenandoah_keepalive_barrier", false);
 504   const Register tmp_obj = r0;
 505   const Register tmp1 = r1;
 506   const Register tmp2 = r2;
 507   __ push(RegSet::of(tmp1, tmp2, tmp_obj), sp);
 508   __ load_parameter(0, tmp_obj);
 509   satb_barrier(sasm, noreg, tmp_obj, rthread, tmp1, tmp2);
 510   __ pop(RegSet::of(tmp1, tmp2, tmp_obj), sp);
 511   __ epilogue();
 512 }
 513 
 514 void ShenandoahBarrierSetAssembler::load_reference_barrier_c1_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
 515   __ prologue("shenandoah_load_reference_barrier", false);
 516   const Register tmp_obj = r0;
 517   const Register tmp_addr = r1;
 518   __ push(RegSet::of(tmp_addr), sp);
 519   __ load_parameter(0, tmp_obj);
 520   __ load_parameter(1, tmp_addr);
 521   load_reference_barrier(sasm, tmp_obj, Address(tmp_addr, 0), decorators);
 522   __ pop(RegSet::of(tmp_addr), sp);
 523   __ epilogue();
 524 }
 525 
 526 #undef __
 527 
 528 #endif // COMPILER1
 529 
 530 #ifdef COMPILER2
 531 
 532 #undef __
 533 #define __ masm->
 534 
 535 
 536 void ShenandoahBarrierSetAssembler::load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address src, Register tmp1, Register tmp2, bool is_narrow, bool is_acquire) {
 537   // Do the actual load. This load is the candidate for implicit null check, and MUST come first.
 538   if (is_narrow) {
 539     if (is_acquire) {
 540       assert(src.getMode() == Address::base_plus_offset && src.offset() == 0,
 541           "is_acquire path requires address to be base-only");
 542       __ ldarw(dst, src.base());
 543     } else {
 544       __ ldrw(dst, src);
 545     }
 546   } else {
 547     if (is_acquire) {
 548       assert(src.getMode() == Address::base_plus_offset && src.offset() == 0,
 549           "is_acquire path requires address to be base-only");
 550       __ ldar(dst, src.base());
 551     } else {
 552       __ ldr(dst, src);
 553     }
 554   }
 555 
 556   ShenandoahBarrierStubC2::load_post(masm, node, dst, src, tmp1, tmp2, is_narrow);
 557 }
 558 
 559 void ShenandoahBarrierSetAssembler::store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow,
 560     Register src, bool src_narrow, Register tmp1, Register tmp2, Register tmp3, bool is_volatile) {
 561 
 562   ShenandoahBarrierStubC2::store_pre(masm, node, dst, tmp1, tmp2, tmp3, dst_narrow);
 563 
 564   // Do the actual store
 565   if (dst_narrow) {
 566     if (!src_narrow) {
 567       // Need to encode into rscratch, because we cannot clobber src.
 568       if ((node->barrier_data() & ShenandoahBitNotNull) == 0) {
 569         __ encode_heap_oop(tmp2, src);
 570       } else {
 571         __ encode_heap_oop_not_null(tmp2, src);
 572       }
 573       src = tmp2;
 574     }
 575 
 576     if (is_volatile) {
 577       assert(dst.getMode() == Address::base_plus_offset && dst.offset() == 0,
 578           "is_acquire path requires address to be base-only");
 579       __ stlrw(src, dst.base());
 580     } else {
 581       __ strw(src, dst);
 582     }
 583   } else {
 584     if (is_volatile) {
 585       assert(dst.getMode() == Address::base_plus_offset && dst.offset() == 0,
 586           "is_acquire path requires address to be base-only");
 587       __ stlr(src, dst.base());
 588     } else {
 589       __ str(src, dst);
 590     }
 591   }
 592 
 593   ShenandoahBarrierStubC2::store_post(masm, node, dst, tmp2, tmp3);
 594 }
 595 
 596 void ShenandoahBarrierSetAssembler::compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr,
 597     Register oldval, Register newval, Register tmp1, Register tmp2, Register tmp3, bool exchange, bool narrow, bool weak, bool acquire) {
 598   Assembler::operand_size op_size = narrow ? Assembler::word : Assembler::xword;
 599 
 600   ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp1, tmp2, tmp3, narrow);
 601 
 602   atomic_memory_order order = acquire ? memory_order_seq_cst : memory_order_release;
 603 
 604   // CAS!
 605   if (weak) {
 606     __ cmpxchg_weak(addr, oldval, newval, op_size, order, exchange ? res : noreg);
 607   } else {
 608     __ cmpxchg(addr, oldval, newval, op_size, order, exchange ? res : noreg);
 609   }
 610 
 611   // If we need a boolean result out of CAS, set the flag appropriately and promote the result.
 612   if (!exchange) {
 613     assert(res != noreg, "need result register");
 614     __ cset(res, Assembler::EQ);
 615   }
 616 
 617   ShenandoahBarrierStubC2::load_store_post(masm, node, Address(addr, 0), tmp2, tmp3);
 618 }
 619 
 620 void ShenandoahBarrierSetAssembler::get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval,
 621     Register newval, Register addr, Register tmp1, Register tmp2, Register tmp3, bool is_acquire) {
 622   bool is_narrow = node->bottom_type()->isa_narrowoop();
 623 
 624   ShenandoahBarrierStubC2::load_store_pre(masm, node, addr, tmp1, tmp2, tmp3, is_narrow);
 625 
 626   if (is_narrow) {
 627     if (is_acquire) {
 628       __ atomic_xchgalw(preval, newval, addr);
 629     } else {
 630       __ atomic_xchgw(preval, newval, addr);
 631     }
 632   } else {
 633     if (is_acquire) {
 634       __ atomic_xchgal(preval, newval, addr);
 635     } else {
 636       __ atomic_xchg(preval, newval, addr);
 637     }
 638   }
 639 
 640   ShenandoahBarrierStubC2::load_store_post(masm, node, Address(addr, 0), tmp2, tmp3);
 641 }
 642 
 643 #undef __
 644 #define __ masm.
 645 
 646 void ShenandoahBarrierStubC2::cardtable(MacroAssembler& masm, Address address, Register tmp1, Register tmp2) {
 647   assert(CardTable::dirty_card_val() == 0, "must be");
 648   Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
 649 
 650   // tmp1 = card table base (holder)
 651   Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
 652   __ ldr(tmp1, curr_ct_holder_addr);
 653 
 654   // tmp2 = effective address
 655   __ lea(tmp2, address);
 656 
 657   // tmp2 = &card_table[ addr >> CardTable::card_shift() ] ; card index
 658   __ add(tmp2, tmp1, tmp2, Assembler::LSR, CardTable::card_shift());
 659 
 660   if (UseCondCardMark) {
 661     Label L_already_dirty;
 662     __ ldrb(tmp1, Address(tmp2));
 663     __ cbz(tmp1, L_already_dirty);
 664     __ strb(zr, Address(tmp2));
 665     __ bind(L_already_dirty);
 666   } else {
 667     __ strb(zr, Address(tmp2));
 668   }
 669 }
 670 
 671 void ShenandoahBarrierStubC2::patchable_jump_if_gc_state(MacroAssembler& masm, const char test_state, Label* L_target) {
 672   // Emit the unconditional branch in the first version of the method.
 673   // Let the rest of runtime figure out how to manage it.
 674   __ relocate(patchable_barrier_Relocation::spec(ShenandoahNMethod::encode_to_reloc(test_state, false)));
 675   __ b(*L_target);
 676 }
 677 
 678 void ShenandoahBarrierStubC2::patchable_jump_if_not_gc_state(MacroAssembler& masm, const char test_state, Label* L_target) {
 679   // Emit the unconditional branch in the first version of the method.
 680   // Let the rest of runtime figure out how to manage it.
 681   __ relocate(patchable_barrier_Relocation::spec(ShenandoahNMethod::encode_to_reloc(test_state, true)));
 682   __ b(*L_target);
 683 }
 684 
 685 void ShenandoahBarrierStubC2::enter_if_gc_state(MacroAssembler& masm, const char test_state, Register tmp) {
 686   Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
 687   PhaseOutput* const output = Compile::current()->output();
 688 
 689   if (output->in_scratch_emit_size()) {
 690     // We piggyback on scratch_emit_size mode to compute the slowpath stub size.
 691     // We'll use that information to decide whether we need a far jump to the
 692     // stub entry point or not. In scratch_emit_size mode we don't bind entry()
 693     // because otherwise it will be rebound when we later emit the instructions
 694     // for real.
 695     __ nop();
 696   } else {
 697     patchable_jump_if_gc_state(masm, test_state, entry());
 698   }
 699 
 700   // This is were the slowpath stub will return to or the code above will
 701   // jump to if the checks are false
 702   __ bind(*continuation());
 703 }
 704 
 705 address ShenandoahBarrierSetAssembler::parse_stub_address(address pc) {
 706   NativeInstruction* ni = nativeInstruction_at(pc);
 707   assert(ni->is_jump(), "Initial code version: GC barrier fastpath must be a jump");
 708   NativeJump* jmp = nativeJump_at(pc);
 709   return jmp->jump_destination();
 710 }
 711 
 712 static bool is_patchable_nop(address pc) {
 713   if (*(pc + 0) != 0x1F) return false;
 714   if (*(pc + 1) != 0x20) return false;
 715   if (*(pc + 2) != 0x03) return false;
 716   if (*(pc + 3) != 0xD5) return false;
 717   return true;
 718 }
 719 
 720 static void insert_patchable_nop(address pc) {
 721   *reinterpret_cast<int32_t*>(pc) = 0xD503201F;
 722 }
 723 
 724 static void insert_patchable_jump(address code_pos, address entry) {
 725   intptr_t disp = (intptr_t)entry - ((intptr_t)code_pos);
 726   int64_t imm26 = disp >> 2;
 727   guarantee(Assembler::is_simm(imm26, 26), "maximum offset is 128MiB, requested %ld", imm26);
 728 
 729   uint32_t new_val = 0x14000000 | (imm26 & 0x03FFFFFF);
 730   AtomicAccess::store((uint32_t*)code_pos, new_val);
 731 }
 732 
 733 static void check_at(bool cond, address pc, const char* msg) {
 734   assert(cond, "%s: at PC " PTR_FORMAT ": %02x%02x%02x%02x",
 735          msg, p2i(pc), *(pc + 0), *(pc + 1), *(pc + 2), *(pc + 3));
 736 }
 737 
 738 bool ShenandoahBarrierSetAssembler::patch_branch_to_nop(address pc) {
 739   NativeInstruction* ni = nativeInstruction_at(pc);
 740   bool patching = ni->is_jump();
 741   if (patching) {
 742     insert_patchable_nop(pc);
 743   }
 744   check_at(is_patchable_nop(pc), pc, "Should be nop");
 745   return patching;
 746 }
 747 
 748 bool ShenandoahBarrierSetAssembler::patch_nop_to_branch(address pc, address stub_addr) {
 749   bool patching = is_patchable_nop(pc);
 750   if (patching) {
 751     insert_patchable_jump(pc, stub_addr);
 752   }
 753 
 754   NativeInstruction* ni = nativeInstruction_at(pc);
 755   check_at(ni->is_jump(), pc, "Should be jump");
 756   check_at(nativeJump_at(pc)->jump_destination() == stub_addr, pc, "Jump should be to the same address");
 757   return patching;
 758 }
 759 
 760 void ShenandoahBarrierStubC2::emit_code(MacroAssembler& masm) {
 761   Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
 762   assert(_needs_keep_alive_barrier || _needs_load_ref_barrier, "Why are you here?");
 763   PhaseOutput* const output = Compile::current()->output();
 764 
 765   // We piggyback on scratch_emit_size mode to compute the slowpath stub size.
 766   // We'll use that information to decide whether we need a far jump to the
 767   // stub entry point or not. In scratch_emit_size mode we don't bind entry()
 768   // because otherwise it will be rebound when we later emit the instructions
 769   // for real.
 770   if (!output->in_scratch_emit_size()) {
 771     __ bind(*entry());
 772   }
 773 
 774   // If we need to load ourselves, do it here.
 775   if (_do_load) {
 776     if (_narrow) {
 777       __ ldrw(_obj, _addr);
 778     } else {
 779       __ ldr(_obj, _addr);
 780     }
 781   }
 782 
 783   // If the object is null, there is no point in applying barriers.
 784   maybe_far_jump_if_zero(masm, _obj);
 785 
 786   // We need to make sure that loads done by callers survive across slow-path calls.
 787   // For self-loads, we need to care about the case when both KA and LRB are enabled (rare).
 788   bool needs_both_barriers = _needs_keep_alive_barrier && _needs_load_ref_barrier;
 789   if (!_do_load || needs_both_barriers) {
 790     preserve(_obj);
 791   }
 792 
 793   // Go for barriers. Barriers can return straight to continuation, as long
 794   // as another barrier is not needed and we can reach the fastpath.
 795   if (needs_both_barriers) {
 796     // The Load match rule in the .ad file may have legitimized the load
 797     // address using a TEMP register and in that case we need to explicitly
 798     // preserve them here, because the RA does not consider TEMP as live-in,
 799     // and the KA runtime call may clobber them and cause a crash on the
 800     // subsequent LRB stub.
 801     if (_addr.base() != noreg) {
 802       preserve(_addr.base());
 803     }
 804     if (_addr.index() != noreg) {
 805       preserve(_addr.index());
 806     }
 807     keepalive(masm, nullptr);
 808     lrb(masm);
 809   } else if (_needs_keep_alive_barrier) {
 810     keepalive(masm, continuation());
 811   } else if (_needs_load_ref_barrier) {
 812     lrb(masm);
 813   } else {
 814     ShouldNotReachHere();
 815   }
 816 }
 817 
 818 void ShenandoahBarrierStubC2::maybe_far_jump_if_zero(MacroAssembler& masm, Register reg) {
 819   if (_needs_far_jump) {
 820     Label L_short_jump;
 821     __ cbnz(reg, L_short_jump);
 822     __ b(*continuation());
 823     __ bind(L_short_jump);
 824   } else {
 825     __ cbz(reg, *continuation());
 826   }
 827 }
 828 
 829 void ShenandoahBarrierStubC2::keepalive(MacroAssembler& masm, Label* L_done) {
 830   Address index(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 831   Address buffer(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 832   Label L_through, L_slowpath;
 833 
 834   // If another barrier is enabled as well, do a check for a specific barrier.
 835   if (_needs_load_ref_barrier) {
 836     assert(L_done == nullptr, "Should be");
 837     char state_to_check = ShenandoahHeap::MARKING;
 838     patchable_jump_if_not_gc_state(masm, state_to_check, &L_through);
 839   }
 840 
 841   // Fast-path: put object into buffer.
 842   // If buffer is already full, go slow.
 843   __ ldr(_tmp1, index);
 844   __ cbz(_tmp1, L_slowpath);
 845   __ sub(_tmp1, _tmp1, wordSize);
 846   __ str(_tmp1, index);
 847   __ ldr(_tmp2, buffer);
 848 
 849   // Store the object in queue.
 850   // If object is narrow, we need to decode it before inserting.
 851   if (_narrow) {
 852     __ add(_tmp2, _tmp2, _tmp1);
 853     __ decode_heap_oop_not_null(_tmp1, _obj);
 854     __ str(_tmp1, Address(_tmp2));
 855   } else {
 856     // Buffer is 64-bit address, must be in base register.
 857     __ str(_obj, Address(_tmp2, _tmp1));
 858   }
 859 
 860   // Fast-path exits here.
 861   if (L_done != nullptr) {
 862     __ b(*L_done);
 863   } else {
 864     __ b(L_through);
 865   }
 866 
 867   // Slow-path: call runtime to handle.
 868   __ bind(L_slowpath);
 869 
 870   {
 871     SaveLiveRegisters slr(&masm, this);
 872 
 873     // Go to runtime and handle the rest there.
 874     __ mov(c_rarg0, _obj);
 875     __ lea(lr, RuntimeAddress(keepalive_runtime_entry_addr()));
 876     __ blr(lr);
 877   }
 878   if (L_done != nullptr) {
 879     __ b(*L_done);
 880   } else {
 881     __ bind(L_through);
 882   }
 883 }
 884 
 885 void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm) {
 886   Label L_slow;
 887 
 888   // If another barrier is enabled as well, do a check for a specific barrier.
 889   if (_needs_keep_alive_barrier) {
 890     char state_to_check = ShenandoahHeap::HAS_FORWARDED | (_needs_load_ref_weak_barrier ? ShenandoahHeap::WEAK_ROOTS : 0);
 891     patchable_jump_if_not_gc_state(masm, state_to_check, continuation());
 892   }
 893 
 894   // If weak references are being processed, weak/phantom loads need to go slow,
 895   // regardless of their cset status.
 896   if (_needs_load_ref_weak_barrier) {
 897     char state_to_check = ShenandoahHeap::WEAK_ROOTS;
 898     patchable_jump_if_gc_state(masm, state_to_check, &L_slow);
 899   }
 900 
 901   // Cset-check. Fall-through to slow if in collection set.
 902   bool is_aot = AOTCodeCache::is_on_for_dump();
 903   if (!is_aot) {
 904     __ mov(_tmp1, ShenandoahHeap::in_cset_fast_test_addr());
 905     if (_narrow) {
 906       __ decode_heap_oop_not_null(_tmp2, _obj);
 907       __ add(_tmp1, _tmp1, _tmp2, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 908     } else {
 909       __ add(_tmp1, _tmp1, _obj, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 910     }
 911   } else {
 912     // Generating AOT code, pull the cset bitmap and region shift from AOT table.
 913     if (_narrow) {
 914       __ decode_heap_oop_not_null(_tmp1, _obj);
 915     } else {
 916       __ mov(_tmp1, _obj);
 917     }
 918     __ lea(_tmp2, ExternalAddress(AOTRuntimeConstants::grain_shift_address()));
 919     __ ldrw(_tmp2, Address(_tmp2));
 920     __ lsrv(_tmp2, _tmp1, _tmp2);
 921     __ lea(_tmp1, ExternalAddress(AOTRuntimeConstants::cset_base_address()));
 922     __ ldr(_tmp1, Address(_tmp1));
 923     __ add(_tmp1, _tmp1, _tmp2);
 924   }
 925   __ ldrb(_tmp1, Address(_tmp1, 0));
 926   maybe_far_jump_if_zero(masm, _tmp1);
 927 
 928   // Slow path
 929   __ bind(L_slow);
 930 
 931   // Obj is the result, need to temporarily stop preserving it.
 932   bool is_obj_preserved = is_preserved(_obj);
 933   if (is_obj_preserved) {
 934     dont_preserve(_obj);
 935   }
 936   {
 937     SaveLiveRegisters slr(&masm, this);
 938 
 939     // Shuffle in the arguments. The end result should be:
 940     //   c_rarg0 <-- obj
 941     //   c_rarg1 <-- lea(addr)
 942     if (c_rarg0 == _obj) {
 943       __ lea(c_rarg1, _addr);
 944     } else if (c_rarg1 == _obj) {
 945       __ mov(_tmp1, c_rarg1);
 946       __ lea(c_rarg1, _addr);
 947       __ mov(c_rarg0, _tmp1);
 948     } else {
 949       assert_different_registers(c_rarg1, _obj);
 950       __ lea(c_rarg1, _addr);
 951       __ mov(c_rarg0, _obj);
 952     }
 953 
 954     // Go to runtime and handle the rest there.
 955     __ lea(lr, RuntimeAddress(lrb_runtime_entry_addr()));
 956     __ blr(lr);
 957 
 958     // Save the result where needed. Narrow entries return narrowOop (32 bits)
 959     // and AAPCS does not guarantee the upper 32 bits of x0 are zero.
 960     if (_narrow) {
 961       __ movw(_obj, r0);
 962     } else if (_obj != r0) {
 963       __ mov(_obj, r0);
 964     }
 965   }
 966   if (is_obj_preserved) {
 967     preserve(_obj);
 968   }
 969 
 970   __ b(*continuation());
 971 }
 972 
 973 int ShenandoahBarrierStubC2::available_gp_registers() {
 974   Unimplemented(); // Not used
 975   return 0;
 976 }
 977 
 978 bool ShenandoahBarrierStubC2::is_special_register(Register r) {
 979   Unimplemented(); // Not used
 980   return true;
 981 }
 982 
 983 static ShenandoahBarrierSetC2State* barrier_set_state() {
 984   return reinterpret_cast<ShenandoahBarrierSetC2State*>(Compile::current()->barrier_set_state());
 985 }
 986 
 987 static int get_stub_size(ShenandoahBarrierStubC2* stub) {
 988   PhaseOutput* const output = Compile::current()->output();
 989   assert(output->in_scratch_emit_size(), "only used when in scratch_emit_size.");
 990   BufferBlob* const blob = output->scratch_buffer_blob();
 991   CodeBuffer cb(blob->content_begin(), (address)output->scratch_locs_memory() - blob->content_begin());
 992   MacroAssembler masm(&cb);
 993   stub->emit_code(masm);
 994   return cb.insts_size();
 995 }
 996 
 997 void ShenandoahBarrierStubC2::post_init() {
 998   // If we are in scratch emit mode we assume worst case, and force the use of
 999   // far branches.
1000   PhaseOutput* const output = Compile::current()->output();
1001   ShenandoahBarrierSetC2State* state = barrier_set_state();
1002   if (output->in_scratch_emit_size()) {
1003     state->inc_stubs_current_total_size(get_stub_size(this));
1004     _needs_far_jump = true;
1005     return;
1006   }
1007 
1008   // The logic implemented in this stub only uses short jumps (cbz, cbnz) if
1009   // the aggregation of all relevant code sections of a method is less than 1MB
1010   // - 2KB. We could be more aggressive and try and compute the distance
1011   // between the fastpath branch and the stub entry but in practice not many
1012   // methods reach the 1MB size.
1013   const BufferSizingData* sizing = output->buffer_sizing_data();
1014   const int code_size = sizing->_code + state->stubs_current_total_size();
1015 
1016   // Maximum backward range is 1M. Maximum forward reach is 1M - 4bytes.
1017   // Subtract 2K to be ultra conservative.
1018   const int cond_branch_max_reach = (int)(1*M - 2*K);
1019   _needs_far_jump = code_size >= cond_branch_max_reach;
1020 }
1021 
1022 #endif // COMPILER2