1 /*
2 * Copyright (c) 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
4 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
28 #include "gc/shenandoah/mode/shenandoahMode.hpp"
29 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
31 #include "gc/shenandoah/shenandoahForwarding.hpp"
32 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
33 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
34 #include "gc/shenandoah/shenandoahRuntime.hpp"
35 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
36 #include "interpreter/interp_masm.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "runtime/javaThread.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #ifdef COMPILER1
41 #include "c1/c1_LIRAssembler.hpp"
42 #include "c1/c1_MacroAssembler.hpp"
43 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
44 #endif
45 #ifdef COMPILER2
46 #include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
47 #include "opto/output.hpp"
48 #endif
49
50 #define __ masm->
51
52 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
53 Register src, Register dst, Register count, RegSet saved_regs) {
54 if (is_oop) {
55 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
56 if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {
57
58 Label done;
59
60 // Avoid calling runtime if count == 0
61 __ cbz(count, done);
62
63 // Is GC active?
64 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
65 __ ldrb(rscratch1, gc_state);
66 if (ShenandoahSATBBarrier && dest_uninitialized) {
67 __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done);
68 } else {
69 __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING);
70 __ tst(rscratch1, rscratch2);
71 __ br(Assembler::EQ, done);
72 }
73
74 __ push(saved_regs, sp);
75 if (UseCompressedOops) {
76 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop), src, dst, count);
77 } else {
78 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop), src, dst, count);
79 }
80 __ pop(saved_regs, sp);
81 __ bind(done);
82 }
83 }
84 }
85
86 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
87 Register start, Register count, Register tmp) {
88 if (ShenandoahCardBarrier && is_oop) {
89 gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp);
90 }
91 }
92
93 void ShenandoahBarrierSetAssembler::satb_barrier(MacroAssembler* masm,
94 Register obj,
95 Register pre_val,
96 Register thread,
97 Register tmp1,
98 Register tmp2,
99 bool tosca_live,
100 bool expand_call) {
101 assert(ShenandoahSATBBarrier, "Should be checked by caller");
102
103 // If expand_call is true then we expand the call_VM_leaf macro
104 // directly to skip generating the check by
105 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
106
107 assert(thread == rthread, "must be");
108
109 Label done;
110 Label runtime;
111
112 assert_different_registers(obj, pre_val, tmp1, tmp2);
113 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
114
115 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
116 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
117
118 // Is marking active?
119 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
120 __ ldrb(tmp1, gc_state);
121 __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
122
123 // Do we need to load the previous value?
124 if (obj != noreg) {
125 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
126 }
127
128 // Is the previous value null?
129 __ cbz(pre_val, done);
130
131 // Can we store original value in the thread's buffer?
132 // Is index == 0?
133 // (The index field is typed as size_t.)
134
135 __ ldr(tmp1, index); // tmp := *index_adr
136 __ cbz(tmp1, runtime); // tmp == 0?
137 // If yes, goto runtime
138
139 __ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
140 __ str(tmp1, index); // *index_adr := tmp
141 __ ldr(tmp2, buffer);
142 __ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
143
144 // Record the previous value
145 __ str(pre_val, Address(tmp1, 0));
146 __ b(done);
147
148 __ bind(runtime);
149 // save the live input values
150 RegSet saved = RegSet::of(pre_val);
151 if (tosca_live) saved += RegSet::of(r0);
152 if (obj != noreg) saved += RegSet::of(obj);
153
154 __ push(saved, sp);
155
156 // Calling the runtime using the regular call_VM_leaf mechanism generates
157 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
158 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
159 //
160 // If we care generating the pre-barrier without a frame (e.g. in the
161 // intrinsified Reference.get() routine) then rfp might be pointing to
162 // the caller frame and so this check will most likely fail at runtime.
163 //
164 // Expanding the call directly bypasses the generation of the check.
165 // So when we do not have have a full interpreter frame on the stack
166 // expand_call should be passed true.
167
168 if (expand_call) {
169 assert(pre_val != c_rarg1, "smashed arg");
170 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
171 } else {
172 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
173 }
174
175 __ pop(saved, sp);
176
177 __ bind(done);
178 }
179
180 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) {
181 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
182 Label is_null;
183 __ cbz(dst, is_null);
184 resolve_forward_pointer_not_null(masm, dst, tmp);
185 __ bind(is_null);
186 }
187
188 // IMPORTANT: This must preserve all registers, even rscratch1 and rscratch2, except those explicitly
189 // passed in.
190 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) {
191 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
192 // The below loads the mark word, checks if the lowest two bits are
193 // set, and if so, clear the lowest two bits and copy the result
194 // to dst. Otherwise it leaves dst alone.
195 // Implementing this is surprisingly awkward. I do it here by:
196 // - Inverting the mark word
197 // - Test lowest two bits == 0
198 // - If so, set the lowest two bits
199 // - Invert the result back, and copy to dst
200
201 bool borrow_reg = (tmp == noreg);
202 if (borrow_reg) {
203 // No free registers available. Make one useful.
204 tmp = rscratch1;
205 if (tmp == dst) {
206 tmp = rscratch2;
207 }
208 __ push(RegSet::of(tmp), sp);
209 }
210
211 assert_different_registers(tmp, dst);
212
213 Label done;
214 __ ldr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
215 __ eon(tmp, tmp, zr);
216 __ ands(zr, tmp, markWord::lock_mask_in_place);
217 __ br(Assembler::NE, done);
218 __ orr(tmp, tmp, markWord::marked_value);
219 __ eon(dst, tmp, zr);
220 __ bind(done);
221
222 if (borrow_reg) {
223 __ pop(RegSet::of(tmp), sp);
224 }
225 }
226
227 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) {
228 assert(ShenandoahLoadRefBarrier, "Should be enabled");
229 assert(dst != rscratch2, "need rscratch2");
230 assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2);
231
232 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
233 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
234 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
235 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
236 bool is_narrow = UseCompressedOops && !is_native;
237
238 Label heap_stable, not_cset;
239 __ enter(/*strip_ret_addr*/true);
240 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
241 __ ldrb(rscratch2, gc_state);
242
243 // Check for heap stability
244 if (is_strong) {
245 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
246 } else {
247 Label lrb;
248 __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb);
249 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
250 __ bind(lrb);
251 }
252
253 // use r1 for load address
254 Register result_dst = dst;
255 if (dst == r1) {
256 __ mov(rscratch1, dst);
257 dst = rscratch1;
258 }
259
260 // Save r0 and r1, unless it is an output register
261 RegSet to_save = RegSet::of(r0, r1) - result_dst;
262 __ push(to_save, sp);
263 __ lea(r1, load_addr);
264 __ mov(r0, dst);
265
266 // Test for in-cset
267 if (is_strong) {
268 __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr());
269 __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint());
270 __ ldrb(rscratch2, Address(rscratch2, rscratch1));
271 __ tbz(rscratch2, 0, not_cset);
272 }
273
274 __ push_call_clobbered_registers();
275 if (is_strong) {
276 if (is_narrow) {
277 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
278 } else {
279 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
280 }
281 } else if (is_weak) {
282 if (is_narrow) {
283 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
284 } else {
285 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
286 }
287 } else {
288 assert(is_phantom, "only remaining strength");
289 assert(!is_narrow, "phantom access cannot be narrow");
290 // AOT saved adapters need relocation for this call.
291 __ lea(lr, RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom)));
292 }
293 __ blr(lr);
294 __ mov(rscratch1, r0);
295 __ pop_call_clobbered_registers();
296 __ mov(r0, rscratch1);
297
298 __ bind(not_cset);
299
300 __ mov(result_dst, r0);
301 __ pop(to_save, sp);
302
303 __ bind(heap_stable);
304 __ leave();
305 }
306
307 //
308 // Arguments:
309 //
310 // Inputs:
311 // src: oop location to load from, might be clobbered
312 //
313 // Output:
314 // dst: oop loaded from src location
315 //
316 // Kill:
317 // rscratch1 (scratch reg)
318 //
319 // Alias:
320 // dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
321 //
322 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
323 Register dst, Address src, Register tmp1, Register tmp2) {
324 // 1: non-reference load, no additional barrier is needed
325 if (!is_reference_type(type)) {
326 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
327 return;
328 }
329
330 // 2: load a reference from src location and apply LRB if needed
331 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
332 Register result_dst = dst;
333
334 // Preserve src location for LRB
335 if (dst == src.base() || dst == src.index()) {
336 dst = rscratch1;
337 }
338 assert_different_registers(dst, src.base(), src.index());
339
340 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
341
342 load_reference_barrier(masm, dst, src, decorators);
343
344 if (dst != result_dst) {
345 __ mov(result_dst, dst);
346 dst = result_dst;
347 }
348 } else {
349 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
350 }
351
352 // 3: apply keep-alive barrier if needed
353 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
354 __ enter(/*strip_ret_addr*/true);
355 __ push_call_clobbered_registers();
356 satb_barrier(masm /* masm */,
357 noreg /* obj */,
358 dst /* pre_val */,
359 rthread /* thread */,
360 tmp1 /* tmp1 */,
361 tmp2 /* tmp2 */,
362 true /* tosca_live */,
363 true /* expand_call */);
364 __ pop_call_clobbered_registers();
365 __ leave();
366 }
367 }
368
369 void ShenandoahBarrierSetAssembler::card_barrier(MacroAssembler* masm, Register obj) {
370 assert(ShenandoahCardBarrier, "Should have been checked by caller");
371
372 __ lsr(obj, obj, CardTable::card_shift());
373
374 assert(CardTable::dirty_card_val() == 0, "must be");
375
376 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
377 __ ldr(rscratch1, curr_ct_holder_addr);
378
379 if (UseCondCardMark) {
380 Label L_already_dirty;
381 __ ldrb(rscratch2, Address(obj, rscratch1));
382 __ cbz(rscratch2, L_already_dirty);
383 __ strb(zr, Address(obj, rscratch1));
384 __ bind(L_already_dirty);
385 } else {
386 __ strb(zr, Address(obj, rscratch1));
387 }
388 }
389
390 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
391 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
392 // 1: non-reference types require no barriers
393 if (!is_reference_type(type)) {
394 BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
395 return;
396 }
397
398 // Flatten object address right away for simplicity: likely needed by barriers
399 if (dst.index() == noreg && dst.offset() == 0) {
400 if (dst.base() != tmp3) {
401 __ mov(tmp3, dst.base());
402 }
403 } else {
404 __ lea(tmp3, dst);
405 }
406
407 bool storing_non_null = (val != noreg);
408
409 // 2: pre-barrier: SATB needs the previous value
410 if (ShenandoahBarrierSet::need_satb_barrier(decorators, type)) {
411 satb_barrier(masm,
412 tmp3 /* obj */,
413 tmp2 /* pre_val */,
414 rthread /* thread */,
415 tmp1 /* tmp */,
416 rscratch1 /* tmp2 */,
417 storing_non_null /* tosca_live */,
418 false /* expand_call */);
419 }
420
421 // Store!
422 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
423
424 // 3: post-barrier: card barrier needs store address
425 if (ShenandoahBarrierSet::need_card_barrier(decorators, type) && storing_non_null) {
426 card_barrier(masm, tmp3);
427 }
428 }
429
430 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
431 Register obj, Register tmp, Label& slowpath) {
432 Label done;
433 // Resolve jobject
434 BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
435
436 // Check for null.
437 __ cbz(obj, done);
438
439 assert(obj != rscratch2, "need rscratch2");
440 Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
441 __ lea(rscratch2, gc_state);
442 __ ldrb(rscratch2, Address(rscratch2));
443
444 // Check for heap in evacuation phase
445 __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
446
447 __ bind(done);
448 }
449
450 #ifdef COMPILER2
451 void ShenandoahBarrierSetAssembler::try_resolve_weak_handle_in_c2(MacroAssembler* masm, Register obj,
452 Register tmp, Label& slow_path) {
453 assert_different_registers(obj, tmp);
454
455 Label done;
456
457 // Resolve weak handle using the standard implementation.
458 BarrierSetAssembler::try_resolve_weak_handle_in_c2(masm, obj, tmp, slow_path);
459
460 // Check if the reference is null, and if it is, take the fast path.
461 __ cbz(obj, done);
462
463 Address gc_state(rthread, ShenandoahThreadLocalData::gc_state_offset());
464 __ lea(tmp, gc_state);
465 __ ldrb(tmp, __ legitimize_address(gc_state, 1, tmp));
466
467 // Check if the heap is under weak-reference/roots processing, in
468 // which case we need to take the slow path.
469 __ tbnz(tmp, ShenandoahHeap::WEAK_ROOTS_BITPOS, slow_path);
470 __ bind(done);
471 }
472 #endif
473
474 // Special Shenandoah CAS implementation that handles false negatives due
475 // to concurrent evacuation. The service is more complex than a
476 // traditional CAS operation because the CAS operation is intended to
477 // succeed if the reference at addr exactly matches expected or if the
478 // reference at addr holds a pointer to a from-space object that has
479 // been relocated to the location named by expected. There are two
480 // races that must be addressed:
481 // a) A parallel thread may mutate the contents of addr so that it points
482 // to a different object. In this case, the CAS operation should fail.
483 // b) A parallel thread may heal the contents of addr, replacing a
484 // from-space pointer held in addr with the to-space pointer
485 // representing the new location of the object.
486 // Upon entry to cmpxchg_oop, it is assured that new_val equals null
487 // or it refers to an object that is not being evacuated out of
488 // from-space, or it refers to the to-space version of an object that
489 // is being evacuated out of from-space.
490 //
491 // By default the value held in the result register following execution
492 // of the generated code sequence is 0 to indicate failure of CAS,
493 // non-zero to indicate success. If is_cae, the result is the value most
494 // recently fetched from addr rather than a boolean success indicator.
495 //
496 // Clobbers rscratch1, rscratch2
497 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
498 Register addr,
499 Register expected,
500 Register new_val,
501 bool acquire, bool release,
502 bool is_cae,
503 Register result) {
504 Register tmp1 = rscratch1;
505 Register tmp2 = rscratch2;
506 bool is_narrow = UseCompressedOops;
507 Assembler::operand_size size = is_narrow ? Assembler::word : Assembler::xword;
508
509 assert_different_registers(addr, expected, tmp1, tmp2);
510 assert_different_registers(addr, new_val, tmp1, tmp2);
511
512 Label step4, done;
513
514 // There are two ways to reach this label. Initial entry into the
515 // cmpxchg_oop code expansion starts at step1 (which is equivalent
516 // to label step4). Additionally, in the rare case that four steps
517 // are required to perform the requested operation, the fourth step
518 // is the same as the first. On a second pass through step 1,
519 // control may flow through step 2 on its way to failure. It will
520 // not flow from step 2 to step 3 since we are assured that the
521 // memory at addr no longer holds a from-space pointer.
522 //
523 // The comments that immediately follow the step4 label apply only
524 // to the case in which control reaches this label by branch from
525 // step 3.
526
527 __ bind (step4);
528
529 // Step 4. CAS has failed because the value most recently fetched
530 // from addr is no longer the from-space pointer held in tmp2. If a
531 // different thread replaced the in-memory value with its equivalent
532 // to-space pointer, then CAS may still be able to succeed. The
533 // value held in the expected register has not changed.
534 //
535 // It is extremely rare we reach this point. For this reason, the
536 // implementation opts for smaller rather than potentially faster
537 // code. Ultimately, smaller code for this rare case most likely
538 // delivers higher overall throughput by enabling improved icache
539 // performance.
540
541 // Step 1. Fast-path.
542 //
543 // Try to CAS with given arguments. If successful, then we are done.
544 //
545 // No label required for step 1.
546
547 __ cmpxchg(addr, expected, new_val, size, acquire, release, false, tmp2);
548 // EQ flag set iff success. tmp2 holds value fetched.
549
550 // If expected equals null but tmp2 does not equal null, the
551 // following branches to done to report failure of CAS. If both
552 // expected and tmp2 equal null, the following branches to done to
553 // report success of CAS. There's no need for a special test of
554 // expected equal to null.
555
556 __ br(Assembler::EQ, done);
557 // if CAS failed, fall through to step 2
558
559 // Step 2. CAS has failed because the value held at addr does not
560 // match expected. This may be a false negative because the value fetched
561 // from addr (now held in tmp2) may be a from-space pointer to the
562 // original copy of same object referenced by to-space pointer expected.
563 //
564 // To resolve this, it suffices to find the forward pointer associated
565 // with fetched value. If this matches expected, retry CAS with new
566 // parameters. If this mismatches, then we have a legitimate
567 // failure, and we're done.
568 //
569 // No need for step2 label.
570
571 // overwrite tmp1 with from-space pointer fetched from memory
572 __ mov(tmp1, tmp2);
573
574 if (is_narrow) {
575 // Decode tmp1 in order to resolve its forward pointer
576 __ decode_heap_oop(tmp1, tmp1);
577 }
578 resolve_forward_pointer(masm, tmp1);
579 // Encode tmp1 to compare against expected.
580 __ encode_heap_oop(tmp1, tmp1);
581
582 // Does forwarded value of fetched from-space pointer match original
583 // value of expected? If tmp1 holds null, this comparison will fail
584 // because we know from step1 that expected is not null. There is
585 // no need for a separate test for tmp1 (the value originally held
586 // in memory) equal to null.
587 __ cmp(tmp1, expected);
588
589 // If not, then the failure was legitimate and we're done.
590 // Branching to done with NE condition denotes failure.
591 __ br(Assembler::NE, done);
592
593 // Fall through to step 3. No need for step3 label.
594
595 // Step 3. We've confirmed that the value originally held in memory
596 // (now held in tmp2) pointed to from-space version of original
597 // expected value. Try the CAS again with the from-space expected
598 // value. If it now succeeds, we're good.
599 //
600 // Note: tmp2 holds encoded from-space pointer that matches to-space
601 // object residing at expected. tmp2 is the new "expected".
602
603 // Note that macro implementation of __cmpxchg cannot use same register
604 // tmp2 for result and expected since it overwrites result before it
605 // compares result with expected.
606 __ cmpxchg(addr, tmp2, new_val, size, acquire, release, false, noreg);
607 // EQ flag set iff success. tmp2 holds value fetched, tmp1 (rscratch1) clobbered.
608
609 // If fetched value did not equal the new expected, this could
610 // still be a false negative because some other thread may have
611 // newly overwritten the memory value with its to-space equivalent.
612 __ br(Assembler::NE, step4);
613
614 if (is_cae) {
615 // We're falling through to done to indicate success. Success
616 // with is_cae is denoted by returning the value of expected as
617 // result.
618 __ mov(tmp2, expected);
619 }
620
621 __ bind(done);
622 // At entry to done, the Z (EQ) flag is on iff if the CAS
623 // operation was successful. Additionally, if is_cae, tmp2 holds
624 // the value most recently fetched from addr. In this case, success
625 // is denoted by tmp2 matching expected.
626
627 if (is_cae) {
628 __ mov(result, tmp2);
629 } else {
630 __ cset(result, Assembler::EQ);
631 }
632 }
633
634 #ifdef COMPILER2
635 #undef __
636 #define __ masm.
637
638 bool ShenandoahBarrierStubC2::push_save_register_if_live(MacroAssembler& masm, Register reg) {
639 if (is_live(reg)) {
640 push_save_register(masm, reg);
641 return true;
642 } else {
643 return false;
644 }
645 }
646
647 void ShenandoahBarrierStubC2::push_save_register(MacroAssembler& masm, Register reg) {
648 __ str(reg, Address(sp, push_save_slot()));
649 }
650
651 void ShenandoahBarrierStubC2::pop_save_register(MacroAssembler& masm, Register reg) {
652 __ ldr(reg, Address(sp, pop_save_slot()));
653 }
654
655 bool ShenandoahBarrierStubC2::has_live_vector_registers() {
656 RegMaskIterator rmi(preserve_set());
657 while (rmi.has_next()) {
658 const OptoReg::Name opto_reg = rmi.next();
659 const VMReg vm_reg = OptoReg::as_VMReg(opto_reg);
660 if (vm_reg->is_Register()) {
661 // Not a vector
662 } else if (vm_reg->is_FloatRegister()) {
663 // Maybe vector, assume the worst right now
664 return true;
665 } else if (vm_reg->is_PRegister()) {
666 // Vector-related register
667 return true;
668 } else {
669 fatal("Unexpected register type");
670 }
671 }
672 return false;
673 }
674
675 bool ShenandoahBarrierStubC2::is_live(Register reg) {
676 // TODO: Precompute the generic register map for faster lookups.
677 RegMaskIterator rmi(preserve_set());
678 while (rmi.has_next()) {
679 const OptoReg::Name opto_reg = rmi.next();
680 const VMReg vm_reg = OptoReg::as_VMReg(opto_reg);
681 if (vm_reg->is_Register() && reg == vm_reg->as_Register()) {
682 return true;
683 }
684 }
685 return false;
686 }
687
688 Register ShenandoahBarrierStubC2::select_temp_register(bool& selected_live, Address addr, Register reg1) {
689 Register tmp = noreg;
690 Register fallback_live = noreg;
691
692 // Try to select non-live first:
693 for (int i = 0; i < Register::available_gp_registers(); i++) {
694 Register r = as_Register(i);
695 if (r != rfp && r != sp && r != lr &&
696 r != rheapbase && r != rthread &&
697 r != rscratch1 && r != rscratch2 &&
698 r != reg1 && r != addr.base() && r != addr.index()) {
699 if (!is_live(r)) {
700 tmp = r;
701 break;
702 } else if (fallback_live == noreg) {
703 fallback_live = r;
704 }
705 }
706 }
707
708 // If we could not find a non-live register, select the live fallback:
709 if (tmp == noreg) {
710 tmp = fallback_live;
711 selected_live = true;
712 } else {
713 selected_live = false;
714 }
715
716 assert(tmp != noreg, "successfully selected");
717 assert_different_registers(tmp, reg1);
718 assert_different_registers(tmp, addr.base());
719 assert_different_registers(tmp, addr.index());
720 return tmp;
721 }
722
723 void ShenandoahBarrierStubC2::enter_if_gc_state(MacroAssembler& masm, const char test_state) {
724 Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
725
726 // Emit the unconditional branch in the first version of the method.
727 // Let the rest of runtime figure out how to manage it.
728 __ relocate(barrier_Relocation::spec());
729 __ b(*entry());
730
731 #ifdef ASSERT
732 Address gc_state_fast(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_offset()));
733 __ ldrb(rscratch1, gc_state_fast);
734 __ cbz(rscratch1, *continuation());
735 __ hlt(0); // Correctness bug: barrier is NOP-ed, but heap is NOT IDLE
736 #endif
737 __ bind(*continuation());
738 }
739
740 address ShenandoahBarrierSetAssembler::parse_stub_address(address pc) {
741 NativeInstruction* ni = nativeInstruction_at(pc);
742 assert(ni->is_jump(), "Initial code version: GC barrier fastpath must be a jump");
743 NativeJump* jmp = nativeJump_at(pc);
744 return jmp->jump_destination();
745 }
746
747 void insert_nop(address pc) {
748 *(pc + 0) = 0x1F;
749 *(pc + 1) = 0x20;
750 *(pc + 2) = 0x03;
751 *(pc + 3) = 0xD5;
752 ICache::invalidate_range(pc, 4);
753 }
754
755 bool is_nop(address pc) {
756 if (*(pc + 0) != 0x1F) return false;
757 if (*(pc + 1) != 0x20) return false;
758 if (*(pc + 2) != 0x03) return false;
759 if (*(pc + 3) != 0xD5) return false;
760 return true;
761 }
762
763 void check_at(bool cond, address pc, const char* msg) {
764 assert(cond, "%s: at PC " PTR_FORMAT ": %02x%02x%02x%02x%02x",
765 msg, p2i(pc), *(pc + 0), *(pc + 1), *(pc + 2), *(pc + 3), *(pc + 4));
766 }
767
768 void ShenandoahBarrierSetAssembler::patch_branch_to_nop(address pc) {
769 NativeInstruction* ni = nativeInstruction_at(pc);
770 if (ni->is_jump()) {
771 insert_nop(pc);
772 } else {
773 check_at(is_nop(pc), pc, "Should already be nop");
774 }
775 }
776
777 void ShenandoahBarrierSetAssembler::patch_nop_to_branch(address pc, address stub_addr) {
778 NativeInstruction* ni = nativeInstruction_at(pc);
779 if (is_nop(pc)) {
780 NativeJump::insert(pc, stub_addr);
781 } else {
782 check_at(ni->is_jump(), pc, "Should already be jump");
783 check_at(nativeJump_at(pc)->jump_destination() == stub_addr, pc, "Jump should be to the same address");
784 }
785 }
786
787 bool needs_acquiring_load_exclusive(const MachNode *n) {
788 assert(n->is_CAS(true), "expecting a compare and swap");
789 if (n->is_CAS(false)) {
790 assert(n->has_trailing_membar(), "expected trailing membar");
791 } else {
792 return n->has_trailing_membar();
793 }
794
795 // so we can just return true here
796 return true;
797 }
798
799 #undef __
800 #define __ masm->
801
802 void ShenandoahBarrierSetAssembler::compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr,
803 Register oldval, Register newval, bool exchange, bool narrow, bool weak) {
804 bool acquire = needs_acquiring_load_exclusive(node);
805 Assembler::operand_size op_size = narrow ? Assembler::word : Assembler::xword;
806
807 // Pre-barrier covers several things:
808 // a. Avoids false positives from CAS encountering to-space memory values.
809 // b. Satisfies the need for LRB for the CAE result.
810 // c. Records old value for the sake of SATB.
811 //
812 // (a) and (b) are covered because load barrier does memory location fixup.
813 // (c) is covered by KA on the current memory value.
814 if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
815 ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, noreg, addr, narrow, /* do_load: */ true, __ offset());
816 char check = 0;
817 check |= ShenandoahBarrierStubC2::needs_keep_alive_barrier(node) ? ShenandoahHeap::MARKING : 0;
818 check |= ShenandoahBarrierStubC2::needs_load_ref_barrier(node) ? ShenandoahHeap::HAS_FORWARDED : 0;
819 assert(!ShenandoahBarrierStubC2::needs_load_ref_barrier_weak(node), "Not supported for CAS");
820 stub->enter_if_gc_state(*masm, check);
821 }
822
823 // CAS!
824 __ cmpxchg(addr, oldval, newval, op_size, acquire, /* release */ true, weak, exchange ? res : noreg);
825
826 // If we need a boolean result out of CAS, set the flag appropriately and promote the result.
827 if (!exchange) {
828 assert(res != noreg, "need result register");
829 __ cset(res, Assembler::EQ);
830 }
831
832 // Post-barrier deals with card updates.
833 card_barrier_c2(node, masm, Address(addr, 0));
834 }
835
836 void ShenandoahBarrierSetAssembler::get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval,
837 Register newval, Register addr) {
838 bool acquire = needs_acquiring_load_exclusive(node);
839 bool narrow = node->bottom_type()->isa_narrowoop();
840
841 // Pre-barrier covers several things:
842 // a. Satisfies the need for LRB for the GAS result.
843 // b. Records old value for the sake of SATB.
844 //
845 // (a) is covered because load barrier does memory location fixup.
846 // (b) is covered by KA on the current memory value.
847 if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
848 ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, noreg, addr, narrow, /* do_load: */ true, __ offset());
849 char check = 0;
850 check |= ShenandoahBarrierStubC2::needs_keep_alive_barrier(node) ? ShenandoahHeap::MARKING : 0;
851 check |= ShenandoahBarrierStubC2::needs_load_ref_barrier(node) ? ShenandoahHeap::HAS_FORWARDED : 0;
852 assert(!ShenandoahBarrierStubC2::needs_load_ref_barrier_weak(node), "Not supported for GAS");
853 stub->enter_if_gc_state(*masm, check);
854 }
855
856 if (narrow) {
857 if (acquire) {
858 __ atomic_xchgalw(preval, newval, addr);
859 } else {
860 __ atomic_xchgw(preval, newval, addr);
861 }
862 } else {
863 if (acquire) {
864 __ atomic_xchgal(preval, newval, addr);
865 } else {
866 __ atomic_xchg(preval, newval, addr);
867 }
868 }
869
870 // Post-barrier deals with card updates.
871 card_barrier_c2(node, masm, Address(addr, 0));
872 }
873
874 void ShenandoahBarrierSetAssembler::store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow,
875 Register src, bool src_narrow) {
876
877 // Pre-barrier: SATB, keep-alive the current memory value.
878 if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
879 assert(!ShenandoahBarrierStubC2::needs_load_ref_barrier(node), "Should not be required for stores");
880 ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, noreg, dst, dst_narrow, /* do_load: */ true, __ offset());
881 stub->enter_if_gc_state(*masm, ShenandoahHeap::MARKING);
882 }
883
884 // Do the actual store
885 bool is_volatile = node->has_trailing_membar();
886 if (dst_narrow) {
887 if (!src_narrow) {
888 // Need to encode into rscratch, because we cannot clobber src.
889 // TODO: Maybe there is a matcher way to test that src is unused after this?
890 __ mov(rscratch1, src);
891 if (ShenandoahBarrierStubC2::maybe_null(node)) {
892 __ encode_heap_oop(rscratch1);
893 } else {
894 __ encode_heap_oop_not_null(rscratch1);
895 }
896 src = rscratch1;
897 }
898
899 if (is_volatile) {
900 __ stlrw(src, dst.base());
901 } else {
902 __ strw(src, dst);
903 }
904 } else {
905 if (is_volatile) {
906 __ stlr(src, dst.base());
907 } else {
908 __ str(src, dst);
909 }
910 }
911
912 // Post-barrier: card updates.
913 card_barrier_c2(node, masm, dst);
914 }
915
916 void ShenandoahBarrierSetAssembler::load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address src) {
917 bool acquire = node->memory_order() == MemNode::MemOrd::acquire;
918 bool narrow = node->bottom_type()->isa_narrowoop();
919
920 // Do the actual load. This load is the candidate for implicit null check, and MUST come first.
921 if (narrow) {
922 if (acquire) {
923 __ ldarw(dst, src.base());
924 } else {
925 __ ldrw(dst, src);
926 }
927 } else {
928 if (acquire) {
929 __ ldar(dst, src.base());
930 } else {
931 __ ldr(dst, src);
932 }
933 }
934
935 // Post-barrier: LRB / KA / weak-root processing.
936 if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
937 ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, dst, src, narrow, /* do_load: */ false, __ offset());
938 char check = 0;
939 check |= ShenandoahBarrierStubC2::needs_keep_alive_barrier(node) ? ShenandoahHeap::MARKING : 0;
940 check |= ShenandoahBarrierStubC2::needs_load_ref_barrier(node) ? ShenandoahHeap::HAS_FORWARDED : 0;
941 check |= ShenandoahBarrierStubC2::needs_load_ref_barrier_weak(node) ? ShenandoahHeap::WEAK_ROOTS : 0;
942 stub->enter_if_gc_state(*masm, check);
943 }
944 }
945
946 void ShenandoahBarrierSetAssembler::card_barrier_c2(const MachNode* node, MacroAssembler* masm, Address address) {
947 if (!ShenandoahBarrierStubC2::needs_card_barrier(node)) {
948 return;
949 }
950
951 assert(CardTable::dirty_card_val() == 0, "must be");
952 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
953
954 // rscratch1 = card table base (holder)
955 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
956 __ ldr(rscratch1, curr_ct_holder_addr);
957
958 // rscratch2 = addr
959 __ lea(rscratch2, address);
960
961 // rscratch2 = &card_table[ addr >> CardTable::card_shift() ]
962 __ add(rscratch2, rscratch1, rscratch2, Assembler::LSR, CardTable::card_shift());
963
964 if (UseCondCardMark) {
965 Label L_already_dirty;
966 __ ldrb(rscratch1, Address(rscratch2));
967 __ cbz(rscratch1, L_already_dirty);
968 __ strb(zr, Address(rscratch2));
969 __ bind(L_already_dirty);
970 } else {
971 __ strb(zr, Address(rscratch2));
972 }
973 }
974 #undef __
975 #define __ masm.
976
977 void ShenandoahBarrierStubC2::load_and_decode(MacroAssembler& masm, Label& target_if_null) {
978 if (_do_load) {
979 // Fastpath sets _obj==noreg if it tells the slowpath to do the load
980 _obj = rscratch2;
981
982 // This does the load and the decode if necessary
983 __ load_heap_oop(_obj, _addr, noreg, noreg, AS_RAW);
984
985 __ cbz(_obj, target_if_null);
986 } else {
987 // If object is narrow, we need to decode it because everything else later
988 // will need full oops.
989 if (_narrow) {
990 if (_maybe_null) {
991 __ decode_heap_oop(_obj);
992 } else {
993 __ decode_heap_oop_not_null(_obj);
994 }
995 }
996
997 if (_maybe_null) {
998 __ cbz(_obj, target_if_null);
999 }
1000 }
1001 }
1002
1003 void ShenandoahBarrierStubC2::reencode_if_needed(MacroAssembler& masm) {
1004 // If object is narrow, we need to encode it before exiting.
1005 // For encoding, dst can only turn null if we are dealing with weak loads.
1006 // Otherwise, we have already null-checked. We can skip all this if we performed
1007 // the load ourselves, which means the value is not used by caller.
1008 if (!_do_load && _narrow) {
1009 if (_needs_load_ref_weak_barrier) {
1010 __ encode_heap_oop(_obj);
1011 } else {
1012 __ encode_heap_oop_not_null(_obj);
1013 }
1014 }
1015 }
1016
1017 void ShenandoahBarrierStubC2::emit_code(MacroAssembler& masm) {
1018 assert(_needs_keep_alive_barrier || _needs_load_ref_barrier, "Why are you here?");
1019 __ bind(*entry());
1020
1021 load_and_decode(masm, *continuation());
1022
1023 keepalive(masm, _obj, rscratch1);
1024
1025 lrb(masm, _obj, _addr, rscratch1);
1026
1027 reencode_if_needed(masm);
1028
1029 __ b(*continuation());
1030 }
1031
1032 void ShenandoahBarrierStubC2::keepalive(MacroAssembler& masm, Register obj, Register tmp1) {
1033 Address index(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
1034 Address buffer(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
1035 Label L_runtime;
1036 Label L_done;
1037
1038 // The node doesn't even need keepalive barrier, just don't check anything else
1039 if (!_needs_keep_alive_barrier) {
1040 return ;
1041 }
1042
1043 // Hotpatched GC checks only care about idle/non-idle state, so we need to check specific state.
1044 Address gcs_addr(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
1045 __ ldrb(tmp1, gcs_addr);
1046 __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, L_done);
1047
1048 // If buffer is full, call into runtime.
1049 __ ldr(tmp1, index);
1050 __ cbz(tmp1, L_runtime);
1051
1052 bool selected_live = false;
1053 Register tmp2 = select_temp_register(selected_live, _addr, obj);
1054 if (selected_live) {
1055 push_save_register(masm, tmp2);
1056 }
1057
1058 // The buffer is not full, store value into it.
1059 __ sub(tmp1, tmp1, wordSize);
1060 __ str(tmp1, index);
1061 __ ldr(tmp2, buffer);
1062 __ str(obj, Address(tmp2, tmp1));
1063 __ b(L_done);
1064
1065 // Runtime call
1066 __ bind(L_runtime);
1067
1068 preserve(obj);
1069 {
1070 bool clobbered_c_rarg0 = false;
1071 if (c_rarg0 != obj) {
1072 clobbered_c_rarg0 = push_save_register_if_live(masm, c_rarg0);
1073 __ mov(c_rarg0, obj);
1074 }
1075
1076 // Go to runtime stub and handle the rest there.
1077 __ far_call(RuntimeAddress(keepalive_runtime_entry_addr()));
1078
1079 // Restore the clobbered registers.
1080 if (clobbered_c_rarg0) {
1081 pop_save_register(masm, c_rarg0);
1082 }
1083 }
1084
1085 __ bind(L_done);
1086
1087 if (selected_live) {
1088 pop_save_register(masm, tmp2);
1089 }
1090 }
1091
1092 void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm, Register obj, Address addr, Register tmp) {
1093 Label L_done, L_slow;
1094
1095 // The node doesn't even need LRB barrier, just don't check anything else
1096 if (!_needs_load_ref_barrier) {
1097 return ;
1098 }
1099
1100 // Hotpatched GC checks only care about idle/non-idle state, so we need to check again.
1101 char state_to_check = ShenandoahHeap::HAS_FORWARDED | (_needs_load_ref_weak_barrier ? ShenandoahHeap::WEAK_ROOTS : 0);
1102 int bit_to_check = ShenandoahThreadLocalData::gc_state_to_fast_bit(state_to_check);
1103 Address gc_state_fast(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_offset()));
1104 __ ldrb(tmp, gc_state_fast);
1105 __ tbz(tmp, bit_to_check, L_done);
1106
1107 // If weak references are being processed, weak/phantom loads need to go slow,
1108 // regadless of their cset status.
1109 if (_needs_load_ref_weak_barrier) {
1110 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
1111 __ ldrb(tmp, gc_state);
1112 __ tbnz(tmp, ShenandoahHeap::WEAK_ROOTS_BITPOS, L_slow);
1113 }
1114
1115 // Cset-check. Fall-through to slow if in collection set.
1116 assert(ShenandoahHeapRegion::region_size_bytes_shift_jint() <= 63, "Maximum shift of the add is 63");
1117 __ mov(tmp, ShenandoahHeap::in_cset_fast_test_addr());
1118 __ add(tmp, tmp, obj, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
1119 __ ldrb(tmp, Address(tmp, 0));
1120 __ cbz(tmp, L_done);
1121
1122 // Slow path
1123 __ bind(L_slow);
1124 dont_preserve(obj);
1125 {
1126 // Shuffle in the arguments. The end result should be:
1127 // c_rarg0 <-- obj
1128 // c_rarg1 <-- lea(addr)
1129 //
1130 // Save clobbered registers before overwriting them, unless they
1131 // carry obj, which would be overwritten on return.
1132 bool clobbered_c_rarg0 = false;
1133 bool clobbered_c_rarg1 = false;
1134 bool clobbered_r0 = false;
1135
1136 if (c_rarg0 == obj) {
1137 clobbered_c_rarg1 = push_save_register_if_live(masm, c_rarg1);
1138 __ lea(c_rarg1, addr);
1139 } else if (c_rarg1 == obj) {
1140 // Set up arguments in reverse, and then flip them
1141 clobbered_c_rarg0 = push_save_register_if_live(masm, c_rarg0);
1142 __ lea(c_rarg0, addr);
1143 // flip them
1144 __ mov(rscratch1, c_rarg0);
1145 __ mov(c_rarg0, c_rarg1);
1146 __ mov(c_rarg1, rscratch1);
1147 } else {
1148 assert_different_registers(c_rarg1, obj);
1149 clobbered_c_rarg0 = push_save_register_if_live(masm, c_rarg0);
1150 clobbered_c_rarg1 = push_save_register_if_live(masm, c_rarg1);
1151 __ lea(c_rarg1, addr);
1152 __ mov(c_rarg0, obj);
1153 }
1154
1155 // The runtime call will clobber r0 at return. If obj isn't r0 then we need
1156 // to save obj.
1157 if (obj != r0) {
1158 clobbered_r0 = push_save_register_if_live(masm, r0);
1159 }
1160
1161 // Go to runtime stub and handle the rest there.
1162 __ far_call(RuntimeAddress(lrb_runtime_entry_addr()));
1163
1164 // Save the result where needed and restore the clobbered registers.
1165 if (obj != r0) {
1166 __ mov(obj, r0);
1167 }
1168 if (clobbered_r0) {
1169 pop_save_register(masm, r0);
1170 }
1171 if (clobbered_c_rarg1) {
1172 pop_save_register(masm, c_rarg1);
1173 }
1174 if (clobbered_c_rarg0) {
1175 pop_save_register(masm, c_rarg0);
1176 }
1177 }
1178
1179 __ bind(L_done);
1180 }
1181
1182 #undef __
1183 #define __ masm->
1184
1185 #endif // COMPILER2
1186
1187 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
1188 Register start, Register count, Register scratch) {
1189 assert(ShenandoahCardBarrier, "Should have been checked by caller");
1190
1191 Label L_loop, L_done;
1192 const Register end = count;
1193
1194 // Zero count? Nothing to do.
1195 __ cbz(count, L_done);
1196
1197 // end = start + count << LogBytesPerHeapOop
1198 // last element address to make inclusive
1199 __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
1200 __ sub(end, end, BytesPerHeapOop);
1201 __ lsr(start, start, CardTable::card_shift());
1202 __ lsr(end, end, CardTable::card_shift());
1203
1204 // number of bytes to copy
1205 __ sub(count, end, start);
1206
1207 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
1208 __ ldr(scratch, curr_ct_holder_addr);
1209 __ add(start, start, scratch);
1210 __ bind(L_loop);
1211 __ strb(zr, Address(start, count));
1212 __ subs(count, count, 1);
1213 __ br(Assembler::GE, L_loop);
1214 __ bind(L_done);
1215 }
1216
1217 #undef __
1218
1219 #ifdef COMPILER1
1220
1221 #define __ ce->masm()->
1222
1223 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
1224 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
1225 // At this point we know that marking is in progress.
1226 // If do_load() is true then we have to emit the
1227 // load of the previous value; otherwise it has already
1228 // been loaded into _pre_val.
1229
1230 __ bind(*stub->entry());
1231
1232 assert(stub->pre_val()->is_register(), "Precondition.");
1233
1234 Register pre_val_reg = stub->pre_val()->as_register();
1235
1236 if (stub->do_load()) {
1237 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
1238 }
1239 __ cbz(pre_val_reg, *stub->continuation());
1240 ce->store_parameter(stub->pre_val()->as_register(), 0);
1241 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
1242 __ b(*stub->continuation());
1243 }
1244
1245 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
1246 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
1247 __ bind(*stub->entry());
1248
1249 DecoratorSet decorators = stub->decorators();
1250 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
1251 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
1252 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
1253 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
1254
1255 Register obj = stub->obj()->as_register();
1256 Register res = stub->result()->as_register();
1257 Register addr = stub->addr()->as_pointer_register();
1258 Register tmp1 = stub->tmp1()->as_register();
1259 Register tmp2 = stub->tmp2()->as_register();
1260
1261 assert(res == r0, "result must arrive in r0");
1262
1263 if (res != obj) {
1264 __ mov(res, obj);
1265 }
1266
1267 if (is_strong) {
1268 // Check for object in cset.
1269 __ mov(tmp2, ShenandoahHeap::in_cset_fast_test_addr());
1270 __ lsr(tmp1, res, ShenandoahHeapRegion::region_size_bytes_shift_jint());
1271 __ ldrb(tmp2, Address(tmp2, tmp1));
1272 __ cbz(tmp2, *stub->continuation());
1273 }
1274
1275 ce->store_parameter(res, 0);
1276 ce->store_parameter(addr, 1);
1277 if (is_strong) {
1278 if (is_native) {
1279 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_native_rt_code_blob()->code_begin()));
1280 } else {
1281 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_rt_code_blob()->code_begin()));
1282 }
1283 } else if (is_weak) {
1284 __ far_call(RuntimeAddress(bs->load_reference_barrier_weak_rt_code_blob()->code_begin()));
1285 } else {
1286 assert(is_phantom, "only remaining strength");
1287 __ far_call(RuntimeAddress(bs->load_reference_barrier_phantom_rt_code_blob()->code_begin()));
1288 }
1289
1290 __ b(*stub->continuation());
1291 }
1292
1293 #undef __
1294
1295 #define __ sasm->
1296
1297 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
1298 __ prologue("shenandoah_pre_barrier", false);
1299
1300 // arg0 : previous value of memory
1301
1302 BarrierSet* bs = BarrierSet::barrier_set();
1303
1304 const Register pre_val = r0;
1305 const Register thread = rthread;
1306 const Register tmp = rscratch1;
1307
1308 Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
1309 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
1310
1311 Label done;
1312 Label runtime;
1313
1314 // Is marking still active?
1315 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
1316 __ ldrb(tmp, gc_state);
1317 __ tbz(tmp, ShenandoahHeap::MARKING_BITPOS, done);
1318
1319 // Can we store original value in the thread's buffer?
1320 __ ldr(tmp, queue_index);
1321 __ cbz(tmp, runtime);
1322
1323 __ sub(tmp, tmp, wordSize);
1324 __ str(tmp, queue_index);
1325 __ ldr(rscratch2, buffer);
1326 __ add(tmp, tmp, rscratch2);
1327 __ load_parameter(0, rscratch2);
1328 __ str(rscratch2, Address(tmp, 0));
1329 __ b(done);
1330
1331 __ bind(runtime);
1332 __ push_call_clobbered_registers();
1333 __ load_parameter(0, pre_val);
1334 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
1335 __ pop_call_clobbered_registers();
1336 __ bind(done);
1337
1338 __ epilogue();
1339 }
1340
1341 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
1342 __ prologue("shenandoah_load_reference_barrier", false);
1343 // arg0 : object to be resolved
1344
1345 __ push_call_clobbered_registers();
1346 __ load_parameter(0, r0);
1347 __ load_parameter(1, r1);
1348
1349 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
1350 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
1351 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
1352 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
1353 if (is_strong) {
1354 if (is_native) {
1355 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
1356 } else {
1357 if (UseCompressedOops) {
1358 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
1359 } else {
1360 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
1361 }
1362 }
1363 } else if (is_weak) {
1364 assert(!is_native, "weak must not be called off-heap");
1365 if (UseCompressedOops) {
1366 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
1367 } else {
1368 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
1369 }
1370 } else {
1371 assert(is_phantom, "only remaining strength");
1372 assert(is_native, "phantom must only be called off-heap");
1373 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom));
1374 }
1375 __ blr(lr);
1376 __ mov(rscratch1, r0);
1377 __ pop_call_clobbered_registers();
1378 __ mov(r0, rscratch1);
1379
1380 __ epilogue();
1381 }
1382
1383 #undef __
1384
1385 #endif // COMPILER1