191 address pc = instruction_address();
192 if (maybe_cpool_ref(pc)) {
193 address addr = MacroAssembler::target_addr_for_insn(pc);
194 *(int64_t*)addr = x;
195 } else {
196 MacroAssembler::pd_patch_instruction(pc, (address)intptr_t(x));
197 ICache::invalidate_range(instruction_address(), instruction_size);
198 }
199 }
200
201 void NativeMovRegMem::verify() {
202 #ifdef ASSERT
203 MacroAssembler::target_addr_for_insn(instruction_address());
204 #endif
205 }
206
207 //--------------------------------------------------------------------------------
208
209 void NativeJump::verify() { ; }
210
211 address NativeJump::jump_destination() const {
212 address dest = MacroAssembler::target_addr_for_insn(instruction_address());
213
214 // We use jump to self as the unresolved address which the inline
215 // cache code (and relocs) know about
216 // As a special case we also use sequence movptr(r,0); br(r);
217 // i.e. jump to 0 when we need leave space for a wide immediate
218 // load
219
220 // return -1 if jump to self or to 0
221 if ((dest == (address)this) || dest == nullptr) {
222 dest = (address) -1;
223 }
224 return dest;
225 }
226
227 void NativeJump::set_jump_destination(address dest) {
228 // We use jump to self as the unresolved address which the inline
229 // cache code (and relocs) know about
230 if (dest == (address) -1)
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191 address pc = instruction_address();
192 if (maybe_cpool_ref(pc)) {
193 address addr = MacroAssembler::target_addr_for_insn(pc);
194 *(int64_t*)addr = x;
195 } else {
196 MacroAssembler::pd_patch_instruction(pc, (address)intptr_t(x));
197 ICache::invalidate_range(instruction_address(), instruction_size);
198 }
199 }
200
201 void NativeMovRegMem::verify() {
202 #ifdef ASSERT
203 MacroAssembler::target_addr_for_insn(instruction_address());
204 #endif
205 }
206
207 //--------------------------------------------------------------------------------
208
209 void NativeJump::verify() { ; }
210
211 void NativeJump::insert(address code_pos, address entry) {
212 // Dispacement is relative to the jump instruction PC
213 intptr_t disp = (intptr_t)entry - ((intptr_t)code_pos);
214
215 // The jump immediate is 26 bits and it will at execution time be scaled by 4
216 int64_t imm26 = disp >> 2;
217
218 // The farthest that we can jump is +/- 128MiB
219 guarantee(Assembler::is_simm(imm26, 26), "maximum offset is 128MiB, you asking for %ld", imm26);
220
221 // Patch with opcode | offset
222 *((int32_t*)code_pos) = 0x14000000 | imm26;
223
224 // Tell hardware to invalidate icache line containing code_pos
225 ICache::invalidate_range(code_pos, instruction_size);
226 }
227
228 address NativeJump::jump_destination() const {
229 address dest = MacroAssembler::target_addr_for_insn(instruction_address());
230
231 // We use jump to self as the unresolved address which the inline
232 // cache code (and relocs) know about
233 // As a special case we also use sequence movptr(r,0); br(r);
234 // i.e. jump to 0 when we need leave space for a wide immediate
235 // load
236
237 // return -1 if jump to self or to 0
238 if ((dest == (address)this) || dest == nullptr) {
239 dest = (address) -1;
240 }
241 return dest;
242 }
243
244 void NativeJump::set_jump_destination(address dest) {
245 // We use jump to self as the unresolved address which the inline
246 // cache code (and relocs) know about
247 if (dest == (address) -1)
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