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src/hotspot/share/opto/lcm.cpp

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 161     was_store = false;
 162     int iop = mach->ideal_Opcode();
 163     switch( iop ) {
 164     case Op_LoadB:
 165     case Op_LoadUB:
 166     case Op_LoadUS:
 167     case Op_LoadD:
 168     case Op_LoadF:
 169     case Op_LoadI:
 170     case Op_LoadL:
 171     case Op_LoadP:
 172     case Op_LoadBarrierSlowReg:
 173     case Op_LoadBarrierWeakSlowReg:
 174     case Op_LoadN:
 175     case Op_LoadS:
 176     case Op_LoadKlass:
 177     case Op_LoadNKlass:
 178     case Op_LoadRange:
 179     case Op_LoadD_unaligned:
 180     case Op_LoadL_unaligned:
 181     case Op_ShenandoahReadBarrier:
 182       assert(mach->in(2) == val, "should be address");
 183       break;
 184     case Op_StoreB:
 185     case Op_StoreC:
 186     case Op_StoreCM:
 187     case Op_StoreD:
 188     case Op_StoreF:
 189     case Op_StoreI:
 190     case Op_StoreL:
 191     case Op_StoreP:
 192     case Op_StoreN:
 193     case Op_StoreNKlass:
 194       was_store = true;         // Memory op is a store op
 195       // Stores will have their address in slot 2 (memory in slot 1).
 196       // If the value being nul-checked is in another slot, it means we
 197       // are storing the checked value, which does NOT check the value!
 198       if( mach->in(2) != val ) continue;
 199       break;                    // Found a memory op?
 200     case Op_StrComp:
 201     case Op_StrEquals:




 161     was_store = false;
 162     int iop = mach->ideal_Opcode();
 163     switch( iop ) {
 164     case Op_LoadB:
 165     case Op_LoadUB:
 166     case Op_LoadUS:
 167     case Op_LoadD:
 168     case Op_LoadF:
 169     case Op_LoadI:
 170     case Op_LoadL:
 171     case Op_LoadP:
 172     case Op_LoadBarrierSlowReg:
 173     case Op_LoadBarrierWeakSlowReg:
 174     case Op_LoadN:
 175     case Op_LoadS:
 176     case Op_LoadKlass:
 177     case Op_LoadNKlass:
 178     case Op_LoadRange:
 179     case Op_LoadD_unaligned:
 180     case Op_LoadL_unaligned:

 181       assert(mach->in(2) == val, "should be address");
 182       break;
 183     case Op_StoreB:
 184     case Op_StoreC:
 185     case Op_StoreCM:
 186     case Op_StoreD:
 187     case Op_StoreF:
 188     case Op_StoreI:
 189     case Op_StoreL:
 190     case Op_StoreP:
 191     case Op_StoreN:
 192     case Op_StoreNKlass:
 193       was_store = true;         // Memory op is a store op
 194       // Stores will have their address in slot 2 (memory in slot 1).
 195       // If the value being nul-checked is in another slot, it means we
 196       // are storing the checked value, which does NOT check the value!
 197       if( mach->in(2) != val ) continue;
 198       break;                    // Found a memory op?
 199     case Op_StrComp:
 200     case Op_StrEquals:


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