1 /*
   2  * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved.
   3  *
   4  * This code is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License version 2 only, as
   6  * published by the Free Software Foundation.
   7  *
   8  * This code is distributed in the hope that it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11  * version 2 for more details (a copy is included in the LICENSE file that
  12  * accompanied this code).
  13  *
  14  * You should have received a copy of the GNU General Public License version
  15  * 2 along with this work; if not, write to the Free Software Foundation,
  16  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  19  * or visit www.oracle.com if you need additional information or have any
  20  * questions.
  21  *
  22  */
  23 
  24 #include "precompiled.hpp"
  25 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
  26 #include "gc/shenandoah/shenandoahForwarding.hpp"
  27 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
  28 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
  29 #include "gc/shenandoah/shenandoahHeuristics.hpp"
  30 #include "gc/shenandoah/shenandoahRuntime.hpp"
  31 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
  32 #include "interpreter/interpreter.hpp"
  33 #include "interpreter/interp_masm.hpp"
  34 #include "runtime/sharedRuntime.hpp"
  35 #include "runtime/thread.hpp"
  36 #include "utilities/macros.hpp"
  37 #ifdef COMPILER1
  38 #include "c1/c1_LIRAssembler.hpp"
  39 #include "c1/c1_MacroAssembler.hpp"
  40 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
  41 #endif
  42 
  43 #define __ masm->
  44 
  45 address ShenandoahBarrierSetAssembler::_shenandoah_lrb = NULL;
  46 
  47 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  48                                                        Register src, Register dst, Register count) {
  49 
  50   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
  51 
  52   if (is_reference_type(type)) {
  53 
  54     if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {
  55 #ifdef _LP64
  56       Register thread = r15_thread;
  57 #else
  58       Register thread = rax;
  59       if (thread == src || thread == dst || thread == count) {
  60         thread = rbx;
  61       }
  62       if (thread == src || thread == dst || thread == count) {
  63         thread = rcx;
  64       }
  65       if (thread == src || thread == dst || thread == count) {
  66         thread = rdx;
  67       }
  68       __ push(thread);
  69       __ get_thread(thread);
  70 #endif
  71       assert_different_registers(src, dst, count, thread);
  72 
  73       Label done;
  74       // Short-circuit if count == 0.
  75       __ testptr(count, count);
  76       __ jcc(Assembler::zero, done);
  77 
  78       // Avoid runtime call when not marking.
  79       Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
  80       int flags = ShenandoahHeap::HAS_FORWARDED;
  81       if (!dest_uninitialized) {
  82         flags |= ShenandoahHeap::MARKING;
  83       }
  84       __ testb(gc_state, flags);
  85       __ jcc(Assembler::zero, done);
  86 
  87       __ pusha();                      // push registers
  88 #ifdef _LP64
  89       assert(src == rdi, "expected");
  90       assert(dst == rsi, "expected");
  91       assert(count == rdx, "expected");
  92       if (UseCompressedOops) {
  93         if (dest_uninitialized) {
  94           __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_duinit_narrow_oop_entry), src, dst, count);
  95         } else {
  96           __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_narrow_oop_entry), src, dst, count);
  97         }
  98       } else
  99 #endif
 100       {
 101         if (dest_uninitialized) {
 102           __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_duinit_oop_entry), src, dst, count);
 103         } else {
 104           __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry), src, dst, count);
 105         }
 106       }
 107       __ popa();
 108       __ bind(done);
 109       NOT_LP64(__ pop(thread);)
 110     }
 111   }
 112 
 113 }
 114 
 115 void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,
 116                                                                  Register obj,
 117                                                                  Register pre_val,
 118                                                                  Register thread,
 119                                                                  Register tmp,
 120                                                                  bool tosca_live,
 121                                                                  bool expand_call) {
 122 
 123   if (ShenandoahSATBBarrier) {
 124     satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call);
 125   }
 126 }
 127 
 128 void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
 129                                                            Register obj,
 130                                                            Register pre_val,
 131                                                            Register thread,
 132                                                            Register tmp,
 133                                                            bool tosca_live,
 134                                                            bool expand_call) {
 135   // If expand_call is true then we expand the call_VM_leaf macro
 136   // directly to skip generating the check by
 137   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
 138 
 139 #ifdef _LP64
 140   assert(thread == r15_thread, "must be");
 141 #endif // _LP64
 142 
 143   Label done;
 144   Label runtime;
 145 
 146   assert(pre_val != noreg, "check this code");
 147 
 148   if (obj != noreg) {
 149     assert_different_registers(obj, pre_val, tmp);
 150     assert(pre_val != rax, "check this code");
 151   }
 152 
 153   Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
 154   Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 155   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 156 
 157   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 158   __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
 159   __ jcc(Assembler::zero, done);
 160 
 161   // Do we need to load the previous value?
 162   if (obj != noreg) {
 163     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
 164   }
 165 
 166   // Is the previous value null?
 167   __ cmpptr(pre_val, (int32_t) NULL_WORD);
 168   __ jcc(Assembler::equal, done);
 169 
 170   // Can we store original value in the thread's buffer?
 171   // Is index == 0?
 172   // (The index field is typed as size_t.)
 173 
 174   __ movptr(tmp, index);                   // tmp := *index_adr
 175   __ cmpptr(tmp, 0);                       // tmp == 0?
 176   __ jcc(Assembler::equal, runtime);       // If yes, goto runtime
 177 
 178   __ subptr(tmp, wordSize);                // tmp := tmp - wordSize
 179   __ movptr(index, tmp);                   // *index_adr := tmp
 180   __ addptr(tmp, buffer);                  // tmp := tmp + *buffer_adr
 181 
 182   // Record the previous value
 183   __ movptr(Address(tmp, 0), pre_val);
 184   __ jmp(done);
 185 
 186   __ bind(runtime);
 187   // save the live input values
 188   if(tosca_live) __ push(rax);
 189 
 190   if (obj != noreg && obj != rax)
 191     __ push(obj);
 192 
 193   if (pre_val != rax)
 194     __ push(pre_val);
 195 
 196   // Calling the runtime using the regular call_VM_leaf mechanism generates
 197   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
 198   // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL.
 199   //
 200   // If we care generating the pre-barrier without a frame (e.g. in the
 201   // intrinsified Reference.get() routine) then ebp might be pointing to
 202   // the caller frame and so this check will most likely fail at runtime.
 203   //
 204   // Expanding the call directly bypasses the generation of the check.
 205   // So when we do not have have a full interpreter frame on the stack
 206   // expand_call should be passed true.
 207 
 208   NOT_LP64( __ push(thread); )
 209 
 210 #ifdef _LP64
 211   // We move pre_val into c_rarg0 early, in order to avoid smashing it, should
 212   // pre_val be c_rarg1 (where the call prologue would copy thread argument).
 213   // Note: this should not accidentally smash thread, because thread is always r15.
 214   assert(thread != c_rarg0, "smashed arg");
 215   if (c_rarg0 != pre_val) {
 216     __ mov(c_rarg0, pre_val);
 217   }
 218 #endif
 219 
 220   if (expand_call) {
 221     LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
 222 #ifdef _LP64
 223     if (c_rarg1 != thread) {
 224       __ mov(c_rarg1, thread);
 225     }
 226     // Already moved pre_val into c_rarg0 above
 227 #else
 228     __ push(thread);
 229     __ push(pre_val);
 230 #endif
 231     __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), 2);
 232   } else {
 233     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), LP64_ONLY(c_rarg0) NOT_LP64(pre_val), thread);
 234   }
 235 
 236   NOT_LP64( __ pop(thread); )
 237 
 238   // save the live input values
 239   if (pre_val != rax)
 240     __ pop(pre_val);
 241 
 242   if (obj != noreg && obj != rax)
 243     __ pop(obj);
 244 
 245   if(tosca_live) __ pop(rax);
 246 
 247   __ bind(done);
 248 }
 249 
 250 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) {
 251   assert(ShenandoahCASBarrier, "should be enabled");
 252   Label is_null;
 253   __ testptr(dst, dst);
 254   __ jcc(Assembler::zero, is_null);
 255   resolve_forward_pointer_not_null(masm, dst, tmp);
 256   __ bind(is_null);
 257 }
 258 
 259 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) {
 260   assert(ShenandoahCASBarrier || ShenandoahLoadRefBarrier, "should be enabled");
 261   // The below loads the mark word, checks if the lowest two bits are
 262   // set, and if so, clear the lowest two bits and copy the result
 263   // to dst. Otherwise it leaves dst alone.
 264   // Implementing this is surprisingly awkward. I do it here by:
 265   // - Inverting the mark word
 266   // - Test lowest two bits == 0
 267   // - If so, set the lowest two bits
 268   // - Invert the result back, and copy to dst
 269 
 270   bool borrow_reg = (tmp == noreg);
 271   if (borrow_reg) {
 272     // No free registers available. Make one useful.
 273     tmp = LP64_ONLY(rscratch1) NOT_LP64(rdx);
 274     if (tmp == dst) {
 275       tmp = LP64_ONLY(rscratch2) NOT_LP64(rcx);
 276     }
 277     __ push(tmp);
 278   }
 279 
 280   assert_different_registers(dst, tmp);
 281 
 282   Label done;
 283   __ movptr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
 284   __ notptr(tmp);
 285   __ testb(tmp, markWord::marked_value);
 286   __ jccb(Assembler::notZero, done);
 287   __ orptr(tmp, markWord::marked_value);
 288   __ notptr(tmp);
 289   __ mov(dst, tmp);
 290   __ bind(done);
 291 
 292   if (borrow_reg) {
 293     __ pop(tmp);
 294   }
 295 }
 296 
 297 
 298 void ShenandoahBarrierSetAssembler::load_reference_barrier_not_null(MacroAssembler* masm, Register dst) {
 299   assert(ShenandoahLoadRefBarrier, "Should be enabled");
 300 
 301   Label done;
 302 
 303 #ifdef _LP64
 304   Register thread = r15_thread;
 305 #else
 306   Register thread = rcx;
 307   if (thread == dst) {
 308     thread = rbx;
 309   }
 310   __ push(thread);
 311   __ get_thread(thread);
 312 #endif
 313   assert_different_registers(dst, thread);
 314 
 315   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 316   __ testb(gc_state, ShenandoahHeap::HAS_FORWARDED);
 317   __ jccb(Assembler::zero, done);
 318 
 319    if (dst != rax) {
 320      __ xchgptr(dst, rax); // Move obj into rax and save rax into obj.
 321    }
 322 
 323    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahBarrierSetAssembler::shenandoah_lrb())));
 324 
 325    if (dst != rax) {
 326      __ xchgptr(rax, dst); // Swap back obj with rax.
 327    }
 328 
 329   __ bind(done);
 330 
 331 #ifndef _LP64
 332   __ pop(thread);
 333 #endif
 334 }
 335 
 336 void ShenandoahBarrierSetAssembler::load_reference_barrier_native(MacroAssembler* masm, Register dst, Address src) {
 337   if (!ShenandoahLoadRefBarrier) {
 338     return;
 339   }
 340 
 341   Label done;
 342   Label not_null;
 343   Label slow_path;
 344   __ block_comment("load_reference_barrier_native { ");
 345 
 346   // null check
 347   __ testptr(dst, dst);
 348   __ jcc(Assembler::notZero, not_null);
 349   __ jmp(done);
 350   __ bind(not_null);
 351 
 352 
 353 #ifdef _LP64
 354   Register thread = r15_thread;
 355 #else
 356   Register thread = rcx;
 357   if (thread == dst) {
 358     thread = rbx;
 359   }
 360   __ push(thread);
 361   __ get_thread(thread);
 362 #endif
 363   assert_different_registers(dst, thread);
 364 
 365   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 366   __ testb(gc_state, ShenandoahHeap::EVACUATION);
 367 #ifndef _LP64
 368   __ pop(thread);
 369 #endif
 370   __ jccb(Assembler::notZero, slow_path);
 371   __ jmp(done);
 372   __ bind(slow_path);
 373 
 374   if (dst != rax) {
 375     __ push(rax);
 376   }
 377   __ push(rcx);
 378   __ push(rdx);
 379   __ push(rdi);
 380   __ push(rsi);
 381 #ifdef _LP64
 382   __ push(r8);
 383   __ push(r9);
 384   __ push(r10);
 385   __ push(r11);
 386   __ push(r12);
 387   __ push(r13);
 388   __ push(r14);
 389   __ push(r15);
 390 #endif
 391 
 392   assert_different_registers(dst, rsi);
 393   __ lea(rsi, src);
 394   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_native), dst, rsi);
 395 
 396 #ifdef _LP64
 397   __ pop(r15);
 398   __ pop(r14);
 399   __ pop(r13);
 400   __ pop(r12);
 401   __ pop(r11);
 402   __ pop(r10);
 403   __ pop(r9);
 404   __ pop(r8);
 405 #endif
 406   __ pop(rsi);
 407   __ pop(rdi);
 408   __ pop(rdx);
 409   __ pop(rcx);
 410 
 411   if (dst != rax) {
 412     __ movptr(dst, rax);
 413     __ pop(rax);
 414   }
 415 
 416   __ bind(done);
 417   __ block_comment("load_reference_barrier_native { ");
 418 }
 419 
 420 void ShenandoahBarrierSetAssembler::storeval_barrier(MacroAssembler* masm, Register dst, Register tmp) {
 421   if (ShenandoahStoreValEnqueueBarrier) {
 422     storeval_barrier_impl(masm, dst, tmp);
 423   }
 424 }
 425 
 426 void ShenandoahBarrierSetAssembler::storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp) {
 427   assert(ShenandoahStoreValEnqueueBarrier, "should be enabled");
 428 
 429   if (dst == noreg) return;
 430 
 431   if (ShenandoahStoreValEnqueueBarrier) {
 432     // The set of registers to be saved+restored is the same as in the write-barrier above.
 433     // Those are the commonly used registers in the interpreter.
 434     __ pusha();
 435     // __ push_callee_saved_registers();
 436     __ subptr(rsp, 2 * Interpreter::stackElementSize);
 437     __ movdbl(Address(rsp, 0), xmm0);
 438 
 439 #ifdef _LP64
 440     Register thread = r15_thread;
 441 #else
 442     Register thread = rcx;
 443     if (thread == dst || thread == tmp) {
 444       thread = rdi;
 445     }
 446     if (thread == dst || thread == tmp) {
 447       thread = rbx;
 448     }
 449     __ get_thread(thread);
 450 #endif
 451     assert_different_registers(dst, tmp, thread);
 452 
 453     satb_write_barrier_pre(masm, noreg, dst, thread, tmp, true, false);
 454     __ movdbl(xmm0, Address(rsp, 0));
 455     __ addptr(rsp, 2 * Interpreter::stackElementSize);
 456     //__ pop_callee_saved_registers();
 457     __ popa();
 458   }
 459 }
 460 
 461 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst) {
 462   if (ShenandoahLoadRefBarrier) {
 463     Label done;
 464     __ testptr(dst, dst);
 465     __ jcc(Assembler::zero, done);
 466     load_reference_barrier_not_null(masm, dst);
 467     __ bind(done);
 468   }
 469 }
 470 
 471 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 472              Register dst, Address src, Register tmp1, Register tmp_thread) {
 473   bool on_oop = is_reference_type(type);
 474   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
 475   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
 476   bool not_in_heap = (decorators & IN_NATIVE) != 0;
 477   bool on_reference = on_weak || on_phantom;
 478   bool is_traversal_mode = ShenandoahHeap::heap()->is_traversal_mode();
 479   bool keep_alive = ((decorators & AS_NO_KEEPALIVE) == 0) || is_traversal_mode;
 480 
 481   Register result_dst = dst;
 482   bool use_tmp1_for_dst = false;
 483 
 484   if (on_oop) {
 485     // We want to preserve src
 486     if (dst == src.base() || dst == src.index()) {
 487       // Use tmp1 for dst if possible, as it is not used in BarrierAssembler::load_at()
 488       if (tmp1->is_valid() && tmp1 != src.base() && tmp1 != src.index()) {
 489         dst = tmp1;
 490         use_tmp1_for_dst = true;
 491       } else {
 492         dst = rdi;
 493         __ push(dst);
 494       }
 495     }
 496     assert_different_registers(dst, src.base(), src.index());
 497   }
 498 
 499   BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 500 
 501   if (on_oop) {
 502     if (not_in_heap && !is_traversal_mode) {
 503       load_reference_barrier_native(masm, dst, src);
 504     } else {
 505       load_reference_barrier(masm, dst);
 506     }
 507 
 508     if (dst != result_dst) {
 509       __ movptr(result_dst, dst);
 510 
 511       if (!use_tmp1_for_dst) {
 512         __ pop(dst);
 513       }
 514 
 515       dst = result_dst;
 516     }
 517 
 518     if (ShenandoahKeepAliveBarrier && on_reference && keep_alive) {
 519       const Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
 520       assert_different_registers(dst, tmp1, tmp_thread);
 521       NOT_LP64(__ get_thread(thread));
 522       // Generate the SATB pre-barrier code to log the value of
 523       // the referent field in an SATB buffer.
 524       shenandoah_write_barrier_pre(masm /* masm */,
 525                                    noreg /* obj */,
 526                                    dst /* pre_val */,
 527                                    thread /* thread */,
 528                                    tmp1 /* tmp */,
 529                                    true /* tosca_live */,
 530                                    true /* expand_call */);
 531     }
 532   }
 533 }
 534 
 535 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 536               Address dst, Register val, Register tmp1, Register tmp2) {
 537 
 538   bool on_oop = is_reference_type(type);
 539   bool in_heap = (decorators & IN_HEAP) != 0;
 540   bool as_normal = (decorators & AS_NORMAL) != 0;
 541   if (on_oop && in_heap) {
 542     bool needs_pre_barrier = as_normal;
 543 
 544     Register tmp3 = LP64_ONLY(r8) NOT_LP64(rsi);
 545     Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 546     // flatten object address if needed
 547     // We do it regardless of precise because we need the registers
 548     if (dst.index() == noreg && dst.disp() == 0) {
 549       if (dst.base() != tmp1) {
 550         __ movptr(tmp1, dst.base());
 551       }
 552     } else {
 553       __ lea(tmp1, dst);
 554     }
 555 
 556     assert_different_registers(val, tmp1, tmp2, tmp3, rthread);
 557 
 558 #ifndef _LP64
 559     __ get_thread(rthread);
 560     InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
 561     imasm->save_bcp();
 562 #endif
 563 
 564     if (needs_pre_barrier) {
 565       shenandoah_write_barrier_pre(masm /*masm*/,
 566                                    tmp1 /* obj */,
 567                                    tmp2 /* pre_val */,
 568                                    rthread /* thread */,
 569                                    tmp3  /* tmp */,
 570                                    val != noreg /* tosca_live */,
 571                                    false /* expand_call */);
 572     }
 573     if (val == noreg) {
 574       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg);
 575     } else {
 576       storeval_barrier(masm, val, tmp3);
 577       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg);
 578     }
 579     NOT_LP64(imasm->restore_bcp());
 580   } else {
 581     BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);
 582   }
 583 }
 584 
 585 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 586                                                                   Register obj, Register tmp, Label& slowpath) {
 587   Label done;
 588   // Resolve jobject
 589   BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
 590 
 591   // Check for null.
 592   __ testptr(obj, obj);
 593   __ jcc(Assembler::zero, done);
 594 
 595   Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
 596   __ testb(gc_state, ShenandoahHeap::EVACUATION);
 597   __ jccb(Assembler::notZero, slowpath);
 598   __ bind(done);
 599 }
 600 
 601 // Special Shenandoah CAS implementation that handles false negatives
 602 // due to concurrent evacuation.
 603 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
 604                                                 Register res, Address addr, Register oldval, Register newval,
 605                                                 bool exchange, Register tmp1, Register tmp2) {
 606   assert(ShenandoahCASBarrier, "Should only be used when CAS barrier is enabled");
 607   assert(oldval == rax, "must be in rax for implicit use in cmpxchg");
 608 
 609   Label retry, done;
 610 
 611   // Remember oldval for retry logic below
 612 #ifdef _LP64
 613   if (UseCompressedOops) {
 614     __ movl(tmp1, oldval);
 615   } else
 616 #endif
 617   {
 618     __ movptr(tmp1, oldval);
 619   }
 620 
 621   // Step 1. Try to CAS with given arguments. If successful, then we are done,
 622   // and can safely return.
 623   if (os::is_MP()) __ lock();
 624 #ifdef _LP64
 625   if (UseCompressedOops) {
 626     __ cmpxchgl(newval, addr);
 627   } else
 628 #endif
 629   {
 630     __ cmpxchgptr(newval, addr);
 631   }
 632   __ jcc(Assembler::equal, done, true);
 633 
 634   // Step 2. CAS had failed. This may be a false negative.
 635   //
 636   // The trouble comes when we compare the to-space pointer with the from-space
 637   // pointer to the same object. To resolve this, it will suffice to resolve both
 638   // oldval and the value from memory -- this will give both to-space pointers.
 639   // If they mismatch, then it was a legitimate failure.
 640   //
 641 #ifdef _LP64
 642   if (UseCompressedOops) {
 643     __ decode_heap_oop(tmp1);
 644   }
 645 #endif
 646   resolve_forward_pointer(masm, tmp1);
 647 
 648 #ifdef _LP64
 649   if (UseCompressedOops) {
 650     __ movl(tmp2, oldval);
 651     __ decode_heap_oop(tmp2);
 652   } else
 653 #endif
 654   {
 655     __ movptr(tmp2, oldval);
 656   }
 657   resolve_forward_pointer(masm, tmp2);
 658 
 659   __ cmpptr(tmp1, tmp2);
 660   __ jcc(Assembler::notEqual, done, true);
 661 
 662   // Step 3. Try to CAS again with resolved to-space pointers.
 663   //
 664   // Corner case: it may happen that somebody stored the from-space pointer
 665   // to memory while we were preparing for retry. Therefore, we can fail again
 666   // on retry, and so need to do this in loop, always resolving the failure
 667   // witness.
 668   __ bind(retry);
 669   if (os::is_MP()) __ lock();
 670 #ifdef _LP64
 671   if (UseCompressedOops) {
 672     __ cmpxchgl(newval, addr);
 673   } else
 674 #endif
 675   {
 676     __ cmpxchgptr(newval, addr);
 677   }
 678   __ jcc(Assembler::equal, done, true);
 679 
 680 #ifdef _LP64
 681   if (UseCompressedOops) {
 682     __ movl(tmp2, oldval);
 683     __ decode_heap_oop(tmp2);
 684   } else
 685 #endif
 686   {
 687     __ movptr(tmp2, oldval);
 688   }
 689   resolve_forward_pointer(masm, tmp2);
 690 
 691   __ cmpptr(tmp1, tmp2);
 692   __ jcc(Assembler::equal, retry, true);
 693 
 694   // Step 4. If we need a boolean result out of CAS, check the flag again,
 695   // and promote the result. Note that we handle the flag from both the CAS
 696   // itself and from the retry loop.
 697   __ bind(done);
 698   if (!exchange) {
 699     assert(res != NULL, "need result register");
 700 #ifdef _LP64
 701     __ setb(Assembler::equal, res);
 702     __ movzbl(res, res);
 703 #else
 704     // Need something else to clean the result, because some registers
 705     // do not have byte encoding that movzbl wants. Cannot do the xor first,
 706     // because it modifies the flags.
 707     Label res_non_zero;
 708     __ movptr(res, 1);
 709     __ jcc(Assembler::equal, res_non_zero, true);
 710     __ xorptr(res, res);
 711     __ bind(res_non_zero);
 712 #endif
 713   }
 714 }
 715 
 716 #undef __
 717 
 718 #ifdef COMPILER1
 719 
 720 #define __ ce->masm()->
 721 
 722 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
 723   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 724   // At this point we know that marking is in progress.
 725   // If do_load() is true then we have to emit the
 726   // load of the previous value; otherwise it has already
 727   // been loaded into _pre_val.
 728 
 729   __ bind(*stub->entry());
 730   assert(stub->pre_val()->is_register(), "Precondition.");
 731 
 732   Register pre_val_reg = stub->pre_val()->as_register();
 733 
 734   if (stub->do_load()) {
 735     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
 736   }
 737 
 738   __ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
 739   __ jcc(Assembler::equal, *stub->continuation());
 740   ce->store_parameter(stub->pre_val()->as_register(), 0);
 741   __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
 742   __ jmp(*stub->continuation());
 743 
 744 }
 745 
 746 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
 747   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 748   __ bind(*stub->entry());
 749 
 750   Register obj = stub->obj()->as_register();
 751   Register res = stub->result()->as_register();
 752   Register addr = stub->addr()->as_register();
 753   Register tmp1 = stub->tmp1()->as_register();
 754   Register tmp2 = stub->tmp2()->as_register();
 755   assert_different_registers(obj, res, addr, tmp1, tmp2);
 756 
 757   Label slow_path;
 758 
 759   assert(res == rax, "result must arrive in rax");
 760 
 761   if (res != obj) {
 762     __ mov(res, obj);
 763   }
 764 
 765   // Check for null.
 766   __ testptr(res, res);
 767   __ jcc(Assembler::zero, *stub->continuation());
 768 
 769   // Check for object being in the collection set.
 770   __ mov(tmp1, res);
 771   __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 772   __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
 773 #ifdef _LP64
 774   __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
 775   __ testbool(tmp2);
 776 #else
 777   // On x86_32, C1 register allocator can give us the register without 8-bit support.
 778   // Do the full-register access and test to avoid compilation failures.
 779   __ movptr(tmp2, Address(tmp2, tmp1, Address::times_1));
 780   __ testptr(tmp2, 0xFF);
 781 #endif
 782   __ jcc(Assembler::zero, *stub->continuation());
 783 
 784   __ bind(slow_path);
 785   ce->store_parameter(res, 0);
 786   ce->store_parameter(addr, 1);
 787   __ call(RuntimeAddress(bs->load_reference_barrier_rt_code_blob()->code_begin()));
 788 
 789   __ jmp(*stub->continuation());
 790 }
 791 
 792 #undef __
 793 
 794 #define __ sasm->
 795 
 796 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
 797   __ prologue("shenandoah_pre_barrier", false);
 798   // arg0 : previous value of memory
 799 
 800   __ push(rax);
 801   __ push(rdx);
 802 
 803   const Register pre_val = rax;
 804   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
 805   const Register tmp = rdx;
 806 
 807   NOT_LP64(__ get_thread(thread);)
 808 
 809   Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 810   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 811 
 812   Label done;
 813   Label runtime;
 814 
 815   // Is SATB still active?
 816   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 817   __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
 818   __ jcc(Assembler::zero, done);
 819 
 820   // Can we store original value in the thread's buffer?
 821 
 822   __ movptr(tmp, queue_index);
 823   __ testptr(tmp, tmp);
 824   __ jcc(Assembler::zero, runtime);
 825   __ subptr(tmp, wordSize);
 826   __ movptr(queue_index, tmp);
 827   __ addptr(tmp, buffer);
 828 
 829   // prev_val (rax)
 830   __ load_parameter(0, pre_val);
 831   __ movptr(Address(tmp, 0), pre_val);
 832   __ jmp(done);
 833 
 834   __ bind(runtime);
 835 
 836   __ save_live_registers_no_oop_map(true);
 837 
 838   // load the pre-value
 839   __ load_parameter(0, rcx);
 840   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), rcx, thread);
 841 
 842   __ restore_live_registers(true);
 843 
 844   __ bind(done);
 845 
 846   __ pop(rdx);
 847   __ pop(rax);
 848 
 849   __ epilogue();
 850 }
 851 
 852 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm) {
 853   __ prologue("shenandoah_load_reference_barrier", false);
 854   // arg0 : object to be resolved
 855 
 856   __ save_live_registers_no_oop_map(true);
 857 
 858 #ifdef _LP64
 859   __ load_parameter(0, c_rarg0);
 860   __ load_parameter(1, c_rarg1);
 861   if (UseCompressedOops) {
 862     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_fixup_narrow), c_rarg0, c_rarg1);
 863   } else {
 864     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_fixup), c_rarg0, c_rarg1);
 865   }
 866 #else
 867   __ load_parameter(0, rax);
 868   __ load_parameter(1, rbx);
 869   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_fixup), rax, rbx);
 870 #endif
 871 
 872   __ restore_live_registers_except_rax(true);
 873 
 874   __ epilogue();
 875 }
 876 
 877 #undef __
 878 
 879 #endif // COMPILER1
 880 
 881 address ShenandoahBarrierSetAssembler::shenandoah_lrb() {
 882   assert(_shenandoah_lrb != NULL, "need load reference barrier stub");
 883   return _shenandoah_lrb;
 884 }
 885 
 886 #define __ cgen->assembler()->
 887 
 888 address ShenandoahBarrierSetAssembler::generate_shenandoah_lrb(StubCodeGenerator* cgen) {
 889   __ align(CodeEntryAlignment);
 890   StubCodeMark mark(cgen, "StubRoutines", "shenandoah_lrb");
 891   address start = __ pc();
 892 
 893   Label resolve_oop, slow_path;
 894 
 895   // We use RDI, which also serves as argument register for slow call.
 896   // RAX always holds the src object ptr, except after the slow call,
 897   // then it holds the result. R8/RBX is used as temporary register.
 898 
 899   Register tmp1 = rdi;
 900   Register tmp2 = LP64_ONLY(r8) NOT_LP64(rbx);
 901 
 902   __ push(tmp1);
 903   __ push(tmp2);
 904 
 905   // Check for object being in the collection set.
 906   __ mov(tmp1, rax);
 907   __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 908   __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
 909   __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
 910   __ testbool(tmp2);
 911   __ jccb(Assembler::notZero, resolve_oop);
 912   __ pop(tmp2);
 913   __ pop(tmp1);
 914   __ ret(0);
 915 
 916   // Test if object is already resolved.
 917   __ bind(resolve_oop);
 918   __ movptr(tmp2, Address(rax, oopDesc::mark_offset_in_bytes()));
 919   // Test if both lowest bits are set. We trick it by negating the bits
 920   // then test for both bits clear.
 921   __ notptr(tmp2);
 922   __ testb(tmp2, markWord::marked_value);
 923   __ jccb(Assembler::notZero, slow_path);
 924   // Clear both lower bits. It's still inverted, so set them, and then invert back.
 925   __ orptr(tmp2, markWord::marked_value);
 926   __ notptr(tmp2);
 927   // At this point, tmp2 contains the decoded forwarding pointer.
 928   __ mov(rax, tmp2);
 929 
 930   __ pop(tmp2);
 931   __ pop(tmp1);
 932   __ ret(0);
 933 
 934   __ bind(slow_path);
 935 
 936   __ push(rcx);
 937   __ push(rdx);
 938   __ push(rdi);
 939   __ push(rsi);
 940 #ifdef _LP64
 941   __ push(r8);
 942   __ push(r9);
 943   __ push(r10);
 944   __ push(r11);
 945   __ push(r12);
 946   __ push(r13);
 947   __ push(r14);
 948   __ push(r15);
 949 #endif
 950   __ push(rbp);
 951   __ movptr(rbp, rsp);
 952   __ andptr(rsp, -StackAlignmentInBytes);
 953   __ push_FPU_state();
 954   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier), rax);
 955   __ pop_FPU_state();
 956   __ movptr(rsp, rbp);
 957   __ pop(rbp);
 958 #ifdef _LP64
 959   __ pop(r15);
 960   __ pop(r14);
 961   __ pop(r13);
 962   __ pop(r12);
 963   __ pop(r11);
 964   __ pop(r10);
 965   __ pop(r9);
 966   __ pop(r8);
 967 #endif
 968   __ pop(rsi);
 969   __ pop(rdi);
 970   __ pop(rdx);
 971   __ pop(rcx);
 972 
 973   __ pop(tmp2);
 974   __ pop(tmp1);
 975   __ ret(0);
 976 
 977   return start;
 978 }
 979 
 980 #undef __
 981 
 982 void ShenandoahBarrierSetAssembler::barrier_stubs_init() {
 983   if (ShenandoahLoadRefBarrier) {
 984     int stub_code_size = 4096;
 985     ResourceMark rm;
 986     BufferBlob* bb = BufferBlob::create("shenandoah_barrier_stubs", stub_code_size);
 987     CodeBuffer buf(bb);
 988     StubCodeGenerator cgen(&buf);
 989     _shenandoah_lrb = generate_shenandoah_lrb(&cgen);
 990   }
 991 }