1 /*
   2  * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved.
   3  *
   4  * This code is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License version 2 only, as
   6  * published by the Free Software Foundation.
   7  *
   8  * This code is distributed in the hope that it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11  * version 2 for more details (a copy is included in the LICENSE file that
  12  * accompanied this code).
  13  *
  14  * You should have received a copy of the GNU General Public License version
  15  * 2 along with this work; if not, write to the Free Software Foundation,
  16  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  19  * or visit www.oracle.com if you need additional information or have any
  20  * questions.
  21  *
  22  */
  23 
  24 #include "precompiled.hpp"
  25 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
  26 #include "gc/shenandoah/shenandoahForwarding.hpp"
  27 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
  28 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
  29 #include "gc/shenandoah/shenandoahHeuristics.hpp"
  30 #include "gc/shenandoah/shenandoahRuntime.hpp"
  31 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
  32 #include "interpreter/interpreter.hpp"
  33 #include "interpreter/interp_masm.hpp"
  34 #include "runtime/sharedRuntime.hpp"
  35 #include "runtime/thread.hpp"
  36 #include "utilities/macros.hpp"
  37 #ifdef COMPILER1
  38 #include "c1/c1_LIRAssembler.hpp"
  39 #include "c1/c1_MacroAssembler.hpp"
  40 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
  41 #endif
  42 
  43 #define __ masm->
  44 
  45 address ShenandoahBarrierSetAssembler::_shenandoah_lrb = NULL;
  46 
  47 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  48                                                        Register src, Register dst, Register count) {
  49 
  50   bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
  51   bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
  52   bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
  53   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
  54 
  55   if (type == T_OBJECT || type == T_ARRAY) {
  56 #ifdef _LP64
  57     if (!checkcast) {
  58       if (!obj_int) {
  59         // Save count for barrier
  60         __ movptr(r11, count);
  61       } else if (disjoint) {
  62         // Save dst in r11 in the disjoint case
  63         __ movq(r11, dst);
  64       }
  65     }
  66 #else
  67     if (disjoint) {
  68       __ mov(rdx, dst);          // save 'to'
  69     }
  70 #endif
  71 
  72     if (ShenandoahSATBBarrier && !dest_uninitialized) {
  73       Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
  74       assert_different_registers(dst, count, thread); // we don't care about src here?
  75 #ifndef _LP64
  76       __ push(thread);
  77       __ get_thread(thread);
  78 #endif
  79 
  80       Label done;
  81       // Short-circuit if count == 0.
  82       __ testptr(count, count);
  83       __ jcc(Assembler::zero, done);
  84 
  85       // Avoid runtime call when not marking.
  86       Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
  87       __ testb(gc_state, ShenandoahHeap::MARKING);
  88       __ jcc(Assembler::zero, done);
  89 
  90       __ pusha();                      // push registers
  91 #ifdef _LP64
  92       if (count == c_rarg0) {
  93         if (dst == c_rarg1) {
  94           // exactly backwards!!
  95           __ xchgptr(c_rarg1, c_rarg0);
  96         } else {
  97           __ movptr(c_rarg1, count);
  98           __ movptr(c_rarg0, dst);
  99         }
 100       } else {
 101         __ movptr(c_rarg0, dst);
 102         __ movptr(c_rarg1, count);
 103       }
 104       if (UseCompressedOops) {
 105         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 106       } else {
 107         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry), 2);
 108       }
 109 #else
 110       __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry),
 111                       dst, count);
 112 #endif
 113       __ popa();
 114       __ bind(done);
 115       NOT_LP64(__ pop(thread);)
 116     }
 117   }
 118 
 119 }
 120 
 121 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 122                                                        Register src, Register dst, Register count) {
 123   bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
 124   bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
 125   bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
 126   Register tmp = rax;
 127 
 128   if (type == T_OBJECT || type == T_ARRAY) {
 129 #ifdef _LP64
 130     if (!checkcast) {
 131       if (!obj_int) {
 132         // Save count for barrier
 133         count = r11;
 134       } else if (disjoint && obj_int) {
 135         // Use the saved dst in the disjoint case
 136         dst = r11;
 137       }
 138     } else {
 139       tmp = rscratch1;
 140     }
 141 #else
 142     if (disjoint) {
 143       __ mov(dst, rdx); // restore 'to'
 144     }
 145 #endif
 146 
 147     Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
 148     assert_different_registers(dst, thread); // do we care about src at all here?
 149 
 150 #ifndef _LP64
 151     __ push(thread);
 152     __ get_thread(thread);
 153 #endif
 154 
 155     // Short-circuit if count == 0.
 156     Label done;
 157     __ testptr(count, count);
 158     __ jcc(Assembler::zero, done);
 159 
 160     // Skip runtime call if no forwarded objects.
 161     Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 162     __ testb(gc_state, ShenandoahHeap::UPDATEREFS);
 163     __ jcc(Assembler::zero, done);
 164 
 165     __ pusha();             // push registers (overkill)
 166 #ifdef _LP64
 167     if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
 168       assert_different_registers(c_rarg1, dst);
 169       __ mov(c_rarg1, count);
 170       __ mov(c_rarg0, dst);
 171     } else {
 172       assert_different_registers(c_rarg0, count);
 173       __ mov(c_rarg0, dst);
 174       __ mov(c_rarg1, count);
 175     }
 176     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_post_entry), 2);
 177 #else
 178     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_post_entry),
 179                     dst, count);
 180 #endif
 181     __ popa();
 182 
 183     __ bind(done);
 184     NOT_LP64(__ pop(thread);)
 185   }
 186 }
 187 
 188 void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,
 189                                                                  Register obj,
 190                                                                  Register pre_val,
 191                                                                  Register thread,
 192                                                                  Register tmp,
 193                                                                  bool tosca_live,
 194                                                                  bool expand_call) {
 195 
 196   if (ShenandoahSATBBarrier) {
 197     satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call);
 198   }
 199 }
 200 
 201 void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
 202                                                            Register obj,
 203                                                            Register pre_val,
 204                                                            Register thread,
 205                                                            Register tmp,
 206                                                            bool tosca_live,
 207                                                            bool expand_call) {
 208   // If expand_call is true then we expand the call_VM_leaf macro
 209   // directly to skip generating the check by
 210   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
 211 
 212 #ifdef _LP64
 213   assert(thread == r15_thread, "must be");
 214 #endif // _LP64
 215 
 216   Label done;
 217   Label runtime;
 218 
 219   assert(pre_val != noreg, "check this code");
 220 
 221   if (obj != noreg) {
 222     assert_different_registers(obj, pre_val, tmp);
 223     assert(pre_val != rax, "check this code");
 224   }
 225 
 226   Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
 227   Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 228   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 229 
 230   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 231   __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
 232   __ jcc(Assembler::zero, done);
 233 
 234   // Do we need to load the previous value?
 235   if (obj != noreg) {
 236     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
 237   }
 238 
 239   // Is the previous value null?
 240   __ cmpptr(pre_val, (int32_t) NULL_WORD);
 241   __ jcc(Assembler::equal, done);
 242 
 243   // Can we store original value in the thread's buffer?
 244   // Is index == 0?
 245   // (The index field is typed as size_t.)
 246 
 247   __ movptr(tmp, index);                   // tmp := *index_adr
 248   __ cmpptr(tmp, 0);                       // tmp == 0?
 249   __ jcc(Assembler::equal, runtime);       // If yes, goto runtime
 250 
 251   __ subptr(tmp, wordSize);                // tmp := tmp - wordSize
 252   __ movptr(index, tmp);                   // *index_adr := tmp
 253   __ addptr(tmp, buffer);                  // tmp := tmp + *buffer_adr
 254 
 255   // Record the previous value
 256   __ movptr(Address(tmp, 0), pre_val);
 257   __ jmp(done);
 258 
 259   __ bind(runtime);
 260   // save the live input values
 261   if(tosca_live) __ push(rax);
 262 
 263   if (obj != noreg && obj != rax)
 264     __ push(obj);
 265 
 266   if (pre_val != rax)
 267     __ push(pre_val);
 268 
 269   // Calling the runtime using the regular call_VM_leaf mechanism generates
 270   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
 271   // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL.
 272   //
 273   // If we care generating the pre-barrier without a frame (e.g. in the
 274   // intrinsified Reference.get() routine) then ebp might be pointing to
 275   // the caller frame and so this check will most likely fail at runtime.
 276   //
 277   // Expanding the call directly bypasses the generation of the check.
 278   // So when we do not have have a full interpreter frame on the stack
 279   // expand_call should be passed true.
 280 
 281   NOT_LP64( __ push(thread); )
 282 
 283 #ifdef _LP64
 284   // We move pre_val into c_rarg0 early, in order to avoid smashing it, should
 285   // pre_val be c_rarg1 (where the call prologue would copy thread argument).
 286   // Note: this should not accidentally smash thread, because thread is always r15.
 287   assert(thread != c_rarg0, "smashed arg");
 288   if (c_rarg0 != pre_val) {
 289     __ mov(c_rarg0, pre_val);
 290   }
 291 #endif
 292 
 293   if (expand_call) {
 294     LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
 295 #ifdef _LP64
 296     if (c_rarg1 != thread) {
 297       __ mov(c_rarg1, thread);
 298     }
 299     // Already moved pre_val into c_rarg0 above
 300 #else
 301     __ push(thread);
 302     __ push(pre_val);
 303 #endif
 304     __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), 2);
 305   } else {
 306     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), LP64_ONLY(c_rarg0) NOT_LP64(pre_val), thread);
 307   }
 308 
 309   NOT_LP64( __ pop(thread); )
 310 
 311   // save the live input values
 312   if (pre_val != rax)
 313     __ pop(pre_val);
 314 
 315   if (obj != noreg && obj != rax)
 316     __ pop(obj);
 317 
 318   if(tosca_live) __ pop(rax);
 319 
 320   __ bind(done);
 321 }
 322 
 323 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) {
 324   assert(ShenandoahCASBarrier, "should be enabled");
 325   Label is_null;
 326   __ testptr(dst, dst);
 327   __ jcc(Assembler::zero, is_null);
 328   resolve_forward_pointer_not_null(masm, dst, tmp);
 329   __ bind(is_null);
 330 }
 331 
 332 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) {
 333   assert(ShenandoahCASBarrier || ShenandoahLoadRefBarrier, "should be enabled");
 334   // The below loads the mark word, checks if the lowest two bits are
 335   // set, and if so, clear the lowest two bits and copy the result
 336   // to dst. Otherwise it leaves dst alone.
 337   // Implementing this is surprisingly awkward. I do it here by:
 338   // - Inverting the mark word
 339   // - Test lowest two bits == 0
 340   // - If so, set the lowest two bits
 341   // - Invert the result back, and copy to dst
 342 
 343   bool borrow_reg = (tmp == noreg);
 344   if (borrow_reg) {
 345     // No free registers available. Make one useful.
 346     tmp = LP64_ONLY(rscratch1) NOT_LP64(rdx);
 347     __ push(tmp);
 348   }
 349 
 350   Label done;
 351   __ movptr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
 352   __ notptr(tmp);
 353   __ testb(tmp, markOopDesc::marked_value);
 354   __ jccb(Assembler::notZero, done);
 355   __ orptr(tmp, markOopDesc::marked_value);
 356   __ notptr(tmp);
 357   __ mov(dst, tmp);
 358   __ bind(done);
 359 
 360   if (borrow_reg) {
 361     __ pop(tmp);
 362   }
 363 }
 364 
 365 
 366 void ShenandoahBarrierSetAssembler::load_reference_barrier_not_null(MacroAssembler* masm, Register dst) {
 367   assert(ShenandoahLoadRefBarrier, "Should be enabled");
 368 
 369   Label done;
 370 
 371 #ifdef _LP64
 372   Register thread = r15_thread;
 373 #else
 374   Register thread = rcx;
 375   if (thread == dst) {
 376     thread = rbx;
 377   }
 378   __ push(thread);
 379   __ get_thread(thread);
 380 #endif
 381   assert_different_registers(dst, thread);
 382 
 383   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 384   __ testb(gc_state, ShenandoahHeap::HAS_FORWARDED);
 385   __ jccb(Assembler::zero, done);
 386 
 387    if (dst != rax) {
 388      __ xchgptr(dst, rax); // Move obj into rax and save rax into obj.
 389    }
 390 
 391    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahBarrierSetAssembler::shenandoah_lrb())));
 392 
 393    if (dst != rax) {
 394      __ xchgptr(rax, dst); // Swap back obj with rax.
 395    }
 396 
 397   __ bind(done);
 398 
 399 #ifndef _LP64
 400   __ pop(thread);
 401 #endif
 402 }
 403 
 404 // ((WeakHandle)result).peek();
 405 void ShenandoahBarrierSetAssembler::peek_weak_handle(MacroAssembler* masm, Register rresult, Register rtmp) {
 406   assert_different_registers(rresult, rtmp);
 407   Label resolved;
 408 
 409   // A null weak handle resolves to null.
 410   __ cmpptr(rresult, 0);
 411   __ jcc(Assembler::equal, resolved);
 412 
 413   // Only 64 bit platforms support GCs that require a tmp register
 414   // Only IN_HEAP loads require a thread_tmp register
 415   // WeakHandle::peek is an indirection like jweak.
 416   __ access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF | AS_NO_KEEPALIVE,
 417                  rresult, Address(rresult, 0), rtmp, /*tmp_thread*/noreg);
 418   __ bind(resolved);
 419 }
 420 
 421 void ShenandoahBarrierSetAssembler::c2i_entry_barrier(MacroAssembler* masm) {
 422   BarrierSetNMethod* bs = BarrierSet::barrier_set()->barrier_set_nmethod();
 423   if (bs == NULL) {
 424     return;
 425   }
 426 
 427   Label bad_call;
 428   __ cmpptr(rbx, 0); // rbx contains the incoming method for c2i adapters.
 429   __ jcc(Assembler::equal, bad_call);
 430 
 431   // Pointer chase to the method holder to find out if the method is concurrently unloading.
 432   Label method_live;
 433   __ load_method_holder_cld(rscratch1, rbx);
 434 
 435   // Is it a strong CLD?
 436   __ movl(rscratch2, Address(rscratch1, ClassLoaderData::keep_alive_offset()));
 437   __ cmpptr(rscratch2, 0);
 438   __ jcc(Assembler::greater, method_live);
 439 
 440   // Is it a weak but alive CLD?
 441   __ movptr(rscratch1, Address(rscratch1, ClassLoaderData::holder_offset()));
 442   peek_weak_handle(masm, rscratch1, rscratch2);
 443   __ cmpptr(rscratch1, 0);
 444   __ jcc(Assembler::notEqual, method_live);
 445 
 446   __ bind(bad_call);
 447   __ jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
 448   __ bind(method_live);
 449 }
 450 
 451 void ShenandoahBarrierSetAssembler::load_reference_barrier_native(MacroAssembler* masm, Register dst) {
 452   if (!ShenandoahLoadRefBarrier) {
 453     return;
 454   }
 455 
 456   Label done;
 457   Label not_null;
 458   Label slow_path;
 459 
 460   // null check
 461   __ testptr(dst, dst);
 462   __ jcc(Assembler::notZero, not_null);
 463   __ jmp(done);
 464   __ bind(not_null);
 465 
 466 
 467 #ifdef _LP64
 468   Register thread = r15_thread;
 469 #else
 470   Register thread = rcx;
 471   if (thread == dst) {
 472     thread = rbx;
 473   }
 474   __ push(thread);
 475   __ get_thread(thread);
 476 #endif
 477   assert_different_registers(dst, thread);
 478 
 479   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 480   __ testb(gc_state, ShenandoahHeap::EVACUATION);
 481 #ifndef _LP64
 482   __ pop(thread);
 483 #endif
 484   __ jccb(Assembler::notZero, slow_path);
 485   __ jmp(done);
 486   __ bind(slow_path);
 487 
 488   if (dst != rax) {
 489     __ xchgptr(dst, rax); // Move obj into rax and save rax into obj.
 490   }
 491   __ push(rcx);
 492   __ push(rdx);
 493   __ push(rdi);
 494   __ push(rsi);
 495 #ifdef _LP64
 496   __ push(r8);
 497   __ push(r9);
 498   __ push(r10);
 499   __ push(r11);
 500   __ push(r12);
 501   __ push(r13);
 502   __ push(r14);
 503   __ push(r15);
 504 #endif
 505 
 506   __ movptr(rdi, rax);
 507   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_native), rdi);
 508 
 509 #ifdef _LP64
 510   __ pop(r15);
 511   __ pop(r14);
 512   __ pop(r13);
 513   __ pop(r12);
 514   __ pop(r11);
 515   __ pop(r10);
 516   __ pop(r9);
 517   __ pop(r8);
 518 #endif
 519   __ pop(rsi);
 520   __ pop(rdi);
 521   __ pop(rdx);
 522   __ pop(rcx);
 523 
 524   if (dst != rax) {
 525     __ xchgptr(rax, dst); // Swap back obj with rax.
 526   }
 527 
 528   __ bind(done);
 529 }
 530 
 531 void ShenandoahBarrierSetAssembler::storeval_barrier(MacroAssembler* masm, Register dst, Register tmp) {
 532   if (ShenandoahStoreValEnqueueBarrier) {
 533     storeval_barrier_impl(masm, dst, tmp);
 534   }
 535 }
 536 
 537 void ShenandoahBarrierSetAssembler::storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp) {
 538   assert(ShenandoahStoreValEnqueueBarrier, "should be enabled");
 539 
 540   if (dst == noreg) return;
 541 
 542   if (ShenandoahStoreValEnqueueBarrier) {
 543     // The set of registers to be saved+restored is the same as in the write-barrier above.
 544     // Those are the commonly used registers in the interpreter.
 545     __ pusha();
 546     // __ push_callee_saved_registers();
 547     __ subptr(rsp, 2 * Interpreter::stackElementSize);
 548     __ movdbl(Address(rsp, 0), xmm0);
 549 
 550 #ifdef _LP64
 551     Register thread = r15_thread;
 552 #else
 553     Register thread = rcx;
 554     if (thread == dst || thread == tmp) {
 555       thread = rdi;
 556     }
 557     if (thread == dst || thread == tmp) {
 558       thread = rbx;
 559     }
 560     __ get_thread(thread);
 561 #endif
 562     assert_different_registers(dst, tmp, thread);
 563 
 564     satb_write_barrier_pre(masm, noreg, dst, thread, tmp, true, false);
 565     __ movdbl(xmm0, Address(rsp, 0));
 566     __ addptr(rsp, 2 * Interpreter::stackElementSize);
 567     //__ pop_callee_saved_registers();
 568     __ popa();
 569   }
 570 }
 571 
 572 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst) {
 573   if (ShenandoahLoadRefBarrier) {
 574     Label done;
 575     __ testptr(dst, dst);
 576     __ jcc(Assembler::zero, done);
 577     load_reference_barrier_not_null(masm, dst);
 578     __ bind(done);
 579   }
 580 }
 581 
 582 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 583              Register dst, Address src, Register tmp1, Register tmp_thread) {
 584   bool on_oop = type == T_OBJECT || type == T_ARRAY;
 585   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
 586   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
 587   bool not_in_heap = (decorators & IN_NATIVE) != 0;
 588   bool on_reference = on_weak || on_phantom;
 589   bool keep_alive = (decorators & AS_NO_KEEPALIVE) == 0;
 590 
 591   BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 592   if (on_oop) {
 593     if (not_in_heap) {
 594       if (ShenandoahHeap::heap()->is_traversal_mode()) {
 595         load_reference_barrier(masm, dst);
 596         keep_alive = true;
 597       } else {
 598         load_reference_barrier_native(masm, dst);
 599       }
 600     } else {
 601       load_reference_barrier(masm, dst);
 602     }
 603 
 604     if (ShenandoahKeepAliveBarrier && on_reference && keep_alive) {
 605       const Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
 606       assert_different_registers(dst, tmp1, tmp_thread);
 607       NOT_LP64(__ get_thread(thread));
 608       // Generate the SATB pre-barrier code to log the value of
 609       // the referent field in an SATB buffer.
 610       shenandoah_write_barrier_pre(masm /* masm */,
 611                                    noreg /* obj */,
 612                                    dst /* pre_val */,
 613                                    thread /* thread */,
 614                                    tmp1 /* tmp */,
 615                                    true /* tosca_live */,
 616                                    true /* expand_call */);
 617     }
 618   }
 619 }
 620 
 621 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 622               Address dst, Register val, Register tmp1, Register tmp2) {
 623 
 624   bool on_oop = type == T_OBJECT || type == T_ARRAY;
 625   bool in_heap = (decorators & IN_HEAP) != 0;
 626   bool as_normal = (decorators & AS_NORMAL) != 0;
 627   if (on_oop && in_heap) {
 628     bool needs_pre_barrier = as_normal;
 629 
 630     Register tmp3 = LP64_ONLY(r8) NOT_LP64(rsi);
 631     Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 632     // flatten object address if needed
 633     // We do it regardless of precise because we need the registers
 634     if (dst.index() == noreg && dst.disp() == 0) {
 635       if (dst.base() != tmp1) {
 636         __ movptr(tmp1, dst.base());
 637       }
 638     } else {
 639       __ lea(tmp1, dst);
 640     }
 641 
 642     assert_different_registers(val, tmp1, tmp2, tmp3, rthread);
 643 
 644 #ifndef _LP64
 645     __ get_thread(rthread);
 646     InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
 647     imasm->save_bcp();
 648 #endif
 649 
 650     if (needs_pre_barrier) {
 651       shenandoah_write_barrier_pre(masm /*masm*/,
 652                                    tmp1 /* obj */,
 653                                    tmp2 /* pre_val */,
 654                                    rthread /* thread */,
 655                                    tmp3  /* tmp */,
 656                                    val != noreg /* tosca_live */,
 657                                    false /* expand_call */);
 658     }
 659     if (val == noreg) {
 660       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg);
 661     } else {
 662       storeval_barrier(masm, val, tmp3);
 663       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg);
 664     }
 665     NOT_LP64(imasm->restore_bcp());
 666   } else {
 667     BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);
 668   }
 669 }
 670 
 671 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 672                                                                   Register obj, Register tmp, Label& slowpath) {
 673   Label done;
 674   // Resolve jobject
 675   BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
 676 
 677   // Check for null.
 678   __ testptr(obj, obj);
 679   __ jcc(Assembler::zero, done);
 680 
 681   Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
 682   __ testb(gc_state, ShenandoahHeap::EVACUATION);
 683   __ jccb(Assembler::notZero, slowpath);
 684   __ bind(done);
 685 }
 686 
 687 // Special Shenandoah CAS implementation that handles false negatives
 688 // due to concurrent evacuation.
 689 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
 690                                                 Register res, Address addr, Register oldval, Register newval,
 691                                                 bool exchange, Register tmp1, Register tmp2) {
 692   assert(ShenandoahCASBarrier, "Should only be used when CAS barrier is enabled");
 693   assert(oldval == rax, "must be in rax for implicit use in cmpxchg");
 694 
 695   Label retry, done;
 696 
 697   // Remember oldval for retry logic below
 698 #ifdef _LP64
 699   if (UseCompressedOops) {
 700     __ movl(tmp1, oldval);
 701   } else
 702 #endif
 703   {
 704     __ movptr(tmp1, oldval);
 705   }
 706 
 707   // Step 1. Try to CAS with given arguments. If successful, then we are done,
 708   // and can safely return.
 709   if (os::is_MP()) __ lock();
 710 #ifdef _LP64
 711   if (UseCompressedOops) {
 712     __ cmpxchgl(newval, addr);
 713   } else
 714 #endif
 715   {
 716     __ cmpxchgptr(newval, addr);
 717   }
 718   __ jcc(Assembler::equal, done, true);
 719 
 720   // Step 2. CAS had failed. This may be a false negative.
 721   //
 722   // The trouble comes when we compare the to-space pointer with the from-space
 723   // pointer to the same object. To resolve this, it will suffice to resolve both
 724   // oldval and the value from memory -- this will give both to-space pointers.
 725   // If they mismatch, then it was a legitimate failure.
 726   //
 727 #ifdef _LP64
 728   if (UseCompressedOops) {
 729     __ decode_heap_oop(tmp1);
 730   }
 731 #endif
 732   resolve_forward_pointer(masm, tmp1);
 733 
 734 #ifdef _LP64
 735   if (UseCompressedOops) {
 736     __ movl(tmp2, oldval);
 737     __ decode_heap_oop(tmp2);
 738   } else
 739 #endif
 740   {
 741     __ movptr(tmp2, oldval);
 742   }
 743   resolve_forward_pointer(masm, tmp2);
 744 
 745   __ cmpptr(tmp1, tmp2);
 746   __ jcc(Assembler::notEqual, done, true);
 747 
 748   // Step 3. Try to CAS again with resolved to-space pointers.
 749   //
 750   // Corner case: it may happen that somebody stored the from-space pointer
 751   // to memory while we were preparing for retry. Therefore, we can fail again
 752   // on retry, and so need to do this in loop, always resolving the failure
 753   // witness.
 754   __ bind(retry);
 755   if (os::is_MP()) __ lock();
 756 #ifdef _LP64
 757   if (UseCompressedOops) {
 758     __ cmpxchgl(newval, addr);
 759   } else
 760 #endif
 761   {
 762     __ cmpxchgptr(newval, addr);
 763   }
 764   __ jcc(Assembler::equal, done, true);
 765 
 766 #ifdef _LP64
 767   if (UseCompressedOops) {
 768     __ movl(tmp2, oldval);
 769     __ decode_heap_oop(tmp2);
 770   } else
 771 #endif
 772   {
 773     __ movptr(tmp2, oldval);
 774   }
 775   resolve_forward_pointer(masm, tmp2);
 776 
 777   __ cmpptr(tmp1, tmp2);
 778   __ jcc(Assembler::equal, retry, true);
 779 
 780   // Step 4. If we need a boolean result out of CAS, check the flag again,
 781   // and promote the result. Note that we handle the flag from both the CAS
 782   // itself and from the retry loop.
 783   __ bind(done);
 784   if (!exchange) {
 785     assert(res != NULL, "need result register");
 786 #ifdef _LP64
 787     __ setb(Assembler::equal, res);
 788     __ movzbl(res, res);
 789 #else
 790     // Need something else to clean the result, because some registers
 791     // do not have byte encoding that movzbl wants. Cannot do the xor first,
 792     // because it modifies the flags.
 793     Label res_non_zero;
 794     __ movptr(res, 1);
 795     __ jcc(Assembler::equal, res_non_zero, true);
 796     __ xorptr(res, res);
 797     __ bind(res_non_zero);
 798 #endif
 799   }
 800 }
 801 
 802 #undef __
 803 
 804 #ifdef COMPILER1
 805 
 806 #define __ ce->masm()->
 807 
 808 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
 809   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 810   // At this point we know that marking is in progress.
 811   // If do_load() is true then we have to emit the
 812   // load of the previous value; otherwise it has already
 813   // been loaded into _pre_val.
 814 
 815   __ bind(*stub->entry());
 816   assert(stub->pre_val()->is_register(), "Precondition.");
 817 
 818   Register pre_val_reg = stub->pre_val()->as_register();
 819 
 820   if (stub->do_load()) {
 821     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
 822   }
 823 
 824   __ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
 825   __ jcc(Assembler::equal, *stub->continuation());
 826   ce->store_parameter(stub->pre_val()->as_register(), 0);
 827   __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
 828   __ jmp(*stub->continuation());
 829 
 830 }
 831 
 832 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
 833   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 834   __ bind(*stub->entry());
 835 
 836   Register obj = stub->obj()->as_register();
 837   Register res = stub->result()->as_register();
 838   Register addr = stub->addr()->as_register();
 839   Register tmp1 = stub->tmp1()->as_register();
 840   Register tmp2 = stub->tmp2()->as_register();
 841   assert_different_registers(obj, res, addr, tmp1, tmp2);
 842 
 843   Label slow_path;
 844 
 845   assert(res == rax, "result must arrive in rax");
 846 
 847   if (res != obj) {
 848     __ mov(res, obj);
 849   }
 850 
 851   // Check for null.
 852   __ testptr(res, res);
 853   __ jcc(Assembler::zero, *stub->continuation());
 854 
 855   // Check for object being in the collection set.
 856   __ mov(tmp1, res);
 857   __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 858   __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
 859 #ifdef _LP64
 860   __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
 861   __ testbool(tmp2);
 862 #else
 863   // On x86_32, C1 register allocator can give us the register without 8-bit support.
 864   // Do the full-register access and test to avoid compilation failures.
 865   __ movptr(tmp2, Address(tmp2, tmp1, Address::times_1));
 866   __ testptr(tmp2, 0xFF);
 867 #endif
 868   __ jcc(Assembler::zero, *stub->continuation());
 869 
 870   __ bind(slow_path);
 871   ce->store_parameter(res, 0);
 872   ce->store_parameter(addr, 1);
 873   __ call(RuntimeAddress(bs->load_reference_barrier_rt_code_blob()->code_begin()));
 874 
 875   __ jmp(*stub->continuation());
 876 }
 877 
 878 #undef __
 879 
 880 #define __ sasm->
 881 
 882 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
 883   __ prologue("shenandoah_pre_barrier", false);
 884   // arg0 : previous value of memory
 885 
 886   __ push(rax);
 887   __ push(rdx);
 888 
 889   const Register pre_val = rax;
 890   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
 891   const Register tmp = rdx;
 892 
 893   NOT_LP64(__ get_thread(thread);)
 894 
 895   Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 896   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 897 
 898   Label done;
 899   Label runtime;
 900 
 901   // Is SATB still active?
 902   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 903   __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
 904   __ jcc(Assembler::zero, done);
 905 
 906   // Can we store original value in the thread's buffer?
 907 
 908   __ movptr(tmp, queue_index);
 909   __ testptr(tmp, tmp);
 910   __ jcc(Assembler::zero, runtime);
 911   __ subptr(tmp, wordSize);
 912   __ movptr(queue_index, tmp);
 913   __ addptr(tmp, buffer);
 914 
 915   // prev_val (rax)
 916   __ load_parameter(0, pre_val);
 917   __ movptr(Address(tmp, 0), pre_val);
 918   __ jmp(done);
 919 
 920   __ bind(runtime);
 921 
 922   __ save_live_registers_no_oop_map(true);
 923 
 924   // load the pre-value
 925   __ load_parameter(0, rcx);
 926   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), rcx, thread);
 927 
 928   __ restore_live_registers(true);
 929 
 930   __ bind(done);
 931 
 932   __ pop(rdx);
 933   __ pop(rax);
 934 
 935   __ epilogue();
 936 }
 937 
 938 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm) {
 939   __ prologue("shenandoah_load_reference_barrier", false);
 940   // arg0 : object to be resolved
 941 
 942   __ save_live_registers_no_oop_map(true);
 943 
 944 #ifdef _LP64
 945   __ load_parameter(0, c_rarg0);
 946   __ load_parameter(1, c_rarg1);
 947   if (UseCompressedOops) {
 948     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_fixup_narrow), c_rarg0, c_rarg1);
 949   } else {
 950     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_fixup), c_rarg0, c_rarg1);
 951   }
 952 #else
 953   __ load_parameter(0, rax);
 954   __ load_parameter(1, rbx);
 955   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_fixup), rax, rbx);
 956 #endif
 957 
 958   __ restore_live_registers_except_rax(true);
 959 
 960   __ epilogue();
 961 }
 962 
 963 #undef __
 964 
 965 #endif // COMPILER1
 966 
 967 address ShenandoahBarrierSetAssembler::shenandoah_lrb() {
 968   assert(_shenandoah_lrb != NULL, "need load reference barrier stub");
 969   return _shenandoah_lrb;
 970 }
 971 
 972 #define __ cgen->assembler()->
 973 
 974 address ShenandoahBarrierSetAssembler::generate_shenandoah_lrb(StubCodeGenerator* cgen) {
 975   __ align(CodeEntryAlignment);
 976   StubCodeMark mark(cgen, "StubRoutines", "shenandoah_lrb");
 977   address start = __ pc();
 978 
 979   Label resolve_oop, slow_path, done;
 980 
 981   // We use RDI, which also serves as argument register for slow call.
 982   // RAX always holds the src object ptr, except after the slow call,
 983   // then it holds the result. R8/RBX is used as temporary register.
 984 
 985   Register tmp1 = rdi;
 986   Register tmp2 = LP64_ONLY(r8) NOT_LP64(rbx);
 987 
 988   __ push(tmp1);
 989   __ push(tmp2);
 990 
 991   // Check for object being in the collection set.
 992   __ mov(tmp1, rax);
 993   __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 994   __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
 995   __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
 996   __ testbool(tmp2);
 997   __ jccb(Assembler::notZero, resolve_oop);
 998   __ pop(tmp2);
 999   __ pop(tmp1);
1000   __ ret(0);
1001 
1002   // Test if object is already resolved.
1003   __ bind(resolve_oop);
1004   __ movptr(tmp2, Address(rax, oopDesc::mark_offset_in_bytes()));
1005   // Test if both lowest bits are set. We trick it by negating the bits
1006   // then test for both bits clear.
1007   __ notptr(tmp2);
1008   __ testb(tmp2, markOopDesc::marked_value);
1009   __ jccb(Assembler::notZero, slow_path);
1010   // Clear both lower bits. It's still inverted, so set them, and then invert back.
1011   __ orptr(tmp2, markOopDesc::marked_value);
1012   __ notptr(tmp2);
1013   // At this point, tmp2 contains the decoded forwarding pointer.
1014   __ mov(rax, tmp2);
1015 
1016   __ bind(done);
1017   __ pop(tmp2);
1018   __ pop(tmp1);
1019   __ ret(0);
1020 
1021   __ bind(slow_path);
1022 
1023   __ push(rcx);
1024   __ push(rdx);
1025   __ push(rdi);
1026   __ push(rsi);
1027 #ifdef _LP64
1028   __ push(r8);
1029   __ push(r9);
1030   __ push(r10);
1031   __ push(r11);
1032   __ push(r12);
1033   __ push(r13);
1034   __ push(r14);
1035   __ push(r15);
1036 #endif
1037 
1038   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier), rax);
1039 
1040 #ifdef _LP64
1041   __ pop(r15);
1042   __ pop(r14);
1043   __ pop(r13);
1044   __ pop(r12);
1045   __ pop(r11);
1046   __ pop(r10);
1047   __ pop(r9);
1048   __ pop(r8);
1049 #endif
1050   __ pop(rsi);
1051   __ pop(rdi);
1052   __ pop(rdx);
1053   __ pop(rcx);
1054 
1055   __ pop(tmp2);
1056   __ pop(tmp1);
1057   __ ret(0);
1058 
1059   return start;
1060 }
1061 
1062 #undef __
1063 
1064 void ShenandoahBarrierSetAssembler::barrier_stubs_init() {
1065   if (ShenandoahLoadRefBarrier) {
1066     int stub_code_size = 4096;
1067     ResourceMark rm;
1068     BufferBlob* bb = BufferBlob::create("shenandoah_barrier_stubs", stub_code_size);
1069     CodeBuffer buf(bb);
1070     StubCodeGenerator cgen(&buf);
1071     _shenandoah_lrb = generate_shenandoah_lrb(&cgen);
1072   }
1073 }