1 /*
   2  * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "asm/macroAssembler.inline.hpp"
  28 #include "code/debugInfoRec.hpp"
  29 #include "code/icBuffer.hpp"
  30 #include "code/nativeInst.hpp"
  31 #include "code/vtableStubs.hpp"
  32 #include "gc/shared/barrierSet.hpp"
  33 #include "gc/shared/barrierSetAssembler.hpp"
  34 #include "gc/shared/gcLocker.hpp"
  35 #include "interpreter/interpreter.hpp"
  36 #include "logging/log.hpp"
  37 #include "memory/resourceArea.hpp"
  38 #include "oops/compiledICHolder.hpp"
  39 #include "oops/klass.inline.hpp"
  40 #include "runtime/safepointMechanism.hpp"
  41 #include "runtime/sharedRuntime.hpp"
  42 #include "runtime/vframeArray.hpp"
  43 #include "utilities/align.hpp"
  44 #include "vmreg_x86.inline.hpp"
  45 #ifdef COMPILER1
  46 #include "c1/c1_Runtime1.hpp"
  47 #endif
  48 #ifdef COMPILER2
  49 #include "opto/runtime.hpp"
  50 #endif
  51 #include "vm_version_x86.hpp"
  52 
  53 #define __ masm->
  54 
  55 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  56 
  57 class RegisterSaver {
  58   // Capture info about frame layout
  59 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
  60   enum layout {
  61                 fpu_state_off = 0,
  62                 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
  63                 st0_off, st0H_off,
  64                 st1_off, st1H_off,
  65                 st2_off, st2H_off,
  66                 st3_off, st3H_off,
  67                 st4_off, st4H_off,
  68                 st5_off, st5H_off,
  69                 st6_off, st6H_off,
  70                 st7_off, st7H_off,
  71                 xmm_off,
  72                 DEF_XMM_OFFS(0),
  73                 DEF_XMM_OFFS(1),
  74                 DEF_XMM_OFFS(2),
  75                 DEF_XMM_OFFS(3),
  76                 DEF_XMM_OFFS(4),
  77                 DEF_XMM_OFFS(5),
  78                 DEF_XMM_OFFS(6),
  79                 DEF_XMM_OFFS(7),
  80                 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
  81                 rdi_off,
  82                 rsi_off,
  83                 ignore_off,  // extra copy of rbp,
  84                 rsp_off,
  85                 rbx_off,
  86                 rdx_off,
  87                 rcx_off,
  88                 rax_off,
  89                 // The frame sender code expects that rbp will be in the "natural" place and
  90                 // will override any oopMap setting for it. We must therefore force the layout
  91                 // so that it agrees with the frame sender code.
  92                 rbp_off,
  93                 return_off,      // slot for return address
  94                 reg_save_size };
  95   enum { FPU_regs_live = flags_off - fpu_state_end };
  96 
  97   public:
  98 
  99   static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
 100                                      int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
 101   static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
 102 
 103   static int rax_offset() { return rax_off; }
 104   static int rbx_offset() { return rbx_off; }
 105 
 106   // Offsets into the register save area
 107   // Used by deoptimization when it is managing result register
 108   // values on its own
 109 
 110   static int raxOffset(void) { return rax_off; }
 111   static int rdxOffset(void) { return rdx_off; }
 112   static int rbxOffset(void) { return rbx_off; }
 113   static int xmm0Offset(void) { return xmm0_off; }
 114   // This really returns a slot in the fp save area, which one is not important
 115   static int fpResultOffset(void) { return st0_off; }
 116 
 117   // During deoptimization only the result register need to be restored
 118   // all the other values have already been extracted.
 119 
 120   static void restore_result_registers(MacroAssembler* masm);
 121 
 122 };
 123 
 124 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
 125                                            int* total_frame_words, bool verify_fpu, bool save_vectors) {
 126   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 127   int ymm_bytes = num_xmm_regs * 16;
 128   int zmm_bytes = num_xmm_regs * 32;
 129 #ifdef COMPILER2
 130   if (save_vectors) {
 131     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 132     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 133     // Save upper half of YMM registers
 134     int vect_bytes = ymm_bytes;
 135     if (UseAVX > 2) {
 136       // Save upper half of ZMM registers as well
 137       vect_bytes += zmm_bytes;
 138     }
 139     additional_frame_words += vect_bytes / wordSize;
 140   }
 141 #else
 142   assert(!save_vectors, "vectors are generated only by C2");
 143 #endif
 144   int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
 145   int frame_words = frame_size_in_bytes / wordSize;
 146   *total_frame_words = frame_words;
 147 
 148   assert(FPUStateSizeInWords == 27, "update stack layout");
 149 
 150   // save registers, fpu state, and flags
 151   // We assume caller has already has return address slot on the stack
 152   // We push epb twice in this sequence because we want the real rbp,
 153   // to be under the return like a normal enter and we want to use pusha
 154   // We push by hand instead of using push.
 155   __ enter();
 156   __ pusha();
 157   __ pushf();
 158   __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
 159   __ push_FPU_state();          // Save FPU state & init
 160 
 161   if (verify_fpu) {
 162     // Some stubs may have non standard FPU control word settings so
 163     // only check and reset the value when it required to be the
 164     // standard value.  The safepoint blob in particular can be used
 165     // in methods which are using the 24 bit control word for
 166     // optimized float math.
 167 
 168 #ifdef ASSERT
 169     // Make sure the control word has the expected value
 170     Label ok;
 171     __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
 172     __ jccb(Assembler::equal, ok);
 173     __ stop("corrupted control word detected");
 174     __ bind(ok);
 175 #endif
 176 
 177     // Reset the control word to guard against exceptions being unmasked
 178     // since fstp_d can cause FPU stack underflow exceptions.  Write it
 179     // into the on stack copy and then reload that to make sure that the
 180     // current and future values are correct.
 181     __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
 182   }
 183 
 184   __ frstor(Address(rsp, 0));
 185   if (!verify_fpu) {
 186     // Set the control word so that exceptions are masked for the
 187     // following code.
 188     __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
 189   }
 190 
 191   int off = st0_off;
 192   int delta = st1_off - off;
 193 
 194   // Save the FPU registers in de-opt-able form
 195   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 196     __ fstp_d(Address(rsp, off*wordSize));
 197     off += delta;
 198   }
 199 
 200   off = xmm0_off;
 201   delta = xmm1_off - off;
 202   if(UseSSE == 1) {
 203     // Save the XMM state
 204     for (int n = 0; n < num_xmm_regs; n++) {
 205       __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
 206       off += delta;
 207     }
 208   } else if(UseSSE >= 2) {
 209     // Save whole 128bit (16 bytes) XMM registers
 210     for (int n = 0; n < num_xmm_regs; n++) {
 211       __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
 212       off += delta;
 213     }
 214   }
 215 
 216   if (save_vectors) {
 217     __ subptr(rsp, ymm_bytes);
 218     // Save upper half of YMM registers
 219     for (int n = 0; n < num_xmm_regs; n++) {
 220       __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
 221     }
 222     if (UseAVX > 2) {
 223       __ subptr(rsp, zmm_bytes);
 224       // Save upper half of ZMM registers
 225       for (int n = 0; n < num_xmm_regs; n++) {
 226         __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
 227       }
 228     }
 229   }
 230   __ vzeroupper();
 231 
 232   // Set an oopmap for the call site.  This oopmap will map all
 233   // oop-registers and debug-info registers as callee-saved.  This
 234   // will allow deoptimization at this safepoint to find all possible
 235   // debug-info recordings, as well as let GC find all oops.
 236 
 237   OopMapSet *oop_maps = new OopMapSet();
 238   OopMap* map =  new OopMap( frame_words, 0 );
 239 
 240 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
 241 #define NEXTREG(x) (x)->as_VMReg()->next()
 242 
 243   map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
 244   map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
 245   map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
 246   map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
 247   // rbp, location is known implicitly, no oopMap
 248   map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
 249   map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
 250   // %%% This is really a waste but we'll keep things as they were for now for the upper component
 251   off = st0_off;
 252   delta = st1_off - off;
 253   for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
 254     FloatRegister freg_name = as_FloatRegister(n);
 255     map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
 256     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
 257     off += delta;
 258   }
 259   off = xmm0_off;
 260   delta = xmm1_off - off;
 261   for (int n = 0; n < num_xmm_regs; n++) {
 262     XMMRegister xmm_name = as_XMMRegister(n);
 263     map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
 264     map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
 265     off += delta;
 266   }
 267 #undef NEXTREG
 268 #undef STACK_OFFSET
 269 
 270   return map;
 271 }
 272 
 273 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 274   int num_xmm_regs = XMMRegisterImpl::number_of_registers;
 275   int ymm_bytes = num_xmm_regs * 16;
 276   int zmm_bytes = num_xmm_regs * 32;
 277   // Recover XMM & FPU state
 278   int additional_frame_bytes = 0;
 279 #ifdef COMPILER2
 280   if (restore_vectors) {
 281     assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
 282     assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
 283     // Save upper half of YMM registers
 284     additional_frame_bytes = ymm_bytes;
 285     if (UseAVX > 2) {
 286       // Save upper half of ZMM registers as well
 287       additional_frame_bytes += zmm_bytes;
 288     }
 289   }
 290 #else
 291   assert(!restore_vectors, "vectors are generated only by C2");
 292 #endif
 293 
 294   int off = xmm0_off;
 295   int delta = xmm1_off - off;
 296 
 297   __ vzeroupper();
 298 
 299   if (UseSSE == 1) {
 300     // Restore XMM registers
 301     assert(additional_frame_bytes == 0, "");
 302     for (int n = 0; n < num_xmm_regs; n++) {
 303       __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
 304       off += delta;
 305     }
 306   } else if (UseSSE >= 2) {
 307     // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
 308     // ZMM because the movdqu instruction zeros the upper part of the XMM register.
 309     for (int n = 0; n < num_xmm_regs; n++) {
 310       __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
 311       off += delta;
 312     }
 313   }
 314 
 315   if (restore_vectors) {
 316     if (UseAVX > 2) {
 317       // Restore upper half of ZMM registers.
 318       for (int n = 0; n < num_xmm_regs; n++) {
 319         __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32));
 320       }
 321       __ addptr(rsp, zmm_bytes);
 322     }
 323     // Restore upper half of YMM registers.
 324     for (int n = 0; n < num_xmm_regs; n++) {
 325       __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16));
 326     }
 327     __ addptr(rsp, ymm_bytes);
 328   }
 329 
 330   __ pop_FPU_state();
 331   __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
 332 
 333   __ popf();
 334   __ popa();
 335   // Get the rbp, described implicitly by the frame sender code (no oopMap)
 336   __ pop(rbp);
 337 }
 338 
 339 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 340 
 341   // Just restore result register. Only used by deoptimization. By
 342   // now any callee save register that needs to be restore to a c2
 343   // caller of the deoptee has been extracted into the vframeArray
 344   // and will be stuffed into the c2i adapter we create for later
 345   // restoration so only result registers need to be restored here.
 346   //
 347 
 348   __ frstor(Address(rsp, 0));      // Restore fpu state
 349 
 350   // Recover XMM & FPU state
 351   if( UseSSE == 1 ) {
 352     __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
 353   } else if( UseSSE >= 2 ) {
 354     __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
 355   }
 356   __ movptr(rax, Address(rsp, rax_off*wordSize));
 357   __ movptr(rdx, Address(rsp, rdx_off*wordSize));
 358   // Pop all of the register save are off the stack except the return address
 359   __ addptr(rsp, return_off * wordSize);
 360 }
 361 
 362 // Is vector's size (in bytes) bigger than a size saved by default?
 363 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
 364 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
 365 bool SharedRuntime::is_wide_vector(int size) {
 366   return size > 16;
 367 }
 368 
 369 size_t SharedRuntime::trampoline_size() {
 370   return 16;
 371 }
 372 
 373 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
 374   __ jump(RuntimeAddress(destination));
 375 }
 376 
 377 // The java_calling_convention describes stack locations as ideal slots on
 378 // a frame with no abi restrictions. Since we must observe abi restrictions
 379 // (like the placement of the register window) the slots must be biased by
 380 // the following value.
 381 static int reg2offset_in(VMReg r) {
 382   // Account for saved rbp, and return address
 383   // This should really be in_preserve_stack_slots
 384   return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
 385 }
 386 
 387 static int reg2offset_out(VMReg r) {
 388   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 389 }
 390 
 391 // ---------------------------------------------------------------------------
 392 // Read the array of BasicTypes from a signature, and compute where the
 393 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 394 // quantities.  Values less than SharedInfo::stack0 are registers, those above
 395 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 396 // as framesizes are fixed.
 397 // VMRegImpl::stack0 refers to the first slot 0(sp).
 398 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 399 // up to RegisterImpl::number_of_registers) are the 32-bit
 400 // integer registers.
 401 
 402 // Pass first two oop/int args in registers ECX and EDX.
 403 // Pass first two float/double args in registers XMM0 and XMM1.
 404 // Doubles have precedence, so if you pass a mix of floats and doubles
 405 // the doubles will grab the registers before the floats will.
 406 
 407 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 408 // either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
 409 // units regardless of build. Of course for i486 there is no 64 bit build
 410 
 411 
 412 // ---------------------------------------------------------------------------
 413 // The compiled Java calling convention.
 414 // Pass first two oop/int args in registers ECX and EDX.
 415 // Pass first two float/double args in registers XMM0 and XMM1.
 416 // Doubles have precedence, so if you pass a mix of floats and doubles
 417 // the doubles will grab the registers before the floats will.
 418 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 419                                            VMRegPair *regs,
 420                                            int total_args_passed,
 421                                            int is_outgoing) {
 422   uint    stack = 0;          // Starting stack position for args on stack
 423 
 424 
 425   // Pass first two oop/int args in registers ECX and EDX.
 426   uint reg_arg0 = 9999;
 427   uint reg_arg1 = 9999;
 428 
 429   // Pass first two float/double args in registers XMM0 and XMM1.
 430   // Doubles have precedence, so if you pass a mix of floats and doubles
 431   // the doubles will grab the registers before the floats will.
 432   // CNC - TURNED OFF FOR non-SSE.
 433   //       On Intel we have to round all doubles (and most floats) at
 434   //       call sites by storing to the stack in any case.
 435   // UseSSE=0 ==> Don't Use ==> 9999+0
 436   // UseSSE=1 ==> Floats only ==> 9999+1
 437   // UseSSE>=2 ==> Floats or doubles ==> 9999+2
 438   enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
 439   uint fargs = (UseSSE>=2) ? 2 : UseSSE;
 440   uint freg_arg0 = 9999+fargs;
 441   uint freg_arg1 = 9999+fargs;
 442 
 443   // Pass doubles & longs aligned on the stack.  First count stack slots for doubles
 444   int i;
 445   for( i = 0; i < total_args_passed; i++) {
 446     if( sig_bt[i] == T_DOUBLE ) {
 447       // first 2 doubles go in registers
 448       if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
 449       else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
 450       else // Else double is passed low on the stack to be aligned.
 451         stack += 2;
 452     } else if( sig_bt[i] == T_LONG ) {
 453       stack += 2;
 454     }
 455   }
 456   int dstack = 0;             // Separate counter for placing doubles
 457 
 458   // Now pick where all else goes.
 459   for( i = 0; i < total_args_passed; i++) {
 460     // From the type and the argument number (count) compute the location
 461     switch( sig_bt[i] ) {
 462     case T_SHORT:
 463     case T_CHAR:
 464     case T_BYTE:
 465     case T_BOOLEAN:
 466     case T_INT:
 467     case T_ARRAY:
 468     case T_OBJECT:
 469     case T_ADDRESS:
 470       if( reg_arg0 == 9999 )  {
 471         reg_arg0 = i;
 472         regs[i].set1(rcx->as_VMReg());
 473       } else if( reg_arg1 == 9999 )  {
 474         reg_arg1 = i;
 475         regs[i].set1(rdx->as_VMReg());
 476       } else {
 477         regs[i].set1(VMRegImpl::stack2reg(stack++));
 478       }
 479       break;
 480     case T_FLOAT:
 481       if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
 482         freg_arg0 = i;
 483         regs[i].set1(xmm0->as_VMReg());
 484       } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
 485         freg_arg1 = i;
 486         regs[i].set1(xmm1->as_VMReg());
 487       } else {
 488         regs[i].set1(VMRegImpl::stack2reg(stack++));
 489       }
 490       break;
 491     case T_LONG:
 492       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
 493       regs[i].set2(VMRegImpl::stack2reg(dstack));
 494       dstack += 2;
 495       break;
 496     case T_DOUBLE:
 497       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
 498       if( freg_arg0 == (uint)i ) {
 499         regs[i].set2(xmm0->as_VMReg());
 500       } else if( freg_arg1 == (uint)i ) {
 501         regs[i].set2(xmm1->as_VMReg());
 502       } else {
 503         regs[i].set2(VMRegImpl::stack2reg(dstack));
 504         dstack += 2;
 505       }
 506       break;
 507     case T_VOID: regs[i].set_bad(); break;
 508       break;
 509     default:
 510       ShouldNotReachHere();
 511       break;
 512     }
 513   }
 514 
 515   // return value can be odd number of VMRegImpl stack slots make multiple of 2
 516   return align_up(stack, 2);
 517 }
 518 
 519 // Patch the callers callsite with entry to compiled code if it exists.
 520 static void patch_callers_callsite(MacroAssembler *masm) {
 521   Label L;
 522   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 523   __ jcc(Assembler::equal, L);
 524   // Schedule the branch target address early.
 525   // Call into the VM to patch the caller, then jump to compiled callee
 526   // rax, isn't live so capture return address while we easily can
 527   __ movptr(rax, Address(rsp, 0));
 528   __ pusha();
 529   __ pushf();
 530 
 531   if (UseSSE == 1) {
 532     __ subptr(rsp, 2*wordSize);
 533     __ movflt(Address(rsp, 0), xmm0);
 534     __ movflt(Address(rsp, wordSize), xmm1);
 535   }
 536   if (UseSSE >= 2) {
 537     __ subptr(rsp, 4*wordSize);
 538     __ movdbl(Address(rsp, 0), xmm0);
 539     __ movdbl(Address(rsp, 2*wordSize), xmm1);
 540   }
 541 #ifdef COMPILER2
 542   // C2 may leave the stack dirty if not in SSE2+ mode
 543   if (UseSSE >= 2) {
 544     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 545   } else {
 546     __ empty_FPU_stack();
 547   }
 548 #endif /* COMPILER2 */
 549 
 550   // VM needs caller's callsite
 551   __ push(rax);
 552   // VM needs target method
 553   __ push(rbx);
 554   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 555   __ addptr(rsp, 2*wordSize);
 556 
 557   if (UseSSE == 1) {
 558     __ movflt(xmm0, Address(rsp, 0));
 559     __ movflt(xmm1, Address(rsp, wordSize));
 560     __ addptr(rsp, 2*wordSize);
 561   }
 562   if (UseSSE >= 2) {
 563     __ movdbl(xmm0, Address(rsp, 0));
 564     __ movdbl(xmm1, Address(rsp, 2*wordSize));
 565     __ addptr(rsp, 4*wordSize);
 566   }
 567 
 568   __ popf();
 569   __ popa();
 570   __ bind(L);
 571 }
 572 
 573 
 574 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
 575   int next_off = st_off - Interpreter::stackElementSize;
 576   __ movdbl(Address(rsp, next_off), r);
 577 }
 578 
 579 static void gen_c2i_adapter(MacroAssembler *masm,
 580                             int total_args_passed,
 581                             int comp_args_on_stack,
 582                             const BasicType *sig_bt,
 583                             const VMRegPair *regs,
 584                             Label& skip_fixup) {
 585   // Before we get into the guts of the C2I adapter, see if we should be here
 586   // at all.  We've come from compiled code and are attempting to jump to the
 587   // interpreter, which means the caller made a static call to get here
 588   // (vcalls always get a compiled target if there is one).  Check for a
 589   // compiled target.  If there is one, we need to patch the caller's call.
 590   patch_callers_callsite(masm);
 591 
 592   __ bind(skip_fixup);
 593 
 594 #ifdef COMPILER2
 595   // C2 may leave the stack dirty if not in SSE2+ mode
 596   if (UseSSE >= 2) {
 597     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 598   } else {
 599     __ empty_FPU_stack();
 600   }
 601 #endif /* COMPILER2 */
 602 
 603   // Since all args are passed on the stack, total_args_passed * interpreter_
 604   // stack_element_size  is the
 605   // space we need.
 606   int extraspace = total_args_passed * Interpreter::stackElementSize;
 607 
 608   // Get return address
 609   __ pop(rax);
 610 
 611   // set senderSP value
 612   __ movptr(rsi, rsp);
 613 
 614   __ subptr(rsp, extraspace);
 615 
 616   // Now write the args into the outgoing interpreter space
 617   for (int i = 0; i < total_args_passed; i++) {
 618     if (sig_bt[i] == T_VOID) {
 619       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 620       continue;
 621     }
 622 
 623     // st_off points to lowest address on stack.
 624     int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
 625     int next_off = st_off - Interpreter::stackElementSize;
 626 
 627     // Say 4 args:
 628     // i   st_off
 629     // 0   12 T_LONG
 630     // 1    8 T_VOID
 631     // 2    4 T_OBJECT
 632     // 3    0 T_BOOL
 633     VMReg r_1 = regs[i].first();
 634     VMReg r_2 = regs[i].second();
 635     if (!r_1->is_valid()) {
 636       assert(!r_2->is_valid(), "");
 637       continue;
 638     }
 639 
 640     if (r_1->is_stack()) {
 641       // memory to memory use fpu stack top
 642       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 643 
 644       if (!r_2->is_valid()) {
 645         __ movl(rdi, Address(rsp, ld_off));
 646         __ movptr(Address(rsp, st_off), rdi);
 647       } else {
 648 
 649         // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
 650         // st_off == MSW, st_off-wordSize == LSW
 651 
 652         __ movptr(rdi, Address(rsp, ld_off));
 653         __ movptr(Address(rsp, next_off), rdi);
 654 #ifndef _LP64
 655         __ movptr(rdi, Address(rsp, ld_off + wordSize));
 656         __ movptr(Address(rsp, st_off), rdi);
 657 #else
 658 #ifdef ASSERT
 659         // Overwrite the unused slot with known junk
 660         __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
 661         __ movptr(Address(rsp, st_off), rax);
 662 #endif /* ASSERT */
 663 #endif // _LP64
 664       }
 665     } else if (r_1->is_Register()) {
 666       Register r = r_1->as_Register();
 667       if (!r_2->is_valid()) {
 668         __ movl(Address(rsp, st_off), r);
 669       } else {
 670         // long/double in gpr
 671         NOT_LP64(ShouldNotReachHere());
 672         // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 673         // T_DOUBLE and T_LONG use two slots in the interpreter
 674         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 675           // long/double in gpr
 676 #ifdef ASSERT
 677           // Overwrite the unused slot with known junk
 678           LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
 679           __ movptr(Address(rsp, st_off), rax);
 680 #endif /* ASSERT */
 681           __ movptr(Address(rsp, next_off), r);
 682         } else {
 683           __ movptr(Address(rsp, st_off), r);
 684         }
 685       }
 686     } else {
 687       assert(r_1->is_XMMRegister(), "");
 688       if (!r_2->is_valid()) {
 689         __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
 690       } else {
 691         assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
 692         move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
 693       }
 694     }
 695   }
 696 
 697   // Schedule the branch target address early.
 698   __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
 699   // And repush original return address
 700   __ push(rax);
 701   __ jmp(rcx);
 702 }
 703 
 704 
 705 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
 706   int next_val_off = ld_off - Interpreter::stackElementSize;
 707   __ movdbl(r, Address(saved_sp, next_val_off));
 708 }
 709 
 710 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
 711                         address code_start, address code_end,
 712                         Label& L_ok) {
 713   Label L_fail;
 714   __ lea(temp_reg, ExternalAddress(code_start));
 715   __ cmpptr(pc_reg, temp_reg);
 716   __ jcc(Assembler::belowEqual, L_fail);
 717   __ lea(temp_reg, ExternalAddress(code_end));
 718   __ cmpptr(pc_reg, temp_reg);
 719   __ jcc(Assembler::below, L_ok);
 720   __ bind(L_fail);
 721 }
 722 
 723 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
 724                                     int total_args_passed,
 725                                     int comp_args_on_stack,
 726                                     const BasicType *sig_bt,
 727                                     const VMRegPair *regs) {
 728   // Note: rsi contains the senderSP on entry. We must preserve it since
 729   // we may do a i2c -> c2i transition if we lose a race where compiled
 730   // code goes non-entrant while we get args ready.
 731 
 732   // Adapters can be frameless because they do not require the caller
 733   // to perform additional cleanup work, such as correcting the stack pointer.
 734   // An i2c adapter is frameless because the *caller* frame, which is interpreted,
 735   // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
 736   // even if a callee has modified the stack pointer.
 737   // A c2i adapter is frameless because the *callee* frame, which is interpreted,
 738   // routinely repairs its caller's stack pointer (from sender_sp, which is set
 739   // up via the senderSP register).
 740   // In other words, if *either* the caller or callee is interpreted, we can
 741   // get the stack pointer repaired after a call.
 742   // This is why c2i and i2c adapters cannot be indefinitely composed.
 743   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 744   // both caller and callee would be compiled methods, and neither would
 745   // clean up the stack pointer changes performed by the two adapters.
 746   // If this happens, control eventually transfers back to the compiled
 747   // caller, but with an uncorrected stack, causing delayed havoc.
 748 
 749   // Pick up the return address
 750   __ movptr(rax, Address(rsp, 0));
 751 
 752   if (VerifyAdapterCalls &&
 753       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 754     // So, let's test for cascading c2i/i2c adapters right now.
 755     //  assert(Interpreter::contains($return_addr) ||
 756     //         StubRoutines::contains($return_addr),
 757     //         "i2c adapter must return to an interpreter frame");
 758     __ block_comment("verify_i2c { ");
 759     Label L_ok;
 760     if (Interpreter::code() != NULL)
 761       range_check(masm, rax, rdi,
 762                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 763                   L_ok);
 764     if (StubRoutines::code1() != NULL)
 765       range_check(masm, rax, rdi,
 766                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 767                   L_ok);
 768     if (StubRoutines::code2() != NULL)
 769       range_check(masm, rax, rdi,
 770                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 771                   L_ok);
 772     const char* msg = "i2c adapter must return to an interpreter frame";
 773     __ block_comment(msg);
 774     __ stop(msg);
 775     __ bind(L_ok);
 776     __ block_comment("} verify_i2ce ");
 777   }
 778 
 779   // Must preserve original SP for loading incoming arguments because
 780   // we need to align the outgoing SP for compiled code.
 781   __ movptr(rdi, rsp);
 782 
 783   // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 784   // in registers, we will occasionally have no stack args.
 785   int comp_words_on_stack = 0;
 786   if (comp_args_on_stack) {
 787     // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 788     // registers are below.  By subtracting stack0, we either get a negative
 789     // number (all values in registers) or the maximum stack slot accessed.
 790     // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
 791     // Convert 4-byte stack slots to words.
 792     comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
 793     // Round up to miminum stack alignment, in wordSize
 794     comp_words_on_stack = align_up(comp_words_on_stack, 2);
 795     __ subptr(rsp, comp_words_on_stack * wordSize);
 796   }
 797 
 798   // Align the outgoing SP
 799   __ andptr(rsp, -(StackAlignmentInBytes));
 800 
 801   // push the return address on the stack (note that pushing, rather
 802   // than storing it, yields the correct frame alignment for the callee)
 803   __ push(rax);
 804 
 805   // Put saved SP in another register
 806   const Register saved_sp = rax;
 807   __ movptr(saved_sp, rdi);
 808 
 809 
 810   // Will jump to the compiled code just as if compiled code was doing it.
 811   // Pre-load the register-jump target early, to schedule it better.
 812   __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
 813 
 814   // Now generate the shuffle code.  Pick up all register args and move the
 815   // rest through the floating point stack top.
 816   for (int i = 0; i < total_args_passed; i++) {
 817     if (sig_bt[i] == T_VOID) {
 818       // Longs and doubles are passed in native word order, but misaligned
 819       // in the 32-bit build.
 820       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 821       continue;
 822     }
 823 
 824     // Pick up 0, 1 or 2 words from SP+offset.
 825 
 826     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 827             "scrambled load targets?");
 828     // Load in argument order going down.
 829     int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
 830     // Point to interpreter value (vs. tag)
 831     int next_off = ld_off - Interpreter::stackElementSize;
 832     //
 833     //
 834     //
 835     VMReg r_1 = regs[i].first();
 836     VMReg r_2 = regs[i].second();
 837     if (!r_1->is_valid()) {
 838       assert(!r_2->is_valid(), "");
 839       continue;
 840     }
 841     if (r_1->is_stack()) {
 842       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 843       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
 844 
 845       // We can use rsi as a temp here because compiled code doesn't need rsi as an input
 846       // and if we end up going thru a c2i because of a miss a reasonable value of rsi
 847       // we be generated.
 848       if (!r_2->is_valid()) {
 849         // __ fld_s(Address(saved_sp, ld_off));
 850         // __ fstp_s(Address(rsp, st_off));
 851         __ movl(rsi, Address(saved_sp, ld_off));
 852         __ movptr(Address(rsp, st_off), rsi);
 853       } else {
 854         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 855         // are accessed as negative so LSW is at LOW address
 856 
 857         // ld_off is MSW so get LSW
 858         // st_off is LSW (i.e. reg.first())
 859         // __ fld_d(Address(saved_sp, next_off));
 860         // __ fstp_d(Address(rsp, st_off));
 861         //
 862         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 863         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 864         // So we must adjust where to pick up the data to match the interpreter.
 865         //
 866         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 867         // are accessed as negative so LSW is at LOW address
 868 
 869         // ld_off is MSW so get LSW
 870         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 871                            next_off : ld_off;
 872         __ movptr(rsi, Address(saved_sp, offset));
 873         __ movptr(Address(rsp, st_off), rsi);
 874 #ifndef _LP64
 875         __ movptr(rsi, Address(saved_sp, ld_off));
 876         __ movptr(Address(rsp, st_off + wordSize), rsi);
 877 #endif // _LP64
 878       }
 879     } else if (r_1->is_Register()) {  // Register argument
 880       Register r = r_1->as_Register();
 881       assert(r != rax, "must be different");
 882       if (r_2->is_valid()) {
 883         //
 884         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 885         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 886         // So we must adjust where to pick up the data to match the interpreter.
 887 
 888         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 889                            next_off : ld_off;
 890 
 891         // this can be a misaligned move
 892         __ movptr(r, Address(saved_sp, offset));
 893 #ifndef _LP64
 894         assert(r_2->as_Register() != rax, "need another temporary register");
 895         // Remember r_1 is low address (and LSB on x86)
 896         // So r_2 gets loaded from high address regardless of the platform
 897         __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
 898 #endif // _LP64
 899       } else {
 900         __ movl(r, Address(saved_sp, ld_off));
 901       }
 902     } else {
 903       assert(r_1->is_XMMRegister(), "");
 904       if (!r_2->is_valid()) {
 905         __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 906       } else {
 907         move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
 908       }
 909     }
 910   }
 911 
 912   // 6243940 We might end up in handle_wrong_method if
 913   // the callee is deoptimized as we race thru here. If that
 914   // happens we don't want to take a safepoint because the
 915   // caller frame will look interpreted and arguments are now
 916   // "compiled" so it is much better to make this transition
 917   // invisible to the stack walking code. Unfortunately if
 918   // we try and find the callee by normal means a safepoint
 919   // is possible. So we stash the desired callee in the thread
 920   // and the vm will find there should this case occur.
 921 
 922   __ get_thread(rax);
 923   __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
 924 
 925   // move Method* to rax, in case we end up in an c2i adapter.
 926   // the c2i adapters expect Method* in rax, (c2) because c2's
 927   // resolve stubs return the result (the method) in rax,.
 928   // I'd love to fix this.
 929   __ mov(rax, rbx);
 930 
 931   __ jmp(rdi);
 932 }
 933 
 934 // ---------------------------------------------------------------
 935 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 936                                                             int total_args_passed,
 937                                                             int comp_args_on_stack,
 938                                                             const BasicType *sig_bt,
 939                                                             const VMRegPair *regs,
 940                                                             AdapterFingerPrint* fingerprint) {
 941   address i2c_entry = __ pc();
 942 
 943   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 944 
 945   // -------------------------------------------------------------------------
 946   // Generate a C2I adapter.  On entry we know rbx, holds the Method* during calls
 947   // to the interpreter.  The args start out packed in the compiled layout.  They
 948   // need to be unpacked into the interpreter layout.  This will almost always
 949   // require some stack space.  We grow the current (compiled) stack, then repack
 950   // the args.  We  finally end in a jump to the generic interpreter entry point.
 951   // On exit from the interpreter, the interpreter will restore our SP (lest the
 952   // compiled code, which relys solely on SP and not EBP, get sick).
 953 
 954   address c2i_unverified_entry = __ pc();
 955   Label skip_fixup;
 956 
 957   Register holder = rax;
 958   Register receiver = rcx;
 959   Register temp = rbx;
 960 
 961   {
 962 
 963     Label missed;
 964     __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
 965     __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
 966     __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
 967     __ jcc(Assembler::notEqual, missed);
 968     // Method might have been compiled since the call site was patched to
 969     // interpreted if that is the case treat it as a miss so we can get
 970     // the call site corrected.
 971     __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 972     __ jcc(Assembler::equal, skip_fixup);
 973 
 974     __ bind(missed);
 975     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 976   }
 977 
 978   address c2i_entry = __ pc();
 979 
 980   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
 981   bs->c2i_entry_barrier(masm);
 982 
 983   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 984 
 985   __ flush();
 986   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
 987 }
 988 
 989 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 990                                          VMRegPair *regs,
 991                                          VMRegPair *regs2,
 992                                          int total_args_passed) {
 993   assert(regs2 == NULL, "not needed on x86");
 994 // We return the amount of VMRegImpl stack slots we need to reserve for all
 995 // the arguments NOT counting out_preserve_stack_slots.
 996 
 997   uint    stack = 0;        // All arguments on stack
 998 
 999   for( int i = 0; i < total_args_passed; i++) {
1000     // From the type and the argument number (count) compute the location
1001     switch( sig_bt[i] ) {
1002     case T_BOOLEAN:
1003     case T_CHAR:
1004     case T_FLOAT:
1005     case T_BYTE:
1006     case T_SHORT:
1007     case T_INT:
1008     case T_OBJECT:
1009     case T_ARRAY:
1010     case T_ADDRESS:
1011     case T_METADATA:
1012       regs[i].set1(VMRegImpl::stack2reg(stack++));
1013       break;
1014     case T_LONG:
1015     case T_DOUBLE: // The stack numbering is reversed from Java
1016       // Since C arguments do not get reversed, the ordering for
1017       // doubles on the stack must be opposite the Java convention
1018       assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1019       regs[i].set2(VMRegImpl::stack2reg(stack));
1020       stack += 2;
1021       break;
1022     case T_VOID: regs[i].set_bad(); break;
1023     default:
1024       ShouldNotReachHere();
1025       break;
1026     }
1027   }
1028   return stack;
1029 }
1030 
1031 // A simple move of integer like type
1032 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1033   if (src.first()->is_stack()) {
1034     if (dst.first()->is_stack()) {
1035       // stack to stack
1036       // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1037       // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1038       __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1039       __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1040     } else {
1041       // stack to reg
1042       __ movl2ptr(dst.first()->as_Register(),  Address(rbp, reg2offset_in(src.first())));
1043     }
1044   } else if (dst.first()->is_stack()) {
1045     // reg to stack
1046     // no need to sign extend on 64bit
1047     __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1048   } else {
1049     if (dst.first() != src.first()) {
1050       __ mov(dst.first()->as_Register(), src.first()->as_Register());
1051     }
1052   }
1053 }
1054 
1055 // An oop arg. Must pass a handle not the oop itself
1056 static void object_move(MacroAssembler* masm,
1057                         OopMap* map,
1058                         int oop_handle_offset,
1059                         int framesize_in_slots,
1060                         VMRegPair src,
1061                         VMRegPair dst,
1062                         bool is_receiver,
1063                         int* receiver_offset) {
1064 
1065   // Because of the calling conventions we know that src can be a
1066   // register or a stack location. dst can only be a stack location.
1067 
1068   assert(dst.first()->is_stack(), "must be stack");
1069   // must pass a handle. First figure out the location we use as a handle
1070 
1071   if (src.first()->is_stack()) {
1072     // Oop is already on the stack as an argument
1073     Register rHandle = rax;
1074     Label nil;
1075     __ xorptr(rHandle, rHandle);
1076     __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1077     __ jcc(Assembler::equal, nil);
1078     __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1079     __ bind(nil);
1080     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1081 
1082     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1083     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1084     if (is_receiver) {
1085       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1086     }
1087   } else {
1088     // Oop is in an a register we must store it to the space we reserve
1089     // on the stack for oop_handles
1090     const Register rOop = src.first()->as_Register();
1091     const Register rHandle = rax;
1092     int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1093     int offset = oop_slot*VMRegImpl::stack_slot_size;
1094     Label skip;
1095     __ movptr(Address(rsp, offset), rOop);
1096     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1097     __ xorptr(rHandle, rHandle);
1098     __ cmpptr(rOop, (int32_t)NULL_WORD);
1099     __ jcc(Assembler::equal, skip);
1100     __ lea(rHandle, Address(rsp, offset));
1101     __ bind(skip);
1102     // Store the handle parameter
1103     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1104     if (is_receiver) {
1105       *receiver_offset = offset;
1106     }
1107   }
1108 }
1109 
1110 // A float arg may have to do float reg int reg conversion
1111 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1112   assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1113 
1114   // Because of the calling convention we know that src is either a stack location
1115   // or an xmm register. dst can only be a stack location.
1116 
1117   assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1118 
1119   if (src.first()->is_stack()) {
1120     __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1121     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1122   } else {
1123     // reg to stack
1124     __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1125   }
1126 }
1127 
1128 // A long move
1129 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1130 
1131   // The only legal possibility for a long_move VMRegPair is:
1132   // 1: two stack slots (possibly unaligned)
1133   // as neither the java  or C calling convention will use registers
1134   // for longs.
1135 
1136   if (src.first()->is_stack() && dst.first()->is_stack()) {
1137     assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1138     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1139     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1140     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1141     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1142   } else {
1143     ShouldNotReachHere();
1144   }
1145 }
1146 
1147 // A double move
1148 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1149 
1150   // The only legal possibilities for a double_move VMRegPair are:
1151   // The painful thing here is that like long_move a VMRegPair might be
1152 
1153   // Because of the calling convention we know that src is either
1154   //   1: a single physical register (xmm registers only)
1155   //   2: two stack slots (possibly unaligned)
1156   // dst can only be a pair of stack slots.
1157 
1158   assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1159 
1160   if (src.first()->is_stack()) {
1161     // source is all stack
1162     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1163     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1164     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1165     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1166   } else {
1167     // reg to stack
1168     // No worries about stack alignment
1169     __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1170   }
1171 }
1172 
1173 
1174 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1175   // We always ignore the frame_slots arg and just use the space just below frame pointer
1176   // which by this time is free to use
1177   switch (ret_type) {
1178   case T_FLOAT:
1179     __ fstp_s(Address(rbp, -wordSize));
1180     break;
1181   case T_DOUBLE:
1182     __ fstp_d(Address(rbp, -2*wordSize));
1183     break;
1184   case T_VOID:  break;
1185   case T_LONG:
1186     __ movptr(Address(rbp, -wordSize), rax);
1187     NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1188     break;
1189   default: {
1190     __ movptr(Address(rbp, -wordSize), rax);
1191     }
1192   }
1193 }
1194 
1195 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1196   // We always ignore the frame_slots arg and just use the space just below frame pointer
1197   // which by this time is free to use
1198   switch (ret_type) {
1199   case T_FLOAT:
1200     __ fld_s(Address(rbp, -wordSize));
1201     break;
1202   case T_DOUBLE:
1203     __ fld_d(Address(rbp, -2*wordSize));
1204     break;
1205   case T_LONG:
1206     __ movptr(rax, Address(rbp, -wordSize));
1207     NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1208     break;
1209   case T_VOID:  break;
1210   default: {
1211     __ movptr(rax, Address(rbp, -wordSize));
1212     }
1213   }
1214 }
1215 
1216 
1217 static void save_or_restore_arguments(MacroAssembler* masm,
1218                                       const int stack_slots,
1219                                       const int total_in_args,
1220                                       const int arg_save_area,
1221                                       OopMap* map,
1222                                       VMRegPair* in_regs,
1223                                       BasicType* in_sig_bt) {
1224   // if map is non-NULL then the code should store the values,
1225   // otherwise it should load them.
1226   int handle_index = 0;
1227   // Save down double word first
1228   for ( int i = 0; i < total_in_args; i++) {
1229     if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1230       int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1231       int offset = slot * VMRegImpl::stack_slot_size;
1232       handle_index += 2;
1233       assert(handle_index <= stack_slots, "overflow");
1234       if (map != NULL) {
1235         __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1236       } else {
1237         __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1238       }
1239     }
1240     if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1241       int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1242       int offset = slot * VMRegImpl::stack_slot_size;
1243       handle_index += 2;
1244       assert(handle_index <= stack_slots, "overflow");
1245       if (map != NULL) {
1246         __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1247         if (in_regs[i].second()->is_Register()) {
1248           __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1249         }
1250       } else {
1251         __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1252         if (in_regs[i].second()->is_Register()) {
1253           __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1254         }
1255       }
1256     }
1257   }
1258   // Save or restore single word registers
1259   for ( int i = 0; i < total_in_args; i++) {
1260     if (in_regs[i].first()->is_Register()) {
1261       int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1262       int offset = slot * VMRegImpl::stack_slot_size;
1263       assert(handle_index <= stack_slots, "overflow");
1264       if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1265         map->set_oop(VMRegImpl::stack2reg(slot));;
1266       }
1267 
1268       // Value is in an input register pass we must flush it to the stack
1269       const Register reg = in_regs[i].first()->as_Register();
1270       switch (in_sig_bt[i]) {
1271         case T_ARRAY:
1272           if (map != NULL) {
1273             __ movptr(Address(rsp, offset), reg);
1274           } else {
1275             __ movptr(reg, Address(rsp, offset));
1276           }
1277           break;
1278         case T_BOOLEAN:
1279         case T_CHAR:
1280         case T_BYTE:
1281         case T_SHORT:
1282         case T_INT:
1283           if (map != NULL) {
1284             __ movl(Address(rsp, offset), reg);
1285           } else {
1286             __ movl(reg, Address(rsp, offset));
1287           }
1288           break;
1289         case T_OBJECT:
1290         default: ShouldNotReachHere();
1291       }
1292     } else if (in_regs[i].first()->is_XMMRegister()) {
1293       if (in_sig_bt[i] == T_FLOAT) {
1294         int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1295         int offset = slot * VMRegImpl::stack_slot_size;
1296         assert(handle_index <= stack_slots, "overflow");
1297         if (map != NULL) {
1298           __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1299         } else {
1300           __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1301         }
1302       }
1303     } else if (in_regs[i].first()->is_stack()) {
1304       if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1305         int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1306         map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1307       }
1308     }
1309   }
1310 }
1311 
1312 // Registers need to be saved for runtime call
1313 static Register caller_saved_registers[] = {
1314   rcx, rdx, rsi, rdi
1315 };
1316 
1317 // Save caller saved registers except r1 and r2
1318 static void save_registers_except(MacroAssembler* masm, Register r1, Register r2) {
1319   int reg_len = (int)(sizeof(caller_saved_registers) / sizeof(Register));
1320   for (int index = 0; index < reg_len; index ++) {
1321     Register this_reg = caller_saved_registers[index];
1322     if (this_reg != r1 && this_reg != r2) {
1323       __ push(this_reg);
1324     }
1325   }
1326 }
1327 
1328 // Restore caller saved registers except r1 and r2
1329 static void restore_registers_except(MacroAssembler* masm, Register r1, Register r2) {
1330   int reg_len = (int)(sizeof(caller_saved_registers) / sizeof(Register));
1331   for (int index = reg_len - 1; index >= 0; index --) {
1332     Register this_reg = caller_saved_registers[index];
1333     if (this_reg != r1 && this_reg != r2) {
1334       __ pop(this_reg);
1335     }
1336   }
1337 }
1338 
1339 // Pin object, return pinned object or null in rax
1340 static void gen_pin_object(MacroAssembler* masm,
1341                            Register thread, VMRegPair reg) {
1342   __ block_comment("gen_pin_object {");
1343 
1344   Label is_null;
1345   Register tmp_reg = rax;
1346   VMRegPair tmp(tmp_reg->as_VMReg());
1347   if (reg.first()->is_stack()) {
1348     // Load the arg up from the stack
1349     simple_move32(masm, reg, tmp);
1350     reg = tmp;
1351   } else {
1352     __ movl(tmp_reg, reg.first()->as_Register());
1353   }
1354   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1355   __ jccb(Assembler::equal, is_null);
1356 
1357   // Save registers that may be used by runtime call
1358   Register arg = reg.first()->is_Register() ? reg.first()->as_Register() : noreg;
1359   save_registers_except(masm, arg, thread);
1360 
1361   __ call_VM_leaf(
1362     CAST_FROM_FN_PTR(address, SharedRuntime::pin_object),
1363     thread, reg.first()->as_Register());
1364 
1365   // Restore saved registers
1366   restore_registers_except(masm, arg, thread);
1367 
1368   __ bind(is_null);
1369   __ block_comment("} gen_pin_object");
1370 }
1371 
1372 // Unpin object
1373 static void gen_unpin_object(MacroAssembler* masm,
1374                              Register thread, VMRegPair reg) {
1375   __ block_comment("gen_unpin_object {");
1376   Label is_null;
1377 
1378   // temp register
1379   __ push(rax);
1380   Register tmp_reg = rax;
1381   VMRegPair tmp(tmp_reg->as_VMReg());
1382 
1383   simple_move32(masm, reg, tmp);
1384 
1385   __ testptr(rax, rax);
1386   __ jccb(Assembler::equal, is_null);
1387 
1388   // Save registers that may be used by runtime call
1389   Register arg = reg.first()->is_Register() ? reg.first()->as_Register() : noreg;
1390   save_registers_except(masm, arg, thread);
1391 
1392   __ call_VM_leaf(
1393     CAST_FROM_FN_PTR(address, SharedRuntime::unpin_object),
1394     thread, rax);
1395 
1396   // Restore saved registers
1397   restore_registers_except(masm, arg, thread);
1398   __ bind(is_null);
1399   __ pop(rax);
1400   __ block_comment("} gen_unpin_object");
1401 }
1402 
1403 // Check GCLocker::needs_gc and enter the runtime if it's true.  This
1404 // keeps a new JNI critical region from starting until a GC has been
1405 // forced.  Save down any oops in registers and describe them in an
1406 // OopMap.
1407 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1408                                                Register thread,
1409                                                int stack_slots,
1410                                                int total_c_args,
1411                                                int total_in_args,
1412                                                int arg_save_area,
1413                                                OopMapSet* oop_maps,
1414                                                VMRegPair* in_regs,
1415                                                BasicType* in_sig_bt) {
1416   __ block_comment("check GCLocker::needs_gc");
1417   Label cont;
1418   __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1419   __ jcc(Assembler::equal, cont);
1420 
1421   // Save down any incoming oops and call into the runtime to halt for a GC
1422 
1423   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1424 
1425   save_or_restore_arguments(masm, stack_slots, total_in_args,
1426                             arg_save_area, map, in_regs, in_sig_bt);
1427 
1428   address the_pc = __ pc();
1429   oop_maps->add_gc_map( __ offset(), map);
1430   __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1431 
1432   __ block_comment("block_for_jni_critical");
1433   __ push(thread);
1434   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1435   __ increment(rsp, wordSize);
1436 
1437   __ get_thread(thread);
1438   __ reset_last_Java_frame(thread, false);
1439 
1440   save_or_restore_arguments(masm, stack_slots, total_in_args,
1441                             arg_save_area, NULL, in_regs, in_sig_bt);
1442 
1443   __ bind(cont);
1444 #ifdef ASSERT
1445   if (StressCriticalJNINatives) {
1446     // Stress register saving
1447     OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1448     save_or_restore_arguments(masm, stack_slots, total_in_args,
1449                               arg_save_area, map, in_regs, in_sig_bt);
1450     // Destroy argument registers
1451     for (int i = 0; i < total_in_args - 1; i++) {
1452       if (in_regs[i].first()->is_Register()) {
1453         const Register reg = in_regs[i].first()->as_Register();
1454         __ xorptr(reg, reg);
1455       } else if (in_regs[i].first()->is_XMMRegister()) {
1456         __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1457       } else if (in_regs[i].first()->is_FloatRegister()) {
1458         ShouldNotReachHere();
1459       } else if (in_regs[i].first()->is_stack()) {
1460         // Nothing to do
1461       } else {
1462         ShouldNotReachHere();
1463       }
1464       if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1465         i++;
1466       }
1467     }
1468 
1469     save_or_restore_arguments(masm, stack_slots, total_in_args,
1470                               arg_save_area, NULL, in_regs, in_sig_bt);
1471   }
1472 #endif
1473 }
1474 
1475 // Unpack an array argument into a pointer to the body and the length
1476 // if the array is non-null, otherwise pass 0 for both.
1477 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1478   Register tmp_reg = rax;
1479   assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1480          "possible collision");
1481   assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1482          "possible collision");
1483 
1484   // Pass the length, ptr pair
1485   Label is_null, done;
1486   VMRegPair tmp(tmp_reg->as_VMReg());
1487   if (reg.first()->is_stack()) {
1488     // Load the arg up from the stack
1489     simple_move32(masm, reg, tmp);
1490     reg = tmp;
1491   }
1492   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1493   __ jccb(Assembler::equal, is_null);
1494   __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1495   simple_move32(masm, tmp, body_arg);
1496   // load the length relative to the body.
1497   __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1498                            arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1499   simple_move32(masm, tmp, length_arg);
1500   __ jmpb(done);
1501   __ bind(is_null);
1502   // Pass zeros
1503   __ xorptr(tmp_reg, tmp_reg);
1504   simple_move32(masm, tmp, body_arg);
1505   simple_move32(masm, tmp, length_arg);
1506   __ bind(done);
1507 }
1508 
1509 static void verify_oop_args(MacroAssembler* masm,
1510                             const methodHandle& method,
1511                             const BasicType* sig_bt,
1512                             const VMRegPair* regs) {
1513   Register temp_reg = rbx;  // not part of any compiled calling seq
1514   if (VerifyOops) {
1515     for (int i = 0; i < method->size_of_parameters(); i++) {
1516       if (is_reference_type(sig_bt[i])) {
1517         VMReg r = regs[i].first();
1518         assert(r->is_valid(), "bad oop arg");
1519         if (r->is_stack()) {
1520           __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1521           __ verify_oop(temp_reg);
1522         } else {
1523           __ verify_oop(r->as_Register());
1524         }
1525       }
1526     }
1527   }
1528 }
1529 
1530 static void gen_special_dispatch(MacroAssembler* masm,
1531                                  const methodHandle& method,
1532                                  const BasicType* sig_bt,
1533                                  const VMRegPair* regs) {
1534   verify_oop_args(masm, method, sig_bt, regs);
1535   vmIntrinsics::ID iid = method->intrinsic_id();
1536 
1537   // Now write the args into the outgoing interpreter space
1538   bool     has_receiver   = false;
1539   Register receiver_reg   = noreg;
1540   int      member_arg_pos = -1;
1541   Register member_reg     = noreg;
1542   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1543   if (ref_kind != 0) {
1544     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1545     member_reg = rbx;  // known to be free at this point
1546     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1547   } else if (iid == vmIntrinsics::_invokeBasic) {
1548     has_receiver = true;
1549   } else {
1550     fatal("unexpected intrinsic id %d", iid);
1551   }
1552 
1553   if (member_reg != noreg) {
1554     // Load the member_arg into register, if necessary.
1555     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1556     VMReg r = regs[member_arg_pos].first();
1557     if (r->is_stack()) {
1558       __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1559     } else {
1560       // no data motion is needed
1561       member_reg = r->as_Register();
1562     }
1563   }
1564 
1565   if (has_receiver) {
1566     // Make sure the receiver is loaded into a register.
1567     assert(method->size_of_parameters() > 0, "oob");
1568     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1569     VMReg r = regs[0].first();
1570     assert(r->is_valid(), "bad receiver arg");
1571     if (r->is_stack()) {
1572       // Porting note:  This assumes that compiled calling conventions always
1573       // pass the receiver oop in a register.  If this is not true on some
1574       // platform, pick a temp and load the receiver from stack.
1575       fatal("receiver always in a register");
1576       receiver_reg = rcx;  // known to be free at this point
1577       __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1578     } else {
1579       // no data motion is needed
1580       receiver_reg = r->as_Register();
1581     }
1582   }
1583 
1584   // Figure out which address we are really jumping to:
1585   MethodHandles::generate_method_handle_dispatch(masm, iid,
1586                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1587 }
1588 
1589 // ---------------------------------------------------------------------------
1590 // Generate a native wrapper for a given method.  The method takes arguments
1591 // in the Java compiled code convention, marshals them to the native
1592 // convention (handlizes oops, etc), transitions to native, makes the call,
1593 // returns to java state (possibly blocking), unhandlizes any result and
1594 // returns.
1595 //
1596 // Critical native functions are a shorthand for the use of
1597 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1598 // functions.  The wrapper is expected to unpack the arguments before
1599 // passing them to the callee and perform checks before and after the
1600 // native call to ensure that they GCLocker
1601 // lock_critical/unlock_critical semantics are followed.  Some other
1602 // parts of JNI setup are skipped like the tear down of the JNI handle
1603 // block and the check for pending exceptions it's impossible for them
1604 // to be thrown.
1605 //
1606 // They are roughly structured like this:
1607 //    if (GCLocker::needs_gc())
1608 //      SharedRuntime::block_for_jni_critical();
1609 //    tranistion to thread_in_native
1610 //    unpack arrray arguments and call native entry point
1611 //    check for safepoint in progress
1612 //    check if any thread suspend flags are set
1613 //      call into JVM and possible unlock the JNI critical
1614 //      if a GC was suppressed while in the critical native.
1615 //    transition back to thread_in_Java
1616 //    return to caller
1617 //
1618 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1619                                                 const methodHandle& method,
1620                                                 int compile_id,
1621                                                 BasicType* in_sig_bt,
1622                                                 VMRegPair* in_regs,
1623                                                 BasicType ret_type,
1624                                                 address critical_entry) {
1625   if (method->is_method_handle_intrinsic()) {
1626     vmIntrinsics::ID iid = method->intrinsic_id();
1627     intptr_t start = (intptr_t)__ pc();
1628     int vep_offset = ((intptr_t)__ pc()) - start;
1629     gen_special_dispatch(masm,
1630                          method,
1631                          in_sig_bt,
1632                          in_regs);
1633     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1634     __ flush();
1635     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1636     return nmethod::new_native_nmethod(method,
1637                                        compile_id,
1638                                        masm->code(),
1639                                        vep_offset,
1640                                        frame_complete,
1641                                        stack_slots / VMRegImpl::slots_per_word,
1642                                        in_ByteSize(-1),
1643                                        in_ByteSize(-1),
1644                                        (OopMapSet*)NULL);
1645   }
1646   bool is_critical_native = true;
1647   address native_func = critical_entry;
1648   if (native_func == NULL) {
1649     native_func = method->native_function();
1650     is_critical_native = false;
1651   }
1652   assert(native_func != NULL, "must have function");
1653 
1654   // An OopMap for lock (and class if static)
1655   OopMapSet *oop_maps = new OopMapSet();
1656 
1657   // We have received a description of where all the java arg are located
1658   // on entry to the wrapper. We need to convert these args to where
1659   // the jni function will expect them. To figure out where they go
1660   // we convert the java signature to a C signature by inserting
1661   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1662 
1663   const int total_in_args = method->size_of_parameters();
1664   int total_c_args = total_in_args;
1665   if (!is_critical_native) {
1666     total_c_args += 1;
1667     if (method->is_static()) {
1668       total_c_args++;
1669     }
1670   } else {
1671     for (int i = 0; i < total_in_args; i++) {
1672       if (in_sig_bt[i] == T_ARRAY) {
1673         total_c_args++;
1674       }
1675     }
1676   }
1677 
1678   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1679   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1680   BasicType* in_elem_bt = NULL;
1681 
1682   int argc = 0;
1683   if (!is_critical_native) {
1684     out_sig_bt[argc++] = T_ADDRESS;
1685     if (method->is_static()) {
1686       out_sig_bt[argc++] = T_OBJECT;
1687     }
1688 
1689     for (int i = 0; i < total_in_args ; i++ ) {
1690       out_sig_bt[argc++] = in_sig_bt[i];
1691     }
1692   } else {
1693     in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1694     SignatureStream ss(method->signature());
1695     for (int i = 0; i < total_in_args ; i++ ) {
1696       if (in_sig_bt[i] == T_ARRAY) {
1697         // Arrays are passed as int, elem* pair
1698         out_sig_bt[argc++] = T_INT;
1699         out_sig_bt[argc++] = T_ADDRESS;
1700         Symbol* atype = ss.as_symbol();
1701         const char* at = atype->as_C_string();
1702         if (strlen(at) == 2) {
1703           assert(at[0] == '[', "must be");
1704           switch (at[1]) {
1705             case 'B': in_elem_bt[i]  = T_BYTE; break;
1706             case 'C': in_elem_bt[i]  = T_CHAR; break;
1707             case 'D': in_elem_bt[i]  = T_DOUBLE; break;
1708             case 'F': in_elem_bt[i]  = T_FLOAT; break;
1709             case 'I': in_elem_bt[i]  = T_INT; break;
1710             case 'J': in_elem_bt[i]  = T_LONG; break;
1711             case 'S': in_elem_bt[i]  = T_SHORT; break;
1712             case 'Z': in_elem_bt[i]  = T_BOOLEAN; break;
1713             default: ShouldNotReachHere();
1714           }
1715         }
1716       } else {
1717         out_sig_bt[argc++] = in_sig_bt[i];
1718         in_elem_bt[i] = T_VOID;
1719       }
1720       if (in_sig_bt[i] != T_VOID) {
1721         assert(in_sig_bt[i] == ss.type(), "must match");
1722         ss.next();
1723       }
1724     }
1725   }
1726 
1727   // Now figure out where the args must be stored and how much stack space
1728   // they require.
1729   int out_arg_slots;
1730   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1731 
1732   // Compute framesize for the wrapper.  We need to handlize all oops in
1733   // registers a max of 2 on x86.
1734 
1735   // Calculate the total number of stack slots we will need.
1736 
1737   // First count the abi requirement plus all of the outgoing args
1738   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1739 
1740   // Now the space for the inbound oop handle area
1741   int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1742   if (is_critical_native) {
1743     // Critical natives may have to call out so they need a save area
1744     // for register arguments.
1745     int double_slots = 0;
1746     int single_slots = 0;
1747     for ( int i = 0; i < total_in_args; i++) {
1748       if (in_regs[i].first()->is_Register()) {
1749         const Register reg = in_regs[i].first()->as_Register();
1750         switch (in_sig_bt[i]) {
1751           case T_ARRAY:  // critical array (uses 2 slots on LP64)
1752           case T_BOOLEAN:
1753           case T_BYTE:
1754           case T_SHORT:
1755           case T_CHAR:
1756           case T_INT:  single_slots++; break;
1757           case T_LONG: double_slots++; break;
1758           default:  ShouldNotReachHere();
1759         }
1760       } else if (in_regs[i].first()->is_XMMRegister()) {
1761         switch (in_sig_bt[i]) {
1762           case T_FLOAT:  single_slots++; break;
1763           case T_DOUBLE: double_slots++; break;
1764           default:  ShouldNotReachHere();
1765         }
1766       } else if (in_regs[i].first()->is_FloatRegister()) {
1767         ShouldNotReachHere();
1768       }
1769     }
1770     total_save_slots = double_slots * 2 + single_slots;
1771     // align the save area
1772     if (double_slots != 0) {
1773       stack_slots = align_up(stack_slots, 2);
1774     }
1775   }
1776 
1777   int oop_handle_offset = stack_slots;
1778   stack_slots += total_save_slots;
1779 
1780   // Now any space we need for handlizing a klass if static method
1781 
1782   int klass_slot_offset = 0;
1783   int klass_offset = -1;
1784   int lock_slot_offset = 0;
1785   bool is_static = false;
1786 
1787   if (method->is_static()) {
1788     klass_slot_offset = stack_slots;
1789     stack_slots += VMRegImpl::slots_per_word;
1790     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1791     is_static = true;
1792   }
1793 
1794   // Plus a lock if needed
1795 
1796   if (method->is_synchronized()) {
1797     lock_slot_offset = stack_slots;
1798     stack_slots += VMRegImpl::slots_per_word;
1799   }
1800 
1801   // Now a place (+2) to save return values or temp during shuffling
1802   // + 2 for return address (which we own) and saved rbp,
1803   stack_slots += 4;
1804 
1805   // Ok The space we have allocated will look like:
1806   //
1807   //
1808   // FP-> |                     |
1809   //      |---------------------|
1810   //      | 2 slots for moves   |
1811   //      |---------------------|
1812   //      | lock box (if sync)  |
1813   //      |---------------------| <- lock_slot_offset  (-lock_slot_rbp_offset)
1814   //      | klass (if static)   |
1815   //      |---------------------| <- klass_slot_offset
1816   //      | oopHandle area      |
1817   //      |---------------------| <- oop_handle_offset (a max of 2 registers)
1818   //      | outbound memory     |
1819   //      | based arguments     |
1820   //      |                     |
1821   //      |---------------------|
1822   //      |                     |
1823   // SP-> | out_preserved_slots |
1824   //
1825   //
1826   // ****************************************************************************
1827   // WARNING - on Windows Java Natives use pascal calling convention and pop the
1828   // arguments off of the stack after the jni call. Before the call we can use
1829   // instructions that are SP relative. After the jni call we switch to FP
1830   // relative instructions instead of re-adjusting the stack on windows.
1831   // ****************************************************************************
1832 
1833 
1834   // Now compute actual number of stack words we need rounding to make
1835   // stack properly aligned.
1836   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1837 
1838   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1839 
1840   intptr_t start = (intptr_t)__ pc();
1841 
1842   // First thing make an ic check to see if we should even be here
1843 
1844   // We are free to use all registers as temps without saving them and
1845   // restoring them except rbp. rbp is the only callee save register
1846   // as far as the interpreter and the compiler(s) are concerned.
1847 
1848 
1849   const Register ic_reg = rax;
1850   const Register receiver = rcx;
1851   Label hit;
1852   Label exception_pending;
1853 
1854   __ verify_oop(receiver);
1855   __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1856   __ jcc(Assembler::equal, hit);
1857 
1858   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1859 
1860   // verified entry must be aligned for code patching.
1861   // and the first 5 bytes must be in the same cache line
1862   // if we align at 8 then we will be sure 5 bytes are in the same line
1863   __ align(8);
1864 
1865   __ bind(hit);
1866 
1867   int vep_offset = ((intptr_t)__ pc()) - start;
1868 
1869 #ifdef COMPILER1
1870   // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1871   if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1872     inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1873    }
1874 #endif // COMPILER1
1875 
1876   // The instruction at the verified entry point must be 5 bytes or longer
1877   // because it can be patched on the fly by make_non_entrant. The stack bang
1878   // instruction fits that requirement.
1879 
1880   // Generate stack overflow check
1881 
1882   if (UseStackBanging) {
1883     __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
1884   } else {
1885     // need a 5 byte instruction to allow MT safe patching to non-entrant
1886     __ fat_nop();
1887   }
1888 
1889   // Generate a new frame for the wrapper.
1890   __ enter();
1891   // -2 because return address is already present and so is saved rbp
1892   __ subptr(rsp, stack_size - 2*wordSize);
1893 
1894   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1895   bs->nmethod_entry_barrier(masm);
1896 
1897   // Frame is now completed as far as size and linkage.
1898   int frame_complete = ((intptr_t)__ pc()) - start;
1899 
1900   if (UseRTMLocking) {
1901     // Abort RTM transaction before calling JNI
1902     // because critical section will be large and will be
1903     // aborted anyway. Also nmethod could be deoptimized.
1904     __ xabort(0);
1905   }
1906 
1907   // Calculate the difference between rsp and rbp,. We need to know it
1908   // after the native call because on windows Java Natives will pop
1909   // the arguments and it is painful to do rsp relative addressing
1910   // in a platform independent way. So after the call we switch to
1911   // rbp, relative addressing.
1912 
1913   int fp_adjustment = stack_size - 2*wordSize;
1914 
1915 #ifdef COMPILER2
1916   // C2 may leave the stack dirty if not in SSE2+ mode
1917   if (UseSSE >= 2) {
1918     __ verify_FPU(0, "c2i transition should have clean FPU stack");
1919   } else {
1920     __ empty_FPU_stack();
1921   }
1922 #endif /* COMPILER2 */
1923 
1924   // Compute the rbp, offset for any slots used after the jni call
1925 
1926   int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1927 
1928   // We use rdi as a thread pointer because it is callee save and
1929   // if we load it once it is usable thru the entire wrapper
1930   const Register thread = rdi;
1931 
1932    // We use rsi as the oop handle for the receiver/klass
1933    // It is callee save so it survives the call to native
1934 
1935    const Register oop_handle_reg = rsi;
1936 
1937    __ get_thread(thread);
1938 
1939   if (is_critical_native && !Universe::heap()->supports_object_pinning()) {
1940     check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1941                                        oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1942   }
1943 
1944   //
1945   // We immediately shuffle the arguments so that any vm call we have to
1946   // make from here on out (sync slow path, jvmti, etc.) we will have
1947   // captured the oops from our caller and have a valid oopMap for
1948   // them.
1949 
1950   // -----------------
1951   // The Grand Shuffle
1952   //
1953   // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1954   // and, if static, the class mirror instead of a receiver.  This pretty much
1955   // guarantees that register layout will not match (and x86 doesn't use reg
1956   // parms though amd does).  Since the native abi doesn't use register args
1957   // and the java conventions does we don't have to worry about collisions.
1958   // All of our moved are reg->stack or stack->stack.
1959   // We ignore the extra arguments during the shuffle and handle them at the
1960   // last moment. The shuffle is described by the two calling convention
1961   // vectors we have in our possession. We simply walk the java vector to
1962   // get the source locations and the c vector to get the destinations.
1963 
1964   int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1965 
1966   // Record rsp-based slot for receiver on stack for non-static methods
1967   int receiver_offset = -1;
1968 
1969   // This is a trick. We double the stack slots so we can claim
1970   // the oops in the caller's frame. Since we are sure to have
1971   // more args than the caller doubling is enough to make
1972   // sure we can capture all the incoming oop args from the
1973   // caller.
1974   //
1975   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1976 
1977   // Inbound arguments that need to be pinned for critical natives
1978   GrowableArray<int> pinned_args(total_in_args);
1979   // Current stack slot for storing register based array argument
1980   int pinned_slot = oop_handle_offset;
1981 
1982   // Mark location of rbp,
1983   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1984 
1985   // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1986   // Are free to temporaries if we have to do  stack to steck moves.
1987   // All inbound args are referenced based on rbp, and all outbound args via rsp.
1988 
1989   for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1990     switch (in_sig_bt[i]) {
1991       case T_ARRAY:
1992         if (is_critical_native) {
1993           VMRegPair in_arg = in_regs[i];
1994           if (Universe::heap()->supports_object_pinning()) {
1995             // gen_pin_object handles save and restore
1996             // of any clobbered registers
1997             gen_pin_object(masm, thread, in_arg);
1998             pinned_args.append(i);
1999 
2000             // rax has pinned array
2001             VMRegPair result_reg(rax->as_VMReg());
2002             if (!in_arg.first()->is_stack()) {
2003               assert(pinned_slot <= stack_slots, "overflow");
2004               simple_move32(masm, result_reg, VMRegImpl::stack2reg(pinned_slot));
2005               pinned_slot += VMRegImpl::slots_per_word;
2006             } else {
2007               // Write back pinned value, it will be used to unpin this argument
2008               __ movptr(Address(rbp, reg2offset_in(in_arg.first())), result_reg.first()->as_Register());
2009             }
2010             // We have the array in register, use it
2011             in_arg = result_reg;
2012           }
2013 
2014           unpack_array_argument(masm, in_arg, in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2015           c_arg++;
2016           break;
2017         }
2018       case T_OBJECT:
2019         assert(!is_critical_native, "no oop arguments");
2020         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2021                     ((i == 0) && (!is_static)),
2022                     &receiver_offset);
2023         break;
2024       case T_VOID:
2025         break;
2026 
2027       case T_FLOAT:
2028         float_move(masm, in_regs[i], out_regs[c_arg]);
2029           break;
2030 
2031       case T_DOUBLE:
2032         assert( i + 1 < total_in_args &&
2033                 in_sig_bt[i + 1] == T_VOID &&
2034                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2035         double_move(masm, in_regs[i], out_regs[c_arg]);
2036         break;
2037 
2038       case T_LONG :
2039         long_move(masm, in_regs[i], out_regs[c_arg]);
2040         break;
2041 
2042       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2043 
2044       default:
2045         simple_move32(masm, in_regs[i], out_regs[c_arg]);
2046     }
2047   }
2048 
2049   // Pre-load a static method's oop into rsi.  Used both by locking code and
2050   // the normal JNI call code.
2051   if (method->is_static() && !is_critical_native) {
2052 
2053     //  load opp into a register
2054     __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2055 
2056     // Now handlize the static class mirror it's known not-null.
2057     __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2058     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2059 
2060     // Now get the handle
2061     __ lea(oop_handle_reg, Address(rsp, klass_offset));
2062     // store the klass handle as second argument
2063     __ movptr(Address(rsp, wordSize), oop_handle_reg);
2064   }
2065 
2066   // Change state to native (we save the return address in the thread, since it might not
2067   // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2068   // points into the right code segment. It does not have to be the correct return pc.
2069   // We use the same pc/oopMap repeatedly when we call out
2070 
2071   intptr_t the_pc = (intptr_t) __ pc();
2072   oop_maps->add_gc_map(the_pc - start, map);
2073 
2074   __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
2075 
2076 
2077   // We have all of the arguments setup at this point. We must not touch any register
2078   // argument registers at this point (what if we save/restore them there are no oop?
2079 
2080   {
2081     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2082     __ mov_metadata(rax, method());
2083     __ call_VM_leaf(
2084          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2085          thread, rax);
2086   }
2087 
2088   // RedefineClasses() tracing support for obsolete method entry
2089   if (log_is_enabled(Trace, redefine, class, obsolete)) {
2090     __ mov_metadata(rax, method());
2091     __ call_VM_leaf(
2092          CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2093          thread, rax);
2094   }
2095 
2096   // These are register definitions we need for locking/unlocking
2097   const Register swap_reg = rax;  // Must use rax, for cmpxchg instruction
2098   const Register obj_reg  = rcx;  // Will contain the oop
2099   const Register lock_reg = rdx;  // Address of compiler lock object (BasicLock)
2100 
2101   Label slow_path_lock;
2102   Label lock_done;
2103 
2104   // Lock a synchronized method
2105   if (method->is_synchronized()) {
2106     assert(!is_critical_native, "unhandled");
2107 
2108 
2109     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2110 
2111     // Get the handle (the 2nd argument)
2112     __ movptr(oop_handle_reg, Address(rsp, wordSize));
2113 
2114     // Get address of the box
2115 
2116     __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
2117 
2118     // Load the oop from the handle
2119     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2120 
2121     if (UseBiasedLocking) {
2122       // Note that oop_handle_reg is trashed during this call
2123       __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
2124     }
2125 
2126     // Load immediate 1 into swap_reg %rax,
2127     __ movptr(swap_reg, 1);
2128 
2129     // Load (object->mark() | 1) into swap_reg %rax,
2130     __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2131 
2132     // Save (object->mark() | 1) into BasicLock's displaced header
2133     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2134 
2135     // src -> dest iff dest == rax, else rax, <- dest
2136     // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2137     __ lock();
2138     __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2139     __ jcc(Assembler::equal, lock_done);
2140 
2141     // Test if the oopMark is an obvious stack pointer, i.e.,
2142     //  1) (mark & 3) == 0, and
2143     //  2) rsp <= mark < mark + os::pagesize()
2144     // These 3 tests can be done by evaluating the following
2145     // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2146     // assuming both stack pointer and pagesize have their
2147     // least significant 2 bits clear.
2148     // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2149 
2150     __ subptr(swap_reg, rsp);
2151     __ andptr(swap_reg, 3 - os::vm_page_size());
2152 
2153     // Save the test result, for recursive case, the result is zero
2154     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2155     __ jcc(Assembler::notEqual, slow_path_lock);
2156     // Slow path will re-enter here
2157     __ bind(lock_done);
2158 
2159     if (UseBiasedLocking) {
2160       // Re-fetch oop_handle_reg as we trashed it above
2161       __ movptr(oop_handle_reg, Address(rsp, wordSize));
2162     }
2163   }
2164 
2165 
2166   // Finally just about ready to make the JNI call
2167 
2168 
2169   // get JNIEnv* which is first argument to native
2170   if (!is_critical_native) {
2171     __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2172     __ movptr(Address(rsp, 0), rdx);
2173   }
2174 
2175   // Now set thread in native
2176   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2177 
2178   __ call(RuntimeAddress(native_func));
2179 
2180   // Verify or restore cpu control state after JNI call
2181   __ restore_cpu_control_state_after_jni();
2182 
2183   // WARNING - on Windows Java Natives use pascal calling convention and pop the
2184   // arguments off of the stack. We could just re-adjust the stack pointer here
2185   // and continue to do SP relative addressing but we instead switch to FP
2186   // relative addressing.
2187 
2188   // Unpack native results.
2189   switch (ret_type) {
2190   case T_BOOLEAN: __ c2bool(rax);            break;
2191   case T_CHAR   : __ andptr(rax, 0xFFFF);    break;
2192   case T_BYTE   : __ sign_extend_byte (rax); break;
2193   case T_SHORT  : __ sign_extend_short(rax); break;
2194   case T_INT    : /* nothing to do */        break;
2195   case T_DOUBLE :
2196   case T_FLOAT  :
2197     // Result is in st0 we'll save as needed
2198     break;
2199   case T_ARRAY:                 // Really a handle
2200   case T_OBJECT:                // Really a handle
2201       break; // can't de-handlize until after safepoint check
2202   case T_VOID: break;
2203   case T_LONG: break;
2204   default       : ShouldNotReachHere();
2205   }
2206 
2207   // unpin pinned arguments
2208   pinned_slot = oop_handle_offset;
2209   if (pinned_args.length() > 0) {
2210     // save return value that may be overwritten otherwise.
2211     save_native_result(masm, ret_type, stack_slots);
2212     for (int index = 0; index < pinned_args.length(); index ++) {
2213       int i = pinned_args.at(index);
2214       assert(pinned_slot <= stack_slots, "overflow");
2215       if (!in_regs[i].first()->is_stack()) {
2216         int offset = pinned_slot * VMRegImpl::stack_slot_size;
2217         __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
2218         pinned_slot += VMRegImpl::slots_per_word;
2219       }
2220       // gen_pin_object handles save and restore
2221       // of any other clobbered registers
2222       gen_unpin_object(masm, thread, in_regs[i]);
2223     }
2224     restore_native_result(masm, ret_type, stack_slots);
2225   }
2226 
2227   // Switch thread to "native transition" state before reading the synchronization state.
2228   // This additional state is necessary because reading and testing the synchronization
2229   // state is not atomic w.r.t. GC, as this scenario demonstrates:
2230   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2231   //     VM thread changes sync state to synchronizing and suspends threads for GC.
2232   //     Thread A is resumed to finish this native method, but doesn't block here since it
2233   //     didn't see any synchronization is progress, and escapes.
2234   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2235 
2236   // Force this write out before the read below
2237   __ membar(Assembler::Membar_mask_bits(
2238             Assembler::LoadLoad | Assembler::LoadStore |
2239             Assembler::StoreLoad | Assembler::StoreStore));
2240 
2241   if (AlwaysRestoreFPU) {
2242     // Make sure the control word is correct.
2243     __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2244   }
2245 
2246   Label after_transition;
2247 
2248   // check for safepoint operation in progress and/or pending suspend requests
2249   { Label Continue, slow_path;
2250 
2251     __ safepoint_poll(slow_path, thread, noreg);
2252 
2253     __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2254     __ jcc(Assembler::equal, Continue);
2255     __ bind(slow_path);
2256 
2257     // Don't use call_VM as it will see a possible pending exception and forward it
2258     // and never return here preventing us from clearing _last_native_pc down below.
2259     // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2260     // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2261     // by hand.
2262     //
2263     __ vzeroupper();
2264 
2265     save_native_result(masm, ret_type, stack_slots);
2266     __ push(thread);
2267     if (!is_critical_native) {
2268       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2269                                               JavaThread::check_special_condition_for_native_trans)));
2270     } else {
2271       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2272                                               JavaThread::check_special_condition_for_native_trans_and_transition)));
2273     }
2274     __ increment(rsp, wordSize);
2275     // Restore any method result value
2276     restore_native_result(masm, ret_type, stack_slots);
2277 
2278     if (is_critical_native) {
2279       // The call above performed the transition to thread_in_Java so
2280       // skip the transition logic below.
2281       __ jmpb(after_transition);
2282     }
2283 
2284     __ bind(Continue);
2285   }
2286 
2287   // change thread state
2288   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2289   __ bind(after_transition);
2290 
2291   Label reguard;
2292   Label reguard_done;
2293   __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2294   __ jcc(Assembler::equal, reguard);
2295 
2296   // slow path reguard  re-enters here
2297   __ bind(reguard_done);
2298 
2299   // Handle possible exception (will unlock if necessary)
2300 
2301   // native result if any is live
2302 
2303   // Unlock
2304   Label slow_path_unlock;
2305   Label unlock_done;
2306   if (method->is_synchronized()) {
2307 
2308     Label done;
2309 
2310     // Get locked oop from the handle we passed to jni
2311     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2312 
2313     if (UseBiasedLocking) {
2314       __ biased_locking_exit(obj_reg, rbx, done);
2315     }
2316 
2317     // Simple recursive lock?
2318 
2319     __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2320     __ jcc(Assembler::equal, done);
2321 
2322     // Must save rax, if if it is live now because cmpxchg must use it
2323     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2324       save_native_result(masm, ret_type, stack_slots);
2325     }
2326 
2327     //  get old displaced header
2328     __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2329 
2330     // get address of the stack lock
2331     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2332 
2333     // Atomic swap old header if oop still contains the stack lock
2334     // src -> dest iff dest == rax, else rax, <- dest
2335     // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2336     __ lock();
2337     __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2338     __ jcc(Assembler::notEqual, slow_path_unlock);
2339 
2340     // slow path re-enters here
2341     __ bind(unlock_done);
2342     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2343       restore_native_result(masm, ret_type, stack_slots);
2344     }
2345 
2346     __ bind(done);
2347 
2348   }
2349 
2350   {
2351     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2352     // Tell dtrace about this method exit
2353     save_native_result(masm, ret_type, stack_slots);
2354     __ mov_metadata(rax, method());
2355     __ call_VM_leaf(
2356          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2357          thread, rax);
2358     restore_native_result(masm, ret_type, stack_slots);
2359   }
2360 
2361   // We can finally stop using that last_Java_frame we setup ages ago
2362 
2363   __ reset_last_Java_frame(thread, false);
2364 
2365   // Unbox oop result, e.g. JNIHandles::resolve value.
2366   if (is_reference_type(ret_type)) {
2367     __ resolve_jobject(rax /* value */,
2368                        thread /* thread */,
2369                        rcx /* tmp */);
2370   }
2371 
2372   if (CheckJNICalls) {
2373     // clear_pending_jni_exception_check
2374     __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2375   }
2376 
2377   if (!is_critical_native) {
2378     // reset handle block
2379     __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2380     __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2381 
2382     // Any exception pending?
2383     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2384     __ jcc(Assembler::notEqual, exception_pending);
2385   }
2386 
2387   // no exception, we're almost done
2388 
2389   // check that only result value is on FPU stack
2390   __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2391 
2392   // Fixup floating pointer results so that result looks like a return from a compiled method
2393   if (ret_type == T_FLOAT) {
2394     if (UseSSE >= 1) {
2395       // Pop st0 and store as float and reload into xmm register
2396       __ fstp_s(Address(rbp, -4));
2397       __ movflt(xmm0, Address(rbp, -4));
2398     }
2399   } else if (ret_type == T_DOUBLE) {
2400     if (UseSSE >= 2) {
2401       // Pop st0 and store as double and reload into xmm register
2402       __ fstp_d(Address(rbp, -8));
2403       __ movdbl(xmm0, Address(rbp, -8));
2404     }
2405   }
2406 
2407   // Return
2408 
2409   __ leave();
2410   __ ret(0);
2411 
2412   // Unexpected paths are out of line and go here
2413 
2414   // Slow path locking & unlocking
2415   if (method->is_synchronized()) {
2416 
2417     // BEGIN Slow path lock
2418 
2419     __ bind(slow_path_lock);
2420 
2421     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2422     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2423     __ push(thread);
2424     __ push(lock_reg);
2425     __ push(obj_reg);
2426     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2427     __ addptr(rsp, 3*wordSize);
2428 
2429 #ifdef ASSERT
2430     { Label L;
2431     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2432     __ jcc(Assembler::equal, L);
2433     __ stop("no pending exception allowed on exit from monitorenter");
2434     __ bind(L);
2435     }
2436 #endif
2437     __ jmp(lock_done);
2438 
2439     // END Slow path lock
2440 
2441     // BEGIN Slow path unlock
2442     __ bind(slow_path_unlock);
2443     __ vzeroupper();
2444     // Slow path unlock
2445 
2446     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2447       save_native_result(masm, ret_type, stack_slots);
2448     }
2449     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2450 
2451     __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2452     __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2453 
2454 
2455     // should be a peal
2456     // +wordSize because of the push above
2457     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2458     __ push(thread);
2459     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2460     __ push(rax);
2461 
2462     __ push(obj_reg);
2463     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2464     __ addptr(rsp, 3*wordSize);
2465 #ifdef ASSERT
2466     {
2467       Label L;
2468       __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2469       __ jcc(Assembler::equal, L);
2470       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2471       __ bind(L);
2472     }
2473 #endif /* ASSERT */
2474 
2475     __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2476 
2477     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2478       restore_native_result(masm, ret_type, stack_slots);
2479     }
2480     __ jmp(unlock_done);
2481     // END Slow path unlock
2482 
2483   }
2484 
2485   // SLOW PATH Reguard the stack if needed
2486 
2487   __ bind(reguard);
2488   __ vzeroupper();
2489   save_native_result(masm, ret_type, stack_slots);
2490   {
2491     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2492   }
2493   restore_native_result(masm, ret_type, stack_slots);
2494   __ jmp(reguard_done);
2495 
2496 
2497   // BEGIN EXCEPTION PROCESSING
2498 
2499   if (!is_critical_native) {
2500     // Forward  the exception
2501     __ bind(exception_pending);
2502 
2503     // remove possible return value from FPU register stack
2504     __ empty_FPU_stack();
2505 
2506     // pop our frame
2507     __ leave();
2508     // and forward the exception
2509     __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2510   }
2511 
2512   __ flush();
2513 
2514   nmethod *nm = nmethod::new_native_nmethod(method,
2515                                             compile_id,
2516                                             masm->code(),
2517                                             vep_offset,
2518                                             frame_complete,
2519                                             stack_slots / VMRegImpl::slots_per_word,
2520                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2521                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2522                                             oop_maps);
2523 
2524   if (is_critical_native) {
2525     nm->set_lazy_critical_native(true);
2526   }
2527 
2528   return nm;
2529 
2530 }
2531 
2532 // this function returns the adjust size (in number of words) to a c2i adapter
2533 // activation for use during deoptimization
2534 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2535   return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2536 }
2537 
2538 
2539 uint SharedRuntime::out_preserve_stack_slots() {
2540   return 0;
2541 }
2542 
2543 //------------------------------generate_deopt_blob----------------------------
2544 void SharedRuntime::generate_deopt_blob() {
2545   // allocate space for the code
2546   ResourceMark rm;
2547   // setup code generation tools
2548   // note: the buffer code size must account for StackShadowPages=50
2549   CodeBuffer   buffer("deopt_blob", 1536, 1024);
2550   MacroAssembler* masm = new MacroAssembler(&buffer);
2551   int frame_size_in_words;
2552   OopMap* map = NULL;
2553   // Account for the extra args we place on the stack
2554   // by the time we call fetch_unroll_info
2555   const int additional_words = 2; // deopt kind, thread
2556 
2557   OopMapSet *oop_maps = new OopMapSet();
2558 
2559   // -------------
2560   // This code enters when returning to a de-optimized nmethod.  A return
2561   // address has been pushed on the the stack, and return values are in
2562   // registers.
2563   // If we are doing a normal deopt then we were called from the patched
2564   // nmethod from the point we returned to the nmethod. So the return
2565   // address on the stack is wrong by NativeCall::instruction_size
2566   // We will adjust the value to it looks like we have the original return
2567   // address on the stack (like when we eagerly deoptimized).
2568   // In the case of an exception pending with deoptimized then we enter
2569   // with a return address on the stack that points after the call we patched
2570   // into the exception handler. We have the following register state:
2571   //    rax,: exception
2572   //    rbx,: exception handler
2573   //    rdx: throwing pc
2574   // So in this case we simply jam rdx into the useless return address and
2575   // the stack looks just like we want.
2576   //
2577   // At this point we need to de-opt.  We save the argument return
2578   // registers.  We call the first C routine, fetch_unroll_info().  This
2579   // routine captures the return values and returns a structure which
2580   // describes the current frame size and the sizes of all replacement frames.
2581   // The current frame is compiled code and may contain many inlined
2582   // functions, each with their own JVM state.  We pop the current frame, then
2583   // push all the new frames.  Then we call the C routine unpack_frames() to
2584   // populate these frames.  Finally unpack_frames() returns us the new target
2585   // address.  Notice that callee-save registers are BLOWN here; they have
2586   // already been captured in the vframeArray at the time the return PC was
2587   // patched.
2588   address start = __ pc();
2589   Label cont;
2590 
2591   // Prolog for non exception case!
2592 
2593   // Save everything in sight.
2594 
2595   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2596   // Normal deoptimization
2597   __ push(Deoptimization::Unpack_deopt);
2598   __ jmp(cont);
2599 
2600   int reexecute_offset = __ pc() - start;
2601 
2602   // Reexecute case
2603   // return address is the pc describes what bci to do re-execute at
2604 
2605   // No need to update map as each call to save_live_registers will produce identical oopmap
2606   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2607 
2608   __ push(Deoptimization::Unpack_reexecute);
2609   __ jmp(cont);
2610 
2611   int exception_offset = __ pc() - start;
2612 
2613   // Prolog for exception case
2614 
2615   // all registers are dead at this entry point, except for rax, and
2616   // rdx which contain the exception oop and exception pc
2617   // respectively.  Set them in TLS and fall thru to the
2618   // unpack_with_exception_in_tls entry point.
2619 
2620   __ get_thread(rdi);
2621   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2622   __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2623 
2624   int exception_in_tls_offset = __ pc() - start;
2625 
2626   // new implementation because exception oop is now passed in JavaThread
2627 
2628   // Prolog for exception case
2629   // All registers must be preserved because they might be used by LinearScan
2630   // Exceptiop oop and throwing PC are passed in JavaThread
2631   // tos: stack at point of call to method that threw the exception (i.e. only
2632   // args are on the stack, no return address)
2633 
2634   // make room on stack for the return address
2635   // It will be patched later with the throwing pc. The correct value is not
2636   // available now because loading it from memory would destroy registers.
2637   __ push(0);
2638 
2639   // Save everything in sight.
2640 
2641   // No need to update map as each call to save_live_registers will produce identical oopmap
2642   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2643 
2644   // Now it is safe to overwrite any register
2645 
2646   // store the correct deoptimization type
2647   __ push(Deoptimization::Unpack_exception);
2648 
2649   // load throwing pc from JavaThread and patch it as the return address
2650   // of the current frame. Then clear the field in JavaThread
2651   __ get_thread(rdi);
2652   __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2653   __ movptr(Address(rbp, wordSize), rdx);
2654   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2655 
2656 #ifdef ASSERT
2657   // verify that there is really an exception oop in JavaThread
2658   __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2659   __ verify_oop(rax);
2660 
2661   // verify that there is no pending exception
2662   Label no_pending_exception;
2663   __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2664   __ testptr(rax, rax);
2665   __ jcc(Assembler::zero, no_pending_exception);
2666   __ stop("must not have pending exception here");
2667   __ bind(no_pending_exception);
2668 #endif
2669 
2670   __ bind(cont);
2671 
2672   // Compiled code leaves the floating point stack dirty, empty it.
2673   __ empty_FPU_stack();
2674 
2675 
2676   // Call C code.  Need thread and this frame, but NOT official VM entry
2677   // crud.  We cannot block on this call, no GC can happen.
2678   __ get_thread(rcx);
2679   __ push(rcx);
2680   // fetch_unroll_info needs to call last_java_frame()
2681   __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2682 
2683   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2684 
2685   // Need to have an oopmap that tells fetch_unroll_info where to
2686   // find any register it might need.
2687 
2688   oop_maps->add_gc_map( __ pc()-start, map);
2689 
2690   // Discard args to fetch_unroll_info
2691   __ pop(rcx);
2692   __ pop(rcx);
2693 
2694   __ get_thread(rcx);
2695   __ reset_last_Java_frame(rcx, false);
2696 
2697   // Load UnrollBlock into EDI
2698   __ mov(rdi, rax);
2699 
2700   // Move the unpack kind to a safe place in the UnrollBlock because
2701   // we are very short of registers
2702 
2703   Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2704   // retrieve the deopt kind from the UnrollBlock.
2705   __ movl(rax, unpack_kind);
2706 
2707    Label noException;
2708   __ cmpl(rax, Deoptimization::Unpack_exception);   // Was exception pending?
2709   __ jcc(Assembler::notEqual, noException);
2710   __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2711   __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2712   __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2713   __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2714 
2715   __ verify_oop(rax);
2716 
2717   // Overwrite the result registers with the exception results.
2718   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2719   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2720 
2721   __ bind(noException);
2722 
2723   // Stack is back to only having register save data on the stack.
2724   // Now restore the result registers. Everything else is either dead or captured
2725   // in the vframeArray.
2726 
2727   RegisterSaver::restore_result_registers(masm);
2728 
2729   // Non standard control word may be leaked out through a safepoint blob, and we can
2730   // deopt at a poll point with the non standard control word. However, we should make
2731   // sure the control word is correct after restore_result_registers.
2732   __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2733 
2734   // All of the register save area has been popped of the stack. Only the
2735   // return address remains.
2736 
2737   // Pop all the frames we must move/replace.
2738   //
2739   // Frame picture (youngest to oldest)
2740   // 1: self-frame (no frame link)
2741   // 2: deopting frame  (no frame link)
2742   // 3: caller of deopting frame (could be compiled/interpreted).
2743   //
2744   // Note: by leaving the return address of self-frame on the stack
2745   // and using the size of frame 2 to adjust the stack
2746   // when we are done the return to frame 3 will still be on the stack.
2747 
2748   // Pop deoptimized frame
2749   __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2750 
2751   // sp should be pointing at the return address to the caller (3)
2752 
2753   // Pick up the initial fp we should save
2754   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2755   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2756 
2757 #ifdef ASSERT
2758   // Compilers generate code that bang the stack by as much as the
2759   // interpreter would need. So this stack banging should never
2760   // trigger a fault. Verify that it does not on non product builds.
2761   if (UseStackBanging) {
2762     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2763     __ bang_stack_size(rbx, rcx);
2764   }
2765 #endif
2766 
2767   // Load array of frame pcs into ECX
2768   __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2769 
2770   __ pop(rsi); // trash the old pc
2771 
2772   // Load array of frame sizes into ESI
2773   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2774 
2775   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2776 
2777   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2778   __ movl(counter, rbx);
2779 
2780   // Now adjust the caller's stack to make up for the extra locals
2781   // but record the original sp so that we can save it in the skeletal interpreter
2782   // frame and the stack walking of interpreter_sender will get the unextended sp
2783   // value and not the "real" sp value.
2784 
2785   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2786   __ movptr(sp_temp, rsp);
2787   __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2788   __ subptr(rsp, rbx);
2789 
2790   // Push interpreter frames in a loop
2791   Label loop;
2792   __ bind(loop);
2793   __ movptr(rbx, Address(rsi, 0));      // Load frame size
2794   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
2795   __ pushptr(Address(rcx, 0));          // save return address
2796   __ enter();                           // save old & set new rbp,
2797   __ subptr(rsp, rbx);                  // Prolog!
2798   __ movptr(rbx, sp_temp);              // sender's sp
2799   // This value is corrected by layout_activation_impl
2800   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2801   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2802   __ movptr(sp_temp, rsp);              // pass to next frame
2803   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
2804   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
2805   __ decrementl(counter);             // decrement counter
2806   __ jcc(Assembler::notZero, loop);
2807   __ pushptr(Address(rcx, 0));          // save final return address
2808 
2809   // Re-push self-frame
2810   __ enter();                           // save old & set new rbp,
2811 
2812   //  Return address and rbp, are in place
2813   // We'll push additional args later. Just allocate a full sized
2814   // register save area
2815   __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2816 
2817   // Restore frame locals after moving the frame
2818   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2819   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2820   __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize));   // Pop float stack and store in local
2821   if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2822   if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2823 
2824   // Set up the args to unpack_frame
2825 
2826   __ pushl(unpack_kind);                     // get the unpack_kind value
2827   __ get_thread(rcx);
2828   __ push(rcx);
2829 
2830   // set last_Java_sp, last_Java_fp
2831   __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2832 
2833   // Call C code.  Need thread but NOT official VM entry
2834   // crud.  We cannot block on this call, no GC can happen.  Call should
2835   // restore return values to their stack-slots with the new SP.
2836   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2837   // Set an oopmap for the call site
2838   oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2839 
2840   // rax, contains the return result type
2841   __ push(rax);
2842 
2843   __ get_thread(rcx);
2844   __ reset_last_Java_frame(rcx, false);
2845 
2846   // Collect return values
2847   __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2848   __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2849 
2850   // Clear floating point stack before returning to interpreter
2851   __ empty_FPU_stack();
2852 
2853   // Check if we should push the float or double return value.
2854   Label results_done, yes_double_value;
2855   __ cmpl(Address(rsp, 0), T_DOUBLE);
2856   __ jcc (Assembler::zero, yes_double_value);
2857   __ cmpl(Address(rsp, 0), T_FLOAT);
2858   __ jcc (Assembler::notZero, results_done);
2859 
2860   // return float value as expected by interpreter
2861   if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2862   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2863   __ jmp(results_done);
2864 
2865   // return double value as expected by interpreter
2866   __ bind(yes_double_value);
2867   if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2868   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2869 
2870   __ bind(results_done);
2871 
2872   // Pop self-frame.
2873   __ leave();                              // Epilog!
2874 
2875   // Jump to interpreter
2876   __ ret(0);
2877 
2878   // -------------
2879   // make sure all code is generated
2880   masm->flush();
2881 
2882   _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2883   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2884 }
2885 
2886 
2887 #ifdef COMPILER2
2888 //------------------------------generate_uncommon_trap_blob--------------------
2889 void SharedRuntime::generate_uncommon_trap_blob() {
2890   // allocate space for the code
2891   ResourceMark rm;
2892   // setup code generation tools
2893   CodeBuffer   buffer("uncommon_trap_blob", 512, 512);
2894   MacroAssembler* masm = new MacroAssembler(&buffer);
2895 
2896   enum frame_layout {
2897     arg0_off,      // thread                     sp + 0 // Arg location for
2898     arg1_off,      // unloaded_class_index       sp + 1 // calling C
2899     arg2_off,      // exec_mode                  sp + 2
2900     // The frame sender code expects that rbp will be in the "natural" place and
2901     // will override any oopMap setting for it. We must therefore force the layout
2902     // so that it agrees with the frame sender code.
2903     rbp_off,       // callee saved register      sp + 3
2904     return_off,    // slot for return address    sp + 4
2905     framesize
2906   };
2907 
2908   address start = __ pc();
2909 
2910   if (UseRTMLocking) {
2911     // Abort RTM transaction before possible nmethod deoptimization.
2912     __ xabort(0);
2913   }
2914 
2915   // Push self-frame.
2916   __ subptr(rsp, return_off*wordSize);     // Epilog!
2917 
2918   // rbp, is an implicitly saved callee saved register (i.e. the calling
2919   // convention will save restore it in prolog/epilog) Other than that
2920   // there are no callee save registers no that adapter frames are gone.
2921   __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2922 
2923   // Clear the floating point exception stack
2924   __ empty_FPU_stack();
2925 
2926   // set last_Java_sp
2927   __ get_thread(rdx);
2928   __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2929 
2930   // Call C code.  Need thread but NOT official VM entry
2931   // crud.  We cannot block on this call, no GC can happen.  Call should
2932   // capture callee-saved registers as well as return values.
2933   __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2934   // argument already in ECX
2935   __ movl(Address(rsp, arg1_off*wordSize),rcx);
2936   __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2937   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2938 
2939   // Set an oopmap for the call site
2940   OopMapSet *oop_maps = new OopMapSet();
2941   OopMap* map =  new OopMap( framesize, 0 );
2942   // No oopMap for rbp, it is known implicitly
2943 
2944   oop_maps->add_gc_map( __ pc()-start, map);
2945 
2946   __ get_thread(rcx);
2947 
2948   __ reset_last_Java_frame(rcx, false);
2949 
2950   // Load UnrollBlock into EDI
2951   __ movptr(rdi, rax);
2952 
2953 #ifdef ASSERT
2954   { Label L;
2955     __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2956             (int32_t)Deoptimization::Unpack_uncommon_trap);
2957     __ jcc(Assembler::equal, L);
2958     __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2959     __ bind(L);
2960   }
2961 #endif
2962 
2963   // Pop all the frames we must move/replace.
2964   //
2965   // Frame picture (youngest to oldest)
2966   // 1: self-frame (no frame link)
2967   // 2: deopting frame  (no frame link)
2968   // 3: caller of deopting frame (could be compiled/interpreted).
2969 
2970   // Pop self-frame.  We have no frame, and must rely only on EAX and ESP.
2971   __ addptr(rsp,(framesize-1)*wordSize);     // Epilog!
2972 
2973   // Pop deoptimized frame
2974   __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2975   __ addptr(rsp, rcx);
2976 
2977   // sp should be pointing at the return address to the caller (3)
2978 
2979   // Pick up the initial fp we should save
2980   // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2981   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2982 
2983 #ifdef ASSERT
2984   // Compilers generate code that bang the stack by as much as the
2985   // interpreter would need. So this stack banging should never
2986   // trigger a fault. Verify that it does not on non product builds.
2987   if (UseStackBanging) {
2988     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2989     __ bang_stack_size(rbx, rcx);
2990   }
2991 #endif
2992 
2993   // Load array of frame pcs into ECX
2994   __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2995 
2996   __ pop(rsi); // trash the pc
2997 
2998   // Load array of frame sizes into ESI
2999   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3000 
3001   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3002 
3003   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3004   __ movl(counter, rbx);
3005 
3006   // Now adjust the caller's stack to make up for the extra locals
3007   // but record the original sp so that we can save it in the skeletal interpreter
3008   // frame and the stack walking of interpreter_sender will get the unextended sp
3009   // value and not the "real" sp value.
3010 
3011   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3012   __ movptr(sp_temp, rsp);
3013   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3014   __ subptr(rsp, rbx);
3015 
3016   // Push interpreter frames in a loop
3017   Label loop;
3018   __ bind(loop);
3019   __ movptr(rbx, Address(rsi, 0));      // Load frame size
3020   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
3021   __ pushptr(Address(rcx, 0));          // save return address
3022   __ enter();                           // save old & set new rbp,
3023   __ subptr(rsp, rbx);                  // Prolog!
3024   __ movptr(rbx, sp_temp);              // sender's sp
3025   // This value is corrected by layout_activation_impl
3026   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
3027   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3028   __ movptr(sp_temp, rsp);              // pass to next frame
3029   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
3030   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
3031   __ decrementl(counter);             // decrement counter
3032   __ jcc(Assembler::notZero, loop);
3033   __ pushptr(Address(rcx, 0));            // save final return address
3034 
3035   // Re-push self-frame
3036   __ enter();                           // save old & set new rbp,
3037   __ subptr(rsp, (framesize-2) * wordSize);   // Prolog!
3038 
3039 
3040   // set last_Java_sp, last_Java_fp
3041   __ get_thread(rdi);
3042   __ set_last_Java_frame(rdi, noreg, rbp, NULL);
3043 
3044   // Call C code.  Need thread but NOT official VM entry
3045   // crud.  We cannot block on this call, no GC can happen.  Call should
3046   // restore return values to their stack-slots with the new SP.
3047   __ movptr(Address(rsp,arg0_off*wordSize),rdi);
3048   __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
3049   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3050   // Set an oopmap for the call site
3051   oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
3052 
3053   __ get_thread(rdi);
3054   __ reset_last_Java_frame(rdi, true);
3055 
3056   // Pop self-frame.
3057   __ leave();     // Epilog!
3058 
3059   // Jump to interpreter
3060   __ ret(0);
3061 
3062   // -------------
3063   // make sure all code is generated
3064   masm->flush();
3065 
3066    _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
3067 }
3068 #endif // COMPILER2
3069 
3070 //------------------------------generate_handler_blob------
3071 //
3072 // Generate a special Compile2Runtime blob that saves all registers,
3073 // setup oopmap, and calls safepoint code to stop the compiled code for
3074 // a safepoint.
3075 //
3076 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3077 
3078   // Account for thread arg in our frame
3079   const int additional_words = 1;
3080   int frame_size_in_words;
3081 
3082   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3083 
3084   ResourceMark rm;
3085   OopMapSet *oop_maps = new OopMapSet();
3086   OopMap* map;
3087 
3088   // allocate space for the code
3089   // setup code generation tools
3090   CodeBuffer   buffer("handler_blob", 1024, 512);
3091   MacroAssembler* masm = new MacroAssembler(&buffer);
3092 
3093   const Register java_thread = rdi; // callee-saved for VC++
3094   address start   = __ pc();
3095   address call_pc = NULL;
3096   bool cause_return = (poll_type == POLL_AT_RETURN);
3097   bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3098 
3099   if (UseRTMLocking) {
3100     // Abort RTM transaction before calling runtime
3101     // because critical section will be large and will be
3102     // aborted anyway. Also nmethod could be deoptimized.
3103     __ xabort(0);
3104   }
3105 
3106   // If cause_return is true we are at a poll_return and there is
3107   // the return address on the stack to the caller on the nmethod
3108   // that is safepoint. We can leave this return on the stack and
3109   // effectively complete the return and safepoint in the caller.
3110   // Otherwise we push space for a return address that the safepoint
3111   // handler will install later to make the stack walking sensible.
3112   if (!cause_return)
3113     __ push(rbx);  // Make room for return address (or push it again)
3114 
3115   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
3116 
3117   // The following is basically a call_VM. However, we need the precise
3118   // address of the call in order to generate an oopmap. Hence, we do all the
3119   // work ourselves.
3120 
3121   // Push thread argument and setup last_Java_sp
3122   __ get_thread(java_thread);
3123   __ push(java_thread);
3124   __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3125 
3126   // if this was not a poll_return then we need to correct the return address now.
3127   if (!cause_return) {
3128     // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
3129     // Additionally, rbx is a callee saved register and we can look at it later to determine
3130     // if someone changed the return address for us!
3131     __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3132     __ movptr(Address(rbp, wordSize), rbx);
3133   }
3134 
3135   // do the call
3136   __ call(RuntimeAddress(call_ptr));
3137 
3138   // Set an oopmap for the call site.  This oopmap will map all
3139   // oop-registers and debug-info registers as callee-saved.  This
3140   // will allow deoptimization at this safepoint to find all possible
3141   // debug-info recordings, as well as let GC find all oops.
3142 
3143   oop_maps->add_gc_map( __ pc() - start, map);
3144 
3145   // Discard arg
3146   __ pop(rcx);
3147 
3148   Label noException;
3149 
3150   // Clear last_Java_sp again
3151   __ get_thread(java_thread);
3152   __ reset_last_Java_frame(java_thread, false);
3153 
3154   __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3155   __ jcc(Assembler::equal, noException);
3156 
3157   // Exception pending
3158   RegisterSaver::restore_live_registers(masm, save_vectors);
3159 
3160   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3161 
3162   __ bind(noException);
3163 
3164   Label no_adjust, bail, not_special;
3165   if (SafepointMechanism::uses_thread_local_poll() && !cause_return) {
3166     // If our stashed return pc was modified by the runtime we avoid touching it
3167     __ cmpptr(rbx, Address(rbp, wordSize));
3168     __ jccb(Assembler::notEqual, no_adjust);
3169 
3170     // Skip over the poll instruction.
3171     // See NativeInstruction::is_safepoint_poll()
3172     // Possible encodings:
3173     //      85 00       test   %eax,(%rax)
3174     //      85 01       test   %eax,(%rcx)
3175     //      85 02       test   %eax,(%rdx)
3176     //      85 03       test   %eax,(%rbx)
3177     //      85 06       test   %eax,(%rsi)
3178     //      85 07       test   %eax,(%rdi)
3179     //
3180     //      85 04 24    test   %eax,(%rsp)
3181     //      85 45 00    test   %eax,0x0(%rbp)
3182 
3183 #ifdef ASSERT
3184     __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
3185 #endif
3186     // rsp/rbp base encoding takes 3 bytes with the following register values:
3187     // rsp 0x04
3188     // rbp 0x05
3189     __ movzbl(rcx, Address(rbx, 1));
3190     __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
3191     __ subptr(rcx, 4);    // looking for 0x00 .. 0x01
3192     __ cmpptr(rcx, 1);
3193     __ jcc(Assembler::above, not_special);
3194     __ addptr(rbx, 1);
3195     __ bind(not_special);
3196 #ifdef ASSERT
3197     // Verify the correct encoding of the poll we're about to skip.
3198     __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
3199     __ jcc(Assembler::notEqual, bail);
3200     // Mask out the modrm bits
3201     __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
3202     // rax encodes to 0, so if the bits are nonzero it's incorrect
3203     __ jcc(Assembler::notZero, bail);
3204 #endif
3205     // Adjust return pc forward to step over the safepoint poll instruction
3206     __ addptr(rbx, 2);
3207     __ movptr(Address(rbp, wordSize), rbx);
3208   }
3209 
3210   __ bind(no_adjust);
3211   // Normal exit, register restoring and exit
3212   RegisterSaver::restore_live_registers(masm, save_vectors);
3213 
3214   __ ret(0);
3215 
3216 #ifdef ASSERT
3217   __ bind(bail);
3218   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
3219 #endif
3220 
3221   // make sure all code is generated
3222   masm->flush();
3223 
3224   // Fill-out other meta info
3225   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3226 }
3227 
3228 //
3229 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3230 //
3231 // Generate a stub that calls into vm to find out the proper destination
3232 // of a java call. All the argument registers are live at this point
3233 // but since this is generic code we don't know what they are and the caller
3234 // must do any gc of the args.
3235 //
3236 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3237   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3238 
3239   // allocate space for the code
3240   ResourceMark rm;
3241 
3242   CodeBuffer buffer(name, 1000, 512);
3243   MacroAssembler* masm                = new MacroAssembler(&buffer);
3244 
3245   int frame_size_words;
3246   enum frame_layout {
3247                 thread_off,
3248                 extra_words };
3249 
3250   OopMapSet *oop_maps = new OopMapSet();
3251   OopMap* map = NULL;
3252 
3253   int start = __ offset();
3254 
3255   map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3256 
3257   int frame_complete = __ offset();
3258 
3259   const Register thread = rdi;
3260   __ get_thread(rdi);
3261 
3262   __ push(thread);
3263   __ set_last_Java_frame(thread, noreg, rbp, NULL);
3264 
3265   __ call(RuntimeAddress(destination));
3266 
3267 
3268   // Set an oopmap for the call site.
3269   // We need this not only for callee-saved registers, but also for volatile
3270   // registers that the compiler might be keeping live across a safepoint.
3271 
3272   oop_maps->add_gc_map( __ offset() - start, map);
3273 
3274   // rax, contains the address we are going to jump to assuming no exception got installed
3275 
3276   __ addptr(rsp, wordSize);
3277 
3278   // clear last_Java_sp
3279   __ reset_last_Java_frame(thread, true);
3280   // check for pending exceptions
3281   Label pending;
3282   __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3283   __ jcc(Assembler::notEqual, pending);
3284 
3285   // get the returned Method*
3286   __ get_vm_result_2(rbx, thread);
3287   __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3288 
3289   __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3290 
3291   RegisterSaver::restore_live_registers(masm);
3292 
3293   // We are back the the original state on entry and ready to go.
3294 
3295   __ jmp(rax);
3296 
3297   // Pending exception after the safepoint
3298 
3299   __ bind(pending);
3300 
3301   RegisterSaver::restore_live_registers(masm);
3302 
3303   // exception pending => remove activation and forward to exception handler
3304 
3305   __ get_thread(thread);
3306   __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3307   __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3308   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3309 
3310   // -------------
3311   // make sure all code is generated
3312   masm->flush();
3313 
3314   // return the  blob
3315   // frame_size_words or bytes??
3316   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3317 }