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src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

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   1 /*
   2  * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *


 438 private:
 439 
 440   void mov_immediate64(Register dst, u_int64_t imm64);
 441   void mov_immediate32(Register dst, u_int32_t imm32);
 442 
 443   int push(unsigned int bitset, Register stack);
 444   int pop(unsigned int bitset, Register stack);
 445 
 446   void mov(Register dst, Address a);
 447 
 448 public:
 449   void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); }
 450   void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); }
 451 
 452   // Push and pop everything that might be clobbered by a native
 453   // runtime call except rscratch1 and rscratch2.  (They are always
 454   // scratch, so we don't have to protect them.)  Only save the lower
 455   // 64 bits of each vector register.
 456   void push_call_clobbered_registers();
 457   void pop_call_clobbered_registers();


 458 
 459   // now mov instructions for loading absolute addresses and 32 or
 460   // 64 bit integers
 461 
 462   inline void mov(Register dst, address addr)
 463   {
 464     mov_immediate64(dst, (u_int64_t)addr);
 465   }
 466 
 467   inline void mov(Register dst, u_int64_t imm64)
 468   {
 469     mov_immediate64(dst, imm64);
 470   }
 471 
 472   inline void movw(Register dst, u_int32_t imm32)
 473   {
 474     mov_immediate32(dst, imm32);
 475   }
 476 
 477   inline void mov(Register dst, long l)


 775   // thread in the default location (rthread)
 776   void reset_last_Java_frame(bool clear_fp);
 777 
 778   // Stores
 779   void store_check(Register obj);                // store check for obj - register is destroyed afterwards
 780   void store_check(Register obj, Address dst);   // same as above, dst is exact store location (reg. is destroyed)
 781 
 782   void resolve_jobject(Register value, Register thread, Register tmp);
 783 
 784   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 785   void c2bool(Register x);
 786 
 787   // oop manipulations
 788   void load_klass(Register dst, Register src);
 789   void store_klass(Register dst, Register src);
 790   void cmp_klass(Register oop, Register trial_klass, Register tmp);
 791 
 792   void resolve_oop_handle(Register result, Register tmp = r5);
 793   void load_mirror(Register dst, Register method, Register tmp = r5);
 794 



 795   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 796                       Register tmp1, Register tmp_thread);
 797 
 798   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 799                        Register tmp1, Register tmp_thread);
 800 
 801   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 802                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 803 
 804   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 805                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 806   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 807                       Register tmp_thread = noreg, DecoratorSet decorators = 0);
 808 
 809   // currently unimplemented
 810   // Used for storing NULL. All other oop constants should be
 811   // stored using routines that take a jobject.
 812   void store_heap_oop_null(Address dst);
 813 
 814   void load_prototype_header(Register dst, Register src);


 998   void atomic_xchg(Register prev, Register newv, Register addr);
 999   void atomic_xchgw(Register prev, Register newv, Register addr);
1000   void atomic_xchgal(Register prev, Register newv, Register addr);
1001   void atomic_xchgalw(Register prev, Register newv, Register addr);
1002 
1003   void orptr(Address adr, RegisterOrConstant src) {
1004     ldr(rscratch1, adr);
1005     if (src.is_register())
1006       orr(rscratch1, rscratch1, src.as_register());
1007     else
1008       orr(rscratch1, rscratch1, src.as_constant());
1009     str(rscratch1, adr);
1010   }
1011 
1012   // A generic CAS; success or failure is in the EQ flag.
1013   // Clobbers rscratch1
1014   void cmpxchg(Register addr, Register expected, Register new_val,
1015                enum operand_size size,
1016                bool acquire, bool release, bool weak,
1017                Register result);

1018 private:
1019   void compare_eq(Register rn, Register rm, enum operand_size size);
1020 
1021 public:
1022   // Calls
1023 
1024   address trampoline_call(Address entry, CodeBuffer *cbuf = NULL);
1025 
1026   static bool far_branches() {
1027     return ReservedCodeCacheSize > branch_range || UseAOT;
1028   }
1029 
1030   // Jumps that can reach anywhere in the code cache.
1031   // Trashes tmp.
1032   void far_call(Address entry, CodeBuffer *cbuf = NULL, Register tmp = rscratch1);
1033   void far_jump(Address entry, CodeBuffer *cbuf = NULL, Register tmp = rscratch1);
1034 
1035   static int far_branch_size() {
1036     if (far_branches()) {
1037       return 3 * 4;  // adrp, add, br


   1 /*
   2  * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, 2018, Red Hat, Inc. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *


 438 private:
 439 
 440   void mov_immediate64(Register dst, u_int64_t imm64);
 441   void mov_immediate32(Register dst, u_int32_t imm32);
 442 
 443   int push(unsigned int bitset, Register stack);
 444   int pop(unsigned int bitset, Register stack);
 445 
 446   void mov(Register dst, Address a);
 447 
 448 public:
 449   void push(RegSet regs, Register stack) { if (regs.bits()) push(regs.bits(), stack); }
 450   void pop(RegSet regs, Register stack) { if (regs.bits()) pop(regs.bits(), stack); }
 451 
 452   // Push and pop everything that might be clobbered by a native
 453   // runtime call except rscratch1 and rscratch2.  (They are always
 454   // scratch, so we don't have to protect them.)  Only save the lower
 455   // 64 bits of each vector register.
 456   void push_call_clobbered_registers();
 457   void pop_call_clobbered_registers();
 458   void push_call_clobbered_fp_registers();
 459   void pop_call_clobbered_fp_registers();
 460 
 461   // now mov instructions for loading absolute addresses and 32 or
 462   // 64 bit integers
 463 
 464   inline void mov(Register dst, address addr)
 465   {
 466     mov_immediate64(dst, (u_int64_t)addr);
 467   }
 468 
 469   inline void mov(Register dst, u_int64_t imm64)
 470   {
 471     mov_immediate64(dst, imm64);
 472   }
 473 
 474   inline void movw(Register dst, u_int32_t imm32)
 475   {
 476     mov_immediate32(dst, imm32);
 477   }
 478 
 479   inline void mov(Register dst, long l)


 777   // thread in the default location (rthread)
 778   void reset_last_Java_frame(bool clear_fp);
 779 
 780   // Stores
 781   void store_check(Register obj);                // store check for obj - register is destroyed afterwards
 782   void store_check(Register obj, Address dst);   // same as above, dst is exact store location (reg. is destroyed)
 783 
 784   void resolve_jobject(Register value, Register thread, Register tmp);
 785 
 786   // C 'boolean' to Java boolean: x == 0 ? 0 : 1
 787   void c2bool(Register x);
 788 
 789   // oop manipulations
 790   void load_klass(Register dst, Register src);
 791   void store_klass(Register dst, Register src);
 792   void cmp_klass(Register oop, Register trial_klass, Register tmp);
 793 
 794   void resolve_oop_handle(Register result, Register tmp = r5);
 795   void load_mirror(Register dst, Register method, Register tmp = r5);
 796 
 797   void resolve_for_read(DecoratorSet decorators, Register obj);
 798   void resolve_for_write(DecoratorSet decorators, Register obj);
 799 
 800   void access_load_at(BasicType type, DecoratorSet decorators, Register dst, Address src,
 801                       Register tmp1, Register tmp_thread);
 802 
 803   void access_store_at(BasicType type, DecoratorSet decorators, Address dst, Register src,
 804                        Register tmp1, Register tmp_thread);
 805 
 806   void load_heap_oop(Register dst, Address src, Register tmp1 = noreg,
 807                      Register thread_tmp = noreg, DecoratorSet decorators = 0);
 808 
 809   void load_heap_oop_not_null(Register dst, Address src, Register tmp1 = noreg,
 810                               Register thread_tmp = noreg, DecoratorSet decorators = 0);
 811   void store_heap_oop(Address dst, Register src, Register tmp1 = noreg,
 812                       Register tmp_thread = noreg, DecoratorSet decorators = 0);
 813 
 814   // currently unimplemented
 815   // Used for storing NULL. All other oop constants should be
 816   // stored using routines that take a jobject.
 817   void store_heap_oop_null(Address dst);
 818 
 819   void load_prototype_header(Register dst, Register src);


1003   void atomic_xchg(Register prev, Register newv, Register addr);
1004   void atomic_xchgw(Register prev, Register newv, Register addr);
1005   void atomic_xchgal(Register prev, Register newv, Register addr);
1006   void atomic_xchgalw(Register prev, Register newv, Register addr);
1007 
1008   void orptr(Address adr, RegisterOrConstant src) {
1009     ldr(rscratch1, adr);
1010     if (src.is_register())
1011       orr(rscratch1, rscratch1, src.as_register());
1012     else
1013       orr(rscratch1, rscratch1, src.as_constant());
1014     str(rscratch1, adr);
1015   }
1016 
1017   // A generic CAS; success or failure is in the EQ flag.
1018   // Clobbers rscratch1
1019   void cmpxchg(Register addr, Register expected, Register new_val,
1020                enum operand_size size,
1021                bool acquire, bool release, bool weak,
1022                Register result);
1023 
1024 private:
1025   void compare_eq(Register rn, Register rm, enum operand_size size);
1026 
1027 public:
1028   // Calls
1029 
1030   address trampoline_call(Address entry, CodeBuffer *cbuf = NULL);
1031 
1032   static bool far_branches() {
1033     return ReservedCodeCacheSize > branch_range || UseAOT;
1034   }
1035 
1036   // Jumps that can reach anywhere in the code cache.
1037   // Trashes tmp.
1038   void far_call(Address entry, CodeBuffer *cbuf = NULL, Register tmp = rscratch1);
1039   void far_jump(Address entry, CodeBuffer *cbuf = NULL, Register tmp = rscratch1);
1040 
1041   static int far_branch_size() {
1042     if (far_branches()) {
1043       return 3 * 4;  // adrp, add, br


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