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src/hotspot/cpu/x86/c1_LIRAssembler_x86.cpp

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1913     }
1914     NOT_LP64(__ cmpxchg8(Address(addr, 0)));
1915 
1916   } else if (op->code() == lir_cas_int || op->code() == lir_cas_obj ) {
1917     NOT_LP64(assert(op->addr()->is_single_cpu(), "must be single");)
1918     Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
1919     Register newval = op->new_value()->as_register();
1920     Register cmpval = op->cmp_value()->as_register();
1921     assert(cmpval == rax, "wrong register");
1922     assert(newval != NULL, "new val must be register");
1923     assert(cmpval != newval, "cmp and new values must be in different registers");
1924     assert(cmpval != addr, "cmp and addr must be in different registers");
1925     assert(newval != addr, "new value and addr must be in different registers");
1926 
1927     if ( op->code() == lir_cas_obj) {
1928 #ifdef _LP64
1929       if (UseCompressedOops) {
1930         __ encode_heap_oop(cmpval);
1931         __ mov(rscratch1, newval);
1932         __ encode_heap_oop(rscratch1);
1933         if (os::is_MP()) {
1934           __ lock();
1935         }
1936         // cmpval (rax) is implicitly used by this instruction
1937         __ cmpxchgl(rscratch1, Address(addr, 0));
1938       } else
1939 #endif
1940       {
1941         if (os::is_MP()) {
1942           __ lock();
1943         }
1944         __ cmpxchgptr(newval, Address(addr, 0));
1945       }
1946     } else {
1947       assert(op->code() == lir_cas_int, "lir_cas_int expected");
1948       if (os::is_MP()) {
1949         __ lock();
1950       }
1951       __ cmpxchgl(newval, Address(addr, 0));
1952     }
1953 #ifdef _LP64
1954   } else if (op->code() == lir_cas_long) {
1955     Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
1956     Register newval = op->new_value()->as_register_lo();
1957     Register cmpval = op->cmp_value()->as_register_lo();
1958     assert(cmpval == rax, "wrong register");
1959     assert(newval != NULL, "new val must be register");
1960     assert(cmpval != newval, "cmp and new values must be in different registers");
1961     assert(cmpval != addr, "cmp and addr must be in different registers");
1962     assert(newval != addr, "new value and addr must be in different registers");
1963     if (os::is_MP()) {
1964       __ lock();
1965     }
1966     __ cmpxchgq(newval, Address(addr, 0));


3029 void LIR_Assembler::store_parameter(Metadata* m,  int offset_from_rsp_in_words) {
3030   assert(offset_from_rsp_in_words >= 0, "invalid offset from rsp");
3031   int offset_from_rsp_in_bytes = offset_from_rsp_in_words * BytesPerWord;
3032   assert(offset_from_rsp_in_bytes < frame_map()->reserved_argument_area_size(), "invalid offset");
3033   __ mov_metadata(Address(rsp, offset_from_rsp_in_bytes), m);
3034 }
3035 
3036 
3037 // This code replaces a call to arraycopy; no exception may
3038 // be thrown in this code, they must be thrown in the System.arraycopy
3039 // activation frame; we could save some checks if this would not be the case
3040 void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
3041   ciArrayKlass* default_type = op->expected_type();
3042   Register src = op->src()->as_register();
3043   Register dst = op->dst()->as_register();
3044   Register src_pos = op->src_pos()->as_register();
3045   Register dst_pos = op->dst_pos()->as_register();
3046   Register length  = op->length()->as_register();
3047   Register tmp = op->tmp()->as_register();
3048 



3049   CodeStub* stub = op->stub();
3050   int flags = op->flags();
3051   BasicType basic_type = default_type != NULL ? default_type->element_type()->basic_type() : T_ILLEGAL;
3052   if (basic_type == T_ARRAY) basic_type = T_OBJECT;
3053 
3054   // if we don't know anything, just go through the generic arraycopy
3055   if (default_type == NULL) {
3056     Label done;
3057     // save outgoing arguments on stack in case call to System.arraycopy is needed
3058     // HACK ALERT. This code used to push the parameters in a hardwired fashion
3059     // for interpreter calling conventions. Now we have to do it in new style conventions.
3060     // For the moment until C1 gets the new register allocator I just force all the
3061     // args to the right place (except the register args) and then on the back side
3062     // reload the register args properly if we go slow path. Yuck
3063 
3064     // These are proper for the calling convention
3065     store_parameter(length, 2);
3066     store_parameter(dst_pos, 1);
3067     store_parameter(dst, 0);
3068 


3467 
3468   __ lea(res, ExternalAddress(StubRoutines::crc_table_addr()));
3469   __ notl(crc); // ~crc
3470   __ update_byte_crc32(crc, val, res);
3471   __ notl(crc); // ~crc
3472   __ mov(res, crc);
3473 }
3474 
3475 void LIR_Assembler::emit_lock(LIR_OpLock* op) {
3476   Register obj = op->obj_opr()->as_register();  // may not be an oop
3477   Register hdr = op->hdr_opr()->as_register();
3478   Register lock = op->lock_opr()->as_register();
3479   if (!UseFastLocking) {
3480     __ jmp(*op->stub()->entry());
3481   } else if (op->code() == lir_lock) {
3482     Register scratch = noreg;
3483     if (UseBiasedLocking) {
3484       scratch = op->scratch_opr()->as_register();
3485     }
3486     assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");

3487     // add debug info for NullPointerException only if one is possible
3488     int null_check_offset = __ lock_object(hdr, obj, lock, scratch, *op->stub()->entry());
3489     if (op->info() != NULL) {
3490       add_debug_info_for_null_check(null_check_offset, op->info());
3491     }
3492     // done
3493   } else if (op->code() == lir_unlock) {
3494     assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
3495     __ unlock_object(hdr, obj, lock, *op->stub()->entry());
3496   } else {
3497     Unimplemented();
3498   }
3499   __ bind(*op->stub()->continuation());
3500 }
3501 
3502 
3503 void LIR_Assembler::emit_profile_call(LIR_OpProfileCall* op) {
3504   ciMethod* method = op->profiled_method();
3505   int bci          = op->profiled_bci();
3506   ciMethod* callee = op->profiled_callee();




1913     }
1914     NOT_LP64(__ cmpxchg8(Address(addr, 0)));
1915 
1916   } else if (op->code() == lir_cas_int || op->code() == lir_cas_obj ) {
1917     NOT_LP64(assert(op->addr()->is_single_cpu(), "must be single");)
1918     Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
1919     Register newval = op->new_value()->as_register();
1920     Register cmpval = op->cmp_value()->as_register();
1921     assert(cmpval == rax, "wrong register");
1922     assert(newval != NULL, "new val must be register");
1923     assert(cmpval != newval, "cmp and new values must be in different registers");
1924     assert(cmpval != addr, "cmp and addr must be in different registers");
1925     assert(newval != addr, "new value and addr must be in different registers");
1926 
1927     if ( op->code() == lir_cas_obj) {
1928 #ifdef _LP64
1929       if (UseCompressedOops) {
1930         __ encode_heap_oop(cmpval);
1931         __ mov(rscratch1, newval);
1932         __ encode_heap_oop(rscratch1);
1933         __ lock();


1934         // cmpval (rax) is implicitly used by this instruction
1935         __ cmpxchgl(rscratch1, Address(addr, 0));
1936       } else
1937 #endif
1938       {
1939         __ lock();


1940         __ cmpxchgptr(newval, Address(addr, 0));
1941       }
1942    } else {
1943       assert(op->code() == lir_cas_int, "lir_cas_int expected");
1944       if (os::is_MP()) {
1945         __ lock();
1946       }
1947       __ cmpxchgl(newval, Address(addr, 0));
1948     }
1949 #ifdef _LP64
1950   } else if (op->code() == lir_cas_long) {
1951     Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
1952     Register newval = op->new_value()->as_register_lo();
1953     Register cmpval = op->cmp_value()->as_register_lo();
1954     assert(cmpval == rax, "wrong register");
1955     assert(newval != NULL, "new val must be register");
1956     assert(cmpval != newval, "cmp and new values must be in different registers");
1957     assert(cmpval != addr, "cmp and addr must be in different registers");
1958     assert(newval != addr, "new value and addr must be in different registers");
1959     if (os::is_MP()) {
1960       __ lock();
1961     }
1962     __ cmpxchgq(newval, Address(addr, 0));


3025 void LIR_Assembler::store_parameter(Metadata* m,  int offset_from_rsp_in_words) {
3026   assert(offset_from_rsp_in_words >= 0, "invalid offset from rsp");
3027   int offset_from_rsp_in_bytes = offset_from_rsp_in_words * BytesPerWord;
3028   assert(offset_from_rsp_in_bytes < frame_map()->reserved_argument_area_size(), "invalid offset");
3029   __ mov_metadata(Address(rsp, offset_from_rsp_in_bytes), m);
3030 }
3031 
3032 
3033 // This code replaces a call to arraycopy; no exception may
3034 // be thrown in this code, they must be thrown in the System.arraycopy
3035 // activation frame; we could save some checks if this would not be the case
3036 void LIR_Assembler::emit_arraycopy(LIR_OpArrayCopy* op) {
3037   ciArrayKlass* default_type = op->expected_type();
3038   Register src = op->src()->as_register();
3039   Register dst = op->dst()->as_register();
3040   Register src_pos = op->src_pos()->as_register();
3041   Register dst_pos = op->dst_pos()->as_register();
3042   Register length  = op->length()->as_register();
3043   Register tmp = op->tmp()->as_register();
3044 
3045   __ resolve_for_read(IN_HEAP, src);
3046   __ resolve_for_write(IN_HEAP, dst);
3047 
3048   CodeStub* stub = op->stub();
3049   int flags = op->flags();
3050   BasicType basic_type = default_type != NULL ? default_type->element_type()->basic_type() : T_ILLEGAL;
3051   if (basic_type == T_ARRAY) basic_type = T_OBJECT;
3052 
3053   // if we don't know anything, just go through the generic arraycopy
3054   if (default_type == NULL) {
3055     Label done;
3056     // save outgoing arguments on stack in case call to System.arraycopy is needed
3057     // HACK ALERT. This code used to push the parameters in a hardwired fashion
3058     // for interpreter calling conventions. Now we have to do it in new style conventions.
3059     // For the moment until C1 gets the new register allocator I just force all the
3060     // args to the right place (except the register args) and then on the back side
3061     // reload the register args properly if we go slow path. Yuck
3062 
3063     // These are proper for the calling convention
3064     store_parameter(length, 2);
3065     store_parameter(dst_pos, 1);
3066     store_parameter(dst, 0);
3067 


3466 
3467   __ lea(res, ExternalAddress(StubRoutines::crc_table_addr()));
3468   __ notl(crc); // ~crc
3469   __ update_byte_crc32(crc, val, res);
3470   __ notl(crc); // ~crc
3471   __ mov(res, crc);
3472 }
3473 
3474 void LIR_Assembler::emit_lock(LIR_OpLock* op) {
3475   Register obj = op->obj_opr()->as_register();  // may not be an oop
3476   Register hdr = op->hdr_opr()->as_register();
3477   Register lock = op->lock_opr()->as_register();
3478   if (!UseFastLocking) {
3479     __ jmp(*op->stub()->entry());
3480   } else if (op->code() == lir_lock) {
3481     Register scratch = noreg;
3482     if (UseBiasedLocking) {
3483       scratch = op->scratch_opr()->as_register();
3484     }
3485     assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
3486     __ resolve_for_write(IN_HEAP, obj);
3487     // add debug info for NullPointerException only if one is possible
3488     int null_check_offset = __ lock_object(hdr, obj, lock, scratch, *op->stub()->entry());
3489     if (op->info() != NULL) {
3490       add_debug_info_for_null_check(null_check_offset, op->info());
3491     }
3492     // done
3493   } else if (op->code() == lir_unlock) {
3494     assert(BasicLock::displaced_header_offset_in_bytes() == 0, "lock_reg must point to the displaced header");
3495     __ unlock_object(hdr, obj, lock, *op->stub()->entry());
3496   } else {
3497     Unimplemented();
3498   }
3499   __ bind(*op->stub()->continuation());
3500 }
3501 
3502 
3503 void LIR_Assembler::emit_profile_call(LIR_OpProfileCall* op) {
3504   ciMethod* method = op->profiled_method();
3505   int bci          = op->profiled_bci();
3506   ciMethod* callee = op->profiled_callee();


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