1 /*
   2  * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Defs.hpp"
  27 #include "c1/c1_LIRGenerator.hpp"
  28 #include "gc/shared/c1/barrierSetC1.hpp"
  29 #include "utilities/macros.hpp"
  30 
  31 #ifndef PATCHED_ADDR
  32 #define PATCHED_ADDR  (max_jint)
  33 #endif
  34 
  35 #ifdef ASSERT
  36 #define __ gen->lir(__FILE__, __LINE__)->
  37 #else
  38 #define __ gen->lir()->
  39 #endif
  40 
  41 LIR_Opr BarrierSetC1::resolve_address(LIRAccess& access, bool resolve_in_register) {
  42   DecoratorSet decorators = access.decorators();
  43   bool is_array = (decorators & IS_ARRAY) != 0;
  44   bool needs_patching = (decorators & C1_NEEDS_PATCHING) != 0;
  45 
  46   LIR_Opr base;
  47   if (access.base().opr() != NULL) {
  48     base = access.base().opr();
  49   } else {
  50     base = access.base().item().result();
  51   }
  52   LIR_Opr offset = access.offset().opr();
  53   LIRGenerator *gen = access.gen();
  54 
  55   LIR_Opr addr_opr;
  56   if (is_array) {
  57     addr_opr = LIR_OprFact::address(gen->emit_array_address(base, offset, access.type()));
  58   } else if (needs_patching) {
  59     // we need to patch the offset in the instruction so don't allow
  60     // generate_address to try to be smart about emitting the -1.
  61     // Otherwise the patching code won't know how to find the
  62     // instruction to patch.
  63     addr_opr = LIR_OprFact::address(new LIR_Address(base, PATCHED_ADDR, access.type()));
  64   } else {
  65     addr_opr = LIR_OprFact::address(gen->generate_address(base, offset, 0, 0, access.type()));
  66   }
  67 
  68   if (resolve_in_register) {
  69     LIR_Opr resolved_addr = gen->new_pointer_register();
  70     __ leal(addr_opr, resolved_addr);
  71     resolved_addr = LIR_OprFact::address(new LIR_Address(resolved_addr, access.type()));
  72     return resolved_addr;
  73   } else {
  74     return addr_opr;
  75   }
  76 }
  77 
  78 void BarrierSetC1::store_at(LIRAccess& access, LIR_Opr value) {
  79   DecoratorSet decorators = access.decorators();
  80   bool in_heap = (decorators & IN_HEAP) != 0;
  81   assert(in_heap, "not supported yet");
  82 
  83   LIR_Opr resolved = resolve_address(access, false);
  84   access.set_resolved_addr(resolved);
  85   store_at_resolved(access, value);
  86 }
  87 
  88 void BarrierSetC1::load_at(LIRAccess& access, LIR_Opr result) {
  89   DecoratorSet decorators = access.decorators();
  90   bool in_heap = (decorators & IN_HEAP) != 0;
  91   assert(in_heap, "not supported yet");
  92 
  93   LIR_Opr resolved = resolve_address(access, false);
  94   access.set_resolved_addr(resolved);
  95   load_at_resolved(access, result);
  96 }
  97 
  98 LIR_Opr BarrierSetC1::atomic_cmpxchg_at(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
  99   DecoratorSet decorators = access.decorators();
 100   bool in_heap = (decorators & IN_HEAP) != 0;
 101   assert(in_heap, "not supported yet");
 102 
 103   access.load_address();
 104 
 105   LIR_Opr resolved = resolve_address(access, true);
 106   access.set_resolved_addr(resolved);
 107   return atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
 108 }
 109 
 110 LIR_Opr BarrierSetC1::atomic_xchg_at(LIRAccess& access, LIRItem& value) {
 111   DecoratorSet decorators = access.decorators();
 112   bool in_heap = (decorators & IN_HEAP) != 0;
 113   assert(in_heap, "not supported yet");
 114 
 115   access.load_address();
 116 
 117   LIR_Opr resolved = resolve_address(access, true);
 118   access.set_resolved_addr(resolved);
 119   return atomic_xchg_at_resolved(access, value);
 120 }
 121 
 122 LIR_Opr BarrierSetC1::atomic_add_at(LIRAccess& access, LIRItem& value) {
 123   DecoratorSet decorators = access.decorators();
 124   bool in_heap = (decorators & IN_HEAP) != 0;
 125   assert(in_heap, "not supported yet");
 126 
 127   access.load_address();
 128 
 129   LIR_Opr resolved = resolve_address(access, true);
 130   access.set_resolved_addr(resolved);
 131   return atomic_add_at_resolved(access, value);
 132 }
 133 
 134 void BarrierSetC1::store_at_resolved(LIRAccess& access, LIR_Opr value) {
 135   DecoratorSet decorators = access.decorators();
 136   bool is_volatile = (((decorators & MO_SEQ_CST) != 0) || AlwaysAtomicAccesses) && os::is_MP();
 137   bool needs_patching = (decorators & C1_NEEDS_PATCHING) != 0;
 138   bool mask_boolean = (decorators & C1_MASK_BOOLEAN) != 0;
 139   LIRGenerator* gen = access.gen();
 140 
 141   if (mask_boolean) {
 142     value = gen->mask_boolean(access.base().opr(), value, access.access_emit_info());
 143   }
 144 
 145   if (is_volatile && os::is_MP()) {
 146     __ membar_release();
 147   }
 148 
 149   LIR_PatchCode patch_code = needs_patching ? lir_patch_normal : lir_patch_none;
 150   if (is_volatile && !needs_patching) {
 151     gen->volatile_field_store(value, access.resolved_addr()->as_address_ptr(), access.access_emit_info());
 152   } else {
 153     __ store(value, access.resolved_addr()->as_address_ptr(), access.access_emit_info(), patch_code);
 154   }
 155 
 156   if (is_volatile && !support_IRIW_for_not_multiple_copy_atomic_cpu) {
 157     __ membar();
 158   }
 159 }
 160 
 161 void BarrierSetC1::load_at_resolved(LIRAccess& access, LIR_Opr result) {
 162   LIRGenerator *gen = access.gen();
 163   DecoratorSet decorators = access.decorators();
 164   bool is_volatile = (((decorators & MO_SEQ_CST) != 0) || AlwaysAtomicAccesses) && os::is_MP();
 165   bool needs_patching = (decorators & C1_NEEDS_PATCHING) != 0;
 166   bool mask_boolean = (decorators & C1_MASK_BOOLEAN) != 0;
 167 
 168   if (support_IRIW_for_not_multiple_copy_atomic_cpu && is_volatile) {
 169     __ membar();
 170   }
 171 
 172   LIR_PatchCode patch_code = needs_patching ? lir_patch_normal : lir_patch_none;
 173   if (is_volatile && !needs_patching) {
 174     gen->volatile_field_load(access.resolved_addr()->as_address_ptr(), result, access.access_emit_info());
 175   } else {
 176     __ load(access.resolved_addr()->as_address_ptr(), result, access.access_emit_info(), patch_code);
 177   }
 178 
 179   if (is_volatile && os::is_MP()) {
 180     __ membar_acquire();
 181   }
 182 
 183   /* Normalize boolean value returned by unsafe operation, i.e., value  != 0 ? value = true : value false. */
 184   if (mask_boolean) {
 185     LabelObj* equalZeroLabel = new LabelObj();
 186     __ cmp(lir_cond_equal, result, 0);
 187     __ branch(lir_cond_equal, T_BOOLEAN, equalZeroLabel->label());
 188     __ move(LIR_OprFact::intConst(1), result);
 189     __ branch_destination(equalZeroLabel->label());
 190   }
 191 }
 192 
 193 LIR_Opr BarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
 194   LIRGenerator *gen = access.gen();
 195   return gen->atomic_cmpxchg(access.type(), access.resolved_addr(), cmp_value, new_value);
 196 }
 197 
 198 LIR_Opr BarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
 199   LIRGenerator *gen = access.gen();
 200   return gen->atomic_xchg(access.type(), access.resolved_addr(), value);
 201 }
 202 
 203 LIR_Opr BarrierSetC1::atomic_add_at_resolved(LIRAccess& access, LIRItem& value) {
 204   LIRGenerator *gen = access.gen();
 205   return gen->atomic_add(access.type(), access.resolved_addr(), value);
 206 }
 207 
 208 void BarrierSetC1::generate_referent_check(LIRAccess& access, LabelObj* cont) {
 209   // We might be reading the value of the referent field of a
 210   // Reference object in order to attach it back to the live
 211   // object graph. If G1 is enabled then we need to record
 212   // the value that is being returned in an SATB log buffer.
 213   //
 214   // We need to generate code similar to the following...
 215   //
 216   // if (offset == java_lang_ref_Reference::referent_offset) {
 217   //   if (src != NULL) {
 218   //     if (klass(src)->reference_type() != REF_NONE) {
 219   //       pre_barrier(..., value, ...);
 220   //     }
 221   //   }
 222   // }
 223 
 224   bool gen_pre_barrier = true;     // Assume we need to generate pre_barrier.
 225   bool gen_offset_check = true;    // Assume we need to generate the offset guard.
 226   bool gen_source_check = true;    // Assume we need to check the src object for null.
 227   bool gen_type_check = true;      // Assume we need to check the reference_type.
 228 
 229   LIRGenerator *gen = access.gen();
 230 
 231   LIRItem& base = access.base().item();
 232   LIR_Opr offset = access.offset().opr();
 233 
 234   if (offset->is_constant()) {
 235     LIR_Const* constant = offset->as_constant_ptr();
 236     jlong off_con = (constant->type() == T_INT ?
 237                      (jlong)constant->as_jint() :
 238                      constant->as_jlong());
 239 
 240 
 241     if (off_con != (jlong) java_lang_ref_Reference::referent_offset) {
 242       // The constant offset is something other than referent_offset.
 243       // We can skip generating/checking the remaining guards and
 244       // skip generation of the code stub.
 245       gen_pre_barrier = false;
 246     } else {
 247       // The constant offset is the same as referent_offset -
 248       // we do not need to generate a runtime offset check.
 249       gen_offset_check = false;
 250     }
 251   }
 252 
 253   // We don't need to generate stub if the source object is an array
 254   if (gen_pre_barrier && base.type()->is_array()) {
 255     gen_pre_barrier = false;
 256   }
 257 
 258   if (gen_pre_barrier) {
 259     // We still need to continue with the checks.
 260     if (base.is_constant()) {
 261       ciObject* src_con = base.get_jobject_constant();
 262       guarantee(src_con != NULL, "no source constant");
 263 
 264       if (src_con->is_null_object()) {
 265         // The constant src object is null - We can skip
 266         // generating the code stub.
 267         gen_pre_barrier = false;
 268       } else {
 269         // Non-null constant source object. We still have to generate
 270         // the slow stub - but we don't need to generate the runtime
 271         // null object check.
 272         gen_source_check = false;
 273       }
 274     }
 275   }
 276   if (gen_pre_barrier && !PatchALot) {
 277     // Can the klass of object be statically determined to be
 278     // a sub-class of Reference?
 279     ciType* type = base.value()->declared_type();
 280     if ((type != NULL) && type->is_loaded()) {
 281       if (type->is_subtype_of(gen->compilation()->env()->Reference_klass())) {
 282         gen_type_check = false;
 283       } else if (type->is_klass() &&
 284                  !gen->compilation()->env()->Object_klass()->is_subtype_of(type->as_klass())) {
 285         // Not Reference and not Object klass.
 286         gen_pre_barrier = false;
 287       }
 288     }
 289   }
 290 
 291   if (gen_pre_barrier) {
 292     // We can have generate one runtime check here. Let's start with
 293     // the offset check.
 294     // Allocate temp register to base and load it here, otherwise
 295     // control flow below may confuse register allocator.
 296     LIR_Opr base_reg = gen->new_register(T_OBJECT);
 297     __ move(base.result(), base_reg);
 298     if (gen_offset_check) {
 299       // if (offset != referent_offset) -> continue
 300       // If offset is an int then we can do the comparison with the
 301       // referent_offset constant; otherwise we need to move
 302       // referent_offset into a temporary register and generate
 303       // a reg-reg compare.
 304 
 305       LIR_Opr referent_off;
 306 
 307       if (offset->type() == T_INT) {
 308         referent_off = LIR_OprFact::intConst(java_lang_ref_Reference::referent_offset);
 309       } else {
 310         assert(offset->type() == T_LONG, "what else?");
 311         referent_off = gen->new_register(T_LONG);
 312         __ move(LIR_OprFact::longConst(java_lang_ref_Reference::referent_offset), referent_off);
 313       }
 314       __ cmp(lir_cond_notEqual, offset, referent_off);
 315       __ branch(lir_cond_notEqual, offset->type(), cont->label());
 316     }
 317     if (gen_source_check) {
 318       // offset is a const and equals referent offset
 319       // if (source == null) -> continue
 320       __ cmp(lir_cond_equal, base_reg, LIR_OprFact::oopConst(NULL));
 321       __ branch(lir_cond_equal, T_OBJECT, cont->label());
 322     }
 323     LIR_Opr src_klass = gen->new_register(T_OBJECT);
 324     if (gen_type_check) {
 325       // We have determined that offset == referent_offset && src != null.
 326       // if (src->_klass->_reference_type == REF_NONE) -> continue
 327       __ move(new LIR_Address(base_reg, oopDesc::klass_offset_in_bytes(), T_ADDRESS), src_klass);
 328       LIR_Address* reference_type_addr = new LIR_Address(src_klass, in_bytes(InstanceKlass::reference_type_offset()), T_BYTE);
 329       LIR_Opr reference_type = gen->new_register(T_INT);
 330       __ move(reference_type_addr, reference_type);
 331       __ cmp(lir_cond_equal, reference_type, LIR_OprFact::intConst(REF_NONE));
 332       __ branch(lir_cond_equal, T_INT, cont->label());
 333     }
 334   }
 335 }
 336 
 337 LIR_Opr BarrierSetC1::resolve_for_read(LIRAccess& access) {
 338   return access.base().opr();
 339 }
 340 
 341 LIR_Opr BarrierSetC1::resolve_for_write(LIRAccess& access) {
 342   return access.base().opr();
 343 }