1 /*
   2  * Copyright (c) 2018, Red Hat, Inc. All rights reserved.
   3  *
   4  * This code is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License version 2 only, as
   6  * published by the Free Software Foundation.
   7  *
   8  * This code is distributed in the hope that it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11  * version 2 for more details (a copy is included in the LICENSE file that
  12  * accompanied this code).
  13  *
  14  * You should have received a copy of the GNU General Public License version
  15  * 2 along with this work; if not, write to the Free Software Foundation,
  16  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  19  * or visit www.oracle.com if you need additional information or have any
  20  * questions.
  21  *
  22  */
  23 
  24 #ifndef CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP
  25 #define CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP
  26 
  27 #include "asm/macroAssembler.hpp"
  28 #include "gc/shared/barrierSetAssembler.hpp"
  29 #ifdef COMPILER1
  30 class LIR_Assembler;
  31 class ShenandoahPreBarrierStub;
  32 class ShenandoahLoadReferenceBarrierStub;
  33 class StubAssembler;
  34 #endif
  35 class StubCodeGenerator;
  36 
  37 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
  38 private:
  39 
  40   static address _shenandoah_lrb;
  41 
  42   void satb_write_barrier_pre(MacroAssembler* masm,
  43                               Register obj,
  44                               Register pre_val,
  45                               Register thread,
  46                               Register tmp,
  47                               bool tosca_live,
  48                               bool expand_call);
  49   void shenandoah_write_barrier_pre(MacroAssembler* masm,
  50                                     Register obj,
  51                                     Register pre_val,
  52                                     Register thread,
  53                                     Register tmp,
  54                                     bool tosca_live,
  55                                     bool expand_call);
  56 
  57   void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
  58   void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
  59   void load_reference_barrier(MacroAssembler* masm, Register dst, Register tmp);
  60   void load_reference_barrier_not_null(MacroAssembler* masm, Register dst, Register tmp);
  61 
  62   address generate_shenandoah_lrb(StubCodeGenerator* cgen);
  63 
  64 public:
  65   static address shenandoah_lrb();
  66 
  67   void storeval_barrier(MacroAssembler* masm, Register dst, Register tmp);
  68 
  69 #ifdef COMPILER1
  70   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
  71   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
  72   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
  73 #endif
  74 
  75   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
  76                                   Register addr, Register count, RegSet saved_regs);
  77   virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
  78                                   Register start, Register count, Register tmp, RegSet saved_regs);
  79   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  80                        Register dst, Address src, Register tmp1, Register tmp_thread);
  81   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  82                         Address dst, Register val, Register tmp1, Register tmp2);
  83   virtual void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
  84                            bool acquire, bool release, bool weak, bool is_cae, Register result);
  85 
  86   virtual void barrier_stubs_init();
  87 };
  88 
  89 #endif // CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP