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src/hotspot/cpu/x86/c1_LIRGenerator_x86.cpp

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  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "gc/shared/c1/barrierSetC1.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"

  39 #include "vmreg_x86.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 // Item will be loaded into a byte register; Intel only
  48 void LIRItem::load_byte_item() {
  49   load_item();
  50   LIR_Opr res = result();
  51 
  52   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  53     // make sure that it is a byte register
  54     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  55            "can't load floats in byte register");
  56     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  57     __ move(res, reg);
  58 


 657   }
 658   left.load_item();
 659   right.load_item();
 660   LIR_Opr reg = rlock_result(x);
 661 
 662   if (x->x()->type()->is_float_kind()) {
 663     Bytecodes::Code code = x->op();
 664     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 665   } else if (x->x()->type()->tag() == longTag) {
 666     __ lcmp2int(left.result(), right.result(), reg);
 667   } else {
 668     Unimplemented();
 669   }
 670 }
 671 
 672 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 673   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 674   if (type == T_OBJECT || type == T_ARRAY) {
 675     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 676     new_value.load_item();





 677     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 678   } else if (type == T_INT) {
 679     cmp_value.load_item_force(FrameMap::rax_opr);
 680     new_value.load_item();
 681     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 682   } else if (type == T_LONG) {
 683     cmp_value.load_item_force(FrameMap::long0_opr);
 684     new_value.load_item_force(FrameMap::long1_opr);
 685     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 686   } else {
 687     Unimplemented();
 688   }
 689   LIR_Opr result = new_register(T_INT);
 690   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 691            result, type);
 692   return result;
 693 }
 694 
 695 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 696   bool is_oop = type == T_OBJECT || type == T_ARRAY;
 697   LIR_Opr result = new_register(type);
 698   value.load_item();
 699   // Because we want a 2-arg form of xchg and xadd
 700   __ move(value.result(), result);
 701   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");






 702   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 703   return result;
 704 }
 705 
 706 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 707   LIR_Opr result = new_register(type);
 708   value.load_item();
 709   // Because we want a 2-arg form of xchg and xadd
 710   __ move(value.result(), result);
 711   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 712   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 713   return result;
 714 }
 715 
 716 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 717   assert(x->number_of_arguments() == 3, "wrong type");
 718   assert(UseFMA, "Needs FMA instructions support.");
 719   LIRItem value(x->argument_at(0), this);
 720   LIRItem value1(x->argument_at(1), this);
 721   LIRItem value2(x->argument_at(2), this);




  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "gc/shared/c1/barrierSetC1.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "utilities/macros.hpp"
  40 #include "vmreg_x86.inline.hpp"
  41 
  42 #ifdef ASSERT
  43 #define __ gen()->lir(__FILE__, __LINE__)->
  44 #else
  45 #define __ gen()->lir()->
  46 #endif
  47 
  48 // Item will be loaded into a byte register; Intel only
  49 void LIRItem::load_byte_item() {
  50   load_item();
  51   LIR_Opr res = result();
  52 
  53   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  54     // make sure that it is a byte register
  55     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  56            "can't load floats in byte register");
  57     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  58     __ move(res, reg);
  59 


 658   }
 659   left.load_item();
 660   right.load_item();
 661   LIR_Opr reg = rlock_result(x);
 662 
 663   if (x->x()->type()->is_float_kind()) {
 664     Bytecodes::Code code = x->op();
 665     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 666   } else if (x->x()->type()->tag() == longTag) {
 667     __ lcmp2int(left.result(), right.result(), reg);
 668   } else {
 669     Unimplemented();
 670   }
 671 }
 672 
 673 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
 674   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 675   if (type == T_OBJECT || type == T_ARRAY) {
 676     cmp_value.load_item_force(FrameMap::rax_oop_opr);
 677     new_value.load_item();
 678 #if INCLUDE_SHENANDOAHGC
 679     if (UseShenandoahGC) {
 680       __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), new_register(T_OBJECT), new_register(T_OBJECT));
 681     } else
 682 #endif
 683     __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 684   } else if (type == T_INT) {
 685     cmp_value.load_item_force(FrameMap::rax_opr);
 686     new_value.load_item();
 687     __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 688   } else if (type == T_LONG) {
 689     cmp_value.load_item_force(FrameMap::long0_opr);
 690     new_value.load_item_force(FrameMap::long1_opr);
 691     __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
 692   } else {
 693     Unimplemented();
 694   }
 695   LIR_Opr result = new_register(T_INT);
 696   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 697            result, type);
 698   return result;
 699 }
 700 
 701 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
 702   bool is_oop = type == T_OBJECT || type == T_ARRAY;
 703   LIR_Opr result = new_register(type);
 704   value.load_item();
 705   // Because we want a 2-arg form of xchg and xadd
 706   __ move(value.result(), result);
 707   assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
 708 #if INCLUDE_SHENANDOAHGC
 709   if (UseShenandoahGC) {
 710     LIR_Opr tmp = is_oop ? new_register(type) : LIR_OprFact::illegalOpr;
 711     __ xchg(addr, result, result, tmp);
 712   } else
 713 #endif
 714   __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
 715   return result;
 716 }
 717 
 718 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
 719   LIR_Opr result = new_register(type);
 720   value.load_item();
 721   // Because we want a 2-arg form of xchg and xadd
 722   __ move(value.result(), result);
 723   assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
 724   __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
 725   return result;
 726 }
 727 
 728 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
 729   assert(x->number_of_arguments() == 3, "wrong type");
 730   assert(UseFMA, "Needs FMA instructions support.");
 731   LIRItem value(x->argument_at(0), this);
 732   LIRItem value1(x->argument_at(1), this);
 733   LIRItem value2(x->argument_at(2), this);


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