1 /*
2 * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
3 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP
27 #define CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP
28
29 #include "asm/macroAssembler.hpp"
30 #include "gc/shared/barrierSetAssembler.hpp"
31 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
32 #ifdef COMPILER1
33 class LIR_Assembler;
34 class ShenandoahPreBarrierStub;
35 class ShenandoahLoadReferenceBarrierStub;
36 class StubAssembler;
37 #endif
38 class StubCodeGenerator;
39
40 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
41 private:
42
43 void satb_write_barrier_pre(MacroAssembler* masm,
44 Register obj,
45 Register pre_val,
46 Register thread,
47 Register tmp1,
48 Register tmp2,
49 bool tosca_live,
50 bool expand_call);
51 void shenandoah_write_barrier_pre(MacroAssembler* masm,
52 Register obj,
53 Register pre_val,
54 Register thread,
55 Register tmp,
56 bool tosca_live,
57 bool expand_call);
58
59 void store_check(MacroAssembler* masm, Register obj);
60
61 void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
62 void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
63 void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators);
64
65 void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
66 Register start, Register count,
67 Register scratch, RegSet saved_regs);
68
69 public:
70
71 void iu_barrier(MacroAssembler* masm, Register dst, Register tmp);
72
73 virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_data_patch; }
74
75 #ifdef COMPILER1
76 void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
77 void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
78 void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
79 void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
80 #endif
81
82 virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
83 Register src, Register dst, Register count, RegSet saved_regs);
84 virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
85 Register start, Register count, Register tmp, RegSet saved_regs);
86 virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
87 Register dst, Address src, Register tmp1, Register tmp2);
88 virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
89 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
90 virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
91 Register obj, Register tmp, Label& slowpath);
92 void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
93 bool acquire, bool release, bool is_cae, Register result);
94 };
95
96 #endif // CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP