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src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp

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 293 // the arguments at all. Since we control the java ABI we ought to at
 294 // least get some advantage out of it.
 295 
 296 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 297                                            VMRegPair *regs,
 298                                            int total_args_passed) {
 299 
 300   // Create the mapping between argument positions and
 301   // registers.
 302   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 303     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
 304   };
 305   static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 306     j_farg0, j_farg1, j_farg2, j_farg3,
 307     j_farg4, j_farg5, j_farg6, j_farg7
 308   };
 309 
 310 
 311   uint int_args = 0;
 312   uint fp_args = 0;
 313   uint stk_args = 0; // inc by 2 each time
 314 
 315   for (int i = 0; i < total_args_passed; i++) {
 316     switch (sig_bt[i]) {
 317     case T_BOOLEAN:
 318     case T_CHAR:
 319     case T_BYTE:
 320     case T_SHORT:
 321     case T_INT:
 322       if (int_args < Argument::n_int_register_parameters_j) {
 323         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 324       } else {

 325         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 326         stk_args += 2;
 327       }
 328       break;
 329     case T_VOID:
 330       // halves of T_LONG or T_DOUBLE
 331       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 332       regs[i].set_bad();
 333       break;
 334     case T_LONG:
 335       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 336       // fall through
 337     case T_OBJECT:
 338     case T_ARRAY:
 339     case T_ADDRESS:
 340       if (int_args < Argument::n_int_register_parameters_j) {
 341         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 342       } else {

 343         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 344         stk_args += 2;
 345       }
 346       break;
 347     case T_FLOAT:
 348       if (fp_args < Argument::n_float_register_parameters_j) {
 349         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 350       } else {

 351         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 352         stk_args += 2;
 353       }
 354       break;
 355     case T_DOUBLE:
 356       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 357       if (fp_args < Argument::n_float_register_parameters_j) {
 358         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 359       } else {

 360         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 361         stk_args += 2;
 362       }
 363       break;
 364     default:
 365       ShouldNotReachHere();
 366       break;
 367     }
 368   }
 369 
 370   return align_up(stk_args, 2);
 371 }
 372 
 373 // Patch the callers callsite with entry to compiled code if it exists.
 374 static void patch_callers_callsite(MacroAssembler *masm) {
 375   Label L;
 376   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
 377   __ cbz(rscratch1, L);
 378 
 379   __ enter();
 380   __ push_CPU_state();
 381 
 382   // VM needs caller's callsite
 383   // VM needs target method
 384   // This needs to be a long call since we will relocate this adapter to
 385   // the codeBuffer and it may not reach
 386 
 387 #ifndef PRODUCT
 388   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
 389 #endif
 390 

 293 // the arguments at all. Since we control the java ABI we ought to at
 294 // least get some advantage out of it.
 295 
 296 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 297                                            VMRegPair *regs,
 298                                            int total_args_passed) {
 299 
 300   // Create the mapping between argument positions and
 301   // registers.
 302   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 303     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
 304   };
 305   static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 306     j_farg0, j_farg1, j_farg2, j_farg3,
 307     j_farg4, j_farg5, j_farg6, j_farg7
 308   };
 309 
 310 
 311   uint int_args = 0;
 312   uint fp_args = 0;
 313   uint stk_args = 0;
 314 
 315   for (int i = 0; i < total_args_passed; i++) {
 316     switch (sig_bt[i]) {
 317     case T_BOOLEAN:
 318     case T_CHAR:
 319     case T_BYTE:
 320     case T_SHORT:
 321     case T_INT:
 322       if (int_args < Argument::n_int_register_parameters_j) {
 323         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 324       } else {
 325         stk_args = align_up(stk_args, 2);
 326         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 327         stk_args += 1;
 328       }
 329       break;
 330     case T_VOID:
 331       // halves of T_LONG or T_DOUBLE
 332       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 333       regs[i].set_bad();
 334       break;
 335     case T_LONG:
 336       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 337       // fall through
 338     case T_OBJECT:
 339     case T_ARRAY:
 340     case T_ADDRESS:
 341       if (int_args < Argument::n_int_register_parameters_j) {
 342         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 343       } else {
 344         stk_args = align_up(stk_args, 2);
 345         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 346         stk_args += 2;
 347       }
 348       break;
 349     case T_FLOAT:
 350       if (fp_args < Argument::n_float_register_parameters_j) {
 351         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 352       } else {
 353         stk_args = align_up(stk_args, 2);
 354         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 355         stk_args += 1;
 356       }
 357       break;
 358     case T_DOUBLE:
 359       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 360       if (fp_args < Argument::n_float_register_parameters_j) {
 361         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 362       } else {
 363         stk_args = align_up(stk_args, 2);
 364         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 365         stk_args += 2;
 366       }
 367       break;
 368     default:
 369       ShouldNotReachHere();
 370       break;
 371     }
 372   }
 373 
 374   return stk_args;
 375 }
 376 
 377 // Patch the callers callsite with entry to compiled code if it exists.
 378 static void patch_callers_callsite(MacroAssembler *masm) {
 379   Label L;
 380   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
 381   __ cbz(rscratch1, L);
 382 
 383   __ enter();
 384   __ push_CPU_state();
 385 
 386   // VM needs caller's callsite
 387   // VM needs target method
 388   // This needs to be a long call since we will relocate this adapter to
 389   // the codeBuffer and it may not reach
 390 
 391 #ifndef PRODUCT
 392   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
 393 #endif
 394 
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