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src/hotspot/cpu/aarch64/vm_version_aarch64.hpp

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 93     CPU_ARM       = 'A',
 94     CPU_BROADCOM  = 'B',
 95     CPU_CAVIUM    = 'C',
 96     CPU_DEC       = 'D',
 97     CPU_HISILICON = 'H',
 98     CPU_INFINEON  = 'I',
 99     CPU_MOTOROLA  = 'M',
100     CPU_NVIDIA    = 'N',
101     CPU_AMCC      = 'P',
102     CPU_QUALCOM   = 'Q',
103     CPU_MARVELL   = 'V',
104     CPU_INTEL     = 'i',
105     CPU_APPLE     = 'a',
106   };
107 
108 enum Ampere_CPU_Model {
109     CPU_MODEL_EMAG      = 0x0,   /* CPU implementer is CPU_AMCC */
110     CPU_MODEL_ALTRA     = 0xd0c, /* CPU implementer is CPU_ARM, Neoverse N1 */
111     CPU_MODEL_ALTRAMAX  = 0xd0c, /* CPU implementer is CPU_ARM, Neoverse N1 */
112     CPU_MODEL_AMPERE_1  = 0xac3, /* CPU implementer is CPU_AMPERE */
113     CPU_MODEL_AMPERE_1A = 0xac4  /* CPU implementer is CPU_AMPERE */

114 };
115 
116 #define CPU_FEATURE_FLAGS(decl)               \
117     decl(FP,            fp,            0)     \
118     decl(ASIMD,         asimd,         1)     \
119     decl(EVTSTRM,       evtstrm,       2)     \
120     decl(AES,           aes,           3)     \
121     decl(PMULL,         pmull,         4)     \
122     decl(SHA1,          sha1,          5)     \
123     decl(SHA2,          sha256,        6)     \
124     decl(CRC32,         crc32,         7)     \
125     decl(LSE,           lse,           8)     \
126     decl(DCPOP,         dcpop,         16)    \
127     decl(SHA3,          sha3,          17)    \
128     decl(SHA512,        sha512,        21)    \
129     decl(SVE,           sve,           22)    \
130     decl(PACA,          paca,          30)    \
131     /* flags above must follow Linux HWCAP */ \
132     decl(SVEBITPERM,    svebitperm,    27)    \
133     decl(SVE2,          sve2,          28)    \

 93     CPU_ARM       = 'A',
 94     CPU_BROADCOM  = 'B',
 95     CPU_CAVIUM    = 'C',
 96     CPU_DEC       = 'D',
 97     CPU_HISILICON = 'H',
 98     CPU_INFINEON  = 'I',
 99     CPU_MOTOROLA  = 'M',
100     CPU_NVIDIA    = 'N',
101     CPU_AMCC      = 'P',
102     CPU_QUALCOM   = 'Q',
103     CPU_MARVELL   = 'V',
104     CPU_INTEL     = 'i',
105     CPU_APPLE     = 'a',
106   };
107 
108 enum Ampere_CPU_Model {
109     CPU_MODEL_EMAG      = 0x0,   /* CPU implementer is CPU_AMCC */
110     CPU_MODEL_ALTRA     = 0xd0c, /* CPU implementer is CPU_ARM, Neoverse N1 */
111     CPU_MODEL_ALTRAMAX  = 0xd0c, /* CPU implementer is CPU_ARM, Neoverse N1 */
112     CPU_MODEL_AMPERE_1  = 0xac3, /* CPU implementer is CPU_AMPERE */
113     CPU_MODEL_AMPERE_1A = 0xac4, /* CPU implementer is CPU_AMPERE */
114     CPU_MODEL_AMPERE_1B = 0xac5  /* AMPERE_1B core Implements ARMv8.7 with CSSC, MTE, SM3/SM4 extensions */
115 };
116 
117 #define CPU_FEATURE_FLAGS(decl)               \
118     decl(FP,            fp,            0)     \
119     decl(ASIMD,         asimd,         1)     \
120     decl(EVTSTRM,       evtstrm,       2)     \
121     decl(AES,           aes,           3)     \
122     decl(PMULL,         pmull,         4)     \
123     decl(SHA1,          sha1,          5)     \
124     decl(SHA2,          sha256,        6)     \
125     decl(CRC32,         crc32,         7)     \
126     decl(LSE,           lse,           8)     \
127     decl(DCPOP,         dcpop,         16)    \
128     decl(SHA3,          sha3,          17)    \
129     decl(SHA512,        sha512,        21)    \
130     decl(SVE,           sve,           22)    \
131     decl(PACA,          paca,          30)    \
132     /* flags above must follow Linux HWCAP */ \
133     decl(SVEBITPERM,    svebitperm,    27)    \
134     decl(SVE2,          sve2,          28)    \
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