src/hotspot/cpu/ppc/gc/shenandoah/c1/shenandoahBarrierSetC1_ppc.cpp

@@ -41,15 +41,10 @@
    Register cmp_val = _cmp_value->as_register();
    Register tmp1 = _tmp1->as_register();
    Register tmp2 = _tmp2->as_register();
    Register result = result_opr()->as_register();
  
-   if (ShenandoahIUBarrier) {
-     ShenandoahBarrierSet::assembler()->iu_barrier(masm->masm(), new_val, tmp1, tmp2,
-                                                   MacroAssembler::PRESERVATION_FRAME_LR_GP_FP_REGS);
-   }
- 
    if (UseCompressedOops) {
      __ encode_heap_oop(cmp_val, cmp_val);
      __ encode_heap_oop(new_val, new_val);
    }
  

@@ -105,10 +100,14 @@
        LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
        LIR_Opr result = gen->new_register(T_INT);
  
        __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));
  
+       if (ShenandoahCardBarrier) {
+         post_barrier(access, access.resolved_addr(), new_value.result());
+       }
+ 
        return result;
      }
    }
  
    return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);

@@ -120,14 +119,10 @@
  
    LIR_Opr result = gen->new_register(type);
    value.load_item();
    LIR_Opr value_opr = value.result();
  
-   if (access.is_oop()) {
-     value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
-   }
- 
    assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
    LIR_Opr tmp_xchg = gen->new_register(T_INT);
    __ xchg(access.resolved_addr(), value_opr, result, tmp_xchg);
  
    if (access.is_oop()) {

@@ -139,9 +134,13 @@
      result = tmp_barrier;
  
      if (ShenandoahSATBBarrier) {
        pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr, result);
      }
+ 
+     if (ShenandoahCardBarrier) {
+       post_barrier(access, access.resolved_addr(), result);
+     }
    }
  
    return result;
  }