24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_LIRAssembler.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "gc/shared/gc_globals.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
31 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
32 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
33
34 #define __ masm->masm()->
35
36 void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) {
37 Register addr = _addr->as_register_lo();
38 Register newval = _new_value->as_register();
39 Register cmpval = _cmp_value->as_register();
40 Register tmp1 = _tmp1->as_register();
41 Register tmp2 = _tmp2->as_register();
42 Register result = result_opr()->as_register();
43
44 ShenandoahBarrierSet::assembler()->iu_barrier(masm->masm(), newval, t1);
45
46 if (UseCompressedOops) {
47 __ encode_heap_oop(tmp1, cmpval);
48 cmpval = tmp1;
49 __ encode_heap_oop(tmp2, newval);
50 newval = tmp2;
51 }
52
53 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), addr, cmpval, newval, /* acquire */ Assembler::aq,
54 /* release */ Assembler::rl, /* is_cae */ false, result);
55 }
56
57 #undef __
58
59 #ifdef ASSERT
60 #define __ gen->lir(__FILE__, __LINE__)->
61 #else
62 #define __ gen->lir()->
63 #endif
64
65 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
77 LIR_Opr tmp1 = gen->new_register(T_OBJECT);
78 LIR_Opr tmp2 = gen->new_register(T_OBJECT);
79 LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
80 LIR_Opr result = gen->new_register(T_INT);
81
82 __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), tmp1, tmp2, result));
83 return result;
84 }
85 }
86 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
87 }
88
89 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
90 LIRGenerator* gen = access.gen();
91 BasicType type = access.type();
92
93 LIR_Opr result = gen->new_register(type);
94 value.load_item();
95 LIR_Opr value_opr = value.result();
96
97 if (access.is_oop()) {
98 value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
99 }
100
101 assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
102 LIR_Opr tmp = gen->new_register(T_INT);
103 __ xchg(access.resolved_addr(), value_opr, result, tmp);
104
105 if (access.is_oop()) {
106 result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0), access.decorators());
107 LIR_Opr tmp_opr = gen->new_register(type);
108 __ move(result, tmp_opr);
109 result = tmp_opr;
110 if (ShenandoahSATBBarrier) {
111 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
112 result /* pre_val */);
113 }
114 }
115
116 return result;
117 }
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24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_LIRAssembler.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "gc/shared/gc_globals.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
31 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
32 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
33
34 #define __ masm->masm()->
35
36 void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) {
37 Register addr = _addr->as_register_lo();
38 Register newval = _new_value->as_register();
39 Register cmpval = _cmp_value->as_register();
40 Register tmp1 = _tmp1->as_register();
41 Register tmp2 = _tmp2->as_register();
42 Register result = result_opr()->as_register();
43
44 if (UseCompressedOops) {
45 __ encode_heap_oop(tmp1, cmpval);
46 cmpval = tmp1;
47 __ encode_heap_oop(tmp2, newval);
48 newval = tmp2;
49 }
50
51 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), addr, cmpval, newval, /* acquire */ Assembler::aq,
52 /* release */ Assembler::rl, /* is_cae */ false, result);
53 }
54
55 #undef __
56
57 #ifdef ASSERT
58 #define __ gen->lir(__FILE__, __LINE__)->
59 #else
60 #define __ gen->lir()->
61 #endif
62
63 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
75 LIR_Opr tmp1 = gen->new_register(T_OBJECT);
76 LIR_Opr tmp2 = gen->new_register(T_OBJECT);
77 LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
78 LIR_Opr result = gen->new_register(T_INT);
79
80 __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), tmp1, tmp2, result));
81 return result;
82 }
83 }
84 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
85 }
86
87 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
88 LIRGenerator* gen = access.gen();
89 BasicType type = access.type();
90
91 LIR_Opr result = gen->new_register(type);
92 value.load_item();
93 LIR_Opr value_opr = value.result();
94
95 assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
96 LIR_Opr tmp = gen->new_register(T_INT);
97 __ xchg(access.resolved_addr(), value_opr, result, tmp);
98
99 if (access.is_oop()) {
100 result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0), access.decorators());
101 LIR_Opr tmp_opr = gen->new_register(type);
102 __ move(result, tmp_opr);
103 result = tmp_opr;
104 if (ShenandoahSATBBarrier) {
105 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
106 result /* pre_val */);
107 }
108 }
109
110 return result;
111 }
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