src/hotspot/cpu/riscv/gc/shenandoah/c1/shenandoahBarrierSetC1_riscv.cpp

@@ -39,12 +39,10 @@
    Register cmpval = _cmp_value->as_register();
    Register tmp1 = _tmp1->as_register();
    Register tmp2 = _tmp2->as_register();
    Register result = result_opr()->as_register();
  
-   ShenandoahBarrierSet::assembler()->iu_barrier(masm->masm(), newval, t1);
- 
    if (UseCompressedOops) {
      __ encode_heap_oop(tmp1, cmpval);
      cmpval = tmp1;
      __ encode_heap_oop(tmp2, newval);
      newval = tmp2;

@@ -92,14 +90,10 @@
  
    LIR_Opr result = gen->new_register(type);
    value.load_item();
    LIR_Opr value_opr = value.result();
  
-   if (access.is_oop()) {
-     value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
-   }
- 
    assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
    LIR_Opr tmp = gen->new_register(T_INT);
    __ xchg(access.resolved_addr(), value_opr, result, tmp);
  
    if (access.is_oop()) {