1 /*
   2  * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "runtime/sharedRuntime.hpp"
  37 #include "runtime/stubRoutines.hpp"
  38 #include "vmreg_x86.inline.hpp"
  39 
  40 #ifdef ASSERT
  41 #define __ gen()->lir(__FILE__, __LINE__)->
  42 #else
  43 #define __ gen()->lir()->
  44 #endif
  45 
  46 #if INCLUDE_ALL_GCS
  47 #include "gc_implementation/shenandoah/c1/shenandoahBarrierSetC1.hpp"
  48 #endif
  49 
  50 // Item will be loaded into a byte register; Intel only
  51 void LIRItem::load_byte_item() {
  52   load_item();
  53   LIR_Opr res = result();
  54 
  55   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  56     // make sure that it is a byte register
  57     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  58            "can't load floats in byte register");
  59     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  60     __ move(res, reg);
  61 
  62     _result = reg;
  63   }
  64 }
  65 
  66 
  67 void LIRItem::load_nonconstant() {
  68   LIR_Opr r = value()->operand();
  69   if (r->is_constant()) {
  70     _result = r;
  71   } else {
  72     load_item();
  73   }
  74 }
  75 
  76 //--------------------------------------------------------------
  77 //               LIRGenerator
  78 //--------------------------------------------------------------
  79 
  80 
  81 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  82 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  83 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  84 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  85 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  86 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  87 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  88 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  89 
  90 
  91 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  92   LIR_Opr opr;
  93   switch (type->tag()) {
  94     case intTag:     opr = FrameMap::rax_opr;          break;
  95     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  96     case longTag:    opr = FrameMap::long0_opr;        break;
  97     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  98     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  99 
 100     case addressTag:
 101     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
 102   }
 103 
 104   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 105   return opr;
 106 }
 107 
 108 
 109 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 110   LIR_Opr reg = new_register(T_INT);
 111   set_vreg_flag(reg, LIRGenerator::byte_reg);
 112   return reg;
 113 }
 114 
 115 
 116 //--------- loading items into registers --------------------------------
 117 
 118 
 119 // i486 instructions can inline constants
 120 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 121   if (type == T_SHORT || type == T_CHAR) {
 122     // there is no immediate move of word values in asembler_i486.?pp
 123     return false;
 124   }
 125   Constant* c = v->as_Constant();
 126   if (c && c->state_before() == NULL) {
 127     // constants of any type can be stored directly, except for
 128     // unloaded object constants.
 129     return true;
 130   }
 131   return false;
 132 }
 133 
 134 
 135 bool LIRGenerator::can_inline_as_constant(Value v) const {
 136   if (v->type()->tag() == longTag) return false;
 137   return v->type()->tag() != objectTag ||
 138     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 139 }
 140 
 141 
 142 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 143   if (c->type() == T_LONG) return false;
 144   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 145 }
 146 
 147 
 148 LIR_Opr LIRGenerator::safepoint_poll_register() {
 149   return LIR_OprFact::illegalOpr;
 150 }
 151 
 152 
 153 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 154                                             int shift, int disp, BasicType type) {
 155   assert(base->is_register(), "must be");
 156   if (index->is_constant()) {
 157     return new LIR_Address(base,
 158                            (index->as_constant_ptr()->as_jint() << shift) + disp,
 159                            type);
 160   } else {
 161     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 162   }
 163 }
 164 
 165 
 166 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 167                                               BasicType type, bool needs_card_mark) {
 168   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 169 
 170   LIR_Address* addr;
 171   if (index_opr->is_constant()) {
 172     int elem_size = type2aelembytes(type);
 173     addr = new LIR_Address(array_opr,
 174                            offset_in_bytes + index_opr->as_jint() * elem_size, type);
 175   } else {
 176 #ifdef _LP64
 177     if (index_opr->type() == T_INT) {
 178       LIR_Opr tmp = new_register(T_LONG);
 179       __ convert(Bytecodes::_i2l, index_opr, tmp);
 180       index_opr = tmp;
 181     }
 182 #endif // _LP64
 183     addr =  new LIR_Address(array_opr,
 184                             index_opr,
 185                             LIR_Address::scale(type),
 186                             offset_in_bytes, type);
 187   }
 188   if (needs_card_mark) {
 189     // This store will need a precise card mark, so go ahead and
 190     // compute the full adddres instead of computing once for the
 191     // store and again for the card mark.
 192     LIR_Opr tmp = new_pointer_register();
 193     __ leal(LIR_OprFact::address(addr), tmp);
 194     return new LIR_Address(tmp, type);
 195   } else {
 196     return addr;
 197   }
 198 }
 199 
 200 
 201 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 202   LIR_Opr r = NULL;
 203   if (type == T_LONG) {
 204     r = LIR_OprFact::longConst(x);
 205   } else if (type == T_INT) {
 206     r = LIR_OprFact::intConst(x);
 207   } else {
 208     ShouldNotReachHere();
 209   }
 210   return r;
 211 }
 212 
 213 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 214   LIR_Opr pointer = new_pointer_register();
 215   __ move(LIR_OprFact::intptrConst(counter), pointer);
 216   LIR_Address* addr = new LIR_Address(pointer, type);
 217   increment_counter(addr, step);
 218 }
 219 
 220 
 221 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 222   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 223 }
 224 
 225 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 226   __ cmp_mem_int(condition, base, disp, c, info);
 227 }
 228 
 229 
 230 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 231   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 232 }
 233 
 234 
 235 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 236   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 237 }
 238 
 239 
 240 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
 241   if (tmp->is_valid() && c > 0 && c < max_jint) {
 242     if (is_power_of_2(c + 1)) {
 243       __ move(left, tmp);
 244       __ shift_left(left, log2_jint(c + 1), left);
 245       __ sub(left, tmp, result);
 246       return true;
 247     } else if (is_power_of_2(c - 1)) {
 248       __ move(left, tmp);
 249       __ shift_left(left, log2_jint(c - 1), left);
 250       __ add(left, tmp, result);
 251       return true;
 252     }
 253   }
 254   return false;
 255 }
 256 
 257 
 258 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 259   BasicType type = item->type();
 260   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 261 }
 262 
 263 //----------------------------------------------------------------------
 264 //             visitor functions
 265 //----------------------------------------------------------------------
 266 
 267 
 268 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 269   assert(x->is_pinned(),"");
 270   bool needs_range_check = x->compute_needs_range_check();
 271   bool use_length = x->length() != NULL;
 272   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 273   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 274                                          !get_jobject_constant(x->value())->is_null_object() ||
 275                                          x->should_profile());
 276 
 277   LIRItem array(x->array(), this);
 278   LIRItem index(x->index(), this);
 279   LIRItem value(x->value(), this);
 280   LIRItem length(this);
 281 
 282   array.load_item();
 283   index.load_nonconstant();
 284 
 285   if (use_length && needs_range_check) {
 286     length.set_instruction(x->length());
 287     length.load_item();
 288 
 289   }
 290   if (needs_store_check || x->check_boolean()) {
 291     value.load_item();
 292   } else {
 293     value.load_for_store(x->elt_type());
 294   }
 295 
 296   set_no_result(x);
 297 
 298   // the CodeEmitInfo must be duplicated for each different
 299   // LIR-instruction because spilling can occur anywhere between two
 300   // instructions and so the debug information must be different
 301   CodeEmitInfo* range_check_info = state_for(x);
 302   CodeEmitInfo* null_check_info = NULL;
 303   if (x->needs_null_check()) {
 304     null_check_info = new CodeEmitInfo(range_check_info);
 305   }
 306 
 307   // emit array address setup early so it schedules better
 308   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 309 
 310   if (GenerateRangeChecks && needs_range_check) {
 311     if (use_length) {
 312       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 313       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 314     } else {
 315       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 316       // range_check also does the null check
 317       null_check_info = NULL;
 318     }
 319   }
 320 
 321   if (GenerateArrayStoreCheck && needs_store_check) {
 322     LIR_Opr tmp1 = new_register(objectType);
 323     LIR_Opr tmp2 = new_register(objectType);
 324     LIR_Opr tmp3 = new_register(objectType);
 325 
 326     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 327     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 328   }
 329 
 330   if (obj_store) {
 331     // Needs GC write barriers.
 332     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 333                 true /* do_load */, false /* patch */, NULL);
 334     __ move(value.result(), array_addr, null_check_info);
 335     // Seems to be a precise
 336     post_barrier(LIR_OprFact::address(array_addr), value.result());
 337   } else {
 338     LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
 339     __ move(result, array_addr, null_check_info);
 340   }
 341 }
 342 
 343 
 344 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 345   assert(x->is_pinned(),"");
 346   LIRItem obj(x->obj(), this);
 347   obj.load_item();
 348 
 349   set_no_result(x);
 350 
 351   // "lock" stores the address of the monitor stack slot, so this is not an oop
 352   LIR_Opr lock = new_register(T_INT);
 353   // Need a scratch register for biased locking on x86
 354   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 355   if (UseBiasedLocking) {
 356     scratch = new_register(T_INT);
 357   }
 358 
 359   CodeEmitInfo* info_for_exception = NULL;
 360   if (x->needs_null_check()) {
 361     info_for_exception = state_for(x);
 362   }
 363   // this CodeEmitInfo must not have the xhandlers because here the
 364   // object is already locked (xhandlers expect object to be unlocked)
 365   CodeEmitInfo* info = state_for(x, x->state(), true);
 366   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 367                         x->monitor_no(), info_for_exception, info);
 368 }
 369 
 370 
 371 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 372   assert(x->is_pinned(),"");
 373 
 374   LIRItem obj(x->obj(), this);
 375   obj.dont_load_item();
 376 
 377   LIR_Opr lock = new_register(T_INT);
 378   LIR_Opr obj_temp = new_register(T_INT);
 379   set_no_result(x);
 380   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 381 }
 382 
 383 
 384 // _ineg, _lneg, _fneg, _dneg
 385 void LIRGenerator::do_NegateOp(NegateOp* x) {
 386   LIRItem value(x->x(), this);
 387   value.set_destroys_register();
 388   value.load_item();
 389   LIR_Opr reg = rlock(x);
 390   __ negate(value.result(), reg);
 391 
 392   set_result(x, round_item(reg));
 393 }
 394 
 395 
 396 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 397 //      _dadd, _dmul, _dsub, _ddiv, _drem
 398 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 399   LIRItem left(x->x(),  this);
 400   LIRItem right(x->y(), this);
 401   LIRItem* left_arg  = &left;
 402   LIRItem* right_arg = &right;
 403   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 404   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 405   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 406     left.load_item();
 407   } else {
 408     left.dont_load_item();
 409   }
 410 
 411   // do not load right operand if it is a constant.  only 0 and 1 are
 412   // loaded because there are special instructions for loading them
 413   // without memory access (not needed for SSE2 instructions)
 414   bool must_load_right = false;
 415   if (right.is_constant()) {
 416     LIR_Const* c = right.result()->as_constant_ptr();
 417     assert(c != NULL, "invalid constant");
 418     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 419 
 420     if (c->type() == T_FLOAT) {
 421       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 422     } else {
 423       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 424     }
 425   }
 426 
 427   if (must_load_both) {
 428     // frem and drem destroy also right operand, so move it to a new register
 429     right.set_destroys_register();
 430     right.load_item();
 431   } else if (right.is_register() || must_load_right) {
 432     right.load_item();
 433   } else {
 434     right.dont_load_item();
 435   }
 436   LIR_Opr reg = rlock(x);
 437   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 438   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 439     tmp = new_register(T_DOUBLE);
 440   }
 441 
 442   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 443     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 444     LIR_Opr fpu0, fpu1;
 445     if (x->op() == Bytecodes::_frem) {
 446       fpu0 = LIR_OprFact::single_fpu(0);
 447       fpu1 = LIR_OprFact::single_fpu(1);
 448     } else {
 449       fpu0 = LIR_OprFact::double_fpu(0);
 450       fpu1 = LIR_OprFact::double_fpu(1);
 451     }
 452     __ move(right.result(), fpu1); // order of left and right operand is important!
 453     __ move(left.result(), fpu0);
 454     __ rem (fpu0, fpu1, fpu0);
 455     __ move(fpu0, reg);
 456 
 457   } else {
 458     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 459   }
 460 
 461   set_result(x, round_item(reg));
 462 }
 463 
 464 
 465 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 466 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 467   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 468     // long division is implemented as a direct call into the runtime
 469     LIRItem left(x->x(), this);
 470     LIRItem right(x->y(), this);
 471 
 472     // the check for division by zero destroys the right operand
 473     right.set_destroys_register();
 474 
 475     BasicTypeList signature(2);
 476     signature.append(T_LONG);
 477     signature.append(T_LONG);
 478     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 479 
 480     // check for division by zero (destroys registers of right operand!)
 481     CodeEmitInfo* info = state_for(x);
 482 
 483     const LIR_Opr result_reg = result_register_for(x->type());
 484     left.load_item_force(cc->at(1));
 485     right.load_item();
 486 
 487     __ move(right.result(), cc->at(0));
 488 
 489     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 490     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 491 
 492     address entry = NULL;
 493     switch (x->op()) {
 494     case Bytecodes::_lrem:
 495       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 496       break; // check if dividend is 0 is done elsewhere
 497     case Bytecodes::_ldiv:
 498       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 499       break; // check if dividend is 0 is done elsewhere
 500     case Bytecodes::_lmul:
 501       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 502       break;
 503     default:
 504       ShouldNotReachHere();
 505     }
 506 
 507     LIR_Opr result = rlock_result(x);
 508     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 509     __ move(result_reg, result);
 510   } else if (x->op() == Bytecodes::_lmul) {
 511     // missing test if instr is commutative and if we should swap
 512     LIRItem left(x->x(), this);
 513     LIRItem right(x->y(), this);
 514 
 515     // right register is destroyed by the long mul, so it must be
 516     // copied to a new register.
 517     right.set_destroys_register();
 518 
 519     left.load_item();
 520     right.load_item();
 521 
 522     LIR_Opr reg = FrameMap::long0_opr;
 523     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 524     LIR_Opr result = rlock_result(x);
 525     __ move(reg, result);
 526   } else {
 527     // missing test if instr is commutative and if we should swap
 528     LIRItem left(x->x(), this);
 529     LIRItem right(x->y(), this);
 530 
 531     left.load_item();
 532     // don't load constants to save register
 533     right.load_nonconstant();
 534     rlock_result(x);
 535     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 536   }
 537 }
 538 
 539 
 540 
 541 // for: _iadd, _imul, _isub, _idiv, _irem
 542 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 543   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 544     // The requirements for division and modulo
 545     // input : rax,: dividend                         min_int
 546     //         reg: divisor   (may not be rax,/rdx)   -1
 547     //
 548     // output: rax,: quotient  (= rax, idiv reg)       min_int
 549     //         rdx: remainder (= rax, irem reg)       0
 550 
 551     // rax, and rdx will be destroyed
 552 
 553     // Note: does this invalidate the spec ???
 554     LIRItem right(x->y(), this);
 555     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 556 
 557     // call state_for before load_item_force because state_for may
 558     // force the evaluation of other instructions that are needed for
 559     // correct debug info.  Otherwise the live range of the fix
 560     // register might be too long.
 561     CodeEmitInfo* info = state_for(x);
 562 
 563     left.load_item_force(divInOpr());
 564 
 565     right.load_item();
 566 
 567     LIR_Opr result = rlock_result(x);
 568     LIR_Opr result_reg;
 569     if (x->op() == Bytecodes::_idiv) {
 570       result_reg = divOutOpr();
 571     } else {
 572       result_reg = remOutOpr();
 573     }
 574 
 575     if (!ImplicitDiv0Checks) {
 576       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 577       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 578     }
 579     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 580     if (x->op() == Bytecodes::_irem) {
 581       __ irem(left.result(), right.result(), result_reg, tmp, info);
 582     } else if (x->op() == Bytecodes::_idiv) {
 583       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 584     } else {
 585       ShouldNotReachHere();
 586     }
 587 
 588     __ move(result_reg, result);
 589   } else {
 590     // missing test if instr is commutative and if we should swap
 591     LIRItem left(x->x(),  this);
 592     LIRItem right(x->y(), this);
 593     LIRItem* left_arg = &left;
 594     LIRItem* right_arg = &right;
 595     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 596       // swap them if left is real stack (or cached) and right is real register(not cached)
 597       left_arg = &right;
 598       right_arg = &left;
 599     }
 600 
 601     left_arg->load_item();
 602 
 603     // do not need to load right, as we can handle stack and constants
 604     if (x->op() == Bytecodes::_imul ) {
 605       // check if we can use shift instead
 606       bool use_constant = false;
 607       bool use_tmp = false;
 608       if (right_arg->is_constant()) {
 609         jint iconst = right_arg->get_jint_constant();
 610         if (iconst > 0 && iconst < max_jint) {
 611           if (is_power_of_2(iconst)) {
 612             use_constant = true;
 613           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 614             use_constant = true;
 615             use_tmp = true;
 616           }
 617         }
 618       }
 619       if (use_constant) {
 620         right_arg->dont_load_item();
 621       } else {
 622         right_arg->load_item();
 623       }
 624       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 625       if (use_tmp) {
 626         tmp = new_register(T_INT);
 627       }
 628       rlock_result(x);
 629 
 630       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 631     } else {
 632       right_arg->dont_load_item();
 633       rlock_result(x);
 634       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 635       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 636     }
 637   }
 638 }
 639 
 640 
 641 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 642   // when an operand with use count 1 is the left operand, then it is
 643   // likely that no move for 2-operand-LIR-form is necessary
 644   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 645     x->swap_operands();
 646   }
 647 
 648   ValueTag tag = x->type()->tag();
 649   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 650   switch (tag) {
 651     case floatTag:
 652     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 653     case longTag:    do_ArithmeticOp_Long(x); return;
 654     case intTag:     do_ArithmeticOp_Int(x);  return;
 655   }
 656   ShouldNotReachHere();
 657 }
 658 
 659 
 660 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 661 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 662   // count must always be in rcx
 663   LIRItem value(x->x(), this);
 664   LIRItem count(x->y(), this);
 665 
 666   ValueTag elemType = x->type()->tag();
 667   bool must_load_count = !count.is_constant() || elemType == longTag;
 668   if (must_load_count) {
 669     // count for long must be in register
 670     count.load_item_force(shiftCountOpr());
 671   } else {
 672     count.dont_load_item();
 673   }
 674   value.load_item();
 675   LIR_Opr reg = rlock_result(x);
 676 
 677   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 678 }
 679 
 680 
 681 // _iand, _land, _ior, _lor, _ixor, _lxor
 682 void LIRGenerator::do_LogicOp(LogicOp* x) {
 683   // when an operand with use count 1 is the left operand, then it is
 684   // likely that no move for 2-operand-LIR-form is necessary
 685   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 686     x->swap_operands();
 687   }
 688 
 689   LIRItem left(x->x(), this);
 690   LIRItem right(x->y(), this);
 691 
 692   left.load_item();
 693   right.load_nonconstant();
 694   LIR_Opr reg = rlock_result(x);
 695 
 696   logic_op(x->op(), reg, left.result(), right.result());
 697 }
 698 
 699 
 700 
 701 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 702 void LIRGenerator::do_CompareOp(CompareOp* x) {
 703   LIRItem left(x->x(), this);
 704   LIRItem right(x->y(), this);
 705   ValueTag tag = x->x()->type()->tag();
 706   if (tag == longTag) {
 707     left.set_destroys_register();
 708   }
 709   left.load_item();
 710   right.load_item();
 711   LIR_Opr reg = rlock_result(x);
 712 
 713   if (x->x()->type()->is_float_kind()) {
 714     Bytecodes::Code code = x->op();
 715     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 716   } else if (x->x()->type()->tag() == longTag) {
 717     __ lcmp2int(left.result(), right.result(), reg);
 718   } else {
 719     Unimplemented();
 720   }
 721 }
 722 
 723 
 724 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 725   assert(x->number_of_arguments() == 4, "wrong type");
 726   LIRItem obj   (x->argument_at(0), this);  // object
 727   LIRItem offset(x->argument_at(1), this);  // offset of field
 728   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
 729   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
 730 
 731   assert(obj.type()->tag() == objectTag, "invalid type");
 732 
 733   // In 64bit the type can be long, sparc doesn't have this assert
 734   // assert(offset.type()->tag() == intTag, "invalid type");
 735 
 736   assert(cmp.type()->tag() == type->tag(), "invalid type");
 737   assert(val.type()->tag() == type->tag(), "invalid type");
 738 
 739   // get address of field
 740   obj.load_item();
 741   offset.load_nonconstant();
 742 
 743   if (type == objectType) {
 744     cmp.load_item_force(FrameMap::rax_oop_opr);
 745     val.load_item();
 746   } else if (type == intType) {
 747     cmp.load_item_force(FrameMap::rax_opr);
 748     val.load_item();
 749   } else if (type == longType) {
 750     cmp.load_item_force(FrameMap::long0_opr);
 751     val.load_item_force(FrameMap::long1_opr);
 752   } else {
 753     ShouldNotReachHere();
 754   }
 755 
 756   LIR_Opr addr = new_pointer_register();
 757   LIR_Address* a;
 758   if(offset.result()->is_constant()) {
 759 #ifdef _LP64
 760     jlong c = offset.result()->as_jlong();
 761     if ((jlong)((jint)c) == c) {
 762       a = new LIR_Address(obj.result(),
 763                           (jint)c,
 764                           as_BasicType(type));
 765     } else {
 766       LIR_Opr tmp = new_register(T_LONG);
 767       __ move(offset.result(), tmp);
 768       a = new LIR_Address(obj.result(),
 769                           tmp,
 770                           as_BasicType(type));
 771     }
 772 #else
 773     a = new LIR_Address(obj.result(),
 774                         offset.result()->as_jint(),
 775                         as_BasicType(type));
 776 #endif
 777   } else {
 778     a = new LIR_Address(obj.result(),
 779                         offset.result(),
 780                         LIR_Address::times_1,
 781                         0,
 782                         as_BasicType(type));
 783   }
 784   __ leal(LIR_OprFact::address(a), addr);
 785 
 786   if (type == objectType) {  // Write-barrier needed for Object fields.
 787     // Do the pre-write barrier, if any.
 788     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 789                 true /* do_load */, false /* patch */, NULL);
 790   }
 791 
 792   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 793   if (type == objectType) {
 794 #if INCLUDE_ALL_GCS
 795     if (UseShenandoahGC && ShenandoahCASBarrier) {
 796       LIR_Opr result = rlock_result(x);
 797       __ cas_obj(addr, cmp.result(), val.result(), new_register(T_OBJECT), new_register(T_OBJECT), result);
 798       // Shenandoah C1 barrier would do all result management itself, shortcut here.
 799       return;
 800     } else
 801 #endif
 802     {
 803     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
 804     }
 805   }
 806   else if (type == intType)
 807     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 808   else if (type == longType)
 809     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 810   else {
 811     ShouldNotReachHere();
 812   }
 813 
 814   // generate conditional move of boolean result
 815   LIR_Opr result = rlock_result(x);
 816   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 817            result, as_BasicType(type));
 818   if (type == objectType) {   // Write-barrier needed for Object fields.
 819     // Seems to be precise
 820     post_barrier(addr, val.result());
 821   }
 822 }
 823 
 824 
 825 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 826   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 827   LIRItem value(x->argument_at(0), this);
 828 
 829   bool use_fpu = false;
 830   if (UseSSE >= 2) {
 831     switch(x->id()) {
 832       case vmIntrinsics::_dsin:
 833       case vmIntrinsics::_dcos:
 834       case vmIntrinsics::_dtan:
 835       case vmIntrinsics::_dlog:
 836       case vmIntrinsics::_dlog10:
 837       case vmIntrinsics::_dexp:
 838       case vmIntrinsics::_dpow:
 839         use_fpu = true;
 840     }
 841   } else {
 842     value.set_destroys_register();
 843   }
 844 
 845   value.load_item();
 846 
 847   LIR_Opr calc_input = value.result();
 848   LIR_Opr calc_input2 = NULL;
 849   if (x->id() == vmIntrinsics::_dpow) {
 850     LIRItem extra_arg(x->argument_at(1), this);
 851     if (UseSSE < 2) {
 852       extra_arg.set_destroys_register();
 853     }
 854     extra_arg.load_item();
 855     calc_input2 = extra_arg.result();
 856   }
 857   LIR_Opr calc_result = rlock_result(x);
 858 
 859   // sin, cos, pow and exp need two free fpu stack slots, so register
 860   // two temporary operands
 861   LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
 862   LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
 863 
 864   if (use_fpu) {
 865     LIR_Opr tmp = FrameMap::fpu0_double_opr;
 866     int tmp_start = 1;
 867     if (calc_input2 != NULL) {
 868       __ move(calc_input2, tmp);
 869       tmp_start = 2;
 870       calc_input2 = tmp;
 871     }
 872     __ move(calc_input, tmp);
 873 
 874     calc_input = tmp;
 875     calc_result = tmp;
 876 
 877     tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start);
 878     tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1);
 879   }
 880 
 881   switch(x->id()) {
 882     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 883     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 884     case vmIntrinsics::_dsin:   __ sin  (calc_input, calc_result, tmp1, tmp2);              break;
 885     case vmIntrinsics::_dcos:   __ cos  (calc_input, calc_result, tmp1, tmp2);              break;
 886     case vmIntrinsics::_dtan:   __ tan  (calc_input, calc_result, tmp1, tmp2);              break;
 887     case vmIntrinsics::_dlog:   __ log  (calc_input, calc_result, tmp1);                    break;
 888     case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1);                    break;
 889     case vmIntrinsics::_dexp:   __ exp  (calc_input, calc_result,              tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
 890     case vmIntrinsics::_dpow:   __ pow  (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
 891     default:                    ShouldNotReachHere();
 892   }
 893 
 894   if (use_fpu) {
 895     __ move(calc_result, x->operand());
 896   }
 897 }
 898 
 899 
 900 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 901   assert(x->number_of_arguments() == 5, "wrong type");
 902 
 903   // Make all state_for calls early since they can emit code
 904   CodeEmitInfo* info = state_for(x, x->state());
 905 
 906   LIRItem src(x->argument_at(0), this);
 907   LIRItem src_pos(x->argument_at(1), this);
 908   LIRItem dst(x->argument_at(2), this);
 909   LIRItem dst_pos(x->argument_at(3), this);
 910   LIRItem length(x->argument_at(4), this);
 911 
 912   // operands for arraycopy must use fixed registers, otherwise
 913   // LinearScan will fail allocation (because arraycopy always needs a
 914   // call)
 915 
 916 #ifndef _LP64
 917   src.load_item_force     (FrameMap::rcx_oop_opr);
 918   src_pos.load_item_force (FrameMap::rdx_opr);
 919   dst.load_item_force     (FrameMap::rax_oop_opr);
 920   dst_pos.load_item_force (FrameMap::rbx_opr);
 921   length.load_item_force  (FrameMap::rdi_opr);
 922   LIR_Opr tmp =           (FrameMap::rsi_opr);
 923 #else
 924 
 925   // The java calling convention will give us enough registers
 926   // so that on the stub side the args will be perfect already.
 927   // On the other slow/special case side we call C and the arg
 928   // positions are not similar enough to pick one as the best.
 929   // Also because the java calling convention is a "shifted" version
 930   // of the C convention we can process the java args trivially into C
 931   // args without worry of overwriting during the xfer
 932 
 933   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
 934   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
 935   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
 936   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
 937   length.load_item_force  (FrameMap::as_opr(j_rarg4));
 938 
 939   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
 940 #endif // LP64
 941 
 942   set_no_result(x);
 943 
 944   int flags;
 945   ciArrayKlass* expected_type;
 946   arraycopy_helper(x, &flags, &expected_type);
 947 
 948   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
 949 }
 950 
 951 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
 952   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
 953   // Make all state_for calls early since they can emit code
 954   LIR_Opr result = rlock_result(x);
 955   int flags = 0;
 956   switch (x->id()) {
 957     case vmIntrinsics::_updateCRC32: {
 958       LIRItem crc(x->argument_at(0), this);
 959       LIRItem val(x->argument_at(1), this);
 960       // val is destroyed by update_crc32
 961       val.set_destroys_register();
 962       crc.load_item();
 963       val.load_item();
 964       __ update_crc32(crc.result(), val.result(), result);
 965       break;
 966     }
 967     case vmIntrinsics::_updateBytesCRC32:
 968     case vmIntrinsics::_updateByteBufferCRC32: {
 969       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
 970 
 971       LIRItem crc(x->argument_at(0), this);
 972       LIRItem buf(x->argument_at(1), this);
 973       LIRItem off(x->argument_at(2), this);
 974       LIRItem len(x->argument_at(3), this);
 975       buf.load_item();
 976       off.load_nonconstant();
 977 
 978       LIR_Opr index = off.result();
 979       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
 980       if(off.result()->is_constant()) {
 981         index = LIR_OprFact::illegalOpr;
 982        offset += off.result()->as_jint();
 983       }
 984       LIR_Opr base_op = buf.result();
 985 
 986 #ifndef _LP64
 987       if (!is_updateBytes) { // long b raw address
 988          base_op = new_register(T_INT);
 989          __ convert(Bytecodes::_l2i, buf.result(), base_op);
 990       }
 991 #else
 992       if (index->is_valid()) {
 993         LIR_Opr tmp = new_register(T_LONG);
 994         __ convert(Bytecodes::_i2l, index, tmp);
 995         index = tmp;
 996       }
 997 #endif
 998 
 999       LIR_Address* a = new LIR_Address(base_op,
1000                                        index,
1001                                        LIR_Address::times_1,
1002                                        offset,
1003                                        T_BYTE);
1004       BasicTypeList signature(3);
1005       signature.append(T_INT);
1006       signature.append(T_ADDRESS);
1007       signature.append(T_INT);
1008       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1009       const LIR_Opr result_reg = result_register_for(x->type());
1010 
1011       LIR_Opr addr = new_pointer_register();
1012       __ leal(LIR_OprFact::address(a), addr);
1013 
1014       crc.load_item_force(cc->at(0));
1015       __ move(addr, cc->at(1));
1016       len.load_item_force(cc->at(2));
1017 
1018       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1019       __ move(result_reg, result);
1020 
1021       break;
1022     }
1023     default: {
1024       ShouldNotReachHere();
1025     }
1026   }
1027 }
1028 
1029 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1030 // _i2b, _i2c, _i2s
1031 LIR_Opr fixed_register_for(BasicType type) {
1032   switch (type) {
1033     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1034     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1035     case T_INT:    return FrameMap::rax_opr;
1036     case T_LONG:   return FrameMap::long0_opr;
1037     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1038   }
1039 }
1040 
1041 void LIRGenerator::do_Convert(Convert* x) {
1042   // flags that vary for the different operations and different SSE-settings
1043   bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1044 
1045   switch (x->op()) {
1046     case Bytecodes::_i2l: // fall through
1047     case Bytecodes::_l2i: // fall through
1048     case Bytecodes::_i2b: // fall through
1049     case Bytecodes::_i2c: // fall through
1050     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1051 
1052     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1053     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1054     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1055     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1056     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1057     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1058     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1059     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1060     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1061     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1062     default: ShouldNotReachHere();
1063   }
1064 
1065   LIRItem value(x->value(), this);
1066   value.load_item();
1067   LIR_Opr input = value.result();
1068   LIR_Opr result = rlock(x);
1069 
1070   // arguments of lir_convert
1071   LIR_Opr conv_input = input;
1072   LIR_Opr conv_result = result;
1073   ConversionStub* stub = NULL;
1074 
1075   if (fixed_input) {
1076     conv_input = fixed_register_for(input->type());
1077     __ move(input, conv_input);
1078   }
1079 
1080   assert(fixed_result == false || round_result == false, "cannot set both");
1081   if (fixed_result) {
1082     conv_result = fixed_register_for(result->type());
1083   } else if (round_result) {
1084     result = new_register(result->type());
1085     set_vreg_flag(result, must_start_in_memory);
1086   }
1087 
1088   if (needs_stub) {
1089     stub = new ConversionStub(x->op(), conv_input, conv_result);
1090   }
1091 
1092   __ convert(x->op(), conv_input, conv_result, stub);
1093 
1094   if (result != conv_result) {
1095     __ move(conv_result, result);
1096   }
1097 
1098   assert(result->is_virtual(), "result must be virtual register");
1099   set_result(x, result);
1100 }
1101 
1102 
1103 void LIRGenerator::do_NewInstance(NewInstance* x) {
1104   print_if_not_loaded(x);
1105 
1106   CodeEmitInfo* info = state_for(x, x->state());
1107   LIR_Opr reg = result_register_for(x->type());
1108   new_instance(reg, x->klass(), x->is_unresolved(),
1109                        FrameMap::rcx_oop_opr,
1110                        FrameMap::rdi_oop_opr,
1111                        FrameMap::rsi_oop_opr,
1112                        LIR_OprFact::illegalOpr,
1113                        FrameMap::rdx_metadata_opr, info);
1114   LIR_Opr result = rlock_result(x);
1115   __ move(reg, result);
1116 }
1117 
1118 
1119 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1120   CodeEmitInfo* info = state_for(x, x->state());
1121 
1122   LIRItem length(x->length(), this);
1123   length.load_item_force(FrameMap::rbx_opr);
1124 
1125   LIR_Opr reg = result_register_for(x->type());
1126   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1127   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1128   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1129   LIR_Opr tmp4 = reg;
1130   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1131   LIR_Opr len = length.result();
1132   BasicType elem_type = x->elt_type();
1133 
1134   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1135 
1136   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1137   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1138 
1139   LIR_Opr result = rlock_result(x);
1140   __ move(reg, result);
1141 }
1142 
1143 
1144 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1145   LIRItem length(x->length(), this);
1146   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1147   // and therefore provide the state before the parameters have been consumed
1148   CodeEmitInfo* patching_info = NULL;
1149   if (!x->klass()->is_loaded() || PatchALot) {
1150     patching_info =  state_for(x, x->state_before());
1151   }
1152 
1153   CodeEmitInfo* info = state_for(x, x->state());
1154 
1155   const LIR_Opr reg = result_register_for(x->type());
1156   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1157   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1158   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1159   LIR_Opr tmp4 = reg;
1160   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1161 
1162   length.load_item_force(FrameMap::rbx_opr);
1163   LIR_Opr len = length.result();
1164 
1165   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1166   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1167   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1168     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1169   }
1170   klass2reg_with_patching(klass_reg, obj, patching_info);
1171   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1172 
1173   LIR_Opr result = rlock_result(x);
1174   __ move(reg, result);
1175 }
1176 
1177 
1178 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1179   Values* dims = x->dims();
1180   int i = dims->length();
1181   LIRItemList* items = new LIRItemList(dims->length(), NULL);
1182   while (i-- > 0) {
1183     LIRItem* size = new LIRItem(dims->at(i), this);
1184     items->at_put(i, size);
1185   }
1186 
1187   // Evaluate state_for early since it may emit code.
1188   CodeEmitInfo* patching_info = NULL;
1189   if (!x->klass()->is_loaded() || PatchALot) {
1190     patching_info = state_for(x, x->state_before());
1191 
1192     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1193     // clone all handlers (NOTE: Usually this is handled transparently
1194     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1195     // is done explicitly here because a stub isn't being used).
1196     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1197   }
1198   CodeEmitInfo* info = state_for(x, x->state());
1199 
1200   i = dims->length();
1201   while (i-- > 0) {
1202     LIRItem* size = items->at(i);
1203     size->load_nonconstant();
1204 
1205     store_stack_parameter(size->result(), in_ByteSize(i*4));
1206   }
1207 
1208   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1209   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1210 
1211   LIR_Opr rank = FrameMap::rbx_opr;
1212   __ move(LIR_OprFact::intConst(x->rank()), rank);
1213   LIR_Opr varargs = FrameMap::rcx_opr;
1214   __ move(FrameMap::rsp_opr, varargs);
1215   LIR_OprList* args = new LIR_OprList(3);
1216   args->append(klass_reg);
1217   args->append(rank);
1218   args->append(varargs);
1219   LIR_Opr reg = result_register_for(x->type());
1220   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1221                   LIR_OprFact::illegalOpr,
1222                   reg, args, info);
1223 
1224   LIR_Opr result = rlock_result(x);
1225   __ move(reg, result);
1226 }
1227 
1228 
1229 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1230   // nothing to do for now
1231 }
1232 
1233 
1234 void LIRGenerator::do_CheckCast(CheckCast* x) {
1235   LIRItem obj(x->obj(), this);
1236 
1237   CodeEmitInfo* patching_info = NULL;
1238   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1239     // must do this before locking the destination register as an oop register,
1240     // and before the obj is loaded (the latter is for deoptimization)
1241     patching_info = state_for(x, x->state_before());
1242   }
1243   obj.load_item();
1244 
1245   // info for exceptions
1246   CodeEmitInfo* info_for_exception =
1247       (x->needs_exception_state() ? state_for(x) :
1248                                     state_for(x, x->state_before(), true /*ignore_xhandler*/));
1249 
1250   CodeStub* stub;
1251   if (x->is_incompatible_class_change_check()) {
1252     assert(patching_info == NULL, "can't patch this");
1253     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1254   } else if (x->is_invokespecial_receiver_check()) {
1255     assert(patching_info == NULL, "can't patch this");
1256     stub = new DeoptimizeStub(info_for_exception);
1257   } else {
1258     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1259   }
1260   LIR_Opr reg = rlock_result(x);
1261   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1262   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1263     tmp3 = new_register(objectType);
1264   }
1265   __ checkcast(reg, obj.result(), x->klass(),
1266                new_register(objectType), new_register(objectType), tmp3,
1267                x->direct_compare(), info_for_exception, patching_info, stub,
1268                x->profiled_method(), x->profiled_bci());
1269 }
1270 
1271 
1272 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1273   LIRItem obj(x->obj(), this);
1274 
1275   // result and test object may not be in same register
1276   LIR_Opr reg = rlock_result(x);
1277   CodeEmitInfo* patching_info = NULL;
1278   if ((!x->klass()->is_loaded() || PatchALot)) {
1279     // must do this before locking the destination register as an oop register
1280     patching_info = state_for(x, x->state_before());
1281   }
1282   obj.load_item();
1283   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1284   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1285     tmp3 = new_register(objectType);
1286   }
1287   __ instanceof(reg, obj.result(), x->klass(),
1288                 new_register(objectType), new_register(objectType), tmp3,
1289                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1290 }
1291 
1292 
1293 void LIRGenerator::do_If(If* x) {
1294   assert(x->number_of_sux() == 2, "inconsistency");
1295   ValueTag tag = x->x()->type()->tag();
1296   bool is_safepoint = x->is_safepoint();
1297 
1298   If::Condition cond = x->cond();
1299 
1300   LIRItem xitem(x->x(), this);
1301   LIRItem yitem(x->y(), this);
1302   LIRItem* xin = &xitem;
1303   LIRItem* yin = &yitem;
1304 
1305   if (tag == longTag) {
1306     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1307     // mirror for other conditions
1308     if (cond == If::gtr || cond == If::leq) {
1309       cond = Instruction::mirror(cond);
1310       xin = &yitem;
1311       yin = &xitem;
1312     }
1313     xin->set_destroys_register();
1314   }
1315   xin->load_item();
1316   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1317     // inline long zero
1318     yin->dont_load_item();
1319   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1320     // longs cannot handle constants at right side
1321     yin->load_item();
1322   } else {
1323     yin->dont_load_item();
1324   }
1325 
1326   // add safepoint before generating condition code so it can be recomputed
1327   if (x->is_safepoint()) {
1328     // increment backedge counter if needed
1329     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1330     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1331   }
1332   set_no_result(x);
1333 
1334   LIR_Opr left = xin->result();
1335   LIR_Opr right = yin->result();
1336   __ cmp(lir_cond(cond), left, right);
1337   // Generate branch profiling. Profiling code doesn't kill flags.
1338   profile_branch(x, cond);
1339   move_to_phi(x->state());
1340   if (x->x()->type()->is_float_kind()) {
1341     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1342   } else {
1343     __ branch(lir_cond(cond), right->type(), x->tsux());
1344   }
1345   assert(x->default_sux() == x->fsux(), "wrong destination above");
1346   __ jump(x->default_sux());
1347 }
1348 
1349 
1350 LIR_Opr LIRGenerator::getThreadPointer() {
1351 #ifdef _LP64
1352   return FrameMap::as_pointer_opr(r15_thread);
1353 #else
1354   LIR_Opr result = new_register(T_INT);
1355   __ get_thread(result);
1356   return result;
1357 #endif //
1358 }
1359 
1360 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1361   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1362   LIR_OprList* args = new LIR_OprList();
1363   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1364   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1365 }
1366 
1367 
1368 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1369                                         CodeEmitInfo* info) {
1370   if (address->type() == T_LONG) {
1371     address = new LIR_Address(address->base(),
1372                               address->index(), address->scale(),
1373                               address->disp(), T_DOUBLE);
1374     // Transfer the value atomically by using FP moves.  This means
1375     // the value has to be moved between CPU and FPU registers.  It
1376     // always has to be moved through spill slot since there's no
1377     // quick way to pack the value into an SSE register.
1378     LIR_Opr temp_double = new_register(T_DOUBLE);
1379     LIR_Opr spill = new_register(T_LONG);
1380     set_vreg_flag(spill, must_start_in_memory);
1381     __ move(value, spill);
1382     __ volatile_move(spill, temp_double, T_LONG);
1383     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1384   } else {
1385     __ store(value, address, info);
1386   }
1387 }
1388 
1389 
1390 
1391 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1392                                        CodeEmitInfo* info) {
1393   if (address->type() == T_LONG) {
1394     address = new LIR_Address(address->base(),
1395                               address->index(), address->scale(),
1396                               address->disp(), T_DOUBLE);
1397     // Transfer the value atomically by using FP moves.  This means
1398     // the value has to be moved between CPU and FPU registers.  In
1399     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1400     // SSE2+ mode it can be moved directly.
1401     LIR_Opr temp_double = new_register(T_DOUBLE);
1402     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1403     __ volatile_move(temp_double, result, T_LONG);
1404     if (UseSSE < 2) {
1405       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1406       set_vreg_flag(result, must_start_in_memory);
1407     }
1408   } else {
1409     __ load(address, result, info);
1410   }
1411 }
1412 
1413 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1414                                      BasicType type, bool is_volatile) {
1415   if (is_volatile && type == T_LONG) {
1416     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1417     LIR_Opr tmp = new_register(T_DOUBLE);
1418     __ load(addr, tmp);
1419     LIR_Opr spill = new_register(T_LONG);
1420     set_vreg_flag(spill, must_start_in_memory);
1421     __ move(tmp, spill);
1422     __ move(spill, dst);
1423   } else {
1424     LIR_Address* addr = new LIR_Address(src, offset, type);
1425     __ load(addr, dst);
1426   }
1427 }
1428 
1429 
1430 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1431                                      BasicType type, bool is_volatile) {
1432   if (is_volatile && type == T_LONG) {
1433     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1434     LIR_Opr tmp = new_register(T_DOUBLE);
1435     LIR_Opr spill = new_register(T_DOUBLE);
1436     set_vreg_flag(spill, must_start_in_memory);
1437     __ move(data, spill);
1438     __ move(spill, tmp);
1439     __ move(tmp, addr);
1440   } else {
1441     LIR_Address* addr = new LIR_Address(src, offset, type);
1442     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1443     if (is_obj) {
1444       // Do the pre-write barrier, if any.
1445       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1446                   true /* do_load */, false /* patch */, NULL);
1447       __ move(data, addr);
1448       assert(src->is_register(), "must be register");
1449       // Seems to be a precise address
1450       post_barrier(LIR_OprFact::address(addr), data);
1451     } else {
1452       __ move(data, addr);
1453     }
1454   }
1455 }
1456 
1457 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1458   BasicType type = x->basic_type();
1459   LIRItem src(x->object(), this);
1460   LIRItem off(x->offset(), this);
1461   LIRItem value(x->value(), this);
1462 
1463   src.load_item();
1464   value.load_item();
1465   off.load_nonconstant();
1466 
1467   LIR_Opr dst = rlock_result(x, type);
1468   LIR_Opr data = value.result();
1469   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1470   LIR_Opr offset = off.result();
1471 
1472   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1473   LIR_Address* addr;
1474   if (offset->is_constant()) {
1475 #ifdef _LP64
1476     jlong c = offset->as_jlong();
1477     if ((jlong)((jint)c) == c) {
1478       addr = new LIR_Address(src.result(), (jint)c, type);
1479     } else {
1480       LIR_Opr tmp = new_register(T_LONG);
1481       __ move(offset, tmp);
1482       addr = new LIR_Address(src.result(), tmp, type);
1483     }
1484 #else
1485     addr = new LIR_Address(src.result(), offset->as_jint(), type);
1486 #endif
1487   } else {
1488     addr = new LIR_Address(src.result(), offset, type);
1489   }
1490 
1491   // Because we want a 2-arg form of xchg and xadd
1492   __ move(data, dst);
1493 
1494   if (x->is_add()) {
1495     __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1496   } else {
1497     if (is_obj) {
1498       // Do the pre-write barrier, if any.
1499       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1500                   true /* do_load */, false /* patch */, NULL);
1501     }
1502     __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1503 
1504 #if INCLUDE_ALL_GCS
1505     if (UseShenandoahGC && is_obj) {
1506       LIR_Opr tmp = ShenandoahBarrierSet::barrier_set()->bsc1()->load_reference_barrier(this, dst);
1507       __ move(tmp, dst);
1508     }
1509 #endif
1510 
1511     if (is_obj) {
1512       // Seems to be a precise address
1513       post_barrier(LIR_OprFact::address(addr), data);
1514     }
1515   }
1516 }