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src/cpu/x86/vm/x86_64.ad

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 509 // Singleton class for RAX int register
 510 reg_class int_rax_reg(RAX);
 511 
 512 // Singleton class for RBX int register
 513 reg_class int_rbx_reg(RBX);
 514 
 515 // Singleton class for RCX int register
 516 reg_class int_rcx_reg(RCX);
 517 
 518 // Singleton class for RCX int register
 519 reg_class int_rdx_reg(RDX);
 520 
 521 // Singleton class for RCX int register
 522 reg_class int_rdi_reg(RDI);
 523 
 524 // Singleton class for instruction pointer
 525 // reg_class ip_reg(RIP);
 526 
 527 %}
 528 






 529 //----------SOURCE BLOCK-------------------------------------------------------
 530 // This is a block of C++ code which provides values, functions, and
 531 // definitions necessary in the rest of the architecture description
 532 source %{
 533 #define   RELOC_IMM64    Assembler::imm_operand
 534 #define   RELOC_DISP32   Assembler::disp32_operand
 535 
 536 #define __ _masm.
 537 
 538 static int clear_avx_size() {
 539   return (Compile::current()->max_vector_size() > 16) ? 3 : 0;  // vzeroupper
 540 }
 541 
 542 // !!!!! Special hack to get all types of calls to specify the byte offset
 543 //       from the start of the call to the point where the return address
 544 //       will point.
 545 int MachCallStaticJavaNode::ret_addr_offset()
 546 {
 547   int offset = 5; // 5 bytes from start of call to where return address points
 548   offset += clear_avx_size();  


7253 %{
7254   match(Set cr (StoreLConditional mem (Binary oldval newval)));
7255   effect(KILL oldval);
7256 
7257   format %{ "cmpxchgq $mem, $newval\t# If rax == $mem then store $newval into $mem" %}
7258   opcode(0x0F, 0xB1);
7259   ins_encode(lock_prefix,
7260              REX_reg_mem_wide(newval, mem),
7261              OpcP, OpcS,
7262              reg_mem(newval, mem));
7263   ins_pipe(pipe_cmpxchg);
7264 %}
7265 
7266 
7267 // XXX No flag versions for CompareAndSwap{P,I,L} because matcher can't match them
7268 instruct compareAndSwapP(rRegI res,
7269                          memory mem_ptr,
7270                          rax_RegP oldval, rRegP newval,
7271                          rFlagsReg cr)
7272 %{
7273   predicate(VM_Version::supports_cx8());
7274   match(Set res (CompareAndSwapP mem_ptr (Binary oldval newval)));
7275   effect(KILL cr, KILL oldval);
7276 
7277   format %{ "cmpxchgq $mem_ptr,$newval\t# "
7278             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7279             "sete    $res\n\t"
7280             "movzbl  $res, $res" %}
7281   opcode(0x0F, 0xB1);
7282   ins_encode(lock_prefix,
7283              REX_reg_mem_wide(newval, mem_ptr),
7284              OpcP, OpcS,
7285              reg_mem(newval, mem_ptr),
7286              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7287              REX_reg_breg(res, res), // movzbl
7288              Opcode(0xF), Opcode(0xB6), reg_reg(res, res));
7289   ins_pipe( pipe_cmpxchg );
7290 %}
7291 





















7292 instruct compareAndSwapL(rRegI res,
7293                          memory mem_ptr,
7294                          rax_RegL oldval, rRegL newval,
7295                          rFlagsReg cr)
7296 %{
7297   predicate(VM_Version::supports_cx8());
7298   match(Set res (CompareAndSwapL mem_ptr (Binary oldval newval)));
7299   effect(KILL cr, KILL oldval);
7300 
7301   format %{ "cmpxchgq $mem_ptr,$newval\t# "
7302             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7303             "sete    $res\n\t"
7304             "movzbl  $res, $res" %}
7305   opcode(0x0F, 0xB1);
7306   ins_encode(lock_prefix,
7307              REX_reg_mem_wide(newval, mem_ptr),
7308              OpcP, OpcS,
7309              reg_mem(newval, mem_ptr),
7310              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7311              REX_reg_breg(res, res), // movzbl


7324   format %{ "cmpxchgl $mem_ptr,$newval\t# "
7325             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7326             "sete    $res\n\t"
7327             "movzbl  $res, $res" %}
7328   opcode(0x0F, 0xB1);
7329   ins_encode(lock_prefix,
7330              REX_reg_mem(newval, mem_ptr),
7331              OpcP, OpcS,
7332              reg_mem(newval, mem_ptr),
7333              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7334              REX_reg_breg(res, res), // movzbl
7335              Opcode(0xF), Opcode(0xB6), reg_reg(res, res));
7336   ins_pipe( pipe_cmpxchg );
7337 %}
7338 
7339 
7340 instruct compareAndSwapN(rRegI res,
7341                           memory mem_ptr,
7342                           rax_RegN oldval, rRegN newval,
7343                           rFlagsReg cr) %{

7344   match(Set res (CompareAndSwapN mem_ptr (Binary oldval newval)));
7345   effect(KILL cr, KILL oldval);
7346 
7347   format %{ "cmpxchgl $mem_ptr,$newval\t# "
7348             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7349             "sete    $res\n\t"
7350             "movzbl  $res, $res" %}
7351   opcode(0x0F, 0xB1);
7352   ins_encode(lock_prefix,
7353              REX_reg_mem(newval, mem_ptr),
7354              OpcP, OpcS,
7355              reg_mem(newval, mem_ptr),
7356              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7357              REX_reg_breg(res, res), // movzbl
7358              Opcode(0xF), Opcode(0xB6), reg_reg(res, res));
7359   ins_pipe( pipe_cmpxchg );
7360 %}
7361 




















7362 instruct xaddI_no_res( memory mem, Universe dummy, immI add, rFlagsReg cr) %{
7363   predicate(n->as_LoadStore()->result_not_used());
7364   match(Set dummy (GetAndAddI mem add));
7365   effect(KILL cr);
7366   format %{ "ADDL  [$mem],$add" %}
7367   ins_encode %{
7368     if (os::is_MP()) { __ lock(); }
7369     __ addl($mem$$Address, $add$$constant);
7370   %}
7371   ins_pipe( pipe_cmpxchg );
7372 %}
7373 
7374 instruct xaddI( memory mem, rRegI newval, rFlagsReg cr) %{
7375   match(Set newval (GetAndAddI mem newval));
7376   effect(KILL cr);
7377   format %{ "XADDL  [$mem],$newval" %}
7378   ins_encode %{
7379     if (os::is_MP()) { __ lock(); }
7380     __ xaddl($mem$$Address, $newval$$Register);
7381   %}


11148 %}
11149 
11150 instruct compUL_rReg_mem(rFlagsRegU cr, rRegL op1, memory op2)
11151 %{
11152   match(Set cr (CmpUL op1 (LoadL op2)));
11153 
11154   format %{ "cmpq    $op1, $op2\t# unsigned" %}
11155   opcode(0x3B); /* Opcode 3B /r */
11156   ins_encode(REX_reg_mem_wide(op1, op2), OpcP, reg_mem(op1, op2));
11157   ins_pipe(ialu_cr_reg_mem);
11158 %}
11159 
11160 instruct testUL_reg(rFlagsRegU cr, rRegL src, immL0 zero)
11161 %{
11162   match(Set cr (CmpUL src zero));
11163 
11164   format %{ "testq   $src, $src\t# unsigned" %}
11165   opcode(0x85);
11166   ins_encode(REX_reg_reg_wide(src, src), OpcP, reg_reg(src, src));
11167   ins_pipe(ialu_cr_reg_imm);


























11168 %}
11169 
11170 //----------Max and Min--------------------------------------------------------
11171 // Min Instructions
11172 
11173 instruct cmovI_reg_g(rRegI dst, rRegI src, rFlagsReg cr)
11174 %{
11175   effect(USE_DEF dst, USE src, USE cr);
11176 
11177   format %{ "cmovlgt $dst, $src\t# min" %}
11178   opcode(0x0F, 0x4F);
11179   ins_encode(REX_reg_reg(dst, src), OpcP, OpcS, reg_reg(dst, src));
11180   ins_pipe(pipe_cmov_reg);
11181 %}
11182 
11183 
11184 instruct minI_rReg(rRegI dst, rRegI src)
11185 %{
11186   match(Set dst (MinI dst src));
11187 




 509 // Singleton class for RAX int register
 510 reg_class int_rax_reg(RAX);
 511 
 512 // Singleton class for RBX int register
 513 reg_class int_rbx_reg(RBX);
 514 
 515 // Singleton class for RCX int register
 516 reg_class int_rcx_reg(RCX);
 517 
 518 // Singleton class for RCX int register
 519 reg_class int_rdx_reg(RDX);
 520 
 521 // Singleton class for RCX int register
 522 reg_class int_rdi_reg(RDI);
 523 
 524 // Singleton class for instruction pointer
 525 // reg_class ip_reg(RIP);
 526 
 527 %}
 528 
 529 source_hpp %{
 530 #if INCLUDE_ALL_GCS
 531 #include "shenandoahBarrierSetAssembler_x86.hpp"
 532 #endif
 533 %}
 534 
 535 //----------SOURCE BLOCK-------------------------------------------------------
 536 // This is a block of C++ code which provides values, functions, and
 537 // definitions necessary in the rest of the architecture description
 538 source %{
 539 #define   RELOC_IMM64    Assembler::imm_operand
 540 #define   RELOC_DISP32   Assembler::disp32_operand
 541 
 542 #define __ _masm.
 543 
 544 static int clear_avx_size() {
 545   return (Compile::current()->max_vector_size() > 16) ? 3 : 0;  // vzeroupper
 546 }
 547 
 548 // !!!!! Special hack to get all types of calls to specify the byte offset
 549 //       from the start of the call to the point where the return address
 550 //       will point.
 551 int MachCallStaticJavaNode::ret_addr_offset()
 552 {
 553   int offset = 5; // 5 bytes from start of call to where return address points
 554   offset += clear_avx_size();  


7259 %{
7260   match(Set cr (StoreLConditional mem (Binary oldval newval)));
7261   effect(KILL oldval);
7262 
7263   format %{ "cmpxchgq $mem, $newval\t# If rax == $mem then store $newval into $mem" %}
7264   opcode(0x0F, 0xB1);
7265   ins_encode(lock_prefix,
7266              REX_reg_mem_wide(newval, mem),
7267              OpcP, OpcS,
7268              reg_mem(newval, mem));
7269   ins_pipe(pipe_cmpxchg);
7270 %}
7271 
7272 
7273 // XXX No flag versions for CompareAndSwap{P,I,L} because matcher can't match them
7274 instruct compareAndSwapP(rRegI res,
7275                          memory mem_ptr,
7276                          rax_RegP oldval, rRegP newval,
7277                          rFlagsReg cr)
7278 %{
7279   predicate(VM_Version::supports_cx8() && (!UseShenandoahGC || !ShenandoahCASBarrier || n->in(3)->in(1)->bottom_type() == TypePtr::NULL_PTR));
7280   match(Set res (CompareAndSwapP mem_ptr (Binary oldval newval)));
7281   effect(KILL cr, KILL oldval);
7282 
7283   format %{ "cmpxchgq $mem_ptr,$newval\t# "
7284             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7285             "sete    $res\n\t"
7286             "movzbl  $res, $res" %}
7287   opcode(0x0F, 0xB1);
7288   ins_encode(lock_prefix,
7289              REX_reg_mem_wide(newval, mem_ptr),
7290              OpcP, OpcS,
7291              reg_mem(newval, mem_ptr),
7292              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7293              REX_reg_breg(res, res), // movzbl
7294              Opcode(0xF), Opcode(0xB6), reg_reg(res, res));
7295   ins_pipe( pipe_cmpxchg );
7296 %}
7297 
7298 instruct compareAndSwapP_shenandoah(rRegI res,
7299                                     memory mem_ptr,
7300                                     rRegP tmp1, rRegP tmp2,
7301                                     rax_RegP oldval, rRegP newval,
7302                                     rFlagsReg cr)
7303 %{
7304   predicate(VM_Version::supports_cx8() && UseShenandoahGC && ShenandoahCASBarrier && n->in(3)->in(1)->bottom_type() != TypePtr::NULL_PTR);
7305   match(Set res (CompareAndSwapP mem_ptr (Binary oldval newval)));
7306   effect(TEMP tmp1, TEMP tmp2, KILL cr, KILL oldval);
7307 
7308   format %{ "shenandoah_cas_oop $mem_ptr,$newval" %}
7309 
7310   ins_encode %{
7311     ShenandoahBarrierSetAssembler::bsasm()->cmpxchg_oop(&_masm, $res$$Register, $mem_ptr$$Address, $oldval$$Register, $newval$$Register,
7312             false, // swap
7313             $tmp1$$Register, $tmp2$$Register
7314     );
7315   %}
7316   ins_pipe( pipe_cmpxchg );
7317 %}
7318 
7319 instruct compareAndSwapL(rRegI res,
7320                          memory mem_ptr,
7321                          rax_RegL oldval, rRegL newval,
7322                          rFlagsReg cr)
7323 %{
7324   predicate(VM_Version::supports_cx8());
7325   match(Set res (CompareAndSwapL mem_ptr (Binary oldval newval)));
7326   effect(KILL cr, KILL oldval);
7327 
7328   format %{ "cmpxchgq $mem_ptr,$newval\t# "
7329             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7330             "sete    $res\n\t"
7331             "movzbl  $res, $res" %}
7332   opcode(0x0F, 0xB1);
7333   ins_encode(lock_prefix,
7334              REX_reg_mem_wide(newval, mem_ptr),
7335              OpcP, OpcS,
7336              reg_mem(newval, mem_ptr),
7337              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7338              REX_reg_breg(res, res), // movzbl


7351   format %{ "cmpxchgl $mem_ptr,$newval\t# "
7352             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7353             "sete    $res\n\t"
7354             "movzbl  $res, $res" %}
7355   opcode(0x0F, 0xB1);
7356   ins_encode(lock_prefix,
7357              REX_reg_mem(newval, mem_ptr),
7358              OpcP, OpcS,
7359              reg_mem(newval, mem_ptr),
7360              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7361              REX_reg_breg(res, res), // movzbl
7362              Opcode(0xF), Opcode(0xB6), reg_reg(res, res));
7363   ins_pipe( pipe_cmpxchg );
7364 %}
7365 
7366 
7367 instruct compareAndSwapN(rRegI res,
7368                           memory mem_ptr,
7369                           rax_RegN oldval, rRegN newval,
7370                           rFlagsReg cr) %{
7371   predicate(!UseShenandoahGC || !ShenandoahCASBarrier || n->in(3)->in(1)->bottom_type() == TypeNarrowOop::NULL_PTR);
7372   match(Set res (CompareAndSwapN mem_ptr (Binary oldval newval)));
7373   effect(KILL cr, KILL oldval);
7374 
7375   format %{ "cmpxchgl $mem_ptr,$newval\t# "
7376             "If rax == $mem_ptr then store $newval into $mem_ptr\n\t"
7377             "sete    $res\n\t"
7378             "movzbl  $res, $res" %}
7379   opcode(0x0F, 0xB1);
7380   ins_encode(lock_prefix,
7381              REX_reg_mem(newval, mem_ptr),
7382              OpcP, OpcS,
7383              reg_mem(newval, mem_ptr),
7384              REX_breg(res), Opcode(0x0F), Opcode(0x94), reg(res), // sete
7385              REX_reg_breg(res, res), // movzbl
7386              Opcode(0xF), Opcode(0xB6), reg_reg(res, res));
7387   ins_pipe( pipe_cmpxchg );
7388 %}
7389 
7390 instruct compareAndSwapN_shenandoah(rRegI res,
7391                                     memory mem_ptr,
7392                                     rRegP tmp1, rRegP tmp2,
7393                                     rax_RegN oldval, rRegN newval,
7394                                     rFlagsReg cr) %{
7395   predicate(UseShenandoahGC && ShenandoahCASBarrier && n->in(3)->in(1)->bottom_type() != TypeNarrowOop::NULL_PTR);
7396   match(Set res (CompareAndSwapN mem_ptr (Binary oldval newval)));
7397   effect(TEMP tmp1, TEMP tmp2, KILL cr, KILL oldval);
7398 
7399   format %{ "shenandoah_cas_oop $mem_ptr,$newval" %}
7400 
7401   ins_encode %{
7402     ShenandoahBarrierSetAssembler::bsasm()->cmpxchg_oop(&_masm, $res$$Register, $mem_ptr$$Address, $oldval$$Register, $newval$$Register,
7403             false, // swap
7404             $tmp1$$Register, $tmp2$$Register
7405     );
7406   %}
7407   ins_pipe( pipe_cmpxchg );
7408 %}
7409 
7410 instruct xaddI_no_res( memory mem, Universe dummy, immI add, rFlagsReg cr) %{
7411   predicate(n->as_LoadStore()->result_not_used());
7412   match(Set dummy (GetAndAddI mem add));
7413   effect(KILL cr);
7414   format %{ "ADDL  [$mem],$add" %}
7415   ins_encode %{
7416     if (os::is_MP()) { __ lock(); }
7417     __ addl($mem$$Address, $add$$constant);
7418   %}
7419   ins_pipe( pipe_cmpxchg );
7420 %}
7421 
7422 instruct xaddI( memory mem, rRegI newval, rFlagsReg cr) %{
7423   match(Set newval (GetAndAddI mem newval));
7424   effect(KILL cr);
7425   format %{ "XADDL  [$mem],$newval" %}
7426   ins_encode %{
7427     if (os::is_MP()) { __ lock(); }
7428     __ xaddl($mem$$Address, $newval$$Register);
7429   %}


11196 %}
11197 
11198 instruct compUL_rReg_mem(rFlagsRegU cr, rRegL op1, memory op2)
11199 %{
11200   match(Set cr (CmpUL op1 (LoadL op2)));
11201 
11202   format %{ "cmpq    $op1, $op2\t# unsigned" %}
11203   opcode(0x3B); /* Opcode 3B /r */
11204   ins_encode(REX_reg_mem_wide(op1, op2), OpcP, reg_mem(op1, op2));
11205   ins_pipe(ialu_cr_reg_mem);
11206 %}
11207 
11208 instruct testUL_reg(rFlagsRegU cr, rRegL src, immL0 zero)
11209 %{
11210   match(Set cr (CmpUL src zero));
11211 
11212   format %{ "testq   $src, $src\t# unsigned" %}
11213   opcode(0x85);
11214   ins_encode(REX_reg_reg_wide(src, src), OpcP, reg_reg(src, src));
11215   ins_pipe(ialu_cr_reg_imm);
11216 %}
11217 
11218 instruct compB_mem_imm(rFlagsReg cr, memory mem, immI8 imm)
11219 %{
11220   // This match is actually generic, but protect with Shenandoah flag,
11221   // because it is not tested upstream.
11222   predicate(UseShenandoahGC);
11223   match(Set cr (CmpI (LoadB mem) imm));
11224 
11225   ins_cost(125);
11226   format %{ "cmpb    $mem, $imm" %}
11227   ins_encode %{ __ cmpb($mem$$Address, $imm$$constant); %}
11228   ins_pipe(ialu_cr_reg_mem);
11229 %}
11230 
11231 instruct testB_mem_imm(rFlagsReg cr, memory mem, immI8 imm, immI0 zero)
11232 %{
11233   // This match is actually generic, but protect with Shenandoah flag,
11234   // because it is not tested upstream
11235   predicate(UseShenandoahGC);
11236   match(Set cr (CmpI (AndI (LoadB mem) imm) zero));
11237 
11238   ins_cost(125);
11239   format %{ "testb   $mem, $imm" %}
11240   ins_encode %{ __ testb($mem$$Address, $imm$$constant); %}
11241   ins_pipe(ialu_cr_reg_mem);
11242 %}
11243 
11244 //----------Max and Min--------------------------------------------------------
11245 // Min Instructions
11246 
11247 instruct cmovI_reg_g(rRegI dst, rRegI src, rFlagsReg cr)
11248 %{
11249   effect(USE_DEF dst, USE src, USE cr);
11250 
11251   format %{ "cmovlgt $dst, $src\t# min" %}
11252   opcode(0x0F, 0x4F);
11253   ins_encode(REX_reg_reg(dst, src), OpcP, OpcS, reg_reg(dst, src));
11254   ins_pipe(pipe_cmov_reg);
11255 %}
11256 
11257 
11258 instruct minI_rReg(rRegI dst, rRegI src)
11259 %{
11260   match(Set dst (MinI dst src));
11261 


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