1 /*
   2  * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/addnode.hpp"
  28 #include "opto/connode.hpp"
  29 #include "opto/memnode.hpp"
  30 #include "opto/mulnode.hpp"
  31 #include "opto/phaseX.hpp"
  32 #include "opto/subnode.hpp"
  33 #include "utilities/macros.hpp"
  34 #if INCLUDE_ALL_GCS
  35 #include "gc_implementation/shenandoah/c2/shenandoahSupport.hpp"
  36 #endif
  37 
  38 // Portions of code courtesy of Clifford Click
  39 
  40 
  41 //=============================================================================
  42 //------------------------------hash-------------------------------------------
  43 // Hash function over MulNodes.  Needs to be commutative; i.e., I swap
  44 // (commute) inputs to MulNodes willy-nilly so the hash function must return
  45 // the same value in the presence of edge swapping.
  46 uint MulNode::hash() const {
  47   return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
  48 }
  49 
  50 //------------------------------Identity---------------------------------------
  51 // Multiplying a one preserves the other argument
  52 Node *MulNode::Identity( PhaseTransform *phase ) {
  53   register const Type *one = mul_id();  // The multiplicative identity
  54   if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
  55   if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
  56 
  57   return this;
  58 }
  59 
  60 //------------------------------Ideal------------------------------------------
  61 // We also canonicalize the Node, moving constants to the right input,
  62 // and flatten expressions (so that 1+x+2 becomes x+3).
  63 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
  64   const Type *t1 = phase->type( in(1) );
  65   const Type *t2 = phase->type( in(2) );
  66   Node *progress = NULL;        // Progress flag
  67   // We are OK if right is a constant, or right is a load and
  68   // left is a non-constant.
  69   if( !(t2->singleton() ||
  70         (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
  71     if( t1->singleton() ||       // Left input is a constant?
  72         // Otherwise, sort inputs (commutativity) to help value numbering.
  73         (in(1)->_idx > in(2)->_idx) ) {
  74       swap_edges(1, 2);
  75       const Type *t = t1;
  76       t1 = t2;
  77       t2 = t;
  78       progress = this;            // Made progress
  79     }
  80   }
  81 
  82   // If the right input is a constant, and the left input is a product of a
  83   // constant, flatten the expression tree.
  84   uint op = Opcode();
  85   if( t2->singleton() &&        // Right input is a constant?
  86       op != Op_MulF &&          // Float & double cannot reassociate
  87       op != Op_MulD ) {
  88     if( t2 == Type::TOP ) return NULL;
  89     Node *mul1 = in(1);
  90 #ifdef ASSERT
  91     // Check for dead loop
  92     int   op1 = mul1->Opcode();
  93     if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
  94         ( op1 == mul_opcode() || op1 == add_opcode() ) &&
  95         ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
  96           phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
  97       assert(false, "dead loop in MulNode::Ideal");
  98 #endif
  99 
 100     if( mul1->Opcode() == mul_opcode() ) {  // Left input is a multiply?
 101       // Mul of a constant?
 102       const Type *t12 = phase->type( mul1->in(2) );
 103       if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
 104         // Compute new constant; check for overflow
 105         const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
 106         if( tcon01->singleton() ) {
 107           // The Mul of the flattened expression
 108           set_req(1, mul1->in(1));
 109           set_req(2, phase->makecon( tcon01 ));
 110           t2 = tcon01;
 111           progress = this;      // Made progress
 112         }
 113       }
 114     }
 115     // If the right input is a constant, and the left input is an add of a
 116     // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
 117     const Node *add1 = in(1);
 118     if( add1->Opcode() == add_opcode() ) {      // Left input is an add?
 119       // Add of a constant?
 120       const Type *t12 = phase->type( add1->in(2) );
 121       if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
 122         assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
 123         // Compute new constant; check for overflow
 124         const Type *tcon01 = mul_ring(t2,t12);
 125         if( tcon01->singleton() ) {
 126 
 127         // Convert (X+con1)*con0 into X*con0
 128           Node *mul = clone();    // mul = ()*con0
 129           mul->set_req(1,add1->in(1));  // mul = X*con0
 130           mul = phase->transform(mul);
 131 
 132           Node *add2 = add1->clone();
 133           add2->set_req(1, mul);        // X*con0 + con0*con1
 134           add2->set_req(2, phase->makecon(tcon01) );
 135           progress = add2;
 136         }
 137       }
 138     } // End of is left input an add
 139   } // End of is right input a Mul
 140 
 141   return progress;
 142 }
 143 
 144 //------------------------------Value-----------------------------------------
 145 const Type *MulNode::Value( PhaseTransform *phase ) const {
 146   const Type *t1 = phase->type( in(1) );
 147   const Type *t2 = phase->type( in(2) );
 148   // Either input is TOP ==> the result is TOP
 149   if( t1 == Type::TOP ) return Type::TOP;
 150   if( t2 == Type::TOP ) return Type::TOP;
 151 
 152   // Either input is ZERO ==> the result is ZERO.
 153   // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
 154   int op = Opcode();
 155   if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
 156     const Type *zero = add_id();        // The multiplicative zero
 157     if( t1->higher_equal( zero ) ) return zero;
 158     if( t2->higher_equal( zero ) ) return zero;
 159   }
 160 
 161   // Either input is BOTTOM ==> the result is the local BOTTOM
 162   if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
 163     return bottom_type();
 164 
 165 #if defined(IA32)
 166   // Can't trust native compilers to properly fold strict double
 167   // multiplication with round-to-zero on this platform.
 168   if (op == Op_MulD && phase->C->method()->is_strict()) {
 169     return TypeD::DOUBLE;
 170   }
 171 #endif
 172 
 173   return mul_ring(t1,t2);            // Local flavor of type multiplication
 174 }
 175 
 176 //=============================================================================
 177 //------------------------------Ideal------------------------------------------
 178 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 179 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 180   // Swap constant to right
 181   jint con;
 182   if ((con = in(1)->find_int_con(0)) != 0) {
 183     swap_edges(1, 2);
 184     // Finish rest of method to use info in 'con'
 185   } else if ((con = in(2)->find_int_con(0)) == 0) {
 186     return MulNode::Ideal(phase, can_reshape);
 187   }
 188 
 189   // Now we have a constant Node on the right and the constant in con
 190   if (con == 0) return NULL;   // By zero is handled by Value call
 191   if (con == 1) return NULL;   // By one  is handled by Identity call
 192 
 193   // Check for negative constant; if so negate the final result
 194   bool sign_flip = false;
 195 
 196   unsigned int abs_con = uabs(con);
 197   if (abs_con != (unsigned int)con) {
 198     sign_flip = true;
 199   }
 200 
 201   // Get low bit; check for being the only bit
 202   Node *res = NULL;
 203   unsigned int bit1 = abs_con & (0-abs_con);       // Extract low bit
 204   if (bit1 == abs_con) {           // Found a power of 2?
 205     res = new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit1)));
 206   } else {
 207 
 208     // Check for constant with 2 bits set
 209     unsigned int bit2 = abs_con-bit1;
 210     bit2 = bit2 & (0-bit2);          // Extract 2nd bit
 211     if (bit2 + bit1 == abs_con) {    // Found all bits in con?
 212       Node *n1 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit1))));
 213       Node *n2 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit2))));
 214       res = new (phase->C) AddINode(n2, n1);
 215 
 216     } else if (is_power_of_2(abs_con+1)) {
 217       // Sleezy: power-of-2 -1.  Next time be generic.
 218       unsigned int temp = abs_con + 1;
 219       Node *n1 = phase->transform(new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(temp))));
 220       res = new (phase->C) SubINode(n1, in(1));
 221     } else {
 222       return MulNode::Ideal(phase, can_reshape);
 223     }
 224   }
 225 
 226   if (sign_flip) {             // Need to negate result?
 227     res = phase->transform(res);// Transform, before making the zero con
 228     res = new (phase->C) SubINode(phase->intcon(0),res);
 229   }
 230 
 231   return res;                   // Return final result
 232 }
 233 
 234 //------------------------------mul_ring---------------------------------------
 235 // Compute the product type of two integer ranges into this node.
 236 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
 237   const TypeInt *r0 = t0->is_int(); // Handy access
 238   const TypeInt *r1 = t1->is_int();
 239 
 240   // Fetch endpoints of all ranges
 241   int32 lo0 = r0->_lo;
 242   double a = (double)lo0;
 243   int32 hi0 = r0->_hi;
 244   double b = (double)hi0;
 245   int32 lo1 = r1->_lo;
 246   double c = (double)lo1;
 247   int32 hi1 = r1->_hi;
 248   double d = (double)hi1;
 249 
 250   // Compute all endpoints & check for overflow
 251   int32 A = java_multiply(lo0, lo1);
 252   if( (double)A != a*c ) return TypeInt::INT; // Overflow?
 253   int32 B = java_multiply(lo0, hi1);
 254   if( (double)B != a*d ) return TypeInt::INT; // Overflow?
 255   int32 C = java_multiply(hi0, lo1);
 256   if( (double)C != b*c ) return TypeInt::INT; // Overflow?
 257   int32 D = java_multiply(hi0, hi1);
 258   if( (double)D != b*d ) return TypeInt::INT; // Overflow?
 259 
 260   if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
 261   else { lo0 = B; hi0 = A; }
 262   if( C < D ) {
 263     if( C < lo0 ) lo0 = C;
 264     if( D > hi0 ) hi0 = D;
 265   } else {
 266     if( D < lo0 ) lo0 = D;
 267     if( C > hi0 ) hi0 = C;
 268   }
 269   return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
 270 }
 271 
 272 
 273 //=============================================================================
 274 //------------------------------Ideal------------------------------------------
 275 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
 276 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 277   // Swap constant to right
 278   jlong con;
 279   if ((con = in(1)->find_long_con(0)) != 0) {
 280     swap_edges(1, 2);
 281     // Finish rest of method to use info in 'con'
 282   } else if ((con = in(2)->find_long_con(0)) == 0) {
 283     return MulNode::Ideal(phase, can_reshape);
 284   }
 285 
 286   // Now we have a constant Node on the right and the constant in con
 287   if (con == CONST64(0)) return NULL;  // By zero is handled by Value call
 288   if (con == CONST64(1)) return NULL;  // By one  is handled by Identity call
 289 
 290   // Check for negative constant; if so negate the final result
 291   bool sign_flip = false;
 292   julong abs_con = uabs(con);
 293   if (abs_con != (julong)con) {
 294     sign_flip = true;
 295   }
 296 
 297   // Get low bit; check for being the only bit
 298   Node *res = NULL;
 299   julong bit1 = abs_con & (0-abs_con);      // Extract low bit
 300   if (bit1 == abs_con) {           // Found a power of 2?
 301     res = new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(bit1)));
 302   } else {
 303 
 304     // Check for constant with 2 bits set
 305     julong bit2 = abs_con-bit1;
 306     bit2 = bit2 & (0-bit2);          // Extract 2nd bit
 307     if (bit2 + bit1 == abs_con) {    // Found all bits in con?
 308       Node *n1 = phase->transform(new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(bit1))));
 309       Node *n2 = phase->transform(new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(bit2))));
 310       res = new (phase->C) AddLNode(n2, n1);
 311 
 312     } else if (is_power_of_2_long(abs_con+1)) {
 313       // Sleezy: power-of-2 -1.  Next time be generic.
 314       julong temp = abs_con + 1;
 315       Node *n1 = phase->transform( new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(temp))));
 316       res = new (phase->C) SubLNode(n1, in(1));
 317     } else {
 318       return MulNode::Ideal(phase, can_reshape);
 319     }
 320   }
 321 
 322   if (sign_flip) {             // Need to negate result?
 323     res = phase->transform(res);// Transform, before making the zero con
 324     res = new (phase->C) SubLNode(phase->longcon(0),res);
 325   }
 326 
 327   return res;                   // Return final result
 328 }
 329 
 330 //------------------------------mul_ring---------------------------------------
 331 // Compute the product type of two integer ranges into this node.
 332 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
 333   const TypeLong *r0 = t0->is_long(); // Handy access
 334   const TypeLong *r1 = t1->is_long();
 335 
 336   // Fetch endpoints of all ranges
 337   jlong lo0 = r0->_lo;
 338   double a = (double)lo0;
 339   jlong hi0 = r0->_hi;
 340   double b = (double)hi0;
 341   jlong lo1 = r1->_lo;
 342   double c = (double)lo1;
 343   jlong hi1 = r1->_hi;
 344   double d = (double)hi1;
 345 
 346   // Compute all endpoints & check for overflow
 347   jlong A = java_multiply(lo0, lo1);
 348   if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
 349   jlong B = java_multiply(lo0, hi1);
 350   if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
 351   jlong C = java_multiply(hi0, lo1);
 352   if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
 353   jlong D = java_multiply(hi0, hi1);
 354   if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
 355 
 356   if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
 357   else { lo0 = B; hi0 = A; }
 358   if( C < D ) {
 359     if( C < lo0 ) lo0 = C;
 360     if( D > hi0 ) hi0 = D;
 361   } else {
 362     if( D < lo0 ) lo0 = D;
 363     if( C > hi0 ) hi0 = C;
 364   }
 365   return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
 366 }
 367 
 368 //=============================================================================
 369 //------------------------------mul_ring---------------------------------------
 370 // Compute the product type of two double ranges into this node.
 371 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
 372   if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
 373   return TypeF::make( t0->getf() * t1->getf() );
 374 }
 375 
 376 //=============================================================================
 377 //------------------------------mul_ring---------------------------------------
 378 // Compute the product type of two double ranges into this node.
 379 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
 380   if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
 381   // We must be multiplying 2 double constants.
 382   return TypeD::make( t0->getd() * t1->getd() );
 383 }
 384 
 385 //=============================================================================
 386 //------------------------------Value------------------------------------------
 387 const Type *MulHiLNode::Value( PhaseTransform *phase ) const {
 388   // Either input is TOP ==> the result is TOP
 389   const Type *t1 = phase->type( in(1) );
 390   const Type *t2 = phase->type( in(2) );
 391   if( t1 == Type::TOP ) return Type::TOP;
 392   if( t2 == Type::TOP ) return Type::TOP;
 393 
 394   // Either input is BOTTOM ==> the result is the local BOTTOM
 395   const Type *bot = bottom_type();
 396   if( (t1 == bot) || (t2 == bot) ||
 397       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 398     return bot;
 399 
 400   // It is not worth trying to constant fold this stuff!
 401   return TypeLong::LONG;
 402 }
 403 
 404 //=============================================================================
 405 //------------------------------mul_ring---------------------------------------
 406 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 407 // For the logical operations the ring's MUL is really a logical AND function.
 408 // This also type-checks the inputs for sanity.  Guaranteed never to
 409 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 410 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
 411   const TypeInt *r0 = t0->is_int(); // Handy access
 412   const TypeInt *r1 = t1->is_int();
 413   int widen = MAX2(r0->_widen,r1->_widen);
 414 
 415   // If either input is a constant, might be able to trim cases
 416   if( !r0->is_con() && !r1->is_con() )
 417     return TypeInt::INT;        // No constants to be had
 418 
 419   // Both constants?  Return bits
 420   if( r0->is_con() && r1->is_con() )
 421     return TypeInt::make( r0->get_con() & r1->get_con() );
 422 
 423   if( r0->is_con() && r0->get_con() > 0 )
 424     return TypeInt::make(0, r0->get_con(), widen);
 425 
 426   if( r1->is_con() && r1->get_con() > 0 )
 427     return TypeInt::make(0, r1->get_con(), widen);
 428 
 429   if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
 430     return TypeInt::BOOL;
 431   }
 432 
 433   return TypeInt::INT;          // No constants to be had
 434 }
 435 
 436 //------------------------------Identity---------------------------------------
 437 // Masking off the high bits of an unsigned load is not required
 438 Node *AndINode::Identity( PhaseTransform *phase ) {
 439 
 440   // x & x => x
 441   if (phase->eqv(in(1), in(2))) return in(1);
 442 
 443   Node* in1 = in(1);
 444   uint op = in1->Opcode();
 445   const TypeInt* t2 = phase->type(in(2))->isa_int();
 446   if (t2 && t2->is_con()) {
 447     int con = t2->get_con();
 448     // Masking off high bits which are always zero is useless.
 449     const TypeInt* t1 = phase->type( in(1) )->isa_int();
 450     if (t1 != NULL && t1->_lo >= 0) {
 451       jint t1_support = right_n_bits(1 + log2_jint(t1->_hi));
 452       if ((t1_support & con) == t1_support)
 453         return in1;
 454     }
 455     // Masking off the high bits of a unsigned-shift-right is not
 456     // needed either.
 457     if (op == Op_URShiftI) {
 458       const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 459       if (t12 && t12->is_con()) {  // Shift is by a constant
 460         int shift = t12->get_con();
 461         shift &= BitsPerJavaInteger - 1;  // semantics of Java shifts
 462         int mask = max_juint >> shift;
 463         if ((mask & con) == mask)  // If AND is useless, skip it
 464           return in1;
 465       }
 466     }
 467   }
 468   return MulNode::Identity(phase);
 469 }
 470 
 471 //------------------------------Ideal------------------------------------------
 472 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 473   // Special case constant AND mask
 474   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 475   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 476   const int mask = t2->get_con();
 477   Node *load = in(1);
 478   uint lop = load->Opcode();
 479 
 480 #if INCLUDE_ALL_GCS
 481   if (UseShenandoahGC && ShenandoahBarrierC2Support::is_gc_state_load(load)) {
 482     // Do not touch the load+mask, we would match the whole sequence exactly.
 483     // Converting the load to LoadUB/LoadUS would mismatch and waste a register
 484     // on the barrier fastpath.
 485     return NULL;
 486   }
 487 #endif
 488 
 489   // Masking bits off of a Character?  Hi bits are already zero.
 490   if( lop == Op_LoadUS &&
 491       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 492     return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
 493 
 494   // Masking bits off of a Short?  Loading a Character does some masking
 495   if (can_reshape &&
 496       load->outcnt() == 1 && load->unique_out() == this) {
 497     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 498       Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
 499                                              load->in(MemNode::Memory),
 500                                              load->in(MemNode::Address),
 501                                              load->adr_type(),
 502                                              TypeInt::CHAR, MemNode::unordered);
 503       ldus = phase->transform(ldus);
 504       return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
 505     }
 506 
 507     // Masking sign bits off of a Byte?  Do an unsigned byte load plus
 508     // an and.
 509     if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
 510       Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control),
 511                                              load->in(MemNode::Memory),
 512                                              load->in(MemNode::Address),
 513                                              load->adr_type(),
 514                                              TypeInt::UBYTE, MemNode::unordered);
 515       ldub = phase->transform(ldub);
 516       return new (phase->C) AndINode(ldub, phase->intcon(mask));
 517     }
 518   }
 519 
 520   // Masking off sign bits?  Dont make them!
 521   if( lop == Op_RShiftI ) {
 522     const TypeInt *t12 = phase->type(load->in(2))->isa_int();
 523     if( t12 && t12->is_con() ) { // Shift is by a constant
 524       int shift = t12->get_con();
 525       shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 526       const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
 527       // If the AND'ing of the 2 masks has no bits, then only original shifted
 528       // bits survive.  NO sign-extension bits survive the maskings.
 529       if( (sign_bits_mask & mask) == 0 ) {
 530         // Use zero-fill shift instead
 531         Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2)));
 532         return new (phase->C) AndINode( zshift, in(2) );
 533       }
 534     }
 535   }
 536 
 537   // Check for 'negate/and-1', a pattern emitted when someone asks for
 538   // 'mod 2'.  Negate leaves the low order bit unchanged (think: complement
 539   // plus 1) and the mask is of the low order bit.  Skip the negate.
 540   if( lop == Op_SubI && mask == 1 && load->in(1) &&
 541       phase->type(load->in(1)) == TypeInt::ZERO )
 542     return new (phase->C) AndINode( load->in(2), in(2) );
 543 
 544   return MulNode::Ideal(phase, can_reshape);
 545 }
 546 
 547 //=============================================================================
 548 //------------------------------mul_ring---------------------------------------
 549 // Supplied function returns the product of the inputs IN THE CURRENT RING.
 550 // For the logical operations the ring's MUL is really a logical AND function.
 551 // This also type-checks the inputs for sanity.  Guaranteed never to
 552 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
 553 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
 554   const TypeLong *r0 = t0->is_long(); // Handy access
 555   const TypeLong *r1 = t1->is_long();
 556   int widen = MAX2(r0->_widen,r1->_widen);
 557 
 558   // If either input is a constant, might be able to trim cases
 559   if( !r0->is_con() && !r1->is_con() )
 560     return TypeLong::LONG;      // No constants to be had
 561 
 562   // Both constants?  Return bits
 563   if( r0->is_con() && r1->is_con() )
 564     return TypeLong::make( r0->get_con() & r1->get_con() );
 565 
 566   if( r0->is_con() && r0->get_con() > 0 )
 567     return TypeLong::make(CONST64(0), r0->get_con(), widen);
 568 
 569   if( r1->is_con() && r1->get_con() > 0 )
 570     return TypeLong::make(CONST64(0), r1->get_con(), widen);
 571 
 572   return TypeLong::LONG;        // No constants to be had
 573 }
 574 
 575 //------------------------------Identity---------------------------------------
 576 // Masking off the high bits of an unsigned load is not required
 577 Node *AndLNode::Identity( PhaseTransform *phase ) {
 578 
 579   // x & x => x
 580   if (phase->eqv(in(1), in(2))) return in(1);
 581 
 582   Node *usr = in(1);
 583   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 584   if( t2 && t2->is_con() ) {
 585     jlong con = t2->get_con();
 586     // Masking off high bits which are always zero is useless.
 587     const TypeLong* t1 = phase->type( in(1) )->isa_long();
 588     if (t1 != NULL && t1->_lo >= 0) {
 589       int bit_count = log2_long(t1->_hi) + 1;
 590       jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
 591       if ((t1_support & con) == t1_support)
 592         return usr;
 593     }
 594     uint lop = usr->Opcode();
 595     // Masking off the high bits of a unsigned-shift-right is not
 596     // needed either.
 597     if( lop == Op_URShiftL ) {
 598       const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
 599       if( t12 && t12->is_con() ) {  // Shift is by a constant
 600         int shift = t12->get_con();
 601         shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 602         jlong mask = max_julong >> shift;
 603         if( (mask&con) == mask )  // If AND is useless, skip it
 604           return usr;
 605       }
 606     }
 607   }
 608   return MulNode::Identity(phase);
 609 }
 610 
 611 //------------------------------Ideal------------------------------------------
 612 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 613   // Special case constant AND mask
 614   const TypeLong *t2 = phase->type( in(2) )->isa_long();
 615   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 616   const jlong mask = t2->get_con();
 617 
 618   Node* in1 = in(1);
 619   uint op = in1->Opcode();
 620 
 621   // Are we masking a long that was converted from an int with a mask
 622   // that fits in 32-bits?  Commute them and use an AndINode.  Don't
 623   // convert masks which would cause a sign extension of the integer
 624   // value.  This check includes UI2L masks (0x00000000FFFFFFFF) which
 625   // would be optimized away later in Identity.
 626   if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
 627     Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask));
 628     andi = phase->transform(andi);
 629     return new (phase->C) ConvI2LNode(andi);
 630   }
 631 
 632   // Masking off sign bits?  Dont make them!
 633   if (op == Op_RShiftL) {
 634     const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 635     if( t12 && t12->is_con() ) { // Shift is by a constant
 636       int shift = t12->get_con();
 637       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 638       const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
 639       // If the AND'ing of the 2 masks has no bits, then only original shifted
 640       // bits survive.  NO sign-extension bits survive the maskings.
 641       if( (sign_bits_mask & mask) == 0 ) {
 642         // Use zero-fill shift instead
 643         Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2)));
 644         return new (phase->C) AndLNode(zshift, in(2));
 645       }
 646     }
 647   }
 648 
 649   return MulNode::Ideal(phase, can_reshape);
 650 }
 651 
 652 //=============================================================================
 653 //------------------------------Identity---------------------------------------
 654 Node *LShiftINode::Identity( PhaseTransform *phase ) {
 655   const TypeInt *ti = phase->type( in(2) )->isa_int();  // shift count is an int
 656   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
 657 }
 658 
 659 //------------------------------Ideal------------------------------------------
 660 // If the right input is a constant, and the left input is an add of a
 661 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 662 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 663   const Type *t  = phase->type( in(2) );
 664   if( t == Type::TOP ) return NULL;       // Right input is dead
 665   const TypeInt *t2 = t->isa_int();
 666   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 667   const int con = t2->get_con() & ( BitsPerInt - 1 );  // masked shift count
 668 
 669   if ( con == 0 )  return NULL; // let Identity() handle 0 shift count
 670 
 671   // Left input is an add of a constant?
 672   Node *add1 = in(1);
 673   int add1_op = add1->Opcode();
 674   if( add1_op == Op_AddI ) {    // Left input is an add?
 675     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 676     const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 677     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 678       // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 679       // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 680       if( con < 16 ) {
 681         // Compute X << con0
 682         Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) );
 683         // Compute X<<con0 + (con1<<con0)
 684         return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con));
 685       }
 686     }
 687   }
 688 
 689   // Check for "(x>>c0)<<c0" which just masks off low bits
 690   if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
 691       add1->in(2) == in(2) )
 692     // Convert to "(x & -(1<<c0))"
 693     return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con)));
 694 
 695   // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
 696   if( add1_op == Op_AndI ) {
 697     Node *add2 = add1->in(1);
 698     int add2_op = add2->Opcode();
 699     if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
 700         add2->in(2) == in(2) ) {
 701       // Convert to "(x & (Y<<c0))"
 702       Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) );
 703       return new (phase->C) AndINode( add2->in(1), y_sh );
 704     }
 705   }
 706 
 707   // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
 708   // before shifting them away.
 709   const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
 710   if( add1_op == Op_AndI &&
 711       phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
 712     return new (phase->C) LShiftINode( add1->in(1), in(2) );
 713 
 714   return NULL;
 715 }
 716 
 717 //------------------------------Value------------------------------------------
 718 // A LShiftINode shifts its input2 left by input1 amount.
 719 const Type *LShiftINode::Value( PhaseTransform *phase ) const {
 720   const Type *t1 = phase->type( in(1) );
 721   const Type *t2 = phase->type( in(2) );
 722   // Either input is TOP ==> the result is TOP
 723   if( t1 == Type::TOP ) return Type::TOP;
 724   if( t2 == Type::TOP ) return Type::TOP;
 725 
 726   // Left input is ZERO ==> the result is ZERO.
 727   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
 728   // Shift by zero does nothing
 729   if( t2 == TypeInt::ZERO ) return t1;
 730 
 731   // Either input is BOTTOM ==> the result is BOTTOM
 732   if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
 733       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 734     return TypeInt::INT;
 735 
 736   const TypeInt *r1 = t1->is_int(); // Handy access
 737   const TypeInt *r2 = t2->is_int(); // Handy access
 738 
 739   if (!r2->is_con())
 740     return TypeInt::INT;
 741 
 742   uint shift = r2->get_con();
 743   shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 744   // Shift by a multiple of 32 does nothing:
 745   if (shift == 0)  return t1;
 746 
 747   // If the shift is a constant, shift the bounds of the type,
 748   // unless this could lead to an overflow.
 749   if (!r1->is_con()) {
 750     jint lo = r1->_lo, hi = r1->_hi;
 751     if (((lo << shift) >> shift) == lo &&
 752         ((hi << shift) >> shift) == hi) {
 753       // No overflow.  The range shifts up cleanly.
 754       return TypeInt::make((jint)lo << (jint)shift,
 755                            (jint)hi << (jint)shift,
 756                            MAX2(r1->_widen,r2->_widen));
 757     }
 758     return TypeInt::INT;
 759   }
 760 
 761   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
 762 }
 763 
 764 //=============================================================================
 765 //------------------------------Identity---------------------------------------
 766 Node *LShiftLNode::Identity( PhaseTransform *phase ) {
 767   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
 768   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
 769 }
 770 
 771 //------------------------------Ideal------------------------------------------
 772 // If the right input is a constant, and the left input is an add of a
 773 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 774 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 775   const Type *t  = phase->type( in(2) );
 776   if( t == Type::TOP ) return NULL;       // Right input is dead
 777   const TypeInt *t2 = t->isa_int();
 778   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 779   const int con = t2->get_con() & ( BitsPerLong - 1 );  // masked shift count
 780 
 781   if ( con == 0 ) return NULL;  // let Identity() handle 0 shift count
 782 
 783   // Left input is an add of a constant?
 784   Node *add1 = in(1);
 785   int add1_op = add1->Opcode();
 786   if( add1_op == Op_AddL ) {    // Left input is an add?
 787     // Avoid dead data cycles from dead loops
 788     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
 789     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
 790     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 791       // Compute X << con0
 792       Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) );
 793       // Compute X<<con0 + (con1<<con0)
 794       return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con));
 795     }
 796   }
 797 
 798   // Check for "(x>>c0)<<c0" which just masks off low bits
 799   if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
 800       add1->in(2) == in(2) )
 801     // Convert to "(x & -(1<<c0))"
 802     return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
 803 
 804   // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
 805   if( add1_op == Op_AndL ) {
 806     Node *add2 = add1->in(1);
 807     int add2_op = add2->Opcode();
 808     if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
 809         add2->in(2) == in(2) ) {
 810       // Convert to "(x & (Y<<c0))"
 811       Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) );
 812       return new (phase->C) AndLNode( add2->in(1), y_sh );
 813     }
 814   }
 815 
 816   // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
 817   // before shifting them away.
 818   const jlong bits_mask = jlong(max_julong >> con);
 819   if( add1_op == Op_AndL &&
 820       phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
 821     return new (phase->C) LShiftLNode( add1->in(1), in(2) );
 822 
 823   return NULL;
 824 }
 825 
 826 //------------------------------Value------------------------------------------
 827 // A LShiftLNode shifts its input2 left by input1 amount.
 828 const Type *LShiftLNode::Value( PhaseTransform *phase ) const {
 829   const Type *t1 = phase->type( in(1) );
 830   const Type *t2 = phase->type( in(2) );
 831   // Either input is TOP ==> the result is TOP
 832   if( t1 == Type::TOP ) return Type::TOP;
 833   if( t2 == Type::TOP ) return Type::TOP;
 834 
 835   // Left input is ZERO ==> the result is ZERO.
 836   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
 837   // Shift by zero does nothing
 838   if( t2 == TypeInt::ZERO ) return t1;
 839 
 840   // Either input is BOTTOM ==> the result is BOTTOM
 841   if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
 842       (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
 843     return TypeLong::LONG;
 844 
 845   const TypeLong *r1 = t1->is_long(); // Handy access
 846   const TypeInt  *r2 = t2->is_int();  // Handy access
 847 
 848   if (!r2->is_con())
 849     return TypeLong::LONG;
 850 
 851   uint shift = r2->get_con();
 852   shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 853   // Shift by a multiple of 64 does nothing:
 854   if (shift == 0)  return t1;
 855 
 856   // If the shift is a constant, shift the bounds of the type,
 857   // unless this could lead to an overflow.
 858   if (!r1->is_con()) {
 859     jlong lo = r1->_lo, hi = r1->_hi;
 860     if (((lo << shift) >> shift) == lo &&
 861         ((hi << shift) >> shift) == hi) {
 862       // No overflow.  The range shifts up cleanly.
 863       return TypeLong::make((jlong)lo << (jint)shift,
 864                             (jlong)hi << (jint)shift,
 865                             MAX2(r1->_widen,r2->_widen));
 866     }
 867     return TypeLong::LONG;
 868   }
 869 
 870   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
 871 }
 872 
 873 //=============================================================================
 874 //------------------------------Identity---------------------------------------
 875 Node *RShiftINode::Identity( PhaseTransform *phase ) {
 876   const TypeInt *t2 = phase->type(in(2))->isa_int();
 877   if( !t2 ) return this;
 878   if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
 879     return in(1);
 880 
 881   // Check for useless sign-masking
 882   if( in(1)->Opcode() == Op_LShiftI &&
 883       in(1)->req() == 3 &&
 884       in(1)->in(2) == in(2) &&
 885       t2->is_con() ) {
 886     uint shift = t2->get_con();
 887     shift &= BitsPerJavaInteger-1; // semantics of Java shifts
 888     // Compute masks for which this shifting doesn't change
 889     int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
 890     int hi = ~lo;               // 00007FFF
 891     const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
 892     if( !t11 ) return this;
 893     // Does actual value fit inside of mask?
 894     if( lo <= t11->_lo && t11->_hi <= hi )
 895       return in(1)->in(1);      // Then shifting is a nop
 896   }
 897 
 898   return this;
 899 }
 900 
 901 //------------------------------Ideal------------------------------------------
 902 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 903   // Inputs may be TOP if they are dead.
 904   const TypeInt *t1 = phase->type( in(1) )->isa_int();
 905   if( !t1 ) return NULL;        // Left input is an integer
 906   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 907   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 908   const TypeInt *t3;  // type of in(1).in(2)
 909   int shift = t2->get_con();
 910   shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 911 
 912   if ( shift == 0 ) return NULL;  // let Identity() handle 0 shift count
 913 
 914   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
 915   // Such expressions arise normally from shift chains like (byte)(x >> 24).
 916   const Node *mask = in(1);
 917   if( mask->Opcode() == Op_AndI &&
 918       (t3 = phase->type(mask->in(2))->isa_int()) &&
 919       t3->is_con() ) {
 920     Node *x = mask->in(1);
 921     jint maskbits = t3->get_con();
 922     // Convert to "(x >> shift) & (mask >> shift)"
 923     Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) );
 924     return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
 925   }
 926 
 927   // Check for "(short[i] <<16)>>16" which simply sign-extends
 928   const Node *shl = in(1);
 929   if( shl->Opcode() != Op_LShiftI ) return NULL;
 930 
 931   if( shift == 16 &&
 932       (t3 = phase->type(shl->in(2))->isa_int()) &&
 933       t3->is_con(16) ) {
 934     Node *ld = shl->in(1);
 935     if( ld->Opcode() == Op_LoadS ) {
 936       // Sign extension is just useless here.  Return a RShiftI of zero instead
 937       // returning 'ld' directly.  We cannot return an old Node directly as
 938       // that is the job of 'Identity' calls and Identity calls only work on
 939       // direct inputs ('ld' is an extra Node removed from 'this').  The
 940       // combined optimization requires Identity only return direct inputs.
 941       set_req(1, ld);
 942       set_req(2, phase->intcon(0));
 943       return this;
 944     }
 945     else if( can_reshape &&
 946              ld->Opcode() == Op_LoadUS &&
 947              ld->outcnt() == 1 && ld->unique_out() == shl)
 948       // Replace zero-extension-load with sign-extension-load
 949       return new (phase->C) LoadSNode( ld->in(MemNode::Control),
 950                                        ld->in(MemNode::Memory),
 951                                        ld->in(MemNode::Address),
 952                                        ld->adr_type(), TypeInt::SHORT,
 953                                        MemNode::unordered);
 954   }
 955 
 956   // Check for "(byte[i] <<24)>>24" which simply sign-extends
 957   if( shift == 24 &&
 958       (t3 = phase->type(shl->in(2))->isa_int()) &&
 959       t3->is_con(24) ) {
 960     Node *ld = shl->in(1);
 961     if( ld->Opcode() == Op_LoadB ) {
 962       // Sign extension is just useless here
 963       set_req(1, ld);
 964       set_req(2, phase->intcon(0));
 965       return this;
 966     }
 967   }
 968 
 969   return NULL;
 970 }
 971 
 972 //------------------------------Value------------------------------------------
 973 // A RShiftINode shifts its input2 right by input1 amount.
 974 const Type *RShiftINode::Value( PhaseTransform *phase ) const {
 975   const Type *t1 = phase->type( in(1) );
 976   const Type *t2 = phase->type( in(2) );
 977   // Either input is TOP ==> the result is TOP
 978   if( t1 == Type::TOP ) return Type::TOP;
 979   if( t2 == Type::TOP ) return Type::TOP;
 980 
 981   // Left input is ZERO ==> the result is ZERO.
 982   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
 983   // Shift by zero does nothing
 984   if( t2 == TypeInt::ZERO ) return t1;
 985 
 986   // Either input is BOTTOM ==> the result is BOTTOM
 987   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
 988     return TypeInt::INT;
 989 
 990   if (t2 == TypeInt::INT)
 991     return TypeInt::INT;
 992 
 993   const TypeInt *r1 = t1->is_int(); // Handy access
 994   const TypeInt *r2 = t2->is_int(); // Handy access
 995 
 996   // If the shift is a constant, just shift the bounds of the type.
 997   // For example, if the shift is 31, we just propagate sign bits.
 998   if (r2->is_con()) {
 999     uint shift = r2->get_con();
1000     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1001     // Shift by a multiple of 32 does nothing:
1002     if (shift == 0)  return t1;
1003     // Calculate reasonably aggressive bounds for the result.
1004     // This is necessary if we are to correctly type things
1005     // like (x<<24>>24) == ((byte)x).
1006     jint lo = (jint)r1->_lo >> (jint)shift;
1007     jint hi = (jint)r1->_hi >> (jint)shift;
1008     assert(lo <= hi, "must have valid bounds");
1009     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1010 #ifdef ASSERT
1011     // Make sure we get the sign-capture idiom correct.
1012     if (shift == BitsPerJavaInteger-1) {
1013       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
1014       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1015     }
1016 #endif
1017     return ti;
1018   }
1019 
1020   if( !r1->is_con() || !r2->is_con() )
1021     return TypeInt::INT;
1022 
1023   // Signed shift right
1024   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1025 }
1026 
1027 //=============================================================================
1028 //------------------------------Identity---------------------------------------
1029 Node *RShiftLNode::Identity( PhaseTransform *phase ) {
1030   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1031   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1032 }
1033 
1034 //------------------------------Value------------------------------------------
1035 // A RShiftLNode shifts its input2 right by input1 amount.
1036 const Type *RShiftLNode::Value( PhaseTransform *phase ) const {
1037   const Type *t1 = phase->type( in(1) );
1038   const Type *t2 = phase->type( in(2) );
1039   // Either input is TOP ==> the result is TOP
1040   if( t1 == Type::TOP ) return Type::TOP;
1041   if( t2 == Type::TOP ) return Type::TOP;
1042 
1043   // Left input is ZERO ==> the result is ZERO.
1044   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1045   // Shift by zero does nothing
1046   if( t2 == TypeInt::ZERO ) return t1;
1047 
1048   // Either input is BOTTOM ==> the result is BOTTOM
1049   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1050     return TypeLong::LONG;
1051 
1052   if (t2 == TypeInt::INT)
1053     return TypeLong::LONG;
1054 
1055   const TypeLong *r1 = t1->is_long(); // Handy access
1056   const TypeInt  *r2 = t2->is_int (); // Handy access
1057 
1058   // If the shift is a constant, just shift the bounds of the type.
1059   // For example, if the shift is 63, we just propagate sign bits.
1060   if (r2->is_con()) {
1061     uint shift = r2->get_con();
1062     shift &= (2*BitsPerJavaInteger)-1;  // semantics of Java shifts
1063     // Shift by a multiple of 64 does nothing:
1064     if (shift == 0)  return t1;
1065     // Calculate reasonably aggressive bounds for the result.
1066     // This is necessary if we are to correctly type things
1067     // like (x<<24>>24) == ((byte)x).
1068     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1069     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1070     assert(lo <= hi, "must have valid bounds");
1071     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1072     #ifdef ASSERT
1073     // Make sure we get the sign-capture idiom correct.
1074     if (shift == (2*BitsPerJavaInteger)-1) {
1075       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1076       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1077     }
1078     #endif
1079     return tl;
1080   }
1081 
1082   return TypeLong::LONG;                // Give up
1083 }
1084 
1085 //=============================================================================
1086 //------------------------------Identity---------------------------------------
1087 Node *URShiftINode::Identity( PhaseTransform *phase ) {
1088   const TypeInt *ti = phase->type( in(2) )->isa_int();
1089   if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1090 
1091   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1092   // Happens during new-array length computation.
1093   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1094   Node *add = in(1);
1095   if( add->Opcode() == Op_AddI ) {
1096     const TypeInt *t2  = phase->type(add->in(2))->isa_int();
1097     if( t2 && t2->is_con(wordSize - 1) &&
1098         add->in(1)->Opcode() == Op_LShiftI ) {
1099       // Check that shift_counts are LogBytesPerWord
1100       Node          *lshift_count   = add->in(1)->in(2);
1101       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1102       if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1103           t_lshift_count == phase->type(in(2)) ) {
1104         Node          *x   = add->in(1)->in(1);
1105         const TypeInt *t_x = phase->type(x)->isa_int();
1106         if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1107           return x;
1108         }
1109       }
1110     }
1111   }
1112 
1113   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1114 }
1115 
1116 //------------------------------Ideal------------------------------------------
1117 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1118   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1119   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1120   const int con = t2->get_con() & 31; // Shift count is always masked
1121   if ( con == 0 ) return NULL;  // let Identity() handle a 0 shift count
1122   // We'll be wanting the right-shift amount as a mask of that many bits
1123   const int mask = right_n_bits(BitsPerJavaInteger - con);
1124 
1125   int in1_op = in(1)->Opcode();
1126 
1127   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1128   if( in1_op == Op_URShiftI ) {
1129     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1130     if( t12 && t12->is_con() ) { // Right input is a constant
1131       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1132       const int con2 = t12->get_con() & 31; // Shift count is always masked
1133       const int con3 = con+con2;
1134       if( con3 < 32 )           // Only merge shifts if total is < 32
1135         return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) );
1136     }
1137   }
1138 
1139   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1140   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1141   // If Q is "X << z" the rounding is useless.  Look for patterns like
1142   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1143   Node *add = in(1);
1144   if( in1_op == Op_AddI ) {
1145     Node *lshl = add->in(1);
1146     if( lshl->Opcode() == Op_LShiftI &&
1147         phase->type(lshl->in(2)) == t2 ) {
1148       Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) );
1149       Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) );
1150       return new (phase->C) AndINode( sum, phase->intcon(mask) );
1151     }
1152   }
1153 
1154   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1155   // This shortens the mask.  Also, if we are extracting a high byte and
1156   // storing it to a buffer, the mask will be removed completely.
1157   Node *andi = in(1);
1158   if( in1_op == Op_AndI ) {
1159     const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1160     if( t3 && t3->is_con() ) { // Right input is a constant
1161       jint mask2 = t3->get_con();
1162       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1163       Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) );
1164       return new (phase->C) AndINode(newshr, phase->intcon(mask2));
1165       // The negative values are easier to materialize than positive ones.
1166       // A typical case from address arithmetic is ((x & ~15) >> 4).
1167       // It's better to change that to ((x >> 4) & ~0) versus
1168       // ((x >> 4) & 0x0FFFFFFF).  The difference is greatest in LP64.
1169     }
1170   }
1171 
1172   // Check for "(X << z ) >>> z" which simply zero-extends
1173   Node *shl = in(1);
1174   if( in1_op == Op_LShiftI &&
1175       phase->type(shl->in(2)) == t2 )
1176     return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) );
1177 
1178   return NULL;
1179 }
1180 
1181 //------------------------------Value------------------------------------------
1182 // A URShiftINode shifts its input2 right by input1 amount.
1183 const Type *URShiftINode::Value( PhaseTransform *phase ) const {
1184   // (This is a near clone of RShiftINode::Value.)
1185   const Type *t1 = phase->type( in(1) );
1186   const Type *t2 = phase->type( in(2) );
1187   // Either input is TOP ==> the result is TOP
1188   if( t1 == Type::TOP ) return Type::TOP;
1189   if( t2 == Type::TOP ) return Type::TOP;
1190 
1191   // Left input is ZERO ==> the result is ZERO.
1192   if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1193   // Shift by zero does nothing
1194   if( t2 == TypeInt::ZERO ) return t1;
1195 
1196   // Either input is BOTTOM ==> the result is BOTTOM
1197   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1198     return TypeInt::INT;
1199 
1200   if (t2 == TypeInt::INT)
1201     return TypeInt::INT;
1202 
1203   const TypeInt *r1 = t1->is_int();     // Handy access
1204   const TypeInt *r2 = t2->is_int();     // Handy access
1205 
1206   if (r2->is_con()) {
1207     uint shift = r2->get_con();
1208     shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
1209     // Shift by a multiple of 32 does nothing:
1210     if (shift == 0)  return t1;
1211     // Calculate reasonably aggressive bounds for the result.
1212     jint lo = (juint)r1->_lo >> (juint)shift;
1213     jint hi = (juint)r1->_hi >> (juint)shift;
1214     if (r1->_hi >= 0 && r1->_lo < 0) {
1215       // If the type has both negative and positive values,
1216       // there are two separate sub-domains to worry about:
1217       // The positive half and the negative half.
1218       jint neg_lo = lo;
1219       jint neg_hi = (juint)-1 >> (juint)shift;
1220       jint pos_lo = (juint) 0 >> (juint)shift;
1221       jint pos_hi = hi;
1222       lo = MIN2(neg_lo, pos_lo);  // == 0
1223       hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1224     }
1225     assert(lo <= hi, "must have valid bounds");
1226     const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1227     #ifdef ASSERT
1228     // Make sure we get the sign-capture idiom correct.
1229     if (shift == BitsPerJavaInteger-1) {
1230       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1231       if (r1->_hi < 0)  assert(ti == TypeInt::ONE,  ">>>31 of - is +1");
1232     }
1233     #endif
1234     return ti;
1235   }
1236 
1237   //
1238   // Do not support shifted oops in info for GC
1239   //
1240   // else if( t1->base() == Type::InstPtr ) {
1241   //
1242   //   const TypeInstPtr *o = t1->is_instptr();
1243   //   if( t1->singleton() )
1244   //     return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1245   // }
1246   // else if( t1->base() == Type::KlassPtr ) {
1247   //   const TypeKlassPtr *o = t1->is_klassptr();
1248   //   if( t1->singleton() )
1249   //     return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1250   // }
1251 
1252   return TypeInt::INT;
1253 }
1254 
1255 //=============================================================================
1256 //------------------------------Identity---------------------------------------
1257 Node *URShiftLNode::Identity( PhaseTransform *phase ) {
1258   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1259   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1260 }
1261 
1262 //------------------------------Ideal------------------------------------------
1263 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1264   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1265   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1266   const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1267   if ( con == 0 ) return NULL;  // let Identity() handle a 0 shift count
1268                               // note: mask computation below does not work for 0 shift count
1269   // We'll be wanting the right-shift amount as a mask of that many bits
1270   const jlong mask = jlong(max_julong >> con);
1271 
1272   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1273   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1274   // If Q is "X << z" the rounding is useless.  Look for patterns like
1275   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1276   Node *add = in(1);
1277   if( add->Opcode() == Op_AddL ) {
1278     Node *lshl = add->in(1);
1279     if( lshl->Opcode() == Op_LShiftL &&
1280         phase->type(lshl->in(2)) == t2 ) {
1281       Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) );
1282       Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) );
1283       return new (phase->C) AndLNode( sum, phase->longcon(mask) );
1284     }
1285   }
1286 
1287   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1288   // This shortens the mask.  Also, if we are extracting a high byte and
1289   // storing it to a buffer, the mask will be removed completely.
1290   Node *andi = in(1);
1291   if( andi->Opcode() == Op_AndL ) {
1292     const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1293     if( t3 && t3->is_con() ) { // Right input is a constant
1294       jlong mask2 = t3->get_con();
1295       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1296       Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) );
1297       return new (phase->C) AndLNode(newshr, phase->longcon(mask2));
1298     }
1299   }
1300 
1301   // Check for "(X << z ) >>> z" which simply zero-extends
1302   Node *shl = in(1);
1303   if( shl->Opcode() == Op_LShiftL &&
1304       phase->type(shl->in(2)) == t2 )
1305     return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) );
1306 
1307   return NULL;
1308 }
1309 
1310 //------------------------------Value------------------------------------------
1311 // A URShiftINode shifts its input2 right by input1 amount.
1312 const Type *URShiftLNode::Value( PhaseTransform *phase ) const {
1313   // (This is a near clone of RShiftLNode::Value.)
1314   const Type *t1 = phase->type( in(1) );
1315   const Type *t2 = phase->type( in(2) );
1316   // Either input is TOP ==> the result is TOP
1317   if( t1 == Type::TOP ) return Type::TOP;
1318   if( t2 == Type::TOP ) return Type::TOP;
1319 
1320   // Left input is ZERO ==> the result is ZERO.
1321   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1322   // Shift by zero does nothing
1323   if( t2 == TypeInt::ZERO ) return t1;
1324 
1325   // Either input is BOTTOM ==> the result is BOTTOM
1326   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1327     return TypeLong::LONG;
1328 
1329   if (t2 == TypeInt::INT)
1330     return TypeLong::LONG;
1331 
1332   const TypeLong *r1 = t1->is_long(); // Handy access
1333   const TypeInt  *r2 = t2->is_int (); // Handy access
1334 
1335   if (r2->is_con()) {
1336     uint shift = r2->get_con();
1337     shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
1338     // Shift by a multiple of 64 does nothing:
1339     if (shift == 0)  return t1;
1340     // Calculate reasonably aggressive bounds for the result.
1341     jlong lo = (julong)r1->_lo >> (juint)shift;
1342     jlong hi = (julong)r1->_hi >> (juint)shift;
1343     if (r1->_hi >= 0 && r1->_lo < 0) {
1344       // If the type has both negative and positive values,
1345       // there are two separate sub-domains to worry about:
1346       // The positive half and the negative half.
1347       jlong neg_lo = lo;
1348       jlong neg_hi = (julong)-1 >> (juint)shift;
1349       jlong pos_lo = (julong) 0 >> (juint)shift;
1350       jlong pos_hi = hi;
1351       //lo = MIN2(neg_lo, pos_lo);  // == 0
1352       lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1353       //hi = MAX2(neg_hi, pos_hi);  // == -1 >>> shift;
1354       hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1355     }
1356     assert(lo <= hi, "must have valid bounds");
1357     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1358     #ifdef ASSERT
1359     // Make sure we get the sign-capture idiom correct.
1360     if (shift == BitsPerJavaLong - 1) {
1361       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1362       if (r1->_hi < 0)  assert(tl == TypeLong::ONE,  ">>>63 of - is +1");
1363     }
1364     #endif
1365     return tl;
1366   }
1367 
1368   return TypeLong::LONG;                // Give up
1369 }