1 /*
2 * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "c1/c1_Defs.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "c1/c1_Runtime1.hpp"
30 #include "interpreter/interpreter.hpp"
31 #include "nativeInst_x86.hpp"
32 #include "oops/compiledICHolder.hpp"
33 #include "oops/oop.inline.hpp"
34 #include "prims/jvmtiExport.hpp"
35 #include "register_x86.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/signature.hpp"
38 #include "runtime/vframeArray.hpp"
39 #include "utilities/macros.hpp"
40 #include "vmreg_x86.inline.hpp"
41 #if INCLUDE_ALL_GCS
42 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
43 #include "gc_implementation/shenandoah/shenandoahRuntime.hpp"
44 #endif
45
46
47 // Implementation of StubAssembler
48
49 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
50 // setup registers
51 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
52 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
53 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
54 assert(args_size >= 0, "illegal args_size");
55 bool align_stack = false;
56 #ifdef _LP64
57 // At a method handle call, the stack may not be properly aligned
58 // when returning with an exception.
59 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
60 #endif
61
62 #ifdef _LP64
63 mov(c_rarg0, thread);
64 set_num_rt_args(0); // Nothing on stack
65 #else
66 set_num_rt_args(1 + args_size);
67
68 // push java thread (becomes first argument of C function)
69 get_thread(thread);
70 push(thread);
71 #endif // _LP64
72
73 int call_offset;
74 if (!align_stack) {
75 set_last_Java_frame(thread, noreg, rbp, NULL);
76 } else {
77 address the_pc = pc();
78 call_offset = offset();
79 set_last_Java_frame(thread, noreg, rbp, the_pc);
80 andptr(rsp, -(StackAlignmentInBytes)); // Align stack
81 }
82
83 // do the call
84 call(RuntimeAddress(entry));
85 if (!align_stack) {
86 call_offset = offset();
87 }
88 // verify callee-saved register
89 #ifdef ASSERT
90 guarantee(thread != rax, "change this code");
91 push(rax);
92 { Label L;
93 get_thread(rax);
94 cmpptr(thread, rax);
95 jcc(Assembler::equal, L);
96 int3();
97 stop("StubAssembler::call_RT: rdi not callee saved?");
98 bind(L);
99 }
100 pop(rax);
101 #endif
102 reset_last_Java_frame(thread, true);
103
104 // discard thread and arguments
105 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
106
107 // check for pending exceptions
108 { Label L;
109 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
110 jcc(Assembler::equal, L);
111 // exception pending => remove activation and forward to exception handler
112 movptr(rax, Address(thread, Thread::pending_exception_offset()));
113 // make sure that the vm_results are cleared
114 if (oop_result1->is_valid()) {
115 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
116 }
117 if (metadata_result->is_valid()) {
118 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
119 }
120 if (frame_size() == no_frame_size) {
121 leave();
122 jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
123 } else if (_stub_id == Runtime1::forward_exception_id) {
124 should_not_reach_here();
125 } else {
126 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
127 }
128 bind(L);
129 }
130 // get oop results if there are any and reset the values in the thread
131 if (oop_result1->is_valid()) {
132 get_vm_result(oop_result1, thread);
133 }
134 if (metadata_result->is_valid()) {
135 get_vm_result_2(metadata_result, thread);
136 }
137 return call_offset;
138 }
139
140
141 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
142 #ifdef _LP64
143 mov(c_rarg1, arg1);
144 #else
145 push(arg1);
146 #endif // _LP64
147 return call_RT(oop_result1, metadata_result, entry, 1);
148 }
149
150
151 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
152 #ifdef _LP64
153 if (c_rarg1 == arg2) {
154 if (c_rarg2 == arg1) {
155 xchgq(arg1, arg2);
156 } else {
157 mov(c_rarg2, arg2);
158 mov(c_rarg1, arg1);
159 }
160 } else {
161 mov(c_rarg1, arg1);
162 mov(c_rarg2, arg2);
163 }
164 #else
165 push(arg2);
166 push(arg1);
167 #endif // _LP64
168 return call_RT(oop_result1, metadata_result, entry, 2);
169 }
170
171
172 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
173 #ifdef _LP64
174 // if there is any conflict use the stack
175 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
176 arg2 == c_rarg1 || arg2 == c_rarg3 ||
177 arg3 == c_rarg1 || arg3 == c_rarg2) {
178 push(arg3);
179 push(arg2);
180 push(arg1);
181 pop(c_rarg1);
182 pop(c_rarg2);
183 pop(c_rarg3);
184 } else {
185 mov(c_rarg1, arg1);
186 mov(c_rarg2, arg2);
187 mov(c_rarg3, arg3);
188 }
189 #else
190 push(arg3);
191 push(arg2);
192 push(arg1);
193 #endif // _LP64
194 return call_RT(oop_result1, metadata_result, entry, 3);
195 }
196
197
198 // Implementation of StubFrame
199
200 class StubFrame: public StackObj {
201 private:
202 StubAssembler* _sasm;
203
204 public:
205 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
206 void load_argument(int offset_in_words, Register reg);
207
208 ~StubFrame();
209 };
210
211
212 #define __ _sasm->
213
214 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
215 _sasm = sasm;
216 __ set_info(name, must_gc_arguments);
217 __ enter();
218 }
219
220 // load parameters that were stored with LIR_Assembler::store_parameter
221 // Note: offsets for store_parameter and load_argument must match
222 void StubFrame::load_argument(int offset_in_words, Register reg) {
223 // rbp, + 0: link
224 // + 1: return address
225 // + 2: argument with offset 0
226 // + 3: argument with offset 1
227 // + 4: ...
228
229 __ movptr(reg, Address(rbp, (offset_in_words + 2) * BytesPerWord));
230 }
231
232
233 StubFrame::~StubFrame() {
234 __ leave();
235 __ ret(0);
236 }
237
238 #undef __
239
240
241 // Implementation of Runtime1
242
243 #define __ sasm->
244
245 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
246 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
247
248 // Stack layout for saving/restoring all the registers needed during a runtime
249 // call (this includes deoptimization)
250 // Note: note that users of this frame may well have arguments to some runtime
251 // while these values are on the stack. These positions neglect those arguments
252 // but the code in save_live_registers will take the argument count into
253 // account.
254 //
255 #ifdef _LP64
256 #define SLOT2(x) x,
257 #define SLOT_PER_WORD 2
258 #else
259 #define SLOT2(x)
260 #define SLOT_PER_WORD 1
261 #endif // _LP64
262
263 enum reg_save_layout {
264 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
265 // happen and will assert if the stack size we create is misaligned
266 #ifdef _LP64
267 align_dummy_0, align_dummy_1,
268 #endif // _LP64
269 #ifdef _WIN64
270 // Windows always allocates space for it's argument registers (see
271 // frame::arg_reg_save_area_bytes).
272 arg_reg_save_1, arg_reg_save_1H, // 0, 4
273 arg_reg_save_2, arg_reg_save_2H, // 8, 12
274 arg_reg_save_3, arg_reg_save_3H, // 16, 20
275 arg_reg_save_4, arg_reg_save_4H, // 24, 28
276 #endif // _WIN64
277 xmm_regs_as_doubles_off, // 32
278 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
279 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
280 // fpu_state_end_off is exclusive
281 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
282 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
283 extra_space_offset, // 360
284 #ifdef _LP64
285 r15_off = extra_space_offset, r15H_off, // 360, 364
286 r14_off, r14H_off, // 368, 372
287 r13_off, r13H_off, // 376, 380
288 r12_off, r12H_off, // 384, 388
289 r11_off, r11H_off, // 392, 396
290 r10_off, r10H_off, // 400, 404
291 r9_off, r9H_off, // 408, 412
292 r8_off, r8H_off, // 416, 420
293 rdi_off, rdiH_off, // 424, 428
294 #else
295 rdi_off = extra_space_offset,
296 #endif // _LP64
297 rsi_off, SLOT2(rsiH_off) // 432, 436
298 rbp_off, SLOT2(rbpH_off) // 440, 444
299 rsp_off, SLOT2(rspH_off) // 448, 452
300 rbx_off, SLOT2(rbxH_off) // 456, 460
301 rdx_off, SLOT2(rdxH_off) // 464, 468
302 rcx_off, SLOT2(rcxH_off) // 472, 476
303 rax_off, SLOT2(raxH_off) // 480, 484
304 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
305 return_off, SLOT2(returnH_off) // 496, 500
306 reg_save_frame_size // As noted: neglects any parameters to runtime // 504
307 };
308
309
310
311 // Save off registers which might be killed by calls into the runtime.
312 // Tries to smart of about FP registers. In particular we separate
313 // saving and describing the FPU registers for deoptimization since we
314 // have to save the FPU registers twice if we describe them and on P4
315 // saving FPU registers which don't contain anything appears
316 // expensive. The deopt blob is the only thing which needs to
317 // describe FPU registers. In all other cases it should be sufficient
318 // to simply save their current value.
319
320 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
321 bool save_fpu_registers = true) {
322
323 // In 64bit all the args are in regs so there are no additional stack slots
324 LP64_ONLY(num_rt_args = 0);
325 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
326 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
327 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word );
328
329 // record saved value locations in an OopMap
330 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
331 OopMap* map = new OopMap(frame_size_in_slots, 0);
332 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
333 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
334 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
335 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
336 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
337 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
338 #ifdef _LP64
339 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
340 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
341 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
342 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
343 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
344 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
345 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
346 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
347
348 // This is stupid but needed.
349 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
350 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
351 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
352 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
353 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
354 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
355
356 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
357 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
358 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
359 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
360 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
361 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
362 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
363 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
364 #endif // _LP64
365
366 if (save_fpu_registers) {
367 if (UseSSE < 2) {
368 int fpu_off = float_regs_as_doubles_off;
369 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
370 VMReg fpu_name_0 = FrameMap::fpu_regname(n);
371 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
372 // %%% This is really a waste but we'll keep things as they were for now
373 if (true) {
374 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
375 }
376 fpu_off += 2;
377 }
378 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
379 }
380
381 if (UseSSE >= 2) {
382 int xmm_off = xmm_regs_as_doubles_off;
383 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
384 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
385 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
386 // %%% This is really a waste but we'll keep things as they were for now
387 if (true) {
388 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
389 }
390 xmm_off += 2;
391 }
392 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
393
394 } else if (UseSSE == 1) {
395 int xmm_off = xmm_regs_as_doubles_off;
396 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
397 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
398 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
399 xmm_off += 2;
400 }
401 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
402 }
403 }
404
405 return map;
406 }
407
408 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
409 bool save_fpu_registers = true) {
410 __ block_comment("save_live_registers");
411
412 __ pusha(); // integer registers
413
414 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
415 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
416
417 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
418
419 #ifdef ASSERT
420 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
421 #endif
422
423 if (save_fpu_registers) {
424 if (UseSSE < 2) {
425 // save FPU stack
426 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
427 __ fwait();
428
429 #ifdef ASSERT
430 Label ok;
431 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
432 __ jccb(Assembler::equal, ok);
433 __ stop("corrupted control word detected");
434 __ bind(ok);
435 #endif
436
437 // Reset the control word to guard against exceptions being unmasked
438 // since fstp_d can cause FPU stack underflow exceptions. Write it
439 // into the on stack copy and then reload that to make sure that the
440 // current and future values are correct.
441 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
442 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
443
444 // Save the FPU registers in de-opt-able form
445 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
446 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
447 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
448 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
449 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
450 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
451 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
452 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
453 }
454
455 if (UseSSE >= 2) {
456 // save XMM registers
457 // XMM registers can contain float or double values, but this is not known here,
458 // so always save them as doubles.
459 // note that float values are _not_ converted automatically, so for float values
460 // the second word contains only garbage data.
461 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
462 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
463 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
464 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
465 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
466 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
467 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
468 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
469 #ifdef _LP64
470 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64), xmm8);
471 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72), xmm9);
472 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80), xmm10);
473 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88), xmm11);
474 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96), xmm12);
475 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104), xmm13);
476 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112), xmm14);
477 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120), xmm15);
478 #endif // _LP64
479 } else if (UseSSE == 1) {
480 // save XMM registers as float because double not supported without SSE2
481 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0), xmm0);
482 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8), xmm1);
483 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16), xmm2);
484 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24), xmm3);
485 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32), xmm4);
486 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40), xmm5);
487 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48), xmm6);
488 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56), xmm7);
489 }
490 }
491
492 // FPU stack must be empty now
493 __ verify_FPU(0, "save_live_registers");
494
495 return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
496 }
497
498
499 static void restore_fpu(StubAssembler* sasm, bool restore_fpu_registers = true) {
500 if (restore_fpu_registers) {
501 if (UseSSE >= 2) {
502 // restore XMM registers
503 __ movdbl(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
504 __ movdbl(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
505 __ movdbl(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
506 __ movdbl(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
507 __ movdbl(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
508 __ movdbl(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
509 __ movdbl(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
510 __ movdbl(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
511 #ifdef _LP64
512 __ movdbl(xmm8, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 64));
513 __ movdbl(xmm9, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 72));
514 __ movdbl(xmm10, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 80));
515 __ movdbl(xmm11, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 88));
516 __ movdbl(xmm12, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 96));
517 __ movdbl(xmm13, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 104));
518 __ movdbl(xmm14, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 112));
519 __ movdbl(xmm15, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 120));
520 #endif // _LP64
521 } else if (UseSSE == 1) {
522 // restore XMM registers
523 __ movflt(xmm0, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 0));
524 __ movflt(xmm1, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 8));
525 __ movflt(xmm2, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 16));
526 __ movflt(xmm3, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 24));
527 __ movflt(xmm4, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 32));
528 __ movflt(xmm5, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 40));
529 __ movflt(xmm6, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 48));
530 __ movflt(xmm7, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + 56));
531 }
532
533 if (UseSSE < 2) {
534 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
535 } else {
536 // check that FPU stack is really empty
537 __ verify_FPU(0, "restore_live_registers");
538 }
539
540 } else {
541 // check that FPU stack is really empty
542 __ verify_FPU(0, "restore_live_registers");
543 }
544
545 #ifdef ASSERT
546 {
547 Label ok;
548 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
549 __ jcc(Assembler::equal, ok);
550 __ stop("bad offsets in frame");
551 __ bind(ok);
552 }
553 #endif // ASSERT
554
555 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
556 }
557
558
559 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
560 __ block_comment("restore_live_registers");
561
562 restore_fpu(sasm, restore_fpu_registers);
563 __ popa();
564 }
565
566
567 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
568 __ block_comment("restore_live_registers_except_rax");
569
570 restore_fpu(sasm, restore_fpu_registers);
571
572 #ifdef _LP64
573 __ movptr(r15, Address(rsp, 0));
574 __ movptr(r14, Address(rsp, wordSize));
575 __ movptr(r13, Address(rsp, 2 * wordSize));
576 __ movptr(r12, Address(rsp, 3 * wordSize));
577 __ movptr(r11, Address(rsp, 4 * wordSize));
578 __ movptr(r10, Address(rsp, 5 * wordSize));
579 __ movptr(r9, Address(rsp, 6 * wordSize));
580 __ movptr(r8, Address(rsp, 7 * wordSize));
581 __ movptr(rdi, Address(rsp, 8 * wordSize));
582 __ movptr(rsi, Address(rsp, 9 * wordSize));
583 __ movptr(rbp, Address(rsp, 10 * wordSize));
584 // skip rsp
585 __ movptr(rbx, Address(rsp, 12 * wordSize));
586 __ movptr(rdx, Address(rsp, 13 * wordSize));
587 __ movptr(rcx, Address(rsp, 14 * wordSize));
588
589 __ addptr(rsp, 16 * wordSize);
590 #else
591
592 __ pop(rdi);
593 __ pop(rsi);
594 __ pop(rbp);
595 __ pop(rbx); // skip this value
596 __ pop(rbx);
597 __ pop(rdx);
598 __ pop(rcx);
599 __ addptr(rsp, BytesPerWord);
600 #endif // _LP64
601 }
602
603
604 void Runtime1::initialize_pd() {
605 // nothing to do
606 }
607
608
609 // target: the entry point of the method that creates and posts the exception oop
610 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
611
612 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
613 // preserve all registers
614 int num_rt_args = has_argument ? 2 : 1;
615 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
616
617 // now all registers are saved and can be used freely
618 // verify that no old value is used accidentally
619 __ invalidate_registers(true, true, true, true, true, true);
620
621 // registers used by this stub
622 const Register temp_reg = rbx;
623
624 // load argument for exception that is passed as an argument into the stub
625 if (has_argument) {
626 #ifdef _LP64
627 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
628 #else
629 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
630 __ push(temp_reg);
631 #endif // _LP64
632 }
633 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
634
635 OopMapSet* oop_maps = new OopMapSet();
636 oop_maps->add_gc_map(call_offset, oop_map);
637
638 __ stop("should not reach here");
639
640 return oop_maps;
641 }
642
643
644 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
645 __ block_comment("generate_handle_exception");
646
647 // incoming parameters
648 const Register exception_oop = rax;
649 const Register exception_pc = rdx;
650 // other registers used in this stub
651 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
652
653 // Save registers, if required.
654 OopMapSet* oop_maps = new OopMapSet();
655 OopMap* oop_map = NULL;
656 switch (id) {
657 case forward_exception_id:
658 // We're handling an exception in the context of a compiled frame.
659 // The registers have been saved in the standard places. Perform
660 // an exception lookup in the caller and dispatch to the handler
661 // if found. Otherwise unwind and dispatch to the callers
662 // exception handler.
663 oop_map = generate_oop_map(sasm, 1 /*thread*/);
664
665 // load and clear pending exception oop into RAX
666 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
667 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
668
669 // load issuing PC (the return address for this stub) into rdx
670 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
671
672 // make sure that the vm_results are cleared (may be unnecessary)
673 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
674 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
675 break;
676 case handle_exception_nofpu_id:
677 case handle_exception_id:
678 // At this point all registers MAY be live.
679 oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
680 break;
681 case handle_exception_from_callee_id: {
682 // At this point all registers except exception oop (RAX) and
683 // exception pc (RDX) are dead.
684 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
685 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
686 sasm->set_frame_size(frame_size);
687 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
688 break;
689 }
690 default: ShouldNotReachHere();
691 }
692
693 #ifdef TIERED
694 // C2 can leave the fpu stack dirty
695 if (UseSSE < 2) {
696 __ empty_FPU_stack();
697 }
698 #endif // TIERED
699
700 // verify that only rax, and rdx is valid at this time
701 __ invalidate_registers(false, true, true, false, true, true);
702 // verify that rax, contains a valid exception
703 __ verify_not_null_oop(exception_oop);
704
705 // load address of JavaThread object for thread-local data
706 NOT_LP64(__ get_thread(thread);)
707
708 #ifdef ASSERT
709 // check that fields in JavaThread for exception oop and issuing pc are
710 // empty before writing to them
711 Label oop_empty;
712 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
713 __ jcc(Assembler::equal, oop_empty);
714 __ stop("exception oop already set");
715 __ bind(oop_empty);
716
717 Label pc_empty;
718 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
719 __ jcc(Assembler::equal, pc_empty);
720 __ stop("exception pc already set");
721 __ bind(pc_empty);
722 #endif
723
724 // save exception oop and issuing pc into JavaThread
725 // (exception handler will load it from here)
726 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
727 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
728
729 // patch throwing pc into return address (has bci & oop map)
730 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
731
732 // compute the exception handler.
733 // the exception oop and the throwing pc are read from the fields in JavaThread
734 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
735 oop_maps->add_gc_map(call_offset, oop_map);
736
737 // rax: handler address
738 // will be the deopt blob if nmethod was deoptimized while we looked up
739 // handler regardless of whether handler existed in the nmethod.
740
741 // only rax, is valid at this time, all other registers have been destroyed by the runtime call
742 __ invalidate_registers(false, true, true, true, true, true);
743
744 // patch the return address, this stub will directly return to the exception handler
745 __ movptr(Address(rbp, 1*BytesPerWord), rax);
746
747 switch (id) {
748 case forward_exception_id:
749 case handle_exception_nofpu_id:
750 case handle_exception_id:
751 // Restore the registers that were saved at the beginning.
752 restore_live_registers(sasm, id != handle_exception_nofpu_id);
753 break;
754 case handle_exception_from_callee_id:
755 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
756 // since we do a leave anyway.
757
758 // Pop the return address.
759 __ leave();
760 __ pop(rcx);
761 __ jmp(rcx); // jump to exception handler
762 break;
763 default: ShouldNotReachHere();
764 }
765
766 return oop_maps;
767 }
768
769
770 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
771 // incoming parameters
772 const Register exception_oop = rax;
773 // callee-saved copy of exception_oop during runtime call
774 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
775 // other registers used in this stub
776 const Register exception_pc = rdx;
777 const Register handler_addr = rbx;
778 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
779
780 // verify that only rax, is valid at this time
781 __ invalidate_registers(false, true, true, true, true, true);
782
783 #ifdef ASSERT
784 // check that fields in JavaThread for exception oop and issuing pc are empty
785 NOT_LP64(__ get_thread(thread);)
786 Label oop_empty;
787 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
788 __ jcc(Assembler::equal, oop_empty);
789 __ stop("exception oop must be empty");
790 __ bind(oop_empty);
791
792 Label pc_empty;
793 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
794 __ jcc(Assembler::equal, pc_empty);
795 __ stop("exception pc must be empty");
796 __ bind(pc_empty);
797 #endif
798
799 // clear the FPU stack in case any FPU results are left behind
800 __ empty_FPU_stack();
801
802 // save exception_oop in callee-saved register to preserve it during runtime calls
803 __ verify_not_null_oop(exception_oop);
804 __ movptr(exception_oop_callee_saved, exception_oop);
805
806 NOT_LP64(__ get_thread(thread);)
807 // Get return address (is on top of stack after leave).
808 __ movptr(exception_pc, Address(rsp, 0));
809
810 // search the exception handler address of the caller (using the return address)
811 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
812 // rax: exception handler address of the caller
813
814 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
815 __ invalidate_registers(false, true, true, true, false, true);
816
817 // move result of call into correct register
818 __ movptr(handler_addr, rax);
819
820 // Restore exception oop to RAX (required convention of exception handler).
821 __ movptr(exception_oop, exception_oop_callee_saved);
822
823 // verify that there is really a valid exception in rax
824 __ verify_not_null_oop(exception_oop);
825
826 // get throwing pc (= return address).
827 // rdx has been destroyed by the call, so it must be set again
828 // the pop is also necessary to simulate the effect of a ret(0)
829 __ pop(exception_pc);
830
831 // continue at exception handler (return address removed)
832 // note: do *not* remove arguments when unwinding the
833 // activation since the caller assumes having
834 // all arguments on the stack when entering the
835 // runtime to determine the exception handler
836 // (GC happens at call site with arguments!)
837 // rax: exception oop
838 // rdx: throwing pc
839 // rbx: exception handler
840 __ jmp(handler_addr);
841 }
842
843
844 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
845 // use the maximum number of runtime-arguments here because it is difficult to
846 // distinguish each RT-Call.
847 // Note: This number affects also the RT-Call in generate_handle_exception because
848 // the oop-map is shared for all calls.
849 const int num_rt_args = 2; // thread + dummy
850
851 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
852 assert(deopt_blob != NULL, "deoptimization blob must have been created");
853
854 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
855
856 #ifdef _LP64
857 const Register thread = r15_thread;
858 // No need to worry about dummy
859 __ mov(c_rarg0, thread);
860 #else
861 __ push(rax); // push dummy
862
863 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
864 // push java thread (becomes first argument of C function)
865 __ get_thread(thread);
866 __ push(thread);
867 #endif // _LP64
868 __ set_last_Java_frame(thread, noreg, rbp, NULL);
869 // do the call
870 __ call(RuntimeAddress(target));
871 OopMapSet* oop_maps = new OopMapSet();
872 oop_maps->add_gc_map(__ offset(), oop_map);
873 // verify callee-saved register
874 #ifdef ASSERT
875 guarantee(thread != rax, "change this code");
876 __ push(rax);
877 { Label L;
878 __ get_thread(rax);
879 __ cmpptr(thread, rax);
880 __ jcc(Assembler::equal, L);
881 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
882 __ bind(L);
883 }
884 __ pop(rax);
885 #endif
886 __ reset_last_Java_frame(thread, true);
887 #ifndef _LP64
888 __ pop(rcx); // discard thread arg
889 __ pop(rcx); // discard dummy
890 #endif // _LP64
891
892 // check for pending exceptions
893 { Label L;
894 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
895 __ jcc(Assembler::equal, L);
896 // exception pending => remove activation and forward to exception handler
897
898 __ testptr(rax, rax); // have we deoptimized?
899 __ jump_cc(Assembler::equal,
900 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
901
902 // the deopt blob expects exceptions in the special fields of
903 // JavaThread, so copy and clear pending exception.
904
905 // load and clear pending exception
906 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
907 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
908
909 // check that there is really a valid exception
910 __ verify_not_null_oop(rax);
911
912 // load throwing pc: this is the return address of the stub
913 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
914
915 #ifdef ASSERT
916 // check that fields in JavaThread for exception oop and issuing pc are empty
917 Label oop_empty;
918 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
919 __ jcc(Assembler::equal, oop_empty);
920 __ stop("exception oop must be empty");
921 __ bind(oop_empty);
922
923 Label pc_empty;
924 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
925 __ jcc(Assembler::equal, pc_empty);
926 __ stop("exception pc must be empty");
927 __ bind(pc_empty);
928 #endif
929
930 // store exception oop and throwing pc to JavaThread
931 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
932 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
933
934 restore_live_registers(sasm);
935
936 __ leave();
937 __ addptr(rsp, BytesPerWord); // remove return address from stack
938
939 // Forward the exception directly to deopt blob. We can blow no
940 // registers and must leave throwing pc on the stack. A patch may
941 // have values live in registers so the entry point with the
942 // exception in tls.
943 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
944
945 __ bind(L);
946 }
947
948
949 // Runtime will return true if the nmethod has been deoptimized during
950 // the patching process. In that case we must do a deopt reexecute instead.
951
952 Label reexecuteEntry, cont;
953
954 __ testptr(rax, rax); // have we deoptimized?
955 __ jcc(Assembler::equal, cont); // no
956
957 // Will reexecute. Proper return address is already on the stack we just restore
958 // registers, pop all of our frame but the return address and jump to the deopt blob
959 restore_live_registers(sasm);
960 __ leave();
961 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
962
963 __ bind(cont);
964 restore_live_registers(sasm);
965 __ leave();
966 __ ret(0);
967
968 return oop_maps;
969 }
970
971
972 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
973
974 // for better readability
975 const bool must_gc_arguments = true;
976 const bool dont_gc_arguments = false;
977
978 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
979 bool save_fpu_registers = true;
980
981 // stub code & info for the different stubs
982 OopMapSet* oop_maps = NULL;
983 switch (id) {
984 case forward_exception_id:
985 {
986 oop_maps = generate_handle_exception(id, sasm);
987 __ leave();
988 __ ret(0);
989 }
990 break;
991
992 case new_instance_id:
993 case fast_new_instance_id:
994 case fast_new_instance_init_check_id:
995 {
996 Register klass = rdx; // Incoming
997 Register obj = rax; // Result
998
999 if (id == new_instance_id) {
1000 __ set_info("new_instance", dont_gc_arguments);
1001 } else if (id == fast_new_instance_id) {
1002 __ set_info("fast new_instance", dont_gc_arguments);
1003 } else {
1004 assert(id == fast_new_instance_init_check_id, "bad StubID");
1005 __ set_info("fast new_instance init check", dont_gc_arguments);
1006 }
1007
1008 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
1009 UseTLAB && FastTLABRefill) {
1010 Label slow_path;
1011 Register obj_size = rcx;
1012 Register t1 = rbx;
1013 Register t2 = rsi;
1014 assert_different_registers(klass, obj, obj_size, t1, t2);
1015
1016 __ push(rdi);
1017 __ push(rbx);
1018
1019 if (id == fast_new_instance_init_check_id) {
1020 // make sure the klass is initialized
1021 __ cmpb(Address(klass, InstanceKlass::init_state_offset()), InstanceKlass::fully_initialized);
1022 __ jcc(Assembler::notEqual, slow_path);
1023 }
1024
1025 #ifdef ASSERT
1026 // assert object can be fast path allocated
1027 {
1028 Label ok, not_ok;
1029 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1030 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0)
1031 __ jcc(Assembler::lessEqual, not_ok);
1032 __ testl(obj_size, Klass::_lh_instance_slow_path_bit);
1033 __ jcc(Assembler::zero, ok);
1034 __ bind(not_ok);
1035 __ stop("assert(can be fast path allocated)");
1036 __ should_not_reach_here();
1037 __ bind(ok);
1038 }
1039 #endif // ASSERT
1040
1041 // if we got here then the TLAB allocation failed, so try
1042 // refilling the TLAB or allocating directly from eden.
1043 Label retry_tlab, try_eden;
1044 const Register thread =
1045 __ tlab_refill(retry_tlab, try_eden, slow_path); // does not destroy rdx (klass), returns rdi
1046
1047 __ bind(retry_tlab);
1048
1049 // get the instance size (size is postive so movl is fine for 64bit)
1050 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1051
1052 __ tlab_allocate(obj, obj_size, 0, t1, t2, slow_path);
1053
1054 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1055 __ verify_oop(obj);
1056 __ pop(rbx);
1057 __ pop(rdi);
1058 __ ret(0);
1059
1060 __ bind(try_eden);
1061 // get the instance size (size is postive so movl is fine for 64bit)
1062 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1063
1064 __ eden_allocate(obj, obj_size, 0, t1, slow_path);
1065 __ incr_allocated_bytes(thread, obj_size, 0);
1066
1067 __ initialize_object(obj, klass, obj_size, 0, t1, t2);
1068 __ verify_oop(obj);
1069 __ pop(rbx);
1070 __ pop(rdi);
1071 __ ret(0);
1072
1073 __ bind(slow_path);
1074 __ pop(rbx);
1075 __ pop(rdi);
1076 }
1077
1078 __ enter();
1079 OopMap* map = save_live_registers(sasm, 2);
1080 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1081 oop_maps = new OopMapSet();
1082 oop_maps->add_gc_map(call_offset, map);
1083 restore_live_registers_except_rax(sasm);
1084 __ verify_oop(obj);
1085 __ leave();
1086 __ ret(0);
1087
1088 // rax,: new instance
1089 }
1090
1091 break;
1092
1093 case counter_overflow_id:
1094 {
1095 Register bci = rax, method = rbx;
1096 __ enter();
1097 OopMap* map = save_live_registers(sasm, 3);
1098 // Retrieve bci
1099 __ movl(bci, Address(rbp, 2*BytesPerWord));
1100 // And a pointer to the Method*
1101 __ movptr(method, Address(rbp, 3*BytesPerWord));
1102 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1103 oop_maps = new OopMapSet();
1104 oop_maps->add_gc_map(call_offset, map);
1105 restore_live_registers(sasm);
1106 __ leave();
1107 __ ret(0);
1108 }
1109 break;
1110
1111 case new_type_array_id:
1112 case new_object_array_id:
1113 {
1114 Register length = rbx; // Incoming
1115 Register klass = rdx; // Incoming
1116 Register obj = rax; // Result
1117
1118 if (id == new_type_array_id) {
1119 __ set_info("new_type_array", dont_gc_arguments);
1120 } else {
1121 __ set_info("new_object_array", dont_gc_arguments);
1122 }
1123
1124 #ifdef ASSERT
1125 // assert object type is really an array of the proper kind
1126 {
1127 Label ok;
1128 Register t0 = obj;
1129 __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1130 __ sarl(t0, Klass::_lh_array_tag_shift);
1131 int tag = ((id == new_type_array_id)
1132 ? Klass::_lh_array_tag_type_value
1133 : Klass::_lh_array_tag_obj_value);
1134 __ cmpl(t0, tag);
1135 __ jcc(Assembler::equal, ok);
1136 __ stop("assert(is an array klass)");
1137 __ should_not_reach_here();
1138 __ bind(ok);
1139 }
1140 #endif // ASSERT
1141
1142 if (UseTLAB && FastTLABRefill) {
1143 Register arr_size = rsi;
1144 Register t1 = rcx; // must be rcx for use as shift count
1145 Register t2 = rdi;
1146 Label slow_path;
1147 assert_different_registers(length, klass, obj, arr_size, t1, t2);
1148
1149 // check that array length is small enough for fast path.
1150 __ cmpl(length, C1_MacroAssembler::max_array_allocation_length);
1151 __ jcc(Assembler::above, slow_path);
1152
1153 // if we got here then the TLAB allocation failed, so try
1154 // refilling the TLAB or allocating directly from eden.
1155 Label retry_tlab, try_eden;
1156 const Register thread =
1157 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves rbx & rdx, returns rdi
1158
1159 __ bind(retry_tlab);
1160
1161 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
1162 // since size is positive movl does right thing on 64bit
1163 __ movl(t1, Address(klass, Klass::layout_helper_offset()));
1164 // since size is postive movl does right thing on 64bit
1165 __ movl(arr_size, length);
1166 assert(t1 == rcx, "fixed register usage");
1167 __ shlptr(arr_size /* by t1=rcx, mod 32 */);
1168 __ shrptr(t1, Klass::_lh_header_size_shift);
1169 __ andptr(t1, Klass::_lh_header_size_mask);
1170 __ addptr(arr_size, t1);
1171 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
1172 __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
1173
1174 __ tlab_allocate(obj, arr_size, 0, t1, t2, slow_path); // preserves arr_size
1175
1176 __ initialize_header(obj, klass, length, t1, t2);
1177 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
1178 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1179 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1180 __ andptr(t1, Klass::_lh_header_size_mask);
1181 __ subptr(arr_size, t1); // body length
1182 __ addptr(t1, obj); // body start
1183 __ initialize_body(t1, arr_size, 0, t2);
1184 __ verify_oop(obj);
1185 __ ret(0);
1186
1187 __ bind(try_eden);
1188 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
1189 // since size is positive movl does right thing on 64bit
1190 __ movl(t1, Address(klass, Klass::layout_helper_offset()));
1191 // since size is postive movl does right thing on 64bit
1192 __ movl(arr_size, length);
1193 assert(t1 == rcx, "fixed register usage");
1194 __ shlptr(arr_size /* by t1=rcx, mod 32 */);
1195 __ shrptr(t1, Klass::_lh_header_size_shift);
1196 __ andptr(t1, Klass::_lh_header_size_mask);
1197 __ addptr(arr_size, t1);
1198 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
1199 __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
1200
1201 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size
1202 __ incr_allocated_bytes(thread, arr_size, 0);
1203
1204 __ initialize_header(obj, klass, length, t1, t2);
1205 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
1206 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1207 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1208 __ andptr(t1, Klass::_lh_header_size_mask);
1209 __ subptr(arr_size, t1); // body length
1210 __ addptr(t1, obj); // body start
1211 __ initialize_body(t1, arr_size, 0, t2);
1212 __ verify_oop(obj);
1213 __ ret(0);
1214
1215 __ bind(slow_path);
1216 }
1217
1218 __ enter();
1219 OopMap* map = save_live_registers(sasm, 3);
1220 int call_offset;
1221 if (id == new_type_array_id) {
1222 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1223 } else {
1224 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1225 }
1226
1227 oop_maps = new OopMapSet();
1228 oop_maps->add_gc_map(call_offset, map);
1229 restore_live_registers_except_rax(sasm);
1230
1231 __ verify_oop(obj);
1232 __ leave();
1233 __ ret(0);
1234
1235 // rax,: new array
1236 }
1237 break;
1238
1239 case new_multi_array_id:
1240 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1241 // rax,: klass
1242 // rbx,: rank
1243 // rcx: address of 1st dimension
1244 OopMap* map = save_live_registers(sasm, 4);
1245 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1246
1247 oop_maps = new OopMapSet();
1248 oop_maps->add_gc_map(call_offset, map);
1249 restore_live_registers_except_rax(sasm);
1250
1251 // rax,: new multi array
1252 __ verify_oop(rax);
1253 }
1254 break;
1255
1256 case register_finalizer_id:
1257 {
1258 __ set_info("register_finalizer", dont_gc_arguments);
1259
1260 // This is called via call_runtime so the arguments
1261 // will be place in C abi locations
1262
1263 #ifdef _LP64
1264 __ verify_oop(c_rarg0);
1265 __ mov(rax, c_rarg0);
1266 #else
1267 // The object is passed on the stack and we haven't pushed a
1268 // frame yet so it's one work away from top of stack.
1269 __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1270 __ verify_oop(rax);
1271 #endif // _LP64
1272
1273 // load the klass and check the has finalizer flag
1274 Label register_finalizer;
1275 Register t = rsi;
1276 __ load_klass(t, rax);
1277 __ movl(t, Address(t, Klass::access_flags_offset()));
1278 __ testl(t, JVM_ACC_HAS_FINALIZER);
1279 __ jcc(Assembler::notZero, register_finalizer);
1280 __ ret(0);
1281
1282 __ bind(register_finalizer);
1283 __ enter();
1284 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1285 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1286 oop_maps = new OopMapSet();
1287 oop_maps->add_gc_map(call_offset, oop_map);
1288
1289 // Now restore all the live registers
1290 restore_live_registers(sasm);
1291
1292 __ leave();
1293 __ ret(0);
1294 }
1295 break;
1296
1297 case throw_range_check_failed_id:
1298 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1299 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1300 }
1301 break;
1302
1303 case throw_index_exception_id:
1304 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1305 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1306 }
1307 break;
1308
1309 case throw_div0_exception_id:
1310 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1311 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1312 }
1313 break;
1314
1315 case throw_null_pointer_exception_id:
1316 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1317 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1318 }
1319 break;
1320
1321 case handle_exception_nofpu_id:
1322 case handle_exception_id:
1323 { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1324 oop_maps = generate_handle_exception(id, sasm);
1325 }
1326 break;
1327
1328 case handle_exception_from_callee_id:
1329 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1330 oop_maps = generate_handle_exception(id, sasm);
1331 }
1332 break;
1333
1334 case unwind_exception_id:
1335 { __ set_info("unwind_exception", dont_gc_arguments);
1336 // note: no stubframe since we are about to leave the current
1337 // activation and we are calling a leaf VM function only.
1338 generate_unwind_exception(sasm);
1339 }
1340 break;
1341
1342 case throw_array_store_exception_id:
1343 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1344 // tos + 0: link
1345 // + 1: return address
1346 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1347 }
1348 break;
1349
1350 case throw_class_cast_exception_id:
1351 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1352 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1353 }
1354 break;
1355
1356 case throw_incompatible_class_change_error_id:
1357 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1358 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1359 }
1360 break;
1361
1362 case slow_subtype_check_id:
1363 {
1364 // Typical calling sequence:
1365 // __ push(klass_RInfo); // object klass or other subclass
1366 // __ push(sup_k_RInfo); // array element klass or other superclass
1367 // __ call(slow_subtype_check);
1368 // Note that the subclass is pushed first, and is therefore deepest.
1369 // Previous versions of this code reversed the names 'sub' and 'super'.
1370 // This was operationally harmless but made the code unreadable.
1371 enum layout {
1372 rax_off, SLOT2(raxH_off)
1373 rcx_off, SLOT2(rcxH_off)
1374 rsi_off, SLOT2(rsiH_off)
1375 rdi_off, SLOT2(rdiH_off)
1376 // saved_rbp_off, SLOT2(saved_rbpH_off)
1377 return_off, SLOT2(returnH_off)
1378 sup_k_off, SLOT2(sup_kH_off)
1379 klass_off, SLOT2(superH_off)
1380 framesize,
1381 result_off = klass_off // deepest argument is also the return value
1382 };
1383
1384 __ set_info("slow_subtype_check", dont_gc_arguments);
1385 __ push(rdi);
1386 __ push(rsi);
1387 __ push(rcx);
1388 __ push(rax);
1389
1390 // This is called by pushing args and not with C abi
1391 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1392 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1393
1394 Label miss;
1395 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss);
1396
1397 // fallthrough on success:
1398 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1399 __ pop(rax);
1400 __ pop(rcx);
1401 __ pop(rsi);
1402 __ pop(rdi);
1403 __ ret(0);
1404
1405 __ bind(miss);
1406 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1407 __ pop(rax);
1408 __ pop(rcx);
1409 __ pop(rsi);
1410 __ pop(rdi);
1411 __ ret(0);
1412 }
1413 break;
1414
1415 case monitorenter_nofpu_id:
1416 save_fpu_registers = false;
1417 // fall through
1418 case monitorenter_id:
1419 {
1420 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1421 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1422
1423 // Called with store_parameter and not C abi
1424
1425 f.load_argument(1, rax); // rax,: object
1426 f.load_argument(0, rbx); // rbx,: lock address
1427
1428 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1429
1430 oop_maps = new OopMapSet();
1431 oop_maps->add_gc_map(call_offset, map);
1432 restore_live_registers(sasm, save_fpu_registers);
1433 }
1434 break;
1435
1436 case monitorexit_nofpu_id:
1437 save_fpu_registers = false;
1438 // fall through
1439 case monitorexit_id:
1440 {
1441 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1442 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1443
1444 // Called with store_parameter and not C abi
1445
1446 f.load_argument(0, rax); // rax,: lock address
1447
1448 // note: really a leaf routine but must setup last java sp
1449 // => use call_RT for now (speed can be improved by
1450 // doing last java sp setup manually)
1451 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1452
1453 oop_maps = new OopMapSet();
1454 oop_maps->add_gc_map(call_offset, map);
1455 restore_live_registers(sasm, save_fpu_registers);
1456 }
1457 break;
1458
1459 case deoptimize_id:
1460 {
1461 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1462 const int num_rt_args = 1; // thread
1463 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1464 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize));
1465 oop_maps = new OopMapSet();
1466 oop_maps->add_gc_map(call_offset, oop_map);
1467 restore_live_registers(sasm);
1468 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1469 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1470 __ leave();
1471 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1472 }
1473 break;
1474
1475 case access_field_patching_id:
1476 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1477 // we should set up register map
1478 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1479 }
1480 break;
1481
1482 case load_klass_patching_id:
1483 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1484 // we should set up register map
1485 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1486 }
1487 break;
1488
1489 case load_mirror_patching_id:
1490 { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1491 // we should set up register map
1492 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1493 }
1494 break;
1495
1496 case load_appendix_patching_id:
1497 { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1498 // we should set up register map
1499 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1500 }
1501 break;
1502
1503 case dtrace_object_alloc_id:
1504 { // rax,: object
1505 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1506 // we can't gc here so skip the oopmap but make sure that all
1507 // the live registers get saved.
1508 save_live_registers(sasm, 1);
1509
1510 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1511 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
1512 NOT_LP64(__ pop(rax));
1513
1514 restore_live_registers(sasm);
1515 }
1516 break;
1517
1518 case fpu2long_stub_id:
1519 {
1520 // rax, and rdx are destroyed, but should be free since the result is returned there
1521 // preserve rsi,ecx
1522 __ push(rsi);
1523 __ push(rcx);
1524 LP64_ONLY(__ push(rdx);)
1525
1526 // check for NaN
1527 Label return0, do_return, return_min_jlong, do_convert;
1528
1529 Address value_high_word(rsp, wordSize + 4);
1530 Address value_low_word(rsp, wordSize);
1531 Address result_high_word(rsp, 3*wordSize + 4);
1532 Address result_low_word(rsp, 3*wordSize);
1533
1534 __ subptr(rsp, 32); // more than enough on 32bit
1535 __ fst_d(value_low_word);
1536 __ movl(rax, value_high_word);
1537 __ andl(rax, 0x7ff00000);
1538 __ cmpl(rax, 0x7ff00000);
1539 __ jcc(Assembler::notEqual, do_convert);
1540 __ movl(rax, value_high_word);
1541 __ andl(rax, 0xfffff);
1542 __ orl(rax, value_low_word);
1543 __ jcc(Assembler::notZero, return0);
1544
1545 __ bind(do_convert);
1546 __ fnstcw(Address(rsp, 0));
1547 __ movzwl(rax, Address(rsp, 0));
1548 __ orl(rax, 0xc00);
1549 __ movw(Address(rsp, 2), rax);
1550 __ fldcw(Address(rsp, 2));
1551 __ fwait();
1552 __ fistp_d(result_low_word);
1553 __ fldcw(Address(rsp, 0));
1554 __ fwait();
1555 // This gets the entire long in rax on 64bit
1556 __ movptr(rax, result_low_word);
1557 // testing of high bits
1558 __ movl(rdx, result_high_word);
1559 __ mov(rcx, rax);
1560 // What the heck is the point of the next instruction???
1561 __ xorl(rcx, 0x0);
1562 __ movl(rsi, 0x80000000);
1563 __ xorl(rsi, rdx);
1564 __ orl(rcx, rsi);
1565 __ jcc(Assembler::notEqual, do_return);
1566 __ fldz();
1567 __ fcomp_d(value_low_word);
1568 __ fnstsw_ax();
1569 #ifdef _LP64
1570 __ testl(rax, 0x4100); // ZF & CF == 0
1571 __ jcc(Assembler::equal, return_min_jlong);
1572 #else
1573 __ sahf();
1574 __ jcc(Assembler::above, return_min_jlong);
1575 #endif // _LP64
1576 // return max_jlong
1577 #ifndef _LP64
1578 __ movl(rdx, 0x7fffffff);
1579 __ movl(rax, 0xffffffff);
1580 #else
1581 __ mov64(rax, CONST64(0x7fffffffffffffff));
1582 #endif // _LP64
1583 __ jmp(do_return);
1584
1585 __ bind(return_min_jlong);
1586 #ifndef _LP64
1587 __ movl(rdx, 0x80000000);
1588 __ xorl(rax, rax);
1589 #else
1590 __ mov64(rax, CONST64(0x8000000000000000));
1591 #endif // _LP64
1592 __ jmp(do_return);
1593
1594 __ bind(return0);
1595 __ fpop();
1596 #ifndef _LP64
1597 __ xorptr(rdx,rdx);
1598 __ xorptr(rax,rax);
1599 #else
1600 __ xorptr(rax, rax);
1601 #endif // _LP64
1602
1603 __ bind(do_return);
1604 __ addptr(rsp, 32);
1605 LP64_ONLY(__ pop(rdx);)
1606 __ pop(rcx);
1607 __ pop(rsi);
1608 __ ret(0);
1609 }
1610 break;
1611
1612 #if INCLUDE_ALL_GCS
1613 case g1_pre_barrier_slow_id:
1614 {
1615 StubFrame f(sasm, "g1_pre_barrier", dont_gc_arguments);
1616 // arg0 : previous value of memory
1617
1618 BarrierSet* bs = Universe::heap()->barrier_set();
1619 if (bs->kind() != BarrierSet::G1SATBCTLogging && bs->kind() != BarrierSet::ShenandoahBarrierSet) {
1620 __ movptr(rax, (int)id);
1621 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1622 __ should_not_reach_here();
1623 break;
1624 }
1625 __ push(rax);
1626 __ push(rdx);
1627
1628 const Register pre_val = rax;
1629 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
1630 const Register tmp = rdx;
1631
1632 NOT_LP64(__ get_thread(thread);)
1633
1634 Address in_progress(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
1635 PtrQueue::byte_offset_of_active()));
1636
1637 Address queue_index(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
1638 PtrQueue::byte_offset_of_index()));
1639 Address buffer(thread, in_bytes(JavaThread::satb_mark_queue_offset() +
1640 PtrQueue::byte_offset_of_buf()));
1641
1642
1643 Label done;
1644 Label runtime;
1645
1646 // Can we store original value in the thread's buffer?
1647
1648 #ifdef _LP64
1649 __ movslq(tmp, queue_index);
1650 __ cmpq(tmp, 0);
1651 #else
1652 __ cmpl(queue_index, 0);
1653 #endif
1654 __ jcc(Assembler::equal, runtime);
1655 #ifdef _LP64
1656 __ subq(tmp, wordSize);
1657 __ movl(queue_index, tmp);
1658 __ addq(tmp, buffer);
1659 #else
1660 __ subl(queue_index, wordSize);
1661 __ movl(tmp, buffer);
1662 __ addl(tmp, queue_index);
1663 #endif
1664
1665 // prev_val (rax)
1666 f.load_argument(0, pre_val);
1667 __ movptr(Address(tmp, 0), pre_val);
1668 __ jmp(done);
1669
1670 __ bind(runtime);
1671
1672 save_live_registers(sasm, 3);
1673
1674 // load the pre-value
1675 f.load_argument(0, rcx);
1676 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread);
1677
1678 restore_live_registers(sasm);
1679
1680 __ bind(done);
1681
1682 __ pop(rdx);
1683 __ pop(rax);
1684 }
1685 break;
1686
1687 case g1_post_barrier_slow_id:
1688 {
1689 StubFrame f(sasm, "g1_post_barrier", dont_gc_arguments);
1690
1691
1692 // arg0: store_address
1693 Address store_addr(rbp, 2*BytesPerWord);
1694
1695 BarrierSet* bs = Universe::heap()->barrier_set();
1696 if (bs->kind() == BarrierSet::ShenandoahBarrierSet) {
1697 __ movptr(rax, (int)id);
1698 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1699 __ should_not_reach_here();
1700 break;
1701 }
1702 CardTableModRefBS* ct = (CardTableModRefBS*)bs;
1703 assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code");
1704
1705 Label done;
1706 Label runtime;
1707
1708 // At this point we know new_value is non-NULL and the new_value crosses regions.
1709 // Must check to see if card is already dirty
1710
1711 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
1712
1713 Address queue_index(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
1714 PtrQueue::byte_offset_of_index()));
1715 Address buffer(thread, in_bytes(JavaThread::dirty_card_queue_offset() +
1716 PtrQueue::byte_offset_of_buf()));
1717
1718 __ push(rax);
1719 __ push(rcx);
1720
1721 const Register cardtable = rax;
1722 const Register card_addr = rcx;
1723
1724 f.load_argument(0, card_addr);
1725 __ shrptr(card_addr, CardTableModRefBS::card_shift);
1726 // Do not use ExternalAddress to load 'byte_map_base', since 'byte_map_base' is NOT
1727 // a valid address and therefore is not properly handled by the relocation code.
1728 __ movptr(cardtable, (intptr_t)ct->byte_map_base);
1729 __ addptr(card_addr, cardtable);
1730
1731 NOT_LP64(__ get_thread(thread);)
1732
1733 __ cmpb(Address(card_addr, 0), (int)G1SATBCardTableModRefBS::g1_young_card_val());
1734 __ jcc(Assembler::equal, done);
1735
1736 __ membar(Assembler::Membar_mask_bits(Assembler::StoreLoad));
1737 __ cmpb(Address(card_addr, 0), (int)CardTableModRefBS::dirty_card_val());
1738 __ jcc(Assembler::equal, done);
1739
1740 // storing region crossing non-NULL, card is clean.
1741 // dirty card and log.
1742
1743 __ movb(Address(card_addr, 0), (int)CardTableModRefBS::dirty_card_val());
1744
1745 __ cmpl(queue_index, 0);
1746 __ jcc(Assembler::equal, runtime);
1747 __ subl(queue_index, wordSize);
1748
1749 const Register buffer_addr = rbx;
1750 __ push(rbx);
1751
1752 __ movptr(buffer_addr, buffer);
1753
1754 #ifdef _LP64
1755 __ movslq(rscratch1, queue_index);
1756 __ addptr(buffer_addr, rscratch1);
1757 #else
1758 __ addptr(buffer_addr, queue_index);
1759 #endif
1760 __ movptr(Address(buffer_addr, 0), card_addr);
1761
1762 __ pop(rbx);
1763 __ jmp(done);
1764
1765 __ bind(runtime);
1766 __ push(rdx);
1767
1768 save_live_registers(sasm, 3);
1769
1770 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread);
1771
1772 restore_live_registers(sasm);
1773
1774 __ pop(rdx);
1775 __ bind(done);
1776
1777 __ pop(rcx);
1778 __ pop(rax);
1779
1780 }
1781 break;
1782 case shenandoah_lrb_slow_id:
1783 {
1784 StubFrame f(sasm, "shenandoah_load_reference_barrier", dont_gc_arguments);
1785 // arg0 : object to be resolved
1786
1787 save_live_registers(sasm, 1);
1788 #ifdef _LP64
1789 f.load_argument(0, c_rarg0);
1790 f.load_argument(1, c_rarg1);
1791 if (UseCompressedOops) {
1792 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_narrow), c_rarg0, c_rarg1);
1793 } else {
1794 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier), c_rarg0, c_rarg1);
1795 }
1796 #else
1797 f.load_argument(0, rax);
1798 f.load_argument(1, rbx);
1799 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier), rax, rbx);
1800 #endif
1801 restore_live_registers_except_rax(sasm, true);
1802
1803 }
1804 break;
1805 #endif // INCLUDE_ALL_GCS
1806
1807 case predicate_failed_trap_id:
1808 {
1809 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1810
1811 OopMap* map = save_live_registers(sasm, 1);
1812
1813 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1814 oop_maps = new OopMapSet();
1815 oop_maps->add_gc_map(call_offset, map);
1816 restore_live_registers(sasm);
1817 __ leave();
1818 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1819 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1820
1821 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1822 }
1823 break;
1824
1825 default:
1826 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1827 __ movptr(rax, (int)id);
1828 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1829 __ should_not_reach_here();
1830 }
1831 break;
1832 }
1833 return oop_maps;
1834 }
1835
1836 #undef __
1837
1838 const char *Runtime1::pd_name_for_address(address entry) {
1839 return "<unknown function>";
1840 }