src/cpu/x86/vm/templateTable_x86_64.cpp

*** 34,43 ****
--- 34,46 ----
  #include "prims/methodHandles.hpp"
  #include "runtime/sharedRuntime.hpp"
  #include "runtime/stubRoutines.hpp"
  #include "runtime/synchronizer.hpp"
  #include "utilities/macros.hpp"
+ #if INCLUDE_ALL_GCS
+ #include "shenandoahBarrierSetAssembler_x86.hpp"
+ #endif
  
  #ifndef CC_INTERP
  
  #define __ _masm->
  
*** 167,176 ****
--- 170,205 ----
                                     r8 /* tmp */,
                                     rbx /* tmp2 */);
          }
        }
        break;
+     case BarrierSet::ShenandoahBarrierSet:
+       {
+         // flatten object address if needed
+         if (obj.index() == noreg && obj.disp() == 0) {
+           if (obj.base() != rdx) {
+             __ movq(rdx, obj.base());
+           }
+         } else {
+           __ leaq(rdx, obj);
+         }
+         if (ShenandoahSATBBarrier) {
+           __ g1_write_barrier_pre(rdx /* obj */,
+                                   rbx /* pre_val */,
+                                   r15_thread /* thread */,
+                                   r8  /* tmp */,
+                                   val != noreg /* tosca_live */,
+                                   false /* expand_call */);
+         }
+         if (val == noreg) {
+           __ store_heap_oop_null(Address(rdx, 0));
+         } else {
+             ShenandoahBarrierSetAssembler::bsasm()->storeval_barrier(_masm, val, r8);
+           __ store_heap_oop(Address(rdx, 0), val);
+         }
+       }
+       break;
  #endif // INCLUDE_ALL_GCS
      case BarrierSet::CardTableModRef:
      case BarrierSet::CardTableExtension:
        {
          if (val == noreg) {