1 /*
2 * Copyright (c) 2018, 2020 Red Hat, Inc. All rights reserved.
3 *
4 * This code is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License version 2 only, as
6 * published by the Free Software Foundation.
7 *
8 * This code is distributed in the hope that it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * version 2 for more details (a copy is included in the LICENSE file that
12 * accompanied this code).
13 *
14 * You should have received a copy of the GNU General Public License version
15 * 2 along with this work; if not, write to the Free Software Foundation,
16 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
19 * or visit www.oracle.com if you need additional information or have any
20 * questions.
21 *
22 */
23
24 #include "precompiled.hpp"
25 #include "c1/c1_LIRGenerator.hpp"
26 #include "c1/c1_IR.hpp"
27 #include "gc_implementation/g1/satbQueue.hpp"
28 #include "gc_implementation/shenandoah/shenandoahForwarding.hpp"
29 #include "gc_implementation/shenandoah/shenandoahHeap.inline.hpp"
30 #include "gc_implementation/shenandoah/shenandoahHeapRegion.hpp"
31 #include "gc_implementation/shenandoah/c1/shenandoahBarrierSetC1.hpp"
32
33 #ifdef TARGET_ARCH_aarch64
34 #include "shenandoahBarrierSetAssembler_aarch64.hpp"
35 #endif
36 #ifdef TARGET_ARCH_x86
37 #include "shenandoahBarrierSetAssembler_x86.hpp"
38 #endif
39
40 #ifdef ASSERT
41 #define __ gen->lir(__FILE__, __LINE__)->
42 #else
43 #define __ gen->lir()->
44 #endif
45
46 void ShenandoahLoadReferenceBarrierStub::emit_code(LIR_Assembler* ce) {
47 ShenandoahBarrierSetAssembler* bs = ShenandoahBarrierSetAssembler::bsasm();
48 bs->gen_load_reference_barrier_stub(ce, this);
49 }
50
51 ShenandoahBarrierSetC1* ShenandoahBarrierSetC1::bsc1() {
52 return ShenandoahBarrierSet::barrier_set()->bsc1();
53 }
54
55 LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier(LIRGenerator* gen, LIR_Opr obj, LIR_Opr addr) {
56 if (ShenandoahLoadRefBarrier) {
57 return load_reference_barrier_impl(gen, obj, addr);
58 } else {
59 return obj;
60 }
61 }
62
63 LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier_impl(LIRGenerator* gen, LIR_Opr obj, LIR_Opr addr) {
64 assert(ShenandoahLoadRefBarrier, "Should be enabled");
65 obj = ensure_in_register(gen, obj, T_OBJECT);
66 assert(obj->is_register(), "must be a register at this point");
67 addr = ensure_in_register(gen, addr, T_ADDRESS);
68 assert(addr->is_register(), "must be a register at this point");
69 LIR_Opr result = gen->result_register_for(obj->value_type());
70 __ move(obj, result);
71 LIR_Opr tmp1 = gen->new_register(T_ADDRESS);
72 LIR_Opr tmp2 = gen->new_register(T_ADDRESS);
73
74 LIR_Opr thrd = gen->getThreadPointer();
75 LIR_Address* active_flag_addr =
76 new LIR_Address(thrd,
77 in_bytes(JavaThread::gc_state_offset()),
78 T_BYTE);
79 // Read and check the gc-state-flag.
80 LIR_Opr flag_val = gen->new_register(T_INT);
81 __ load(active_flag_addr, flag_val);
82 LIR_Opr mask = LIR_OprFact::intConst(ShenandoahHeap::HAS_FORWARDED |
83 ShenandoahHeap::EVACUATION);
84 LIR_Opr mask_reg = gen->new_register(T_INT);
85 __ move(mask, mask_reg);
86
87 if (TwoOperandLIRForm) {
88 __ logical_and(flag_val, mask_reg, flag_val);
89 } else {
90 LIR_Opr masked_flag = gen->new_register(T_INT);
91 __ logical_and(flag_val, mask_reg, masked_flag);
92 flag_val = masked_flag;
93 }
94 __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
95
96 CodeStub* slow = new ShenandoahLoadReferenceBarrierStub(obj, addr, result, tmp1, tmp2);
97 __ branch(lir_cond_notEqual, T_INT, slow);
98 __ branch_destination(slow->continuation());
99
100 return result;
101 }
102
103 LIR_Opr ShenandoahBarrierSetC1::ensure_in_register(LIRGenerator* gen, LIR_Opr obj, BasicType type) {
104 if (!obj->is_register()) {
105 LIR_Opr obj_reg;
106 if (obj->is_constant()) {
107 obj_reg = gen->new_register(type);
108 __ move(obj, obj_reg);
109 } else {
110 obj_reg = gen->new_pointer_register();
111 __ leal(obj, obj_reg);
112 }
113 obj = obj_reg;
114 }
115 return obj;
116 }
117
118 LIR_Opr ShenandoahBarrierSetC1::storeval_barrier(LIRGenerator* gen, LIR_Opr obj, CodeEmitInfo* info, bool patch) {
119 if (ShenandoahStoreValEnqueueBarrier) {
120 obj = ensure_in_register(gen, obj, T_OBJECT);
121 gen->G1SATBCardTableModRef_pre_barrier(LIR_OprFact::illegalOpr, obj, false, false, NULL);
122 }
123 return obj;
124 }
125
126 LIR_Opr ShenandoahBarrierSetC1::resolve_address(LIRGenerator* gen, LIR_Address* addr, BasicType type, CodeEmitInfo* patch_emit_info) {
127 LIR_Opr addr_opr = LIR_OprFact::address(addr);
128
129 LIR_Opr resolved_addr = gen->new_pointer_register();
130 if (patch_emit_info != NULL) {
131 __ leal(addr_opr, resolved_addr, lir_patch_normal, new CodeEmitInfo(patch_emit_info));
132 } else {
133 __ leal(addr_opr, resolved_addr);
134 }
135 return LIR_OprFact::address(new LIR_Address(resolved_addr, type));
136 }