107 }
108 Node* new_node(const Node* n) const {
109 assert(has_new_node(n), "set before get");
110 return _nodes.at(n->_idx);
111 }
112 void set_new_node(const Node* n, Node *nn) {
113 assert(!has_new_node(n), "set only once");
114 _nodes.map(n->_idx, nn);
115 }
116
117 #ifdef ASSERT
118 // Make sure only new nodes are reachable from this node
119 void verify_new_nodes_only(Node* root);
120
121 Node* _mem_node; // Ideal memory node consumed by mach node
122 #endif
123
124 // Mach node for ConP #NULL
125 MachNode* _mach_null;
126
127 public:
128 int LabelRootDepth;
129 // Convert ideal machine register to a register mask for spill-loads
130 static const RegMask *idealreg2regmask[];
131 RegMask *idealreg2spillmask [_last_machine_leaf];
132 RegMask *idealreg2debugmask [_last_machine_leaf];
133 RegMask *idealreg2mhdebugmask[_last_machine_leaf];
134 void init_spill_mask( Node *ret );
135 // Convert machine register number to register mask
136 static uint mreg2regmask_max;
137 static RegMask mreg2regmask[];
138 static RegMask STACK_ONLY_mask;
139
140 MachNode* mach_null() const { return _mach_null; }
141
142 bool is_shared( Node *n ) { return _shared.test(n->_idx) != 0; }
143 void set_shared( Node *n ) { _shared.set(n->_idx); }
144 bool is_visited( Node *n ) { return _visited.test(n->_idx) != 0; }
145 void set_visited( Node *n ) { _visited.set(n->_idx); }
146 bool is_dontcare( Node *n ) { return _dontcare.test(n->_idx) != 0; }
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107 }
108 Node* new_node(const Node* n) const {
109 assert(has_new_node(n), "set before get");
110 return _nodes.at(n->_idx);
111 }
112 void set_new_node(const Node* n, Node *nn) {
113 assert(!has_new_node(n), "set only once");
114 _nodes.map(n->_idx, nn);
115 }
116
117 #ifdef ASSERT
118 // Make sure only new nodes are reachable from this node
119 void verify_new_nodes_only(Node* root);
120
121 Node* _mem_node; // Ideal memory node consumed by mach node
122 #endif
123
124 // Mach node for ConP #NULL
125 MachNode* _mach_null;
126
127 void handle_precedence_edges(Node* n, MachNode *mach);
128
129 public:
130 int LabelRootDepth;
131 // Convert ideal machine register to a register mask for spill-loads
132 static const RegMask *idealreg2regmask[];
133 RegMask *idealreg2spillmask [_last_machine_leaf];
134 RegMask *idealreg2debugmask [_last_machine_leaf];
135 RegMask *idealreg2mhdebugmask[_last_machine_leaf];
136 void init_spill_mask( Node *ret );
137 // Convert machine register number to register mask
138 static uint mreg2regmask_max;
139 static RegMask mreg2regmask[];
140 static RegMask STACK_ONLY_mask;
141
142 MachNode* mach_null() const { return _mach_null; }
143
144 bool is_shared( Node *n ) { return _shared.test(n->_idx) != 0; }
145 void set_shared( Node *n ) { _shared.set(n->_idx); }
146 bool is_visited( Node *n ) { return _visited.test(n->_idx) != 0; }
147 void set_visited( Node *n ) { _visited.set(n->_idx); }
148 bool is_dontcare( Node *n ) { return _dontcare.test(n->_idx) != 0; }
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