1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/memnode.hpp"
30 #include "opto/mulnode.hpp"
31 #include "opto/phaseX.hpp"
32 #include "opto/subnode.hpp"
33
34 // Portions of code courtesy of Clifford Click
35
36
37 //=============================================================================
38 //------------------------------hash-------------------------------------------
39 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
40 // (commute) inputs to MulNodes willy-nilly so the hash function must return
41 // the same value in the presence of edge swapping.
42 uint MulNode::hash() const {
43 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
44 }
45
46 //------------------------------Identity---------------------------------------
47 // Multiplying a one preserves the other argument
48 Node *MulNode::Identity( PhaseTransform *phase ) {
49 register const Type *one = mul_id(); // The multiplicative identity
50 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
51 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
52
53 return this;
54 }
55
56 //------------------------------Ideal------------------------------------------
57 // We also canonicalize the Node, moving constants to the right input,
58 // and flatten expressions (so that 1+x+2 becomes x+3).
59 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
60 const Type *t1 = phase->type( in(1) );
61 const Type *t2 = phase->type( in(2) );
62 Node *progress = NULL; // Progress flag
63 // We are OK if right is a constant, or right is a load and
64 // left is a non-constant.
65 if( !(t2->singleton() ||
66 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
67 if( t1->singleton() || // Left input is a constant?
68 // Otherwise, sort inputs (commutativity) to help value numbering.
69 (in(1)->_idx > in(2)->_idx) ) {
70 swap_edges(1, 2);
71 const Type *t = t1;
72 t1 = t2;
73 t2 = t;
74 progress = this; // Made progress
75 }
76 }
77
78 // If the right input is a constant, and the left input is a product of a
79 // constant, flatten the expression tree.
80 uint op = Opcode();
81 if( t2->singleton() && // Right input is a constant?
82 op != Op_MulF && // Float & double cannot reassociate
83 op != Op_MulD ) {
84 if( t2 == Type::TOP ) return NULL;
85 Node *mul1 = in(1);
86 #ifdef ASSERT
87 // Check for dead loop
88 int op1 = mul1->Opcode();
89 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
90 ( op1 == mul_opcode() || op1 == add_opcode() ) &&
91 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
92 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
93 assert(false, "dead loop in MulNode::Ideal");
94 #endif
95
96 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
97 // Mul of a constant?
98 const Type *t12 = phase->type( mul1->in(2) );
99 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
100 // Compute new constant; check for overflow
101 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
102 if( tcon01->singleton() ) {
103 // The Mul of the flattened expression
104 set_req(1, mul1->in(1));
105 set_req(2, phase->makecon( tcon01 ));
106 t2 = tcon01;
107 progress = this; // Made progress
108 }
109 }
110 }
111 // If the right input is a constant, and the left input is an add of a
112 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
113 const Node *add1 = in(1);
114 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
115 // Add of a constant?
116 const Type *t12 = phase->type( add1->in(2) );
117 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
118 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
119 // Compute new constant; check for overflow
120 const Type *tcon01 = mul_ring(t2,t12);
121 if( tcon01->singleton() ) {
122
123 // Convert (X+con1)*con0 into X*con0
124 Node *mul = clone(); // mul = ()*con0
125 mul->set_req(1,add1->in(1)); // mul = X*con0
126 mul = phase->transform(mul);
127
128 Node *add2 = add1->clone();
129 add2->set_req(1, mul); // X*con0 + con0*con1
130 add2->set_req(2, phase->makecon(tcon01) );
131 progress = add2;
132 }
133 }
134 } // End of is left input an add
135 } // End of is right input a Mul
136
137 return progress;
138 }
139
140 //------------------------------Value-----------------------------------------
141 const Type *MulNode::Value( PhaseTransform *phase ) const {
142 const Type *t1 = phase->type( in(1) );
143 const Type *t2 = phase->type( in(2) );
144 // Either input is TOP ==> the result is TOP
145 if( t1 == Type::TOP ) return Type::TOP;
146 if( t2 == Type::TOP ) return Type::TOP;
147
148 // Either input is ZERO ==> the result is ZERO.
149 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
150 int op = Opcode();
151 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
152 const Type *zero = add_id(); // The multiplicative zero
153 if( t1->higher_equal( zero ) ) return zero;
154 if( t2->higher_equal( zero ) ) return zero;
155 }
156
157 // Either input is BOTTOM ==> the result is the local BOTTOM
158 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
159 return bottom_type();
160
161 #if defined(IA32)
162 // Can't trust native compilers to properly fold strict double
163 // multiplication with round-to-zero on this platform.
164 if (op == Op_MulD && phase->C->method()->is_strict()) {
165 return TypeD::DOUBLE;
166 }
167 #endif
168
169 return mul_ring(t1,t2); // Local flavor of type multiplication
170 }
171
172 //=============================================================================
173 //------------------------------Ideal------------------------------------------
174 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
175 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
176 // Swap constant to right
177 jint con;
178 if ((con = in(1)->find_int_con(0)) != 0) {
179 swap_edges(1, 2);
180 // Finish rest of method to use info in 'con'
181 } else if ((con = in(2)->find_int_con(0)) == 0) {
182 return MulNode::Ideal(phase, can_reshape);
183 }
184
185 // Now we have a constant Node on the right and the constant in con
186 if (con == 0) return NULL; // By zero is handled by Value call
187 if (con == 1) return NULL; // By one is handled by Identity call
188
189 // Check for negative constant; if so negate the final result
190 bool sign_flip = false;
191
192 unsigned int abs_con = uabs(con);
193 if (abs_con != (unsigned int)con) {
194 sign_flip = true;
195 }
196
197 // Get low bit; check for being the only bit
198 Node *res = NULL;
199 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit
200 if (bit1 == abs_con) { // Found a power of 2?
201 res = new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit1)));
202 } else {
203
204 // Check for constant with 2 bits set
205 unsigned int bit2 = abs_con-bit1;
206 bit2 = bit2 & (0-bit2); // Extract 2nd bit
207 if (bit2 + bit1 == abs_con) { // Found all bits in con?
208 Node *n1 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit1))));
209 Node *n2 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit2))));
210 res = new (phase->C) AddINode(n2, n1);
211
212 } else if (is_power_of_2(abs_con+1)) {
213 // Sleezy: power-of-2 -1. Next time be generic.
214 unsigned int temp = abs_con + 1;
215 Node *n1 = phase->transform(new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(temp))));
216 res = new (phase->C) SubINode(n1, in(1));
217 } else {
218 return MulNode::Ideal(phase, can_reshape);
219 }
220 }
221
222 if (sign_flip) { // Need to negate result?
223 res = phase->transform(res);// Transform, before making the zero con
224 res = new (phase->C) SubINode(phase->intcon(0),res);
225 }
226
227 return res; // Return final result
228 }
229
230 //------------------------------mul_ring---------------------------------------
231 // Compute the product type of two integer ranges into this node.
232 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
233 const TypeInt *r0 = t0->is_int(); // Handy access
234 const TypeInt *r1 = t1->is_int();
235
236 // Fetch endpoints of all ranges
237 int32 lo0 = r0->_lo;
238 double a = (double)lo0;
239 int32 hi0 = r0->_hi;
240 double b = (double)hi0;
241 int32 lo1 = r1->_lo;
242 double c = (double)lo1;
243 int32 hi1 = r1->_hi;
244 double d = (double)hi1;
245
246 // Compute all endpoints & check for overflow
247 int32 A = java_multiply(lo0, lo1);
248 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
249 int32 B = java_multiply(lo0, hi1);
250 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
251 int32 C = java_multiply(hi0, lo1);
252 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
253 int32 D = java_multiply(hi0, hi1);
254 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
255
256 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
257 else { lo0 = B; hi0 = A; }
258 if( C < D ) {
259 if( C < lo0 ) lo0 = C;
260 if( D > hi0 ) hi0 = D;
261 } else {
262 if( D < lo0 ) lo0 = D;
263 if( C > hi0 ) hi0 = C;
264 }
265 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
266 }
267
268
269 //=============================================================================
270 //------------------------------Ideal------------------------------------------
271 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
272 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
273 // Swap constant to right
274 jlong con;
275 if ((con = in(1)->find_long_con(0)) != 0) {
276 swap_edges(1, 2);
277 // Finish rest of method to use info in 'con'
278 } else if ((con = in(2)->find_long_con(0)) == 0) {
279 return MulNode::Ideal(phase, can_reshape);
280 }
281
282 // Now we have a constant Node on the right and the constant in con
283 if (con == CONST64(0)) return NULL; // By zero is handled by Value call
284 if (con == CONST64(1)) return NULL; // By one is handled by Identity call
285
286 // Check for negative constant; if so negate the final result
287 bool sign_flip = false;
288 julong abs_con = uabs(con);
289 if (abs_con != (julong)con) {
290 sign_flip = true;
291 }
292
293 // Get low bit; check for being the only bit
294 Node *res = NULL;
295 julong bit1 = abs_con & (0-abs_con); // Extract low bit
296 if (bit1 == abs_con) { // Found a power of 2?
297 res = new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(bit1)));
298 } else {
299
300 // Check for constant with 2 bits set
301 julong bit2 = abs_con-bit1;
302 bit2 = bit2 & (0-bit2); // Extract 2nd bit
303 if (bit2 + bit1 == abs_con) { // Found all bits in con?
304 Node *n1 = phase->transform(new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(bit1))));
305 Node *n2 = phase->transform(new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(bit2))));
306 res = new (phase->C) AddLNode(n2, n1);
307
308 } else if (is_power_of_2_long(abs_con+1)) {
309 // Sleezy: power-of-2 -1. Next time be generic.
310 julong temp = abs_con + 1;
311 Node *n1 = phase->transform( new (phase->C) LShiftLNode(in(1), phase->intcon(log2_long(temp))));
312 res = new (phase->C) SubLNode(n1, in(1));
313 } else {
314 return MulNode::Ideal(phase, can_reshape);
315 }
316 }
317
318 if (sign_flip) { // Need to negate result?
319 res = phase->transform(res);// Transform, before making the zero con
320 res = new (phase->C) SubLNode(phase->longcon(0),res);
321 }
322
323 return res; // Return final result
324 }
325
326 //------------------------------mul_ring---------------------------------------
327 // Compute the product type of two integer ranges into this node.
328 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
329 const TypeLong *r0 = t0->is_long(); // Handy access
330 const TypeLong *r1 = t1->is_long();
331
332 // Fetch endpoints of all ranges
333 jlong lo0 = r0->_lo;
334 double a = (double)lo0;
335 jlong hi0 = r0->_hi;
336 double b = (double)hi0;
337 jlong lo1 = r1->_lo;
338 double c = (double)lo1;
339 jlong hi1 = r1->_hi;
340 double d = (double)hi1;
341
342 // Compute all endpoints & check for overflow
343 jlong A = java_multiply(lo0, lo1);
344 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
345 jlong B = java_multiply(lo0, hi1);
346 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
347 jlong C = java_multiply(hi0, lo1);
348 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
349 jlong D = java_multiply(hi0, hi1);
350 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
351
352 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
353 else { lo0 = B; hi0 = A; }
354 if( C < D ) {
355 if( C < lo0 ) lo0 = C;
356 if( D > hi0 ) hi0 = D;
357 } else {
358 if( D < lo0 ) lo0 = D;
359 if( C > hi0 ) hi0 = C;
360 }
361 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
362 }
363
364 //=============================================================================
365 //------------------------------mul_ring---------------------------------------
366 // Compute the product type of two double ranges into this node.
367 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
368 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
369 return TypeF::make( t0->getf() * t1->getf() );
370 }
371
372 //=============================================================================
373 //------------------------------mul_ring---------------------------------------
374 // Compute the product type of two double ranges into this node.
375 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
376 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
377 // We must be multiplying 2 double constants.
378 return TypeD::make( t0->getd() * t1->getd() );
379 }
380
381 //=============================================================================
382 //------------------------------Value------------------------------------------
383 const Type *MulHiLNode::Value( PhaseTransform *phase ) const {
384 // Either input is TOP ==> the result is TOP
385 const Type *t1 = phase->type( in(1) );
386 const Type *t2 = phase->type( in(2) );
387 if( t1 == Type::TOP ) return Type::TOP;
388 if( t2 == Type::TOP ) return Type::TOP;
389
390 // Either input is BOTTOM ==> the result is the local BOTTOM
391 const Type *bot = bottom_type();
392 if( (t1 == bot) || (t2 == bot) ||
393 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
394 return bot;
395
396 // It is not worth trying to constant fold this stuff!
397 return TypeLong::LONG;
398 }
399
400 //=============================================================================
401 //------------------------------mul_ring---------------------------------------
402 // Supplied function returns the product of the inputs IN THE CURRENT RING.
403 // For the logical operations the ring's MUL is really a logical AND function.
404 // This also type-checks the inputs for sanity. Guaranteed never to
405 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
406 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
407 const TypeInt *r0 = t0->is_int(); // Handy access
408 const TypeInt *r1 = t1->is_int();
409 int widen = MAX2(r0->_widen,r1->_widen);
410
411 // If either input is a constant, might be able to trim cases
412 if( !r0->is_con() && !r1->is_con() )
413 return TypeInt::INT; // No constants to be had
414
415 // Both constants? Return bits
416 if( r0->is_con() && r1->is_con() )
417 return TypeInt::make( r0->get_con() & r1->get_con() );
418
419 if( r0->is_con() && r0->get_con() > 0 )
420 return TypeInt::make(0, r0->get_con(), widen);
421
422 if( r1->is_con() && r1->get_con() > 0 )
423 return TypeInt::make(0, r1->get_con(), widen);
424
425 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
426 return TypeInt::BOOL;
427 }
428
429 return TypeInt::INT; // No constants to be had
430 }
431
432 //------------------------------Identity---------------------------------------
433 // Masking off the high bits of an unsigned load is not required
434 Node *AndINode::Identity( PhaseTransform *phase ) {
435
436 // x & x => x
437 if (phase->eqv(in(1), in(2))) return in(1);
438
439 Node* in1 = in(1);
440 uint op = in1->Opcode();
441 const TypeInt* t2 = phase->type(in(2))->isa_int();
442 if (t2 && t2->is_con()) {
443 int con = t2->get_con();
444 // Masking off high bits which are always zero is useless.
445 const TypeInt* t1 = phase->type( in(1) )->isa_int();
446 if (t1 != NULL && t1->_lo >= 0) {
447 jint t1_support = right_n_bits(1 + log2_jint(t1->_hi));
448 if ((t1_support & con) == t1_support)
449 return in1;
450 }
451 // Masking off the high bits of a unsigned-shift-right is not
452 // needed either.
453 if (op == Op_URShiftI) {
454 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
455 if (t12 && t12->is_con()) { // Shift is by a constant
456 int shift = t12->get_con();
457 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
458 int mask = max_juint >> shift;
459 if ((mask & con) == mask) // If AND is useless, skip it
460 return in1;
461 }
462 }
463 }
464 return MulNode::Identity(phase);
465 }
466
467 //------------------------------Ideal------------------------------------------
468 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
469 // Special case constant AND mask
470 const TypeInt *t2 = phase->type( in(2) )->isa_int();
471 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
472 const int mask = t2->get_con();
473 Node *load = in(1);
474 uint lop = load->Opcode();
475
476 // Masking bits off of a Character? Hi bits are already zero.
477 if( lop == Op_LoadUS &&
478 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
479 return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
480
481 // Masking bits off of a Short? Loading a Character does some masking
482 if (can_reshape &&
483 load->outcnt() == 1 && load->unique_out() == this) {
484 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
485 Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
486 load->in(MemNode::Memory),
487 load->in(MemNode::Address),
488 load->adr_type(),
489 TypeInt::CHAR, MemNode::unordered);
490 ldus = phase->transform(ldus);
491 return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
492 }
493
494 // Masking sign bits off of a Byte? Do an unsigned byte load plus
495 // an and.
496 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
497 Node* ldub = new (phase->C) LoadUBNode(load->in(MemNode::Control),
498 load->in(MemNode::Memory),
499 load->in(MemNode::Address),
500 load->adr_type(),
501 TypeInt::UBYTE, MemNode::unordered);
502 ldub = phase->transform(ldub);
503 return new (phase->C) AndINode(ldub, phase->intcon(mask));
504 }
505 }
506
507 // Masking off sign bits? Dont make them!
508 if( lop == Op_RShiftI ) {
509 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
510 if( t12 && t12->is_con() ) { // Shift is by a constant
511 int shift = t12->get_con();
512 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
513 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
514 // If the AND'ing of the 2 masks has no bits, then only original shifted
515 // bits survive. NO sign-extension bits survive the maskings.
516 if( (sign_bits_mask & mask) == 0 ) {
517 // Use zero-fill shift instead
518 Node *zshift = phase->transform(new (phase->C) URShiftINode(load->in(1),load->in(2)));
519 return new (phase->C) AndINode( zshift, in(2) );
520 }
521 }
522 }
523
524 // Check for 'negate/and-1', a pattern emitted when someone asks for
525 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
526 // plus 1) and the mask is of the low order bit. Skip the negate.
527 if( lop == Op_SubI && mask == 1 && load->in(1) &&
528 phase->type(load->in(1)) == TypeInt::ZERO )
529 return new (phase->C) AndINode( load->in(2), in(2) );
530
531 return MulNode::Ideal(phase, can_reshape);
532 }
533
534 //=============================================================================
535 //------------------------------mul_ring---------------------------------------
536 // Supplied function returns the product of the inputs IN THE CURRENT RING.
537 // For the logical operations the ring's MUL is really a logical AND function.
538 // This also type-checks the inputs for sanity. Guaranteed never to
539 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
540 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
541 const TypeLong *r0 = t0->is_long(); // Handy access
542 const TypeLong *r1 = t1->is_long();
543 int widen = MAX2(r0->_widen,r1->_widen);
544
545 // If either input is a constant, might be able to trim cases
546 if( !r0->is_con() && !r1->is_con() )
547 return TypeLong::LONG; // No constants to be had
548
549 // Both constants? Return bits
550 if( r0->is_con() && r1->is_con() )
551 return TypeLong::make( r0->get_con() & r1->get_con() );
552
553 if( r0->is_con() && r0->get_con() > 0 )
554 return TypeLong::make(CONST64(0), r0->get_con(), widen);
555
556 if( r1->is_con() && r1->get_con() > 0 )
557 return TypeLong::make(CONST64(0), r1->get_con(), widen);
558
559 return TypeLong::LONG; // No constants to be had
560 }
561
562 //------------------------------Identity---------------------------------------
563 // Masking off the high bits of an unsigned load is not required
564 Node *AndLNode::Identity( PhaseTransform *phase ) {
565
566 // x & x => x
567 if (phase->eqv(in(1), in(2))) return in(1);
568
569 Node *usr = in(1);
570 const TypeLong *t2 = phase->type( in(2) )->isa_long();
571 if( t2 && t2->is_con() ) {
572 jlong con = t2->get_con();
573 // Masking off high bits which are always zero is useless.
574 const TypeLong* t1 = phase->type( in(1) )->isa_long();
575 if (t1 != NULL && t1->_lo >= 0) {
576 int bit_count = log2_long(t1->_hi) + 1;
577 jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
578 if ((t1_support & con) == t1_support)
579 return usr;
580 }
581 uint lop = usr->Opcode();
582 // Masking off the high bits of a unsigned-shift-right is not
583 // needed either.
584 if( lop == Op_URShiftL ) {
585 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
586 if( t12 && t12->is_con() ) { // Shift is by a constant
587 int shift = t12->get_con();
588 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
589 jlong mask = max_julong >> shift;
590 if( (mask&con) == mask ) // If AND is useless, skip it
591 return usr;
592 }
593 }
594 }
595 return MulNode::Identity(phase);
596 }
597
598 //------------------------------Ideal------------------------------------------
599 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
600 // Special case constant AND mask
601 const TypeLong *t2 = phase->type( in(2) )->isa_long();
602 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
603 const jlong mask = t2->get_con();
604
605 Node* in1 = in(1);
606 uint op = in1->Opcode();
607
608 // Are we masking a long that was converted from an int with a mask
609 // that fits in 32-bits? Commute them and use an AndINode. Don't
610 // convert masks which would cause a sign extension of the integer
611 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
612 // would be optimized away later in Identity.
613 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) {
614 Node* andi = new (phase->C) AndINode(in1->in(1), phase->intcon(mask));
615 andi = phase->transform(andi);
616 return new (phase->C) ConvI2LNode(andi);
617 }
618
619 // Masking off sign bits? Dont make them!
620 if (op == Op_RShiftL) {
621 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
622 if( t12 && t12->is_con() ) { // Shift is by a constant
623 int shift = t12->get_con();
624 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
625 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
626 // If the AND'ing of the 2 masks has no bits, then only original shifted
627 // bits survive. NO sign-extension bits survive the maskings.
628 if( (sign_bits_mask & mask) == 0 ) {
629 // Use zero-fill shift instead
630 Node *zshift = phase->transform(new (phase->C) URShiftLNode(in1->in(1), in1->in(2)));
631 return new (phase->C) AndLNode(zshift, in(2));
632 }
633 }
634 }
635
636 return MulNode::Ideal(phase, can_reshape);
637 }
638
639 //=============================================================================
640 //------------------------------Identity---------------------------------------
641 Node *LShiftINode::Identity( PhaseTransform *phase ) {
642 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
643 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
644 }
645
646 //------------------------------Ideal------------------------------------------
647 // If the right input is a constant, and the left input is an add of a
648 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
649 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
650 const Type *t = phase->type( in(2) );
651 if( t == Type::TOP ) return NULL; // Right input is dead
652 const TypeInt *t2 = t->isa_int();
653 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
654 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
655
656 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
657
658 // Left input is an add of a constant?
659 Node *add1 = in(1);
660 int add1_op = add1->Opcode();
661 if( add1_op == Op_AddI ) { // Left input is an add?
662 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
663 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
664 if( t12 && t12->is_con() ){ // Left input is an add of a con?
665 // Transform is legal, but check for profit. Avoid breaking 'i2s'
666 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
667 if( con < 16 ) {
668 // Compute X << con0
669 Node *lsh = phase->transform( new (phase->C) LShiftINode( add1->in(1), in(2) ) );
670 // Compute X<<con0 + (con1<<con0)
671 return new (phase->C) AddINode( lsh, phase->intcon(t12->get_con() << con));
672 }
673 }
674 }
675
676 // Check for "(x>>c0)<<c0" which just masks off low bits
677 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
678 add1->in(2) == in(2) )
679 // Convert to "(x & -(1<<c0))"
680 return new (phase->C) AndINode(add1->in(1),phase->intcon( -(1<<con)));
681
682 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
683 if( add1_op == Op_AndI ) {
684 Node *add2 = add1->in(1);
685 int add2_op = add2->Opcode();
686 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
687 add2->in(2) == in(2) ) {
688 // Convert to "(x & (Y<<c0))"
689 Node *y_sh = phase->transform( new (phase->C) LShiftINode( add1->in(2), in(2) ) );
690 return new (phase->C) AndINode( add2->in(1), y_sh );
691 }
692 }
693
694 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
695 // before shifting them away.
696 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
697 if( add1_op == Op_AndI &&
698 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
699 return new (phase->C) LShiftINode( add1->in(1), in(2) );
700
701 return NULL;
702 }
703
704 //------------------------------Value------------------------------------------
705 // A LShiftINode shifts its input2 left by input1 amount.
706 const Type *LShiftINode::Value( PhaseTransform *phase ) const {
707 const Type *t1 = phase->type( in(1) );
708 const Type *t2 = phase->type( in(2) );
709 // Either input is TOP ==> the result is TOP
710 if( t1 == Type::TOP ) return Type::TOP;
711 if( t2 == Type::TOP ) return Type::TOP;
712
713 // Left input is ZERO ==> the result is ZERO.
714 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
715 // Shift by zero does nothing
716 if( t2 == TypeInt::ZERO ) return t1;
717
718 // Either input is BOTTOM ==> the result is BOTTOM
719 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
720 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
721 return TypeInt::INT;
722
723 const TypeInt *r1 = t1->is_int(); // Handy access
724 const TypeInt *r2 = t2->is_int(); // Handy access
725
726 if (!r2->is_con())
727 return TypeInt::INT;
728
729 uint shift = r2->get_con();
730 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
731 // Shift by a multiple of 32 does nothing:
732 if (shift == 0) return t1;
733
734 // If the shift is a constant, shift the bounds of the type,
735 // unless this could lead to an overflow.
736 if (!r1->is_con()) {
737 jint lo = r1->_lo, hi = r1->_hi;
738 if (((lo << shift) >> shift) == lo &&
739 ((hi << shift) >> shift) == hi) {
740 // No overflow. The range shifts up cleanly.
741 return TypeInt::make((jint)lo << (jint)shift,
742 (jint)hi << (jint)shift,
743 MAX2(r1->_widen,r2->_widen));
744 }
745 return TypeInt::INT;
746 }
747
748 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
749 }
750
751 //=============================================================================
752 //------------------------------Identity---------------------------------------
753 Node *LShiftLNode::Identity( PhaseTransform *phase ) {
754 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
755 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
756 }
757
758 //------------------------------Ideal------------------------------------------
759 // If the right input is a constant, and the left input is an add of a
760 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
761 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
762 const Type *t = phase->type( in(2) );
763 if( t == Type::TOP ) return NULL; // Right input is dead
764 const TypeInt *t2 = t->isa_int();
765 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
766 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
767
768 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
769
770 // Left input is an add of a constant?
771 Node *add1 = in(1);
772 int add1_op = add1->Opcode();
773 if( add1_op == Op_AddL ) { // Left input is an add?
774 // Avoid dead data cycles from dead loops
775 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
776 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
777 if( t12 && t12->is_con() ){ // Left input is an add of a con?
778 // Compute X << con0
779 Node *lsh = phase->transform( new (phase->C) LShiftLNode( add1->in(1), in(2) ) );
780 // Compute X<<con0 + (con1<<con0)
781 return new (phase->C) AddLNode( lsh, phase->longcon(t12->get_con() << con));
782 }
783 }
784
785 // Check for "(x>>c0)<<c0" which just masks off low bits
786 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
787 add1->in(2) == in(2) )
788 // Convert to "(x & -(1<<c0))"
789 return new (phase->C) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
790
791 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
792 if( add1_op == Op_AndL ) {
793 Node *add2 = add1->in(1);
794 int add2_op = add2->Opcode();
795 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
796 add2->in(2) == in(2) ) {
797 // Convert to "(x & (Y<<c0))"
798 Node *y_sh = phase->transform( new (phase->C) LShiftLNode( add1->in(2), in(2) ) );
799 return new (phase->C) AndLNode( add2->in(1), y_sh );
800 }
801 }
802
803 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
804 // before shifting them away.
805 const jlong bits_mask = jlong(max_julong >> con);
806 if( add1_op == Op_AndL &&
807 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
808 return new (phase->C) LShiftLNode( add1->in(1), in(2) );
809
810 return NULL;
811 }
812
813 //------------------------------Value------------------------------------------
814 // A LShiftLNode shifts its input2 left by input1 amount.
815 const Type *LShiftLNode::Value( PhaseTransform *phase ) const {
816 const Type *t1 = phase->type( in(1) );
817 const Type *t2 = phase->type( in(2) );
818 // Either input is TOP ==> the result is TOP
819 if( t1 == Type::TOP ) return Type::TOP;
820 if( t2 == Type::TOP ) return Type::TOP;
821
822 // Left input is ZERO ==> the result is ZERO.
823 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
824 // Shift by zero does nothing
825 if( t2 == TypeInt::ZERO ) return t1;
826
827 // Either input is BOTTOM ==> the result is BOTTOM
828 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
829 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
830 return TypeLong::LONG;
831
832 const TypeLong *r1 = t1->is_long(); // Handy access
833 const TypeInt *r2 = t2->is_int(); // Handy access
834
835 if (!r2->is_con())
836 return TypeLong::LONG;
837
838 uint shift = r2->get_con();
839 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
840 // Shift by a multiple of 64 does nothing:
841 if (shift == 0) return t1;
842
843 // If the shift is a constant, shift the bounds of the type,
844 // unless this could lead to an overflow.
845 if (!r1->is_con()) {
846 jlong lo = r1->_lo, hi = r1->_hi;
847 if (((lo << shift) >> shift) == lo &&
848 ((hi << shift) >> shift) == hi) {
849 // No overflow. The range shifts up cleanly.
850 return TypeLong::make((jlong)lo << (jint)shift,
851 (jlong)hi << (jint)shift,
852 MAX2(r1->_widen,r2->_widen));
853 }
854 return TypeLong::LONG;
855 }
856
857 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
858 }
859
860 //=============================================================================
861 //------------------------------Identity---------------------------------------
862 Node *RShiftINode::Identity( PhaseTransform *phase ) {
863 const TypeInt *t2 = phase->type(in(2))->isa_int();
864 if( !t2 ) return this;
865 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
866 return in(1);
867
868 // Check for useless sign-masking
869 if( in(1)->Opcode() == Op_LShiftI &&
870 in(1)->req() == 3 &&
871 in(1)->in(2) == in(2) &&
872 t2->is_con() ) {
873 uint shift = t2->get_con();
874 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
875 // Compute masks for which this shifting doesn't change
876 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
877 int hi = ~lo; // 00007FFF
878 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
879 if( !t11 ) return this;
880 // Does actual value fit inside of mask?
881 if( lo <= t11->_lo && t11->_hi <= hi )
882 return in(1)->in(1); // Then shifting is a nop
883 }
884
885 return this;
886 }
887
888 //------------------------------Ideal------------------------------------------
889 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
890 // Inputs may be TOP if they are dead.
891 const TypeInt *t1 = phase->type( in(1) )->isa_int();
892 if( !t1 ) return NULL; // Left input is an integer
893 const TypeInt *t2 = phase->type( in(2) )->isa_int();
894 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
895 const TypeInt *t3; // type of in(1).in(2)
896 int shift = t2->get_con();
897 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
898
899 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
900
901 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
902 // Such expressions arise normally from shift chains like (byte)(x >> 24).
903 const Node *mask = in(1);
904 if( mask->Opcode() == Op_AndI &&
905 (t3 = phase->type(mask->in(2))->isa_int()) &&
906 t3->is_con() ) {
907 Node *x = mask->in(1);
908 jint maskbits = t3->get_con();
909 // Convert to "(x >> shift) & (mask >> shift)"
910 Node *shr_nomask = phase->transform( new (phase->C) RShiftINode(mask->in(1), in(2)) );
911 return new (phase->C) AndINode(shr_nomask, phase->intcon( maskbits >> shift));
912 }
913
914 // Check for "(short[i] <<16)>>16" which simply sign-extends
915 const Node *shl = in(1);
916 if( shl->Opcode() != Op_LShiftI ) return NULL;
917
918 if( shift == 16 &&
919 (t3 = phase->type(shl->in(2))->isa_int()) &&
920 t3->is_con(16) ) {
921 Node *ld = shl->in(1);
922 if( ld->Opcode() == Op_LoadS ) {
923 // Sign extension is just useless here. Return a RShiftI of zero instead
924 // returning 'ld' directly. We cannot return an old Node directly as
925 // that is the job of 'Identity' calls and Identity calls only work on
926 // direct inputs ('ld' is an extra Node removed from 'this'). The
927 // combined optimization requires Identity only return direct inputs.
928 set_req(1, ld);
929 set_req(2, phase->intcon(0));
930 return this;
931 }
932 else if( can_reshape &&
933 ld->Opcode() == Op_LoadUS &&
934 ld->outcnt() == 1 && ld->unique_out() == shl)
935 // Replace zero-extension-load with sign-extension-load
936 return new (phase->C) LoadSNode( ld->in(MemNode::Control),
937 ld->in(MemNode::Memory),
938 ld->in(MemNode::Address),
939 ld->adr_type(), TypeInt::SHORT,
940 MemNode::unordered);
941 }
942
943 // Check for "(byte[i] <<24)>>24" which simply sign-extends
944 if( shift == 24 &&
945 (t3 = phase->type(shl->in(2))->isa_int()) &&
946 t3->is_con(24) ) {
947 Node *ld = shl->in(1);
948 if( ld->Opcode() == Op_LoadB ) {
949 // Sign extension is just useless here
950 set_req(1, ld);
951 set_req(2, phase->intcon(0));
952 return this;
953 }
954 }
955
956 return NULL;
957 }
958
959 //------------------------------Value------------------------------------------
960 // A RShiftINode shifts its input2 right by input1 amount.
961 const Type *RShiftINode::Value( PhaseTransform *phase ) const {
962 const Type *t1 = phase->type( in(1) );
963 const Type *t2 = phase->type( in(2) );
964 // Either input is TOP ==> the result is TOP
965 if( t1 == Type::TOP ) return Type::TOP;
966 if( t2 == Type::TOP ) return Type::TOP;
967
968 // Left input is ZERO ==> the result is ZERO.
969 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
970 // Shift by zero does nothing
971 if( t2 == TypeInt::ZERO ) return t1;
972
973 // Either input is BOTTOM ==> the result is BOTTOM
974 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
975 return TypeInt::INT;
976
977 if (t2 == TypeInt::INT)
978 return TypeInt::INT;
979
980 const TypeInt *r1 = t1->is_int(); // Handy access
981 const TypeInt *r2 = t2->is_int(); // Handy access
982
983 // If the shift is a constant, just shift the bounds of the type.
984 // For example, if the shift is 31, we just propagate sign bits.
985 if (r2->is_con()) {
986 uint shift = r2->get_con();
987 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
988 // Shift by a multiple of 32 does nothing:
989 if (shift == 0) return t1;
990 // Calculate reasonably aggressive bounds for the result.
991 // This is necessary if we are to correctly type things
992 // like (x<<24>>24) == ((byte)x).
993 jint lo = (jint)r1->_lo >> (jint)shift;
994 jint hi = (jint)r1->_hi >> (jint)shift;
995 assert(lo <= hi, "must have valid bounds");
996 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
997 #ifdef ASSERT
998 // Make sure we get the sign-capture idiom correct.
999 if (shift == BitsPerJavaInteger-1) {
1000 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1001 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1002 }
1003 #endif
1004 return ti;
1005 }
1006
1007 if( !r1->is_con() || !r2->is_con() )
1008 return TypeInt::INT;
1009
1010 // Signed shift right
1011 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1012 }
1013
1014 //=============================================================================
1015 //------------------------------Identity---------------------------------------
1016 Node *RShiftLNode::Identity( PhaseTransform *phase ) {
1017 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1018 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1019 }
1020
1021 //------------------------------Value------------------------------------------
1022 // A RShiftLNode shifts its input2 right by input1 amount.
1023 const Type *RShiftLNode::Value( PhaseTransform *phase ) const {
1024 const Type *t1 = phase->type( in(1) );
1025 const Type *t2 = phase->type( in(2) );
1026 // Either input is TOP ==> the result is TOP
1027 if( t1 == Type::TOP ) return Type::TOP;
1028 if( t2 == Type::TOP ) return Type::TOP;
1029
1030 // Left input is ZERO ==> the result is ZERO.
1031 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1032 // Shift by zero does nothing
1033 if( t2 == TypeInt::ZERO ) return t1;
1034
1035 // Either input is BOTTOM ==> the result is BOTTOM
1036 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1037 return TypeLong::LONG;
1038
1039 if (t2 == TypeInt::INT)
1040 return TypeLong::LONG;
1041
1042 const TypeLong *r1 = t1->is_long(); // Handy access
1043 const TypeInt *r2 = t2->is_int (); // Handy access
1044
1045 // If the shift is a constant, just shift the bounds of the type.
1046 // For example, if the shift is 63, we just propagate sign bits.
1047 if (r2->is_con()) {
1048 uint shift = r2->get_con();
1049 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1050 // Shift by a multiple of 64 does nothing:
1051 if (shift == 0) return t1;
1052 // Calculate reasonably aggressive bounds for the result.
1053 // This is necessary if we are to correctly type things
1054 // like (x<<24>>24) == ((byte)x).
1055 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1056 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1057 assert(lo <= hi, "must have valid bounds");
1058 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1059 #ifdef ASSERT
1060 // Make sure we get the sign-capture idiom correct.
1061 if (shift == (2*BitsPerJavaInteger)-1) {
1062 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1063 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1064 }
1065 #endif
1066 return tl;
1067 }
1068
1069 return TypeLong::LONG; // Give up
1070 }
1071
1072 //=============================================================================
1073 //------------------------------Identity---------------------------------------
1074 Node *URShiftINode::Identity( PhaseTransform *phase ) {
1075 const TypeInt *ti = phase->type( in(2) )->isa_int();
1076 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1077
1078 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1079 // Happens during new-array length computation.
1080 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1081 Node *add = in(1);
1082 if( add->Opcode() == Op_AddI ) {
1083 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1084 if( t2 && t2->is_con(wordSize - 1) &&
1085 add->in(1)->Opcode() == Op_LShiftI ) {
1086 // Check that shift_counts are LogBytesPerWord
1087 Node *lshift_count = add->in(1)->in(2);
1088 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1089 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1090 t_lshift_count == phase->type(in(2)) ) {
1091 Node *x = add->in(1)->in(1);
1092 const TypeInt *t_x = phase->type(x)->isa_int();
1093 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1094 return x;
1095 }
1096 }
1097 }
1098 }
1099
1100 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1101 }
1102
1103 //------------------------------Ideal------------------------------------------
1104 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1105 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1106 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1107 const int con = t2->get_con() & 31; // Shift count is always masked
1108 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1109 // We'll be wanting the right-shift amount as a mask of that many bits
1110 const int mask = right_n_bits(BitsPerJavaInteger - con);
1111
1112 int in1_op = in(1)->Opcode();
1113
1114 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1115 if( in1_op == Op_URShiftI ) {
1116 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1117 if( t12 && t12->is_con() ) { // Right input is a constant
1118 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1119 const int con2 = t12->get_con() & 31; // Shift count is always masked
1120 const int con3 = con+con2;
1121 if( con3 < 32 ) // Only merge shifts if total is < 32
1122 return new (phase->C) URShiftINode( in(1)->in(1), phase->intcon(con3) );
1123 }
1124 }
1125
1126 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1127 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1128 // If Q is "X << z" the rounding is useless. Look for patterns like
1129 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1130 Node *add = in(1);
1131 if( in1_op == Op_AddI ) {
1132 Node *lshl = add->in(1);
1133 if( lshl->Opcode() == Op_LShiftI &&
1134 phase->type(lshl->in(2)) == t2 ) {
1135 Node *y_z = phase->transform( new (phase->C) URShiftINode(add->in(2),in(2)) );
1136 Node *sum = phase->transform( new (phase->C) AddINode( lshl->in(1), y_z ) );
1137 return new (phase->C) AndINode( sum, phase->intcon(mask) );
1138 }
1139 }
1140
1141 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1142 // This shortens the mask. Also, if we are extracting a high byte and
1143 // storing it to a buffer, the mask will be removed completely.
1144 Node *andi = in(1);
1145 if( in1_op == Op_AndI ) {
1146 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1147 if( t3 && t3->is_con() ) { // Right input is a constant
1148 jint mask2 = t3->get_con();
1149 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1150 Node *newshr = phase->transform( new (phase->C) URShiftINode(andi->in(1), in(2)) );
1151 return new (phase->C) AndINode(newshr, phase->intcon(mask2));
1152 // The negative values are easier to materialize than positive ones.
1153 // A typical case from address arithmetic is ((x & ~15) >> 4).
1154 // It's better to change that to ((x >> 4) & ~0) versus
1155 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1156 }
1157 }
1158
1159 // Check for "(X << z ) >>> z" which simply zero-extends
1160 Node *shl = in(1);
1161 if( in1_op == Op_LShiftI &&
1162 phase->type(shl->in(2)) == t2 )
1163 return new (phase->C) AndINode( shl->in(1), phase->intcon(mask) );
1164
1165 return NULL;
1166 }
1167
1168 //------------------------------Value------------------------------------------
1169 // A URShiftINode shifts its input2 right by input1 amount.
1170 const Type *URShiftINode::Value( PhaseTransform *phase ) const {
1171 // (This is a near clone of RShiftINode::Value.)
1172 const Type *t1 = phase->type( in(1) );
1173 const Type *t2 = phase->type( in(2) );
1174 // Either input is TOP ==> the result is TOP
1175 if( t1 == Type::TOP ) return Type::TOP;
1176 if( t2 == Type::TOP ) return Type::TOP;
1177
1178 // Left input is ZERO ==> the result is ZERO.
1179 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1180 // Shift by zero does nothing
1181 if( t2 == TypeInt::ZERO ) return t1;
1182
1183 // Either input is BOTTOM ==> the result is BOTTOM
1184 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1185 return TypeInt::INT;
1186
1187 if (t2 == TypeInt::INT)
1188 return TypeInt::INT;
1189
1190 const TypeInt *r1 = t1->is_int(); // Handy access
1191 const TypeInt *r2 = t2->is_int(); // Handy access
1192
1193 if (r2->is_con()) {
1194 uint shift = r2->get_con();
1195 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1196 // Shift by a multiple of 32 does nothing:
1197 if (shift == 0) return t1;
1198 // Calculate reasonably aggressive bounds for the result.
1199 jint lo = (juint)r1->_lo >> (juint)shift;
1200 jint hi = (juint)r1->_hi >> (juint)shift;
1201 if (r1->_hi >= 0 && r1->_lo < 0) {
1202 // If the type has both negative and positive values,
1203 // there are two separate sub-domains to worry about:
1204 // The positive half and the negative half.
1205 jint neg_lo = lo;
1206 jint neg_hi = (juint)-1 >> (juint)shift;
1207 jint pos_lo = (juint) 0 >> (juint)shift;
1208 jint pos_hi = hi;
1209 lo = MIN2(neg_lo, pos_lo); // == 0
1210 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1211 }
1212 assert(lo <= hi, "must have valid bounds");
1213 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1214 #ifdef ASSERT
1215 // Make sure we get the sign-capture idiom correct.
1216 if (shift == BitsPerJavaInteger-1) {
1217 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1218 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1219 }
1220 #endif
1221 return ti;
1222 }
1223
1224 //
1225 // Do not support shifted oops in info for GC
1226 //
1227 // else if( t1->base() == Type::InstPtr ) {
1228 //
1229 // const TypeInstPtr *o = t1->is_instptr();
1230 // if( t1->singleton() )
1231 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1232 // }
1233 // else if( t1->base() == Type::KlassPtr ) {
1234 // const TypeKlassPtr *o = t1->is_klassptr();
1235 // if( t1->singleton() )
1236 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift );
1237 // }
1238
1239 return TypeInt::INT;
1240 }
1241
1242 //=============================================================================
1243 //------------------------------Identity---------------------------------------
1244 Node *URShiftLNode::Identity( PhaseTransform *phase ) {
1245 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1246 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1247 }
1248
1249 //------------------------------Ideal------------------------------------------
1250 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1251 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1252 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1253 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1254 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1255 // note: mask computation below does not work for 0 shift count
1256 // We'll be wanting the right-shift amount as a mask of that many bits
1257 const jlong mask = jlong(max_julong >> con);
1258
1259 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1260 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1261 // If Q is "X << z" the rounding is useless. Look for patterns like
1262 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1263 Node *add = in(1);
1264 if( add->Opcode() == Op_AddL ) {
1265 Node *lshl = add->in(1);
1266 if( lshl->Opcode() == Op_LShiftL &&
1267 phase->type(lshl->in(2)) == t2 ) {
1268 Node *y_z = phase->transform( new (phase->C) URShiftLNode(add->in(2),in(2)) );
1269 Node *sum = phase->transform( new (phase->C) AddLNode( lshl->in(1), y_z ) );
1270 return new (phase->C) AndLNode( sum, phase->longcon(mask) );
1271 }
1272 }
1273
1274 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1275 // This shortens the mask. Also, if we are extracting a high byte and
1276 // storing it to a buffer, the mask will be removed completely.
1277 Node *andi = in(1);
1278 if( andi->Opcode() == Op_AndL ) {
1279 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1280 if( t3 && t3->is_con() ) { // Right input is a constant
1281 jlong mask2 = t3->get_con();
1282 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1283 Node *newshr = phase->transform( new (phase->C) URShiftLNode(andi->in(1), in(2)) );
1284 return new (phase->C) AndLNode(newshr, phase->longcon(mask2));
1285 }
1286 }
1287
1288 // Check for "(X << z ) >>> z" which simply zero-extends
1289 Node *shl = in(1);
1290 if( shl->Opcode() == Op_LShiftL &&
1291 phase->type(shl->in(2)) == t2 )
1292 return new (phase->C) AndLNode( shl->in(1), phase->longcon(mask) );
1293
1294 return NULL;
1295 }
1296
1297 //------------------------------Value------------------------------------------
1298 // A URShiftINode shifts its input2 right by input1 amount.
1299 const Type *URShiftLNode::Value( PhaseTransform *phase ) const {
1300 // (This is a near clone of RShiftLNode::Value.)
1301 const Type *t1 = phase->type( in(1) );
1302 const Type *t2 = phase->type( in(2) );
1303 // Either input is TOP ==> the result is TOP
1304 if( t1 == Type::TOP ) return Type::TOP;
1305 if( t2 == Type::TOP ) return Type::TOP;
1306
1307 // Left input is ZERO ==> the result is ZERO.
1308 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1309 // Shift by zero does nothing
1310 if( t2 == TypeInt::ZERO ) return t1;
1311
1312 // Either input is BOTTOM ==> the result is BOTTOM
1313 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1314 return TypeLong::LONG;
1315
1316 if (t2 == TypeInt::INT)
1317 return TypeLong::LONG;
1318
1319 const TypeLong *r1 = t1->is_long(); // Handy access
1320 const TypeInt *r2 = t2->is_int (); // Handy access
1321
1322 if (r2->is_con()) {
1323 uint shift = r2->get_con();
1324 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1325 // Shift by a multiple of 64 does nothing:
1326 if (shift == 0) return t1;
1327 // Calculate reasonably aggressive bounds for the result.
1328 jlong lo = (julong)r1->_lo >> (juint)shift;
1329 jlong hi = (julong)r1->_hi >> (juint)shift;
1330 if (r1->_hi >= 0 && r1->_lo < 0) {
1331 // If the type has both negative and positive values,
1332 // there are two separate sub-domains to worry about:
1333 // The positive half and the negative half.
1334 jlong neg_lo = lo;
1335 jlong neg_hi = (julong)-1 >> (juint)shift;
1336 jlong pos_lo = (julong) 0 >> (juint)shift;
1337 jlong pos_hi = hi;
1338 //lo = MIN2(neg_lo, pos_lo); // == 0
1339 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1340 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1341 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1342 }
1343 assert(lo <= hi, "must have valid bounds");
1344 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1345 #ifdef ASSERT
1346 // Make sure we get the sign-capture idiom correct.
1347 if (shift == BitsPerJavaLong - 1) {
1348 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1349 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1350 }
1351 #endif
1352 return tl;
1353 }
1354
1355 return TypeLong::LONG; // Give up
1356 }