1 /*
2 * Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
3 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
27 #include "gc/shenandoah/mode/shenandoahMode.hpp"
28 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
29 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
30 #include "gc/shenandoah/shenandoahForwarding.hpp"
31 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
32 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
33 #include "gc/shenandoah/shenandoahRuntime.hpp"
34 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
35 #include "interpreter/interp_masm.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "runtime/javaThread.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #ifdef COMPILER1
40 #include "c1/c1_LIRAssembler.hpp"
41 #include "c1/c1_MacroAssembler.hpp"
42 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
43 #endif
44
45 #define __ masm->
46
47 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
48 Register src, Register dst, Register count, RegSet saved_regs) {
49 if (is_oop) {
50 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
51 if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {
52
53 Label done;
54
55 // Avoid calling runtime if count == 0
56 __ cbz(count, done);
57
58 // Is GC active?
59 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
60 __ ldrb(rscratch1, gc_state);
61 if (ShenandoahSATBBarrier && dest_uninitialized) {
62 __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done);
63 } else {
64 __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING);
65 __ tst(rscratch1, rscratch2);
66 __ br(Assembler::EQ, done);
67 }
68
69 __ push(saved_regs, sp);
70 if (UseCompressedOops) {
71 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop), src, dst, count);
72 } else {
73 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop), src, dst, count);
74 }
75 __ pop(saved_regs, sp);
76 __ bind(done);
77 }
78 }
79 }
80
81 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
82 Register start, Register count, Register tmp) {
83 if (ShenandoahCardBarrier && is_oop) {
84 gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp);
85 }
86 }
87
88 void ShenandoahBarrierSetAssembler::satb_barrier(MacroAssembler* masm,
89 Register obj,
90 Register pre_val,
91 Register thread,
92 Register tmp1,
93 Register tmp2,
94 bool tosca_live,
95 bool expand_call) {
96 assert(ShenandoahSATBBarrier, "Should be checked by caller");
97
98 // If expand_call is true then we expand the call_VM_leaf macro
99 // directly to skip generating the check by
100 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
101
102 assert(thread == rthread, "must be");
103
104 Label done;
105 Label runtime;
106
107 assert_different_registers(obj, pre_val, tmp1, tmp2);
108 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
109
110 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
111 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
112
113 // Is marking active?
114 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
115 __ ldrb(tmp1, gc_state);
116 __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
117
118 // Do we need to load the previous value?
119 if (obj != noreg) {
120 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
121 }
122
123 // Is the previous value null?
124 __ cbz(pre_val, done);
125
126 // Can we store original value in the thread's buffer?
127 // Is index == 0?
128 // (The index field is typed as size_t.)
129
130 __ ldr(tmp1, index); // tmp := *index_adr
131 __ cbz(tmp1, runtime); // tmp == 0?
132 // If yes, goto runtime
133
134 __ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
135 __ str(tmp1, index); // *index_adr := tmp
136 __ ldr(tmp2, buffer);
137 __ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
138
139 // Record the previous value
140 __ str(pre_val, Address(tmp1, 0));
141 __ b(done);
142
143 __ bind(runtime);
144 // save the live input values
145 RegSet saved = RegSet::of(pre_val);
146 if (tosca_live) saved += RegSet::of(r0);
147 if (obj != noreg) saved += RegSet::of(obj);
148
149 __ push(saved, sp);
150
151 // Calling the runtime using the regular call_VM_leaf mechanism generates
152 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
153 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
154 //
155 // If we care generating the pre-barrier without a frame (e.g. in the
156 // intrinsified Reference.get() routine) then rfp might be pointing to
157 // the caller frame and so this check will most likely fail at runtime.
158 //
159 // Expanding the call directly bypasses the generation of the check.
160 // So when we do not have have a full interpreter frame on the stack
161 // expand_call should be passed true.
162
163 if (expand_call) {
164 assert(pre_val != c_rarg1, "smashed arg");
165 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
166 } else {
167 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
168 }
169
170 __ pop(saved, sp);
171
172 __ bind(done);
173 }
174
175 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) {
176 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
177 Label is_null;
178 __ cbz(dst, is_null);
179 resolve_forward_pointer_not_null(masm, dst, tmp);
180 __ bind(is_null);
181 }
182
183 // IMPORTANT: This must preserve all registers, even rscratch1 and rscratch2, except those explicitly
184 // passed in.
185 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) {
186 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
187 // The below loads the mark word, checks if the lowest two bits are
188 // set, and if so, clear the lowest two bits and copy the result
189 // to dst. Otherwise it leaves dst alone.
190 // Implementing this is surprisingly awkward. I do it here by:
191 // - Inverting the mark word
192 // - Test lowest two bits == 0
193 // - If so, set the lowest two bits
194 // - Invert the result back, and copy to dst
195
196 bool borrow_reg = (tmp == noreg);
197 if (borrow_reg) {
198 // No free registers available. Make one useful.
199 tmp = rscratch1;
200 if (tmp == dst) {
201 tmp = rscratch2;
202 }
203 __ push(RegSet::of(tmp), sp);
204 }
205
206 assert_different_registers(tmp, dst);
207
208 Label done;
209 __ ldr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
210 __ eon(tmp, tmp, zr);
211 __ ands(zr, tmp, markWord::lock_mask_in_place);
212 __ br(Assembler::NE, done);
213 __ orr(tmp, tmp, markWord::marked_value);
214 __ eon(dst, tmp, zr);
215 __ bind(done);
216
217 if (borrow_reg) {
218 __ pop(RegSet::of(tmp), sp);
219 }
220 }
221
222 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) {
223 assert(ShenandoahLoadRefBarrier, "Should be enabled");
224 assert(dst != rscratch2, "need rscratch2");
225 assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2);
226
227 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
228 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
229 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
230 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
231 bool is_narrow = UseCompressedOops && !is_native;
232
233 Label heap_stable, not_cset;
234 __ enter(/*strip_ret_addr*/true);
235 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
236 __ ldrb(rscratch2, gc_state);
237
238 // Check for heap stability
239 if (is_strong) {
240 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
241 } else {
242 Label lrb;
243 __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb);
244 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
245 __ bind(lrb);
246 }
247
248 // use r1 for load address
249 Register result_dst = dst;
250 if (dst == r1) {
251 __ mov(rscratch1, dst);
252 dst = rscratch1;
253 }
254
255 // Save r0 and r1, unless it is an output register
256 RegSet to_save = RegSet::of(r0, r1) - result_dst;
257 __ push(to_save, sp);
258 __ lea(r1, load_addr);
259 __ mov(r0, dst);
260
261 // Test for in-cset
262 if (is_strong) {
263 __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr());
264 __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint());
265 __ ldrb(rscratch2, Address(rscratch2, rscratch1));
266 __ tbz(rscratch2, 0, not_cset);
267 }
268
269 __ push_call_clobbered_registers();
270 if (is_strong) {
271 if (is_narrow) {
272 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
273 } else {
274 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
275 }
276 } else if (is_weak) {
277 if (is_narrow) {
278 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
279 } else {
280 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
281 }
282 } else {
283 assert(is_phantom, "only remaining strength");
284 assert(!is_narrow, "phantom access cannot be narrow");
285 // AOT saved adapters need relocation for this call.
286 __ lea(lr, RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom)));
287 }
288 __ blr(lr);
289 __ mov(rscratch1, r0);
290 __ pop_call_clobbered_registers();
291 __ mov(r0, rscratch1);
292
293 __ bind(not_cset);
294
295 __ mov(result_dst, r0);
296 __ pop(to_save, sp);
297
298 __ bind(heap_stable);
299 __ leave();
300 }
301
302 //
303 // Arguments:
304 //
305 // Inputs:
306 // src: oop location to load from, might be clobbered
307 //
308 // Output:
309 // dst: oop loaded from src location
310 //
311 // Kill:
312 // rscratch1 (scratch reg)
313 //
314 // Alias:
315 // dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
316 //
317 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
318 Register dst, Address src, Register tmp1, Register tmp2) {
319 // 1: non-reference load, no additional barrier is needed
320 if (!is_reference_type(type)) {
321 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
322 return;
323 }
324
325 // 2: load a reference from src location and apply LRB if needed
326 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
327 Register result_dst = dst;
328
329 // Preserve src location for LRB
330 if (dst == src.base() || dst == src.index()) {
331 dst = rscratch1;
332 }
333 assert_different_registers(dst, src.base(), src.index());
334
335 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
336
337 load_reference_barrier(masm, dst, src, decorators);
338
339 if (dst != result_dst) {
340 __ mov(result_dst, dst);
341 dst = result_dst;
342 }
343 } else {
344 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
345 }
346
347 // 3: apply keep-alive barrier if needed
348 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
349 __ enter(/*strip_ret_addr*/true);
350 __ push_call_clobbered_registers();
351 satb_barrier(masm /* masm */,
352 noreg /* obj */,
353 dst /* pre_val */,
354 rthread /* thread */,
355 tmp1 /* tmp1 */,
356 tmp2 /* tmp2 */,
357 true /* tosca_live */,
358 true /* expand_call */);
359 __ pop_call_clobbered_registers();
360 __ leave();
361 }
362 }
363
364 void ShenandoahBarrierSetAssembler::card_barrier(MacroAssembler* masm, Register obj) {
365 assert(ShenandoahCardBarrier, "Should have been checked by caller");
366
367 __ lsr(obj, obj, CardTable::card_shift());
368
369 assert(CardTable::dirty_card_val() == 0, "must be");
370
371 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
372 __ ldr(rscratch1, curr_ct_holder_addr);
373
374 if (UseCondCardMark) {
375 Label L_already_dirty;
376 __ ldrb(rscratch2, Address(obj, rscratch1));
377 __ cbz(rscratch2, L_already_dirty);
378 __ strb(zr, Address(obj, rscratch1));
379 __ bind(L_already_dirty);
380 } else {
381 __ strb(zr, Address(obj, rscratch1));
382 }
383 }
384
385 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
386 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
387 // 1: non-reference types require no barriers
388 if (!is_reference_type(type)) {
389 BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
390 return;
391 }
392
393 // Flatten object address right away for simplicity: likely needed by barriers
394 if (dst.index() == noreg && dst.offset() == 0) {
395 if (dst.base() != tmp3) {
396 __ mov(tmp3, dst.base());
397 }
398 } else {
399 __ lea(tmp3, dst);
400 }
401
402 bool storing_non_null = (val != noreg);
403
404 // 2: pre-barrier: SATB needs the previous value
405 if (ShenandoahBarrierSet::need_satb_barrier(decorators, type)) {
406 satb_barrier(masm,
407 tmp3 /* obj */,
408 tmp2 /* pre_val */,
409 rthread /* thread */,
410 tmp1 /* tmp */,
411 rscratch1 /* tmp2 */,
412 storing_non_null /* tosca_live */,
413 false /* expand_call */);
414 }
415
416 // Store!
417 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
418
419 // 3: post-barrier: card barrier needs store address
420 if (ShenandoahBarrierSet::need_card_barrier(decorators, type) && storing_non_null) {
421 card_barrier(masm, tmp3);
422 }
423 }
424
425 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
426 Register obj, Register tmp, Label& slowpath) {
427 Label done;
428 // Resolve jobject
429 BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
430
431 // Check for null.
432 __ cbz(obj, done);
433
434 assert(obj != rscratch2, "need rscratch2");
435 Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
436 __ lea(rscratch2, gc_state);
437 __ ldrb(rscratch2, Address(rscratch2));
438
439 // Check for heap in evacuation phase
440 __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
441
442 __ bind(done);
443 }
444
445 // Special Shenandoah CAS implementation that handles false negatives due
446 // to concurrent evacuation. The service is more complex than a
447 // traditional CAS operation because the CAS operation is intended to
448 // succeed if the reference at addr exactly matches expected or if the
449 // reference at addr holds a pointer to a from-space object that has
450 // been relocated to the location named by expected. There are two
451 // races that must be addressed:
452 // a) A parallel thread may mutate the contents of addr so that it points
453 // to a different object. In this case, the CAS operation should fail.
454 // b) A parallel thread may heal the contents of addr, replacing a
455 // from-space pointer held in addr with the to-space pointer
456 // representing the new location of the object.
457 // Upon entry to cmpxchg_oop, it is assured that new_val equals null
458 // or it refers to an object that is not being evacuated out of
459 // from-space, or it refers to the to-space version of an object that
460 // is being evacuated out of from-space.
461 //
462 // By default the value held in the result register following execution
463 // of the generated code sequence is 0 to indicate failure of CAS,
464 // non-zero to indicate success. If is_cae, the result is the value most
465 // recently fetched from addr rather than a boolean success indicator.
466 //
467 // Clobbers rscratch1, rscratch2
468 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
469 Register addr,
470 Register expected,
471 Register new_val,
472 bool acquire, bool release,
473 bool is_cae,
474 Register result) {
475 Register tmp1 = rscratch1;
476 Register tmp2 = rscratch2;
477 bool is_narrow = UseCompressedOops;
478 Assembler::operand_size size = is_narrow ? Assembler::word : Assembler::xword;
479
480 assert_different_registers(addr, expected, tmp1, tmp2);
481 assert_different_registers(addr, new_val, tmp1, tmp2);
482
483 Label step4, done;
484
485 // There are two ways to reach this label. Initial entry into the
486 // cmpxchg_oop code expansion starts at step1 (which is equivalent
487 // to label step4). Additionally, in the rare case that four steps
488 // are required to perform the requested operation, the fourth step
489 // is the same as the first. On a second pass through step 1,
490 // control may flow through step 2 on its way to failure. It will
491 // not flow from step 2 to step 3 since we are assured that the
492 // memory at addr no longer holds a from-space pointer.
493 //
494 // The comments that immediately follow the step4 label apply only
495 // to the case in which control reaches this label by branch from
496 // step 3.
497
498 __ bind (step4);
499
500 // Step 4. CAS has failed because the value most recently fetched
501 // from addr is no longer the from-space pointer held in tmp2. If a
502 // different thread replaced the in-memory value with its equivalent
503 // to-space pointer, then CAS may still be able to succeed. The
504 // value held in the expected register has not changed.
505 //
506 // It is extremely rare we reach this point. For this reason, the
507 // implementation opts for smaller rather than potentially faster
508 // code. Ultimately, smaller code for this rare case most likely
509 // delivers higher overall throughput by enabling improved icache
510 // performance.
511
512 // Step 1. Fast-path.
513 //
514 // Try to CAS with given arguments. If successful, then we are done.
515 //
516 // No label required for step 1.
517
518 __ cmpxchg(addr, expected, new_val, size, acquire, release, false, tmp2);
519 // EQ flag set iff success. tmp2 holds value fetched.
520
521 // If expected equals null but tmp2 does not equal null, the
522 // following branches to done to report failure of CAS. If both
523 // expected and tmp2 equal null, the following branches to done to
524 // report success of CAS. There's no need for a special test of
525 // expected equal to null.
526
527 __ br(Assembler::EQ, done);
528 // if CAS failed, fall through to step 2
529
530 // Step 2. CAS has failed because the value held at addr does not
531 // match expected. This may be a false negative because the value fetched
532 // from addr (now held in tmp2) may be a from-space pointer to the
533 // original copy of same object referenced by to-space pointer expected.
534 //
535 // To resolve this, it suffices to find the forward pointer associated
536 // with fetched value. If this matches expected, retry CAS with new
537 // parameters. If this mismatches, then we have a legitimate
538 // failure, and we're done.
539 //
540 // No need for step2 label.
541
542 // overwrite tmp1 with from-space pointer fetched from memory
543 __ mov(tmp1, tmp2);
544
545 if (is_narrow) {
546 // Decode tmp1 in order to resolve its forward pointer
547 __ decode_heap_oop(tmp1, tmp1);
548 }
549 resolve_forward_pointer(masm, tmp1);
550 // Encode tmp1 to compare against expected.
551 __ encode_heap_oop(tmp1, tmp1);
552
553 // Does forwarded value of fetched from-space pointer match original
554 // value of expected? If tmp1 holds null, this comparison will fail
555 // because we know from step1 that expected is not null. There is
556 // no need for a separate test for tmp1 (the value originally held
557 // in memory) equal to null.
558 __ cmp(tmp1, expected);
559
560 // If not, then the failure was legitimate and we're done.
561 // Branching to done with NE condition denotes failure.
562 __ br(Assembler::NE, done);
563
564 // Fall through to step 3. No need for step3 label.
565
566 // Step 3. We've confirmed that the value originally held in memory
567 // (now held in tmp2) pointed to from-space version of original
568 // expected value. Try the CAS again with the from-space expected
569 // value. If it now succeeds, we're good.
570 //
571 // Note: tmp2 holds encoded from-space pointer that matches to-space
572 // object residing at expected. tmp2 is the new "expected".
573
574 // Note that macro implementation of __cmpxchg cannot use same register
575 // tmp2 for result and expected since it overwrites result before it
576 // compares result with expected.
577 __ cmpxchg(addr, tmp2, new_val, size, acquire, release, false, noreg);
578 // EQ flag set iff success. tmp2 holds value fetched, tmp1 (rscratch1) clobbered.
579
580 // If fetched value did not equal the new expected, this could
581 // still be a false negative because some other thread may have
582 // newly overwritten the memory value with its to-space equivalent.
583 __ br(Assembler::NE, step4);
584
585 if (is_cae) {
586 // We're falling through to done to indicate success. Success
587 // with is_cae is denoted by returning the value of expected as
588 // result.
589 __ mov(tmp2, expected);
590 }
591
592 __ bind(done);
593 // At entry to done, the Z (EQ) flag is on iff if the CAS
594 // operation was successful. Additionally, if is_cae, tmp2 holds
595 // the value most recently fetched from addr. In this case, success
596 // is denoted by tmp2 matching expected.
597
598 if (is_cae) {
599 __ mov(result, tmp2);
600 } else {
601 __ cset(result, Assembler::EQ);
602 }
603 }
604
605 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
606 Register start, Register count, Register scratch) {
607 assert(ShenandoahCardBarrier, "Should have been checked by caller");
608
609 Label L_loop, L_done;
610 const Register end = count;
611
612 // Zero count? Nothing to do.
613 __ cbz(count, L_done);
614
615 // end = start + count << LogBytesPerHeapOop
616 // last element address to make inclusive
617 __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
618 __ sub(end, end, BytesPerHeapOop);
619 __ lsr(start, start, CardTable::card_shift());
620 __ lsr(end, end, CardTable::card_shift());
621
622 // number of bytes to copy
623 __ sub(count, end, start);
624
625 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
626 __ ldr(scratch, curr_ct_holder_addr);
627 __ add(start, start, scratch);
628 __ bind(L_loop);
629 __ strb(zr, Address(start, count));
630 __ subs(count, count, 1);
631 __ br(Assembler::GE, L_loop);
632 __ bind(L_done);
633 }
634
635 #undef __
636
637 #ifdef COMPILER1
638
639 #define __ ce->masm()->
640
641 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
642 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
643 // At this point we know that marking is in progress.
644 // If do_load() is true then we have to emit the
645 // load of the previous value; otherwise it has already
646 // been loaded into _pre_val.
647
648 __ bind(*stub->entry());
649
650 assert(stub->pre_val()->is_register(), "Precondition.");
651
652 Register pre_val_reg = stub->pre_val()->as_register();
653
654 if (stub->do_load()) {
655 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
656 }
657 __ cbz(pre_val_reg, *stub->continuation());
658 ce->store_parameter(stub->pre_val()->as_register(), 0);
659 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
660 __ b(*stub->continuation());
661 }
662
663 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
664 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
665 __ bind(*stub->entry());
666
667 DecoratorSet decorators = stub->decorators();
668 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
669 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
670 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
671 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
672
673 Register obj = stub->obj()->as_register();
674 Register res = stub->result()->as_register();
675 Register addr = stub->addr()->as_pointer_register();
676 Register tmp1 = stub->tmp1()->as_register();
677 Register tmp2 = stub->tmp2()->as_register();
678
679 assert(res == r0, "result must arrive in r0");
680
681 if (res != obj) {
682 __ mov(res, obj);
683 }
684
685 if (is_strong) {
686 // Check for object in cset.
687 __ mov(tmp2, ShenandoahHeap::in_cset_fast_test_addr());
688 __ lsr(tmp1, res, ShenandoahHeapRegion::region_size_bytes_shift_jint());
689 __ ldrb(tmp2, Address(tmp2, tmp1));
690 __ cbz(tmp2, *stub->continuation());
691 }
692
693 ce->store_parameter(res, 0);
694 ce->store_parameter(addr, 1);
695 if (is_strong) {
696 if (is_native) {
697 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_native_rt_code_blob()->code_begin()));
698 } else {
699 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_rt_code_blob()->code_begin()));
700 }
701 } else if (is_weak) {
702 __ far_call(RuntimeAddress(bs->load_reference_barrier_weak_rt_code_blob()->code_begin()));
703 } else {
704 assert(is_phantom, "only remaining strength");
705 __ far_call(RuntimeAddress(bs->load_reference_barrier_phantom_rt_code_blob()->code_begin()));
706 }
707
708 __ b(*stub->continuation());
709 }
710
711 #undef __
712
713 #define __ sasm->
714
715 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
716 __ prologue("shenandoah_pre_barrier", false);
717
718 // arg0 : previous value of memory
719
720 BarrierSet* bs = BarrierSet::barrier_set();
721
722 const Register pre_val = r0;
723 const Register thread = rthread;
724 const Register tmp = rscratch1;
725
726 Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
727 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
728
729 Label done;
730 Label runtime;
731
732 // Is marking still active?
733 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
734 __ ldrb(tmp, gc_state);
735 __ tbz(tmp, ShenandoahHeap::MARKING_BITPOS, done);
736
737 // Can we store original value in the thread's buffer?
738 __ ldr(tmp, queue_index);
739 __ cbz(tmp, runtime);
740
741 __ sub(tmp, tmp, wordSize);
742 __ str(tmp, queue_index);
743 __ ldr(rscratch2, buffer);
744 __ add(tmp, tmp, rscratch2);
745 __ load_parameter(0, rscratch2);
746 __ str(rscratch2, Address(tmp, 0));
747 __ b(done);
748
749 __ bind(runtime);
750 __ push_call_clobbered_registers();
751 __ load_parameter(0, pre_val);
752 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
753 __ pop_call_clobbered_registers();
754 __ bind(done);
755
756 __ epilogue();
757 }
758
759 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
760 __ prologue("shenandoah_load_reference_barrier", false);
761 // arg0 : object to be resolved
762
763 __ push_call_clobbered_registers();
764 __ load_parameter(0, r0);
765 __ load_parameter(1, r1);
766
767 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
768 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
769 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
770 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
771 if (is_strong) {
772 if (is_native) {
773 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
774 } else {
775 if (UseCompressedOops) {
776 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
777 } else {
778 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
779 }
780 }
781 } else if (is_weak) {
782 assert(!is_native, "weak must not be called off-heap");
783 if (UseCompressedOops) {
784 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
785 } else {
786 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
787 }
788 } else {
789 assert(is_phantom, "only remaining strength");
790 assert(is_native, "phantom must only be called off-heap");
791 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom));
792 }
793 __ blr(lr);
794 __ mov(rscratch1, r0);
795 __ pop_call_clobbered_registers();
796 __ mov(r0, rscratch1);
797
798 __ epilogue();
799 }
800
801 #undef __
802
803 #endif // COMPILER1