1 /*
2 * Copyright (c) 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
4 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
28 #include "gc/shenandoah/mode/shenandoahMode.hpp"
29 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
31 #include "gc/shenandoah/shenandoahForwarding.hpp"
32 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
33 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
34 #include "gc/shenandoah/shenandoahRuntime.hpp"
35 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
36 #include "interpreter/interp_masm.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "runtime/javaThread.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #ifdef COMPILER1
41 #include "c1/c1_LIRAssembler.hpp"
42 #include "c1/c1_MacroAssembler.hpp"
43 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
44 #endif
45
46 #define __ masm->
47
48 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
49 Register src, Register dst, Register count, RegSet saved_regs) {
50 if (is_oop) {
51 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
52 if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) {
53
54 Label done;
55
56 // Avoid calling runtime if count == 0
57 __ cbz(count, done);
58
59 // Is GC active?
60 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
61 __ ldrb(rscratch1, gc_state);
62 if (ShenandoahSATBBarrier && dest_uninitialized) {
63 __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done);
64 } else {
65 __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING);
66 __ tst(rscratch1, rscratch2);
67 __ br(Assembler::EQ, done);
68 }
69
70 __ push(saved_regs, sp);
71 if (UseCompressedOops) {
72 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop), src, dst, count);
73 } else {
74 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop), src, dst, count);
75 }
76 __ pop(saved_regs, sp);
77 __ bind(done);
78 }
79 }
80 }
81
82 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
83 Register start, Register count, Register tmp) {
84 if (ShenandoahCardBarrier && is_oop) {
85 gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp);
86 }
87 }
88
89 void ShenandoahBarrierSetAssembler::satb_barrier(MacroAssembler* masm,
90 Register obj,
91 Register pre_val,
92 Register thread,
93 Register tmp1,
94 Register tmp2,
95 bool tosca_live,
96 bool expand_call) {
97 assert(ShenandoahSATBBarrier, "Should be checked by caller");
98
99 // If expand_call is true then we expand the call_VM_leaf macro
100 // directly to skip generating the check by
101 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
102
103 assert(thread == rthread, "must be");
104
105 Label done;
106 Label runtime;
107
108 assert_different_registers(obj, pre_val, tmp1, tmp2);
109 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
110
111 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
112 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
113
114 // Is marking active?
115 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
116 __ ldrb(tmp1, gc_state);
117 __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
118
119 // Do we need to load the previous value?
120 if (obj != noreg) {
121 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
122 }
123
124 // Is the previous value null?
125 __ cbz(pre_val, done);
126
127 // Can we store original value in the thread's buffer?
128 // Is index == 0?
129 // (The index field is typed as size_t.)
130
131 __ ldr(tmp1, index); // tmp := *index_adr
132 __ cbz(tmp1, runtime); // tmp == 0?
133 // If yes, goto runtime
134
135 __ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
136 __ str(tmp1, index); // *index_adr := tmp
137 __ ldr(tmp2, buffer);
138 __ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
139
140 // Record the previous value
141 __ str(pre_val, Address(tmp1, 0));
142 __ b(done);
143
144 __ bind(runtime);
145 // save the live input values
146 RegSet saved = RegSet::of(pre_val);
147 if (tosca_live) saved += RegSet::of(r0);
148 if (obj != noreg) saved += RegSet::of(obj);
149
150 __ push(saved, sp);
151
152 // Calling the runtime using the regular call_VM_leaf mechanism generates
153 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
154 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
155 //
156 // If we care generating the pre-barrier without a frame (e.g. in the
157 // intrinsified Reference.get() routine) then rfp might be pointing to
158 // the caller frame and so this check will most likely fail at runtime.
159 //
160 // Expanding the call directly bypasses the generation of the check.
161 // So when we do not have have a full interpreter frame on the stack
162 // expand_call should be passed true.
163
164 if (expand_call) {
165 assert(pre_val != c_rarg1, "smashed arg");
166 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
167 } else {
168 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
169 }
170
171 __ pop(saved, sp);
172
173 __ bind(done);
174 }
175
176 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) {
177 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
178 Label is_null;
179 __ cbz(dst, is_null);
180 resolve_forward_pointer_not_null(masm, dst, tmp);
181 __ bind(is_null);
182 }
183
184 // IMPORTANT: This must preserve all registers, even rscratch1 and rscratch2, except those explicitly
185 // passed in.
186 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) {
187 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
188 // The below loads the mark word, checks if the lowest two bits are
189 // set, and if so, clear the lowest two bits and copy the result
190 // to dst. Otherwise it leaves dst alone.
191 // Implementing this is surprisingly awkward. I do it here by:
192 // - Inverting the mark word
193 // - Test lowest two bits == 0
194 // - If so, set the lowest two bits
195 // - Invert the result back, and copy to dst
196
197 bool borrow_reg = (tmp == noreg);
198 if (borrow_reg) {
199 // No free registers available. Make one useful.
200 tmp = rscratch1;
201 if (tmp == dst) {
202 tmp = rscratch2;
203 }
204 __ push(RegSet::of(tmp), sp);
205 }
206
207 assert_different_registers(tmp, dst);
208
209 Label done;
210 __ ldr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
211 __ eon(tmp, tmp, zr);
212 __ ands(zr, tmp, markWord::lock_mask_in_place);
213 __ br(Assembler::NE, done);
214 __ orr(tmp, tmp, markWord::marked_value);
215 __ eon(dst, tmp, zr);
216 __ bind(done);
217
218 if (borrow_reg) {
219 __ pop(RegSet::of(tmp), sp);
220 }
221 }
222
223 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) {
224 assert(ShenandoahLoadRefBarrier, "Should be enabled");
225 assert(dst != rscratch2, "need rscratch2");
226 assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2);
227
228 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
229 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
230 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
231 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
232 bool is_narrow = UseCompressedOops && !is_native;
233
234 Label heap_stable, not_cset;
235 __ enter(/*strip_ret_addr*/true);
236 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
237 __ ldrb(rscratch2, gc_state);
238
239 // Check for heap stability
240 if (is_strong) {
241 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
242 } else {
243 Label lrb;
244 __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb);
245 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
246 __ bind(lrb);
247 }
248
249 // use r1 for load address
250 Register result_dst = dst;
251 if (dst == r1) {
252 __ mov(rscratch1, dst);
253 dst = rscratch1;
254 }
255
256 // Save r0 and r1, unless it is an output register
257 RegSet to_save = RegSet::of(r0, r1) - result_dst;
258 __ push(to_save, sp);
259 __ lea(r1, load_addr);
260 __ mov(r0, dst);
261
262 // Test for in-cset
263 if (is_strong) {
264 __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr());
265 __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint());
266 __ ldrb(rscratch2, Address(rscratch2, rscratch1));
267 __ tbz(rscratch2, 0, not_cset);
268 }
269
270 __ push_call_clobbered_registers();
271 if (is_strong) {
272 if (is_narrow) {
273 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
274 } else {
275 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
276 }
277 } else if (is_weak) {
278 if (is_narrow) {
279 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
280 } else {
281 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
282 }
283 } else {
284 assert(is_phantom, "only remaining strength");
285 assert(!is_narrow, "phantom access cannot be narrow");
286 // AOT saved adapters need relocation for this call.
287 __ lea(lr, RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom)));
288 }
289 __ blr(lr);
290 __ mov(rscratch1, r0);
291 __ pop_call_clobbered_registers();
292 __ mov(r0, rscratch1);
293
294 __ bind(not_cset);
295
296 __ mov(result_dst, r0);
297 __ pop(to_save, sp);
298
299 __ bind(heap_stable);
300 __ leave();
301 }
302
303 //
304 // Arguments:
305 //
306 // Inputs:
307 // src: oop location to load from, might be clobbered
308 //
309 // Output:
310 // dst: oop loaded from src location
311 //
312 // Kill:
313 // rscratch1 (scratch reg)
314 //
315 // Alias:
316 // dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
317 //
318 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
319 Register dst, Address src, Register tmp1, Register tmp2) {
320 // 1: non-reference load, no additional barrier is needed
321 if (!is_reference_type(type)) {
322 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
323 return;
324 }
325
326 // 2: load a reference from src location and apply LRB if needed
327 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
328 Register result_dst = dst;
329
330 // Preserve src location for LRB
331 if (dst == src.base() || dst == src.index()) {
332 dst = rscratch1;
333 }
334 assert_different_registers(dst, src.base(), src.index());
335
336 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
337
338 load_reference_barrier(masm, dst, src, decorators);
339
340 if (dst != result_dst) {
341 __ mov(result_dst, dst);
342 dst = result_dst;
343 }
344 } else {
345 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
346 }
347
348 // 3: apply keep-alive barrier if needed
349 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
350 __ enter(/*strip_ret_addr*/true);
351 __ push_call_clobbered_registers();
352 satb_barrier(masm /* masm */,
353 noreg /* obj */,
354 dst /* pre_val */,
355 rthread /* thread */,
356 tmp1 /* tmp1 */,
357 tmp2 /* tmp2 */,
358 true /* tosca_live */,
359 true /* expand_call */);
360 __ pop_call_clobbered_registers();
361 __ leave();
362 }
363 }
364
365 void ShenandoahBarrierSetAssembler::card_barrier(MacroAssembler* masm, Register obj) {
366 assert(ShenandoahCardBarrier, "Should have been checked by caller");
367
368 __ lsr(obj, obj, CardTable::card_shift());
369
370 assert(CardTable::dirty_card_val() == 0, "must be");
371
372 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
373 __ ldr(rscratch1, curr_ct_holder_addr);
374
375 if (UseCondCardMark) {
376 Label L_already_dirty;
377 __ ldrb(rscratch2, Address(obj, rscratch1));
378 __ cbz(rscratch2, L_already_dirty);
379 __ strb(zr, Address(obj, rscratch1));
380 __ bind(L_already_dirty);
381 } else {
382 __ strb(zr, Address(obj, rscratch1));
383 }
384 }
385
386 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
387 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
388 // 1: non-reference types require no barriers
389 if (!is_reference_type(type)) {
390 BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
391 return;
392 }
393
394 // Flatten object address right away for simplicity: likely needed by barriers
395 if (dst.index() == noreg && dst.offset() == 0) {
396 if (dst.base() != tmp3) {
397 __ mov(tmp3, dst.base());
398 }
399 } else {
400 __ lea(tmp3, dst);
401 }
402
403 bool storing_non_null = (val != noreg);
404
405 // 2: pre-barrier: SATB needs the previous value
406 if (ShenandoahBarrierSet::need_satb_barrier(decorators, type)) {
407 satb_barrier(masm,
408 tmp3 /* obj */,
409 tmp2 /* pre_val */,
410 rthread /* thread */,
411 tmp1 /* tmp */,
412 rscratch1 /* tmp2 */,
413 storing_non_null /* tosca_live */,
414 false /* expand_call */);
415 }
416
417 // Store!
418 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
419
420 // 3: post-barrier: card barrier needs store address
421 if (ShenandoahBarrierSet::need_card_barrier(decorators, type) && storing_non_null) {
422 card_barrier(masm, tmp3);
423 }
424 }
425
426 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
427 Register obj, Register tmp, Label& slowpath) {
428 Label done;
429 // Resolve jobject
430 BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
431
432 // Check for null.
433 __ cbz(obj, done);
434
435 assert(obj != rscratch2, "need rscratch2");
436 Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
437 __ lea(rscratch2, gc_state);
438 __ ldrb(rscratch2, Address(rscratch2));
439
440 // Check for heap in evacuation phase
441 __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
442
443 __ bind(done);
444 }
445
446 #ifdef COMPILER2
447 void ShenandoahBarrierSetAssembler::try_resolve_weak_handle_in_c2(MacroAssembler* masm, Register obj,
448 Register tmp, Label& slow_path) {
449 assert_different_registers(obj, tmp);
450
451 Label done;
452
453 // Resolve weak handle using the standard implementation.
454 BarrierSetAssembler::try_resolve_weak_handle_in_c2(masm, obj, tmp, slow_path);
455
456 // Check if the reference is null, and if it is, take the fast path.
457 __ cbz(obj, done);
458
459 Address gc_state(rthread, ShenandoahThreadLocalData::gc_state_offset());
460 __ lea(tmp, gc_state);
461 __ ldrb(tmp, __ legitimize_address(gc_state, 1, tmp));
462
463 // Check if the heap is under weak-reference/roots processing, in
464 // which case we need to take the slow path.
465 __ tbnz(tmp, ShenandoahHeap::WEAK_ROOTS_BITPOS, slow_path);
466 __ bind(done);
467 }
468 #endif
469
470 // Special Shenandoah CAS implementation that handles false negatives due
471 // to concurrent evacuation. The service is more complex than a
472 // traditional CAS operation because the CAS operation is intended to
473 // succeed if the reference at addr exactly matches expected or if the
474 // reference at addr holds a pointer to a from-space object that has
475 // been relocated to the location named by expected. There are two
476 // races that must be addressed:
477 // a) A parallel thread may mutate the contents of addr so that it points
478 // to a different object. In this case, the CAS operation should fail.
479 // b) A parallel thread may heal the contents of addr, replacing a
480 // from-space pointer held in addr with the to-space pointer
481 // representing the new location of the object.
482 // Upon entry to cmpxchg_oop, it is assured that new_val equals null
483 // or it refers to an object that is not being evacuated out of
484 // from-space, or it refers to the to-space version of an object that
485 // is being evacuated out of from-space.
486 //
487 // By default the value held in the result register following execution
488 // of the generated code sequence is 0 to indicate failure of CAS,
489 // non-zero to indicate success. If is_cae, the result is the value most
490 // recently fetched from addr rather than a boolean success indicator.
491 //
492 // Clobbers rscratch1, rscratch2
493 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
494 Register addr,
495 Register expected,
496 Register new_val,
497 bool acquire, bool release,
498 bool is_cae,
499 Register result) {
500 Register tmp1 = rscratch1;
501 Register tmp2 = rscratch2;
502 bool is_narrow = UseCompressedOops;
503 Assembler::operand_size size = is_narrow ? Assembler::word : Assembler::xword;
504
505 assert_different_registers(addr, expected, tmp1, tmp2);
506 assert_different_registers(addr, new_val, tmp1, tmp2);
507
508 Label step4, done;
509
510 // There are two ways to reach this label. Initial entry into the
511 // cmpxchg_oop code expansion starts at step1 (which is equivalent
512 // to label step4). Additionally, in the rare case that four steps
513 // are required to perform the requested operation, the fourth step
514 // is the same as the first. On a second pass through step 1,
515 // control may flow through step 2 on its way to failure. It will
516 // not flow from step 2 to step 3 since we are assured that the
517 // memory at addr no longer holds a from-space pointer.
518 //
519 // The comments that immediately follow the step4 label apply only
520 // to the case in which control reaches this label by branch from
521 // step 3.
522
523 __ bind (step4);
524
525 // Step 4. CAS has failed because the value most recently fetched
526 // from addr is no longer the from-space pointer held in tmp2. If a
527 // different thread replaced the in-memory value with its equivalent
528 // to-space pointer, then CAS may still be able to succeed. The
529 // value held in the expected register has not changed.
530 //
531 // It is extremely rare we reach this point. For this reason, the
532 // implementation opts for smaller rather than potentially faster
533 // code. Ultimately, smaller code for this rare case most likely
534 // delivers higher overall throughput by enabling improved icache
535 // performance.
536
537 // Step 1. Fast-path.
538 //
539 // Try to CAS with given arguments. If successful, then we are done.
540 //
541 // No label required for step 1.
542
543 __ cmpxchg(addr, expected, new_val, size, acquire, release, false, tmp2);
544 // EQ flag set iff success. tmp2 holds value fetched.
545
546 // If expected equals null but tmp2 does not equal null, the
547 // following branches to done to report failure of CAS. If both
548 // expected and tmp2 equal null, the following branches to done to
549 // report success of CAS. There's no need for a special test of
550 // expected equal to null.
551
552 __ br(Assembler::EQ, done);
553 // if CAS failed, fall through to step 2
554
555 // Step 2. CAS has failed because the value held at addr does not
556 // match expected. This may be a false negative because the value fetched
557 // from addr (now held in tmp2) may be a from-space pointer to the
558 // original copy of same object referenced by to-space pointer expected.
559 //
560 // To resolve this, it suffices to find the forward pointer associated
561 // with fetched value. If this matches expected, retry CAS with new
562 // parameters. If this mismatches, then we have a legitimate
563 // failure, and we're done.
564 //
565 // No need for step2 label.
566
567 // overwrite tmp1 with from-space pointer fetched from memory
568 __ mov(tmp1, tmp2);
569
570 if (is_narrow) {
571 // Decode tmp1 in order to resolve its forward pointer
572 __ decode_heap_oop(tmp1, tmp1);
573 }
574 resolve_forward_pointer(masm, tmp1);
575 // Encode tmp1 to compare against expected.
576 __ encode_heap_oop(tmp1, tmp1);
577
578 // Does forwarded value of fetched from-space pointer match original
579 // value of expected? If tmp1 holds null, this comparison will fail
580 // because we know from step1 that expected is not null. There is
581 // no need for a separate test for tmp1 (the value originally held
582 // in memory) equal to null.
583 __ cmp(tmp1, expected);
584
585 // If not, then the failure was legitimate and we're done.
586 // Branching to done with NE condition denotes failure.
587 __ br(Assembler::NE, done);
588
589 // Fall through to step 3. No need for step3 label.
590
591 // Step 3. We've confirmed that the value originally held in memory
592 // (now held in tmp2) pointed to from-space version of original
593 // expected value. Try the CAS again with the from-space expected
594 // value. If it now succeeds, we're good.
595 //
596 // Note: tmp2 holds encoded from-space pointer that matches to-space
597 // object residing at expected. tmp2 is the new "expected".
598
599 // Note that macro implementation of __cmpxchg cannot use same register
600 // tmp2 for result and expected since it overwrites result before it
601 // compares result with expected.
602 __ cmpxchg(addr, tmp2, new_val, size, acquire, release, false, noreg);
603 // EQ flag set iff success. tmp2 holds value fetched, tmp1 (rscratch1) clobbered.
604
605 // If fetched value did not equal the new expected, this could
606 // still be a false negative because some other thread may have
607 // newly overwritten the memory value with its to-space equivalent.
608 __ br(Assembler::NE, step4);
609
610 if (is_cae) {
611 // We're falling through to done to indicate success. Success
612 // with is_cae is denoted by returning the value of expected as
613 // result.
614 __ mov(tmp2, expected);
615 }
616
617 __ bind(done);
618 // At entry to done, the Z (EQ) flag is on iff if the CAS
619 // operation was successful. Additionally, if is_cae, tmp2 holds
620 // the value most recently fetched from addr. In this case, success
621 // is denoted by tmp2 matching expected.
622
623 if (is_cae) {
624 __ mov(result, tmp2);
625 } else {
626 __ cset(result, Assembler::EQ);
627 }
628 }
629
630 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
631 Register start, Register count, Register scratch) {
632 assert(ShenandoahCardBarrier, "Should have been checked by caller");
633
634 Label L_loop, L_done;
635 const Register end = count;
636
637 // Zero count? Nothing to do.
638 __ cbz(count, L_done);
639
640 // end = start + count << LogBytesPerHeapOop
641 // last element address to make inclusive
642 __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
643 __ sub(end, end, BytesPerHeapOop);
644 __ lsr(start, start, CardTable::card_shift());
645 __ lsr(end, end, CardTable::card_shift());
646
647 // number of bytes to copy
648 __ sub(count, end, start);
649
650 Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
651 __ ldr(scratch, curr_ct_holder_addr);
652 __ add(start, start, scratch);
653 __ bind(L_loop);
654 __ strb(zr, Address(start, count));
655 __ subs(count, count, 1);
656 __ br(Assembler::GE, L_loop);
657 __ bind(L_done);
658 }
659
660 #undef __
661
662 #ifdef COMPILER1
663
664 #define __ ce->masm()->
665
666 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
667 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
668 // At this point we know that marking is in progress.
669 // If do_load() is true then we have to emit the
670 // load of the previous value; otherwise it has already
671 // been loaded into _pre_val.
672
673 __ bind(*stub->entry());
674
675 assert(stub->pre_val()->is_register(), "Precondition.");
676
677 Register pre_val_reg = stub->pre_val()->as_register();
678
679 if (stub->do_load()) {
680 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
681 }
682 __ cbz(pre_val_reg, *stub->continuation());
683 ce->store_parameter(stub->pre_val()->as_register(), 0);
684 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
685 __ b(*stub->continuation());
686 }
687
688 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
689 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
690 __ bind(*stub->entry());
691
692 DecoratorSet decorators = stub->decorators();
693 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
694 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
695 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
696 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
697
698 Register obj = stub->obj()->as_register();
699 Register res = stub->result()->as_register();
700 Register addr = stub->addr()->as_pointer_register();
701 Register tmp1 = stub->tmp1()->as_register();
702 Register tmp2 = stub->tmp2()->as_register();
703
704 assert(res == r0, "result must arrive in r0");
705
706 if (res != obj) {
707 __ mov(res, obj);
708 }
709
710 if (is_strong) {
711 // Check for object in cset.
712 __ mov(tmp2, ShenandoahHeap::in_cset_fast_test_addr());
713 __ lsr(tmp1, res, ShenandoahHeapRegion::region_size_bytes_shift_jint());
714 __ ldrb(tmp2, Address(tmp2, tmp1));
715 __ cbz(tmp2, *stub->continuation());
716 }
717
718 ce->store_parameter(res, 0);
719 ce->store_parameter(addr, 1);
720 if (is_strong) {
721 if (is_native) {
722 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_native_rt_code_blob()->code_begin()));
723 } else {
724 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_rt_code_blob()->code_begin()));
725 }
726 } else if (is_weak) {
727 __ far_call(RuntimeAddress(bs->load_reference_barrier_weak_rt_code_blob()->code_begin()));
728 } else {
729 assert(is_phantom, "only remaining strength");
730 __ far_call(RuntimeAddress(bs->load_reference_barrier_phantom_rt_code_blob()->code_begin()));
731 }
732
733 __ b(*stub->continuation());
734 }
735
736 #undef __
737
738 #define __ sasm->
739
740 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
741 __ prologue("shenandoah_pre_barrier", false);
742
743 // arg0 : previous value of memory
744
745 BarrierSet* bs = BarrierSet::barrier_set();
746
747 const Register pre_val = r0;
748 const Register thread = rthread;
749 const Register tmp = rscratch1;
750
751 Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
752 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
753
754 Label done;
755 Label runtime;
756
757 // Is marking still active?
758 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
759 __ ldrb(tmp, gc_state);
760 __ tbz(tmp, ShenandoahHeap::MARKING_BITPOS, done);
761
762 // Can we store original value in the thread's buffer?
763 __ ldr(tmp, queue_index);
764 __ cbz(tmp, runtime);
765
766 __ sub(tmp, tmp, wordSize);
767 __ str(tmp, queue_index);
768 __ ldr(rscratch2, buffer);
769 __ add(tmp, tmp, rscratch2);
770 __ load_parameter(0, rscratch2);
771 __ str(rscratch2, Address(tmp, 0));
772 __ b(done);
773
774 __ bind(runtime);
775 __ push_call_clobbered_registers();
776 __ load_parameter(0, pre_val);
777 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_pre), pre_val);
778 __ pop_call_clobbered_registers();
779 __ bind(done);
780
781 __ epilogue();
782 }
783
784 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
785 __ prologue("shenandoah_load_reference_barrier", false);
786 // arg0 : object to be resolved
787
788 __ push_call_clobbered_registers();
789 __ load_parameter(0, r0);
790 __ load_parameter(1, r1);
791
792 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
793 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
794 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
795 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
796 if (is_strong) {
797 if (is_native) {
798 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
799 } else {
800 if (UseCompressedOops) {
801 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
802 } else {
803 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
804 }
805 }
806 } else if (is_weak) {
807 assert(!is_native, "weak must not be called off-heap");
808 if (UseCompressedOops) {
809 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
810 } else {
811 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
812 }
813 } else {
814 assert(is_phantom, "only remaining strength");
815 assert(is_native, "phantom must only be called off-heap");
816 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom));
817 }
818 __ blr(lr);
819 __ mov(rscratch1, r0);
820 __ pop_call_clobbered_registers();
821 __ mov(r0, rscratch1);
822
823 __ epilogue();
824 }
825
826 #undef __
827
828 #endif // COMPILER1