< prev index next >

src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp

Print this page
@@ -40,10 +40,14 @@
  #ifdef COMPILER1
  #include "c1/c1_LIRAssembler.hpp"
  #include "c1/c1_MacroAssembler.hpp"
  #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
  #endif
+ #ifdef COMPILER2
+ #include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
+ #include "opto/output.hpp"
+ #endif
  
  #define __ masm->
  
  void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
                                                         Register src, Register dst, Register count, RegSet saved_regs) {

@@ -625,10 +629,549 @@
    } else {
      __ cset(result, Assembler::EQ);
    }
  }
  
+ #ifdef COMPILER2
+ #undef __
+ #define __ masm.
+ 
+ bool ShenandoahBarrierStubC2::push_save_register_if_live(MacroAssembler& masm, Register reg) {
+   if (is_live(reg)) {
+     push_save_register(masm, reg);
+     return true;
+   } else {
+     return false;
+   }
+ }
+ 
+ void ShenandoahBarrierStubC2::push_save_register(MacroAssembler& masm, Register reg) {
+   __ str(reg, Address(sp, push_save_slot()));
+ }
+ 
+ void ShenandoahBarrierStubC2::pop_save_register(MacroAssembler& masm, Register reg) {
+   __ ldr(reg, Address(sp, pop_save_slot()));
+ }
+ 
+ bool ShenandoahBarrierStubC2::has_live_vector_registers() {
+   RegMaskIterator rmi(preserve_set());
+   while (rmi.has_next()) {
+     const OptoReg::Name opto_reg = rmi.next();
+     const VMReg vm_reg = OptoReg::as_VMReg(opto_reg);
+     if (vm_reg->is_Register()) {
+       // Not a vector
+     } else if (vm_reg->is_FloatRegister()) {
+       // Maybe vector, assume the worst right now
+       return true;
+     } else if (vm_reg->is_PRegister()) {
+       // Vector-related register
+       return true;
+     } else {
+       fatal("Unexpected register type");
+     }
+   }
+   return false;
+ }
+ 
+ bool ShenandoahBarrierStubC2::is_live(Register reg) {
+   // TODO: Precompute the generic register map for faster lookups.
+   RegMaskIterator rmi(preserve_set());
+   while (rmi.has_next()) {
+     const OptoReg::Name opto_reg = rmi.next();
+     const VMReg vm_reg = OptoReg::as_VMReg(opto_reg);
+     if (vm_reg->is_Register() && reg == vm_reg->as_Register()) {
+       return true;
+     }
+   }
+   return false;
+ }
+ 
+ Register ShenandoahBarrierStubC2::select_temp_register(bool& selected_live, Address addr, Register reg1) {
+   Register tmp = noreg;
+   Register fallback_live = noreg;
+ 
+   // Try to select non-live first:
+   for (int i = 0; i < Register::number_of_registers; i++) {
+     Register r = as_Register(i);
+     if (r != rfp && r != sp && r != lr &&
+         r != rheapbase && r != rthread &&
+         r != rscratch1 && r != rscratch2 &&
+         r != reg1 && r != addr.base() && r != addr.index()) {
+       if (!is_live(r)) {
+         tmp = r;
+         break;
+       } else if (fallback_live == noreg) {
+         fallback_live = r;
+       }
+     }
+   }
+ 
+   // If we could not find a non-live register, select the live fallback:
+   if (tmp == noreg) {
+     tmp = fallback_live;
+     selected_live = true;
+   } else {
+     selected_live = false;
+   }
+ 
+   assert(tmp != noreg, "successfully selected");
+   assert_different_registers(tmp, reg1);
+   assert_different_registers(tmp, addr.base());
+   assert_different_registers(tmp, addr.index());
+   return tmp;
+ }
+ 
+ void ShenandoahBarrierStubC2::enter_if_gc_state(MacroAssembler& masm, const char test_state) {
+   Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
+ 
+   int bit_to_check = ShenandoahThreadLocalData::gc_state_to_fast_bit(test_state);
+   Address gc_state_fast(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_offset()));
+   __ ldrb(rscratch1, gc_state_fast);
+   if (_use_trampoline) {
+     __ tbnz(rscratch1, bit_to_check, _trampoline_entry);
+   } else {
+     __ tbz(rscratch1, bit_to_check, *continuation());
+     __ b(*entry());
+   }
+   // This is were the slowpath stub will return to or the code above will
+   // jump to if the checks are false
+   __ bind(*continuation());
+ }
+ 
+ #undef __
+ #define __ masm->
+ 
+ void ShenandoahBarrierSetAssembler::compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr,
+     Register oldval, Register newval, bool exchange, bool narrow, bool weak, bool acquire) {
+   Assembler::operand_size op_size = narrow ? Assembler::word : Assembler::xword;
+ 
+   // Pre-barrier covers several things:
+   //  a. Avoids false positives from CAS encountering to-space memory values.
+   //  b. Satisfies the need for LRB for the CAE result.
+   //  c. Records old value for the sake of SATB.
+   //
+   // (a) and (b) are covered because load barrier does memory location fixup.
+   // (c) is covered by KA on the current memory value.
+   if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
+     ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, noreg, addr, narrow, /* do_load: */ true, __ offset());
+     char check = 0;
+     check |= ShenandoahBarrierStubC2::needs_keep_alive_barrier(node) ? ShenandoahHeap::MARKING : 0;
+     check |= ShenandoahBarrierStubC2::needs_load_ref_barrier(node)   ? ShenandoahHeap::HAS_FORWARDED : 0;
+     assert(!ShenandoahBarrierStubC2::needs_load_ref_barrier_weak(node), "Not supported for CAS");
+     stub->enter_if_gc_state(*masm, check);
+   }
+ 
+   // CAS!
+   __ cmpxchg(addr, oldval, newval, op_size, acquire, /* release */ true, weak, exchange ? res : noreg);
+ 
+   // If we need a boolean result out of CAS, set the flag appropriately and promote the result.
+   if (!exchange) {
+     assert(res != noreg, "need result register");
+     __ cset(res, Assembler::EQ);
+   }
+ 
+   // Post-barrier deals with card updates.
+   card_barrier_c2(node, masm, Address(addr, 0));
+ }
+ 
+ void ShenandoahBarrierSetAssembler::get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval,
+     Register newval, Register addr, bool acquire) {
+   bool narrow = node->bottom_type()->isa_narrowoop();
+ 
+   // Pre-barrier covers several things:
+   //  a. Satisfies the need for LRB for the GAS result.
+   //  b. Records old value for the sake of SATB.
+   //
+   // (a) is covered because load barrier does memory location fixup.
+   // (b) is covered by KA on the current memory value.
+   if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
+     ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, noreg, addr, narrow, /* do_load: */ true, __ offset());
+     char check = 0;
+     check |= ShenandoahBarrierStubC2::needs_keep_alive_barrier(node) ? ShenandoahHeap::MARKING : 0;
+     check |= ShenandoahBarrierStubC2::needs_load_ref_barrier(node)   ? ShenandoahHeap::HAS_FORWARDED : 0;
+     assert(!ShenandoahBarrierStubC2::needs_load_ref_barrier_weak(node), "Not supported for GAS");
+     stub->enter_if_gc_state(*masm, check);
+   }
+ 
+   if (narrow) {
+     if (acquire) {
+       __ atomic_xchgalw(preval, newval, addr);
+     } else {
+       __ atomic_xchgw(preval, newval, addr);
+     }
+   } else {
+     if (acquire) {
+       __ atomic_xchgal(preval, newval, addr);
+     } else {
+       __ atomic_xchg(preval, newval, addr);
+     }
+   }
+ 
+   // Post-barrier deals with card updates.
+   card_barrier_c2(node, masm, Address(addr, 0));
+ }
+ 
+ void ShenandoahBarrierSetAssembler::store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow,
+     Register src, bool src_narrow, bool is_volatile) {
+ 
+   // Pre-barrier: SATB, keep-alive the current memory value.
+   if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
+     assert(!ShenandoahBarrierStubC2::needs_load_ref_barrier(node), "Should not be required for stores");
+     ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, noreg, dst, dst_narrow, /* do_load: */ true, __ offset());
+     stub->enter_if_gc_state(*masm, ShenandoahHeap::MARKING);
+   }
+ 
+   // Do the actual store
+   if (dst_narrow) {
+     if (!src_narrow) {
+       // Need to encode into rscratch, because we cannot clobber src.
+       // TODO: Maybe there is a matcher way to test that src is unused after this?
+       __ mov(rscratch1, src);
+       if (ShenandoahBarrierStubC2::maybe_null(node)) {
+         __ encode_heap_oop(rscratch1);
+       } else {
+         __ encode_heap_oop_not_null(rscratch1);
+       }
+       src = rscratch1;
+     }
+ 
+     if (is_volatile) {
+       __ stlrw(src, dst.base());
+     } else {
+       __ strw(src, dst);
+     }
+   } else {
+     if (is_volatile) {
+       __ stlr(src, dst.base());
+     } else {
+       __ str(src, dst);
+     }
+   }
+ 
+   // Post-barrier: card updates.
+   card_barrier_c2(node, masm, dst);
+ }
+ 
+ void ShenandoahBarrierSetAssembler::load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address src, bool is_narrow, bool is_acquire) {
+   // Do the actual load. This load is the candidate for implicit null check, and MUST come first.
+   if (is_narrow) {
+     if (is_acquire) {
+       __ ldarw(dst, src.base());
+     } else {
+       __ ldrw(dst, src);
+     }
+   } else {
+     if (is_acquire) {
+       __ ldar(dst, src.base());
+     } else {
+       __ ldr(dst, src);
+     }
+   }
+ 
+   // Post-barrier: LRB / KA / weak-root processing.
+   if (ShenandoahBarrierStubC2::needs_slow_barrier(node)) {
+     ShenandoahBarrierStubC2* const stub = ShenandoahBarrierStubC2::create(node, dst, src, is_narrow, /* do_load: */ false, __ offset());
+     char check = 0;
+     check |= ShenandoahBarrierStubC2::needs_keep_alive_barrier(node)    ? ShenandoahHeap::MARKING : 0;
+     check |= ShenandoahBarrierStubC2::needs_load_ref_barrier(node)      ? ShenandoahHeap::HAS_FORWARDED : 0;
+     check |= ShenandoahBarrierStubC2::needs_load_ref_barrier_weak(node) ? ShenandoahHeap::WEAK_ROOTS : 0;
+     stub->enter_if_gc_state(*masm, check);
+   }
+ }
+ 
+ void ShenandoahBarrierSetAssembler::card_barrier_c2(const MachNode* node, MacroAssembler* masm, Address address) {
+   if (!ShenandoahBarrierStubC2::needs_card_barrier(node)) {
+     return;
+   }
+ 
+   assert(CardTable::dirty_card_val() == 0, "must be");
+   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
+ 
+   // rscratch1 = card table base (holder)
+   Address curr_ct_holder_addr(rthread, in_bytes(ShenandoahThreadLocalData::card_table_offset()));
+   __ ldr(rscratch1, curr_ct_holder_addr);
+ 
+   // rscratch2 = addr
+   __ lea(rscratch2, address);
+ 
+   // rscratch2 = &card_table[ addr >> CardTable::card_shift() ]
+   __ add(rscratch2, rscratch1, rscratch2, Assembler::LSR, CardTable::card_shift());
+ 
+   if (UseCondCardMark) {
+     Label L_already_dirty;
+     __ ldrb(rscratch1, Address(rscratch2));
+     __ cbz(rscratch1, L_already_dirty);
+     __ strb(zr, Address(rscratch2));
+     __ bind(L_already_dirty);
+   } else {
+     __ strb(zr, Address(rscratch2));
+   }
+ }
+ #undef __
+ #define __ masm.
+ 
+ // Only handles forward branch jumps, target_offset >= branch_offset
+ static bool aarch64_test_and_branch_reachable(int branch_offset, int target_offset) {
+   assert(branch_offset >= 0, "branch to stub offsets must be positive");
+   assert(target_offset >= 0, "offset in stubs section must be positive");
+   assert(target_offset >= branch_offset, "forward branches only, branch_offset -> target_offset");
+   return (target_offset - branch_offset) < (int)(32*K);
+ }
+ 
+ void ShenandoahBarrierStubC2::post_init(int offset) {
+   // If we are in scratch emit mode we assume worst case,
+   // and use no trampolines.
+   PhaseOutput* const output = Compile::current()->output();
+   if (output->in_scratch_emit_size()) {
+     return;
+   }
+ 
+   // Assume that each trampoline is one single instruction and that the stubs
+   // will follow immediately after the _code section. We emit trampolines until
+   // we can no longer do it.
+   const int code_size = output->buffer_sizing_data()->_code;
+   const int trampoline_offset = trampoline_stubs_count() * NativeInstruction::instruction_size;
+   _use_trampoline = aarch64_test_and_branch_reachable(_fastpath_branch_offset, code_size + trampoline_offset);
+   if (_use_trampoline) {
+     inc_trampoline_stubs_count();
+   }
+ }
+ 
+ void ShenandoahBarrierStubC2::emit_code(MacroAssembler& masm) {
+   Assembler::InlineSkippedInstructionsCounter skip_counter(&masm);
+ 
+   assert(_needs_keep_alive_barrier || _needs_load_ref_barrier, "Why are you here?");
+ 
+   if (_do_emit_actual) {
+     Label L_done;
+ 
+     __ bind(*entry());
+ 
+     load_and_decode(masm, L_done);
+ 
+     keepalive(masm, _obj, rscratch1);
+ 
+     lrb(masm, _obj, _addr, rscratch1);
+ 
+     reencode_if_needed(masm);
+ 
+     __ bind(L_done);
+     __ b(*continuation());
+   } else {
+     // If we'll need a trampoline for this stub emit it here.
+     if (_use_trampoline) {
+       const int target_offset = __ offset();
+       assert(aarch64_test_and_branch_reachable(_fastpath_branch_offset, target_offset), "trampoline should be reachable");
+       __ bind(_trampoline_entry);
+       __ b(*entry());
+     }
+ 
+     // Register this stub, this time with actual emits.
+     _do_emit_actual = true;
+     ShenandoahBarrierStubC2::register_stub(this);
+   }
+ }
+ 
+ void ShenandoahBarrierStubC2::load_and_decode(MacroAssembler& masm, Label& target_if_null) {
+   if (_do_load) {
+     // Fastpath sets _obj==noreg if it tells the slowpath to do the load
+     _obj = rscratch2;
+ 
+     // This does the load and the decode if necessary
+     __ load_heap_oop(_obj, _addr, noreg, noreg, AS_RAW);
+ 
+     __ cbz(_obj, target_if_null);
+   } else {
+     // If object is narrow, we need to decode it because everything else later
+     // will need full oops.
+     if (_narrow) {
+       if (_maybe_null) {
+         __ decode_heap_oop(_obj);
+       } else {
+         __ decode_heap_oop_not_null(_obj);
+       }
+     }
+ 
+     if (_maybe_null) {
+       __ cbz(_obj, target_if_null);
+     }
+   }
+ }
+ 
+ void ShenandoahBarrierStubC2::reencode_if_needed(MacroAssembler& masm) {
+   // If object is narrow, we need to encode it before exiting.
+   // For encoding, dst can only turn null if we are dealing with weak loads.
+   // Otherwise, we have already null-checked. We can skip all this if we performed
+   // the load ourselves, which means the value is not used by caller.
+   if (!_do_load && _narrow) {
+     if (_needs_load_ref_weak_barrier) {
+       __ encode_heap_oop(_obj);
+     } else {
+       __ encode_heap_oop_not_null(_obj);
+     }
+   }
+ }
+ 
+ void ShenandoahBarrierStubC2::keepalive(MacroAssembler& masm, Register obj, Register tmp1, Label* L_done_unused) {
+   Address index(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
+   Address buffer(rthread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
+   Label L_runtime;
+   Label L_done;
+ 
+   // The node doesn't even need keepalive barrier, just don't check anything else
+   if (!_needs_keep_alive_barrier) {
+     return ;
+   }
+ 
+   // If another barrier is enabled as well, do a runtime check for a specific barrier.
+   if (_needs_load_ref_barrier) {
+     Address gcs_addr(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
+     __ ldrb(tmp1, gcs_addr);
+     __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, L_done);
+   }
+ 
+   // If buffer is full, call into runtime.
+   __ ldr(tmp1, index);
+   __ cbz(tmp1, L_runtime);
+ 
+   bool selected_live = false;
+   Register tmp2 = select_temp_register(selected_live, _addr, obj);
+   if (selected_live) {
+     push_save_register(masm, tmp2);
+   }
+ 
+   // The buffer is not full, store value into it.
+   __ sub(tmp1, tmp1, wordSize);
+   __ str(tmp1, index);
+   __ ldr(tmp2, buffer);
+   __ str(obj, Address(tmp2, tmp1));
+   __ b(L_done);
+ 
+   // Runtime call
+   __ bind(L_runtime);
+ 
+   preserve(obj);
+   {
+     bool clobbered_c_rarg0 = false;
+     if (c_rarg0 != obj) {
+       clobbered_c_rarg0 = push_save_register_if_live(masm, c_rarg0);
+       __ mov(c_rarg0, obj);
+     }
+ 
+     // Go to runtime stub and handle the rest there.
+     __ far_call(RuntimeAddress(keepalive_runtime_entry_addr()));
+ 
+     // Restore the clobbered registers.
+     if (clobbered_c_rarg0) {
+       pop_save_register(masm, c_rarg0);
+     }
+   }
+ 
+   __ bind(L_done);
+ 
+   if (selected_live) {
+     pop_save_register(masm, tmp2);
+   }
+ }
+ 
+ void ShenandoahBarrierStubC2::lrb(MacroAssembler& masm, Register obj, Address addr, Register tmp, Label* L_done_unused) {
+   Label L_done, L_slow;
+ 
+   // The node doesn't even need LRB barrier, just don't check anything else
+   if (!_needs_load_ref_barrier) {
+     return ;
+   }
+ 
+   // If another barrier is enabled as well, do a runtime check for a specific barrier.
+   if (_needs_keep_alive_barrier) {
+     char state_to_check = ShenandoahHeap::HAS_FORWARDED | (_needs_load_ref_weak_barrier ? ShenandoahHeap::WEAK_ROOTS : 0);
+     int bit_to_check = ShenandoahThreadLocalData::gc_state_to_fast_bit(state_to_check);
+     Address gc_state_fast(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_fast_offset()));
+     __ ldrb(tmp, gc_state_fast);
+     __ tbz(tmp, bit_to_check, L_done);
+   }
+ 
+   // If weak references are being processed, weak/phantom loads need to go slow,
+   // regadless of their cset status.
+   if (_needs_load_ref_weak_barrier) {
+     Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
+     __ ldrb(tmp, gc_state);
+     __ tbnz(tmp, ShenandoahHeap::WEAK_ROOTS_BITPOS, L_slow);
+   }
+ 
+   // Cset-check. Fall-through to slow if in collection set.
+   assert(ShenandoahHeapRegion::region_size_bytes_shift_jint() <= 63, "Maximum shift of the add is 63");
+   __ mov(tmp, ShenandoahHeap::in_cset_fast_test_addr());
+   __ add(tmp, tmp, obj, Assembler::LSR, ShenandoahHeapRegion::region_size_bytes_shift_jint());
+   __ ldrb(tmp, Address(tmp, 0));
+   __ cbz(tmp, L_done);
+ 
+   // Slow path
+   __ bind(L_slow);
+   dont_preserve(obj);
+   {
+     // Shuffle in the arguments. The end result should be:
+     //   c_rarg0 <-- obj
+     //   c_rarg1 <-- lea(addr)
+     //
+     // Save clobbered registers before overwriting them, unless they
+     // carry obj, which would be overwritten on return.
+     bool clobbered_c_rarg0 = false;
+     bool clobbered_c_rarg1 = false;
+     bool clobbered_r0 = false;
+ 
+     if (c_rarg0 == obj) {
+       clobbered_c_rarg1 = push_save_register_if_live(masm, c_rarg1);
+       __ lea(c_rarg1, addr);
+     } else if (c_rarg1 == obj) {
+       // Set up arguments in reverse, and then flip them
+       clobbered_c_rarg0 = push_save_register_if_live(masm, c_rarg0);
+       __ lea(c_rarg0, addr);
+       // flip them
+       __ mov(rscratch1, c_rarg0);
+       __ mov(c_rarg0, c_rarg1);
+       __ mov(c_rarg1, rscratch1);
+     } else {
+       assert_different_registers(c_rarg1, obj);
+       clobbered_c_rarg0 = push_save_register_if_live(masm, c_rarg0);
+       clobbered_c_rarg1 = push_save_register_if_live(masm, c_rarg1);
+       __ lea(c_rarg1, addr);
+       __ mov(c_rarg0, obj);
+     }
+ 
+     // The runtime call will clobber r0 at return. If obj isn't r0 then we need
+     // to save obj.
+     if (obj != r0) {
+       clobbered_r0 = push_save_register_if_live(masm, r0);
+     }
+ 
+     // Go to runtime stub and handle the rest there.
+     __ far_call(RuntimeAddress(lrb_runtime_entry_addr()));
+ 
+     // Save the result where needed and restore the clobbered registers.
+     if (obj != r0) {
+       __ mov(obj, r0);
+     }
+     if (clobbered_r0) {
+       pop_save_register(masm, r0);
+     }
+     if (clobbered_c_rarg1) {
+       pop_save_register(masm, c_rarg1);
+     }
+     if (clobbered_c_rarg0) {
+       pop_save_register(masm, c_rarg0);
+     }
+   }
+ 
+   __ bind(L_done);
+ }
+ 
+ #undef __
+ #define __ masm->
+ 
+ #endif // COMPILER2
+ 
  void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
                                                                       Register start, Register count, Register scratch) {
    assert(ShenandoahCardBarrier, "Should have been checked by caller");
  
    Label L_loop, L_done;
< prev index next >