src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.hpp

*** 35,10 ***
--- 35,13 ---
  class LIR_Assembler;
  class ShenandoahPreBarrierStub;
  class ShenandoahLoadReferenceBarrierStub;
  class StubAssembler;
  #endif
+ #ifdef COMPILER2
+ class MachNode;
+ #endif // COMPILER2
  class StubCodeGenerator;
  
  class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
  private:
  

*** 61,17 ***
  
  public:
  
    virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_instruction_and_data_patch; }
  
- #ifdef COMPILER1
-   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
-   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
-   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
-   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
- #endif
- 
    virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
                                    Register src, Register dst, Register count, RegSet saved_regs);
  
    virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
                                    Register start, Register count, Register tmp);
--- 64,10 ---

*** 85,8 ***
--- 81,29 ---
                                               Register obj, Register tmp, Label& slowpath);
    virtual void try_peek_weak_handle_in_nmethod(MacroAssembler* masm, Register weak_handle, Register obj,
                                                 Register tmp, Label& slow_path);
    void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
                     Assembler::Aqrl acquire, Assembler::Aqrl release, bool is_cae, Register result);
+ 
+ #ifdef COMPILER1
+   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
+   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
+   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
+   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
+ #endif
+ 
+ #ifdef COMPILER2
+   // Entry points from Matcher
+   void load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address addr, bool is_narrow);
+   void store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow, Register src,
+       bool src_narrow, Register tmp);
+   void compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr, Register oldval,
+       Register newval, Register tmp, bool exchange, bool narrow, bool is_acquire);
+   void get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval, Register newval,
+       Register addr, Register tmp, bool is_acquire);
+ 
+   void gc_state_check_c2(MacroAssembler* masm, Register rscratch, const unsigned char test_state, BarrierStubC2* slow_stub);
+   void card_barrier_c2(const MachNode* node, MacroAssembler* masm, Address addr);
+ #endif
  };
  
  #endif // CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP