src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.hpp

*** 35,13 ***
--- 35,17 ---
  class LIR_Assembler;
  class ShenandoahPreBarrierStub;
  class ShenandoahLoadReferenceBarrierStub;
  class StubAssembler;
  #endif
+ #ifdef COMPILER2
+ class MachNode;
+ #endif // COMPILER2
  class StubCodeGenerator;
  
  class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
+   friend class ShenandoahCASBarrierSlowStub;
  private:
  
    void satb_barrier(MacroAssembler* masm,
                      Register obj,
                      Register pre_val,

*** 63,16 ***
  
  public:
  
    virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_instruction_and_data_patch; }
  
! #ifdef COMPILER1
!   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
-   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
-   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
-   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
- #endif
  
    virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
                                    Register src, Register dst, Register count, RegSet saved_regs);
  
    virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
--- 67,12 ---
  
  public:
  
    virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_instruction_and_data_patch; }
  
!   void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
!                    Assembler::Aqrl acquire, Assembler::Aqrl release, bool is_cae, Register result);
  
    virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
                                    Register src, Register dst, Register count, RegSet saved_regs);
  
    virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,

*** 83,13 ***
    virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
  
    virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
                                               Register obj, Register tmp, Label& slowpath);
  #ifdef COMPILER2
    virtual void try_resolve_weak_handle_in_c2(MacroAssembler* masm, Register obj, Register tmp, Label& slow_path);
  #endif
-   void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
-                    Assembler::Aqrl acquire, Assembler::Aqrl release, bool is_cae, Register result);
  };
  
  #endif // CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
--- 83,29 ---
    virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
  
    virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
                                               Register obj, Register tmp, Label& slowpath);
+ 
+ #ifdef COMPILER1
+   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
+   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
+   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
+   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
+ #endif
+ 
  #ifdef COMPILER2
+   // Entry points from Matcher
+   void store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow, Register src,
+       bool src_narrow, Register tmp);
+   void compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr, Register oldval,
+       Register newval, Register tmp, bool exchange, bool maybe_null, bool narrow, bool weak);
+   void get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval, Register newval,
+       Register addr, Register tmp);
+   void load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address addr);
+   void gc_state_check_c2(MacroAssembler* masm, Register rscratch, const unsigned char test_state, BarrierStubC2* slow_stub);
+   void card_barrier_c2(const MachNode* node, MacroAssembler* masm, Address addr);
    virtual void try_resolve_weak_handle_in_c2(MacroAssembler* masm, Register obj, Register tmp, Label& slow_path);
  #endif
  };
  
  #endif // CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP