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src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.hpp

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 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #ifndef CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
 28 #define CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
 29 
 30 #include "asm/macroAssembler.hpp"
 31 #include "gc/shared/barrierSetAssembler.hpp"
 32 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
 33 
 34 #ifdef COMPILER1
 35 class LIR_Assembler;
 36 class ShenandoahPreBarrierStub;
 37 class ShenandoahLoadReferenceBarrierStub;
 38 class StubAssembler;
 39 #endif



 40 class StubCodeGenerator;
 41 
 42 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {

 43 private:
 44 
 45   void satb_barrier(MacroAssembler* masm,
 46                     Register obj,
 47                     Register pre_val,
 48                     Register thread,
 49                     Register tmp1,
 50                     Register tmp2,
 51                     bool tosca_live,
 52                     bool expand_call);
 53 
 54   void card_barrier(MacroAssembler* masm, Register obj);
 55 
 56   void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
 57   void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
 58   void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators);
 59 
 60   void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
 61                                         Register start, Register count,
 62                                         Register tmp);
 63 
 64 public:
 65 
 66   virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_instruction_and_data_patch; }
 67 
 68 #ifdef COMPILER1
 69   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
 70   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
 71   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
 72   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
 73 #endif
 74 
 75   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
 76                                   Register src, Register dst, Register count, RegSet saved_regs);
 77 
 78   virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
 79                                   Register start, Register count, Register tmp);
 80 
 81   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 82                        Register dst, Address src, Register tmp1, Register tmp2);
 83   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 84                         Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
 85 
 86   virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 87                                              Register obj, Register tmp, Label& slowpath);








 88 #ifdef COMPILER2










 89   virtual void try_resolve_weak_handle_in_c2(MacroAssembler* masm, Register obj, Register tmp, Label& slow_path);
 90 #endif
 91   void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
 92                    Assembler::Aqrl acquire, Assembler::Aqrl release, bool is_cae, Register result);
 93 };
 94 
 95 #endif // CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP

 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #ifndef CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
 28 #define CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
 29 
 30 #include "asm/macroAssembler.hpp"
 31 #include "gc/shared/barrierSetAssembler.hpp"
 32 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
 33 
 34 #ifdef COMPILER1
 35 class LIR_Assembler;
 36 class ShenandoahPreBarrierStub;
 37 class ShenandoahLoadReferenceBarrierStub;
 38 class StubAssembler;
 39 #endif
 40 #ifdef COMPILER2
 41 class MachNode;
 42 #endif // COMPILER2
 43 class StubCodeGenerator;
 44 
 45 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
 46   friend class ShenandoahCASBarrierSlowStub;
 47 private:
 48 
 49   void satb_barrier(MacroAssembler* masm,
 50                     Register obj,
 51                     Register pre_val,
 52                     Register thread,
 53                     Register tmp1,
 54                     Register tmp2,
 55                     bool tosca_live,
 56                     bool expand_call);
 57 
 58   void card_barrier(MacroAssembler* masm, Register obj);
 59 
 60   void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
 61   void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
 62   void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators);
 63 
 64   void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
 65                                         Register start, Register count,
 66                                         Register tmp);
 67 
 68 public:
 69 
 70   virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_instruction_and_data_patch; }
 71 
 72   void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
 73                    Assembler::Aqrl acquire, Assembler::Aqrl release, bool is_cae, Register result);




 74 
 75   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
 76                                   Register src, Register dst, Register count, RegSet saved_regs);
 77 
 78   virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
 79                                   Register start, Register count, Register tmp);
 80 
 81   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 82                        Register dst, Address src, Register tmp1, Register tmp2);
 83   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 84                         Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
 85 
 86   virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 87                                              Register obj, Register tmp, Label& slowpath);
 88 
 89 #ifdef COMPILER1
 90   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
 91   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
 92   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
 93   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
 94 #endif
 95 
 96 #ifdef COMPILER2
 97   // Entry points from Matcher
 98   void store_c2(const MachNode* node, MacroAssembler* masm, Address dst, bool dst_narrow, Register src,
 99       bool src_narrow, Register tmp);
100   void compare_and_set_c2(const MachNode* node, MacroAssembler* masm, Register res, Register addr, Register oldval,
101       Register newval, Register tmp, bool exchange, bool maybe_null, bool narrow, bool weak);
102   void get_and_set_c2(const MachNode* node, MacroAssembler* masm, Register preval, Register newval,
103       Register addr, Register tmp);
104   void load_c2(const MachNode* node, MacroAssembler* masm, Register dst, Address addr);
105   void gc_state_check_c2(MacroAssembler* masm, Register rscratch, const unsigned char test_state, BarrierStubC2* slow_stub);
106   void card_barrier_c2(const MachNode* node, MacroAssembler* masm, Address addr);
107   virtual void try_resolve_weak_handle_in_c2(MacroAssembler* masm, Register obj, Register tmp, Label& slow_path);
108 #endif


109 };
110 
111 #endif // CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
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