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src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.hpp

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 19  *
 20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 21  * or visit www.oracle.com if you need additional information or have any
 22  * questions.
 23  *
 24  */
 25 
 26 #ifndef CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP
 27 #define CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP
 28 
 29 #include "asm/macroAssembler.hpp"
 30 #include "gc/shared/barrierSetAssembler.hpp"
 31 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
 32 
 33 #ifdef COMPILER1
 34 class LIR_Assembler;
 35 class ShenandoahPreBarrierStub;
 36 class ShenandoahLoadReferenceBarrierStub;
 37 class StubAssembler;
 38 #endif



 39 class StubCodeGenerator;
 40 
 41 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
 42 private:
 43 
 44   void satb_write_barrier_pre(MacroAssembler* masm,
 45                               Register obj,
 46                               Register pre_val,
 47                               Register tmp,
 48                               bool tosca_live,
 49                               bool expand_call);
 50 
 51   void shenandoah_write_barrier_pre(MacroAssembler* masm,
 52                                     Register obj,
 53                                     Register pre_val,
 54                                     Register tmp,
 55                                     bool tosca_live,
 56                                     bool expand_call);
 57 
 58   void store_check(MacroAssembler* masm, Register obj);
 59 
 60   void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
 61                                         Register addr, Register count,
 62                                         Register tmp);
 63 
 64 public:
 65 #ifdef COMPILER1
 66   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
 67   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
 68   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
 69   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
 70 #endif
 71 
 72   void load_reference_barrier(MacroAssembler* masm, Register dst, Address src, DecoratorSet decorators);
 73 
 74   void cmpxchg_oop(MacroAssembler* masm,
 75                    Register res, Address addr, Register oldval, Register newval,
 76                    bool exchange, Register tmp1, Register tmp2);










 77   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 78                                   Register src, Register dst, Register count);
 79   virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 80                                   Register src, Register dst, Register count);
 81   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 82                        Register dst, Address src, Register tmp1);
 83   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 84                         Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
 85   virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 86                                              Register obj, Register tmp, Label& slowpath);
 87 };
 88 
 89 #endif // CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP

 19  *
 20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 21  * or visit www.oracle.com if you need additional information or have any
 22  * questions.
 23  *
 24  */
 25 
 26 #ifndef CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP
 27 #define CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP
 28 
 29 #include "asm/macroAssembler.hpp"
 30 #include "gc/shared/barrierSetAssembler.hpp"
 31 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
 32 
 33 #ifdef COMPILER1
 34 class LIR_Assembler;
 35 class ShenandoahPreBarrierStub;
 36 class ShenandoahLoadReferenceBarrierStub;
 37 class StubAssembler;
 38 #endif
 39 #ifdef COMPILER2
 40 class MachNode;
 41 #endif
 42 class StubCodeGenerator;
 43 
 44 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
 45 private:
 46 
 47   void satb_write_barrier_pre(MacroAssembler* masm,
 48                               Register obj,
 49                               Register pre_val,
 50                               Register tmp,
 51                               bool tosca_live,
 52                               bool expand_call);
 53 
 54   void shenandoah_write_barrier_pre(MacroAssembler* masm,
 55                                     Register obj,
 56                                     Register pre_val,
 57                                     Register tmp,
 58                                     bool tosca_live,
 59                                     bool expand_call);
 60 
 61   void store_check(MacroAssembler* masm, Register obj);
 62 
 63   void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
 64                                         Register addr, Register count,
 65                                         Register tmp);
 66 
 67 public:
 68 #ifdef COMPILER1
 69   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
 70   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
 71   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
 72   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
 73 #endif
 74 
 75   void load_reference_barrier(MacroAssembler* masm, Register dst, Address src, DecoratorSet decorators);
 76 
 77   void cmpxchg_oop(MacroAssembler* masm,
 78                    Register res, Address addr, Register oldval, Register newval,
 79                    bool exchange, Register tmp1, Register tmp2);
 80 #ifdef COMPILER2
 81   void load_ref_barrier_c2(const MachNode* node, MacroAssembler* masm, Register obj, Register addr, Register tmp1, Register tmp2, Register tmp3, bool narrow);
 82   void satb_barrier_c2(const MachNode* node, MacroAssembler* masm,
 83                        Register addr, Register preval, Register tmp);
 84   void card_barrier_c2(const MachNode* node, MacroAssembler* masm,
 85                        Register addr, Register addr_tmp, Register tmp);
 86   void cmpxchg_oop_c2(const MachNode* node, MacroAssembler* masm,
 87                       Register res, Address addr, Register oldval, Register newval, Register tmp1, Register tmp2,
 88                       bool exchange);
 89 #endif
 90   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 91                                   Register src, Register dst, Register count);
 92   virtual void arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 93                                   Register src, Register dst, Register count);
 94   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 95                        Register dst, Address src, Register tmp1);
 96   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 97                         Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
 98   virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 99                                              Register obj, Register tmp, Label& slowpath);
100 };
101 
102 #endif // CPU_X86_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_X86_HPP
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