486   // informs GC to take appropriate compensating steps, upon a slow-path
487   // allocation, so as to make this card-mark elision safe.
488   // The post-barrier can also be removed if null is written. This case is
489   // handled by G1BarrierSetC2::expand_barriers, which runs at the end of C2's
490   // platform-independent optimizations to exploit stronger type information.
491   bool can_remove_post_barrier = use_ReduceInitialCardMarks() &&
492     ((access.base() == kit->just_allocated_object(ctl)) ||
493      g1_can_remove_post_barrier(kit, &kit->gvn(), ctl, adr));
494 
495   int barriers = 0;
496   if (!can_remove_pre_barrier) {
497     barriers |= G1C2BarrierPre;
498   }
499   if (!can_remove_post_barrier) {
500     barriers |= G1C2BarrierPost;
501   }
502 
503   return barriers;
504 }
505 
506 void G1BarrierSetC2::elide_dominated_barrier(MachNode* mach) const {
507   uint8_t barrier_data = mach->barrier_data();
508   barrier_data &= ~G1C2BarrierPre;
509   if (CardTableBarrierSetC2::use_ReduceInitialCardMarks()) {
510     barrier_data &= ~G1C2BarrierPost;
511     barrier_data &= ~G1C2BarrierPostNotNull;
512   }
513   mach->set_barrier_data(barrier_data);
514 }
515 
516 void G1BarrierSetC2::analyze_dominating_barriers() const {
517   ResourceMark rm;
518   PhaseCFG* const cfg = Compile::current()->cfg();
519 
520   // Find allocations and memory accesses (stores and atomic operations), and
521   // track them in lists.
522   Node_List accesses;
523   Node_List allocations;
524   for (uint i = 0; i < cfg->number_of_blocks(); ++i) {
525     const Block* const block = cfg->get_block(i);
526     for (uint j = 0; j < block->number_of_nodes(); ++j) {

486   // informs GC to take appropriate compensating steps, upon a slow-path
487   // allocation, so as to make this card-mark elision safe.
488   // The post-barrier can also be removed if null is written. This case is
489   // handled by G1BarrierSetC2::expand_barriers, which runs at the end of C2's
490   // platform-independent optimizations to exploit stronger type information.
491   bool can_remove_post_barrier = use_ReduceInitialCardMarks() &&
492     ((access.base() == kit->just_allocated_object(ctl)) ||
493      g1_can_remove_post_barrier(kit, &kit->gvn(), ctl, adr));
494 
495   int barriers = 0;
496   if (!can_remove_pre_barrier) {
497     barriers |= G1C2BarrierPre;
498   }
499   if (!can_remove_post_barrier) {
500     barriers |= G1C2BarrierPost;
501   }
502 
503   return barriers;
504 }
505 
506 void G1BarrierSetC2::elide_dominated_barrier(MachNode* mach, MachNode* dominator) const {
507   uint8_t barrier_data = mach->barrier_data();
508   barrier_data &= ~G1C2BarrierPre;
509   if (CardTableBarrierSetC2::use_ReduceInitialCardMarks()) {
510     barrier_data &= ~G1C2BarrierPost;
511     barrier_data &= ~G1C2BarrierPostNotNull;
512   }
513   mach->set_barrier_data(barrier_data);
514 }
515 
516 void G1BarrierSetC2::analyze_dominating_barriers() const {
517   ResourceMark rm;
518   PhaseCFG* const cfg = Compile::current()->cfg();
519 
520   // Find allocations and memory accesses (stores and atomic operations), and
521   // track them in lists.
522   Node_List accesses;
523   Node_List allocations;
524   for (uint i = 0; i < cfg->number_of_blocks(); ++i) {
525     const Block* const block = cfg->get_block(i);
526     for (uint j = 0; j < block->number_of_nodes(); ++j) {