1787   }
1788 
1789   // PhaseChaitin::fixup_spills will sometimes generate spill code
1790   // via the matcher.  By the time, nodes have been wired into the CFG,
1791   // and any further nodes generated by expand rules will be left hanging
1792   // in space, and will not get emitted as output code.  Catch this.
1793   // Also, catch any new register allocation constraints ("projections")
1794   // generated belatedly during spill code generation.
1795   if (_allocation_started) {
1796     guarantee(ex == mach, "no expand rules during spill generation");
1797     guarantee(number_of_projections_prior == number_of_projections(), "no allocation during spill generation");
1798   }
1799 
1800   if (leaf->is_Con() || leaf->is_DecodeNarrowPtr()) {
1801     // Record the con for sharing
1802     _shared_nodes.map(leaf->_idx, ex);
1803   }
1804 
1805   // Have mach nodes inherit GC barrier data
1806   mach->set_barrier_data(MemNode::barrier_data(leaf));


1807 
1808   return ex;
1809 }
1810 
1811 void Matcher::handle_precedence_edges(Node* n, MachNode *mach) {
1812   for (uint i = n->req(); i < n->len(); i++) {
1813     if (n->in(i) != nullptr) {
1814       mach->add_prec(n->in(i));
1815     }
1816   }
1817 }
1818 
1819 void Matcher::ReduceInst_Chain_Rule(State* s, int rule, Node* &mem, MachNode* mach) {
1820   // 'op' is what I am expecting to receive
1821   int op = _leftOp[rule];
1822   // Operand type to catch childs result
1823   // This is what my child will give me.
1824   unsigned int opnd_class_instance = s->rule(op);
1825   // Choose between operand class or not.
1826   // This is what I will receive.

1787   }
1788 
1789   // PhaseChaitin::fixup_spills will sometimes generate spill code
1790   // via the matcher.  By the time, nodes have been wired into the CFG,
1791   // and any further nodes generated by expand rules will be left hanging
1792   // in space, and will not get emitted as output code.  Catch this.
1793   // Also, catch any new register allocation constraints ("projections")
1794   // generated belatedly during spill code generation.
1795   if (_allocation_started) {
1796     guarantee(ex == mach, "no expand rules during spill generation");
1797     guarantee(number_of_projections_prior == number_of_projections(), "no allocation during spill generation");
1798   }
1799 
1800   if (leaf->is_Con() || leaf->is_DecodeNarrowPtr()) {
1801     // Record the con for sharing
1802     _shared_nodes.map(leaf->_idx, ex);
1803   }
1804 
1805   // Have mach nodes inherit GC barrier data
1806   mach->set_barrier_data(MemNode::barrier_data(leaf));
1807   mach->set_memory_order(MemNode::memory_order(leaf));
1808   mach->set_trailing_membar(leaf);
1809 
1810   return ex;
1811 }
1812 
1813 void Matcher::handle_precedence_edges(Node* n, MachNode *mach) {
1814   for (uint i = n->req(); i < n->len(); i++) {
1815     if (n->in(i) != nullptr) {
1816       mach->add_prec(n->in(i));
1817     }
1818   }
1819 }
1820 
1821 void Matcher::ReduceInst_Chain_Rule(State* s, int rule, Node* &mem, MachNode* mach) {
1822   // 'op' is what I am expecting to receive
1823   int op = _leftOp[rule];
1824   // Operand type to catch childs result
1825   // This is what my child will give me.
1826   unsigned int opnd_class_instance = s->rule(op);
1827   // Choose between operand class or not.
1828   // This is what I will receive.