1 /* 2 * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "gc/shenandoah/shenandoahBarrierSet.hpp" 27 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp" 28 #include "gc/shenandoah/shenandoahForwarding.hpp" 29 #include "gc/shenandoah/shenandoahHeap.inline.hpp" 30 #include "gc/shenandoah/shenandoahHeapRegion.hpp" 31 #include "gc/shenandoah/shenandoahRuntime.hpp" 32 #include "gc/shenandoah/shenandoahThreadLocalData.hpp" 33 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp" 34 #include "gc/shenandoah/mode/shenandoahMode.hpp" 35 #include "interpreter/interpreter.hpp" 36 #include "interpreter/interp_masm.hpp" 37 #include "runtime/sharedRuntime.hpp" 38 #include "runtime/thread.hpp" 39 #ifdef COMPILER1 40 #include "c1/c1_LIRAssembler.hpp" 41 #include "c1/c1_MacroAssembler.hpp" 42 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp" 43 #endif 44 45 #define __ masm-> 46 47 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, 48 Register src, Register dst, Register count, RegSet saved_regs) { 49 if (is_oop) { 50 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0; 51 if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahIUBarrier || ShenandoahLoadRefBarrier) { 52 53 Label done; 54 55 // Avoid calling runtime if count == 0 56 __ cbz(count, done); 57 58 // Is GC active? 59 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset())); 60 __ ldrb(rscratch1, gc_state); 61 if (ShenandoahSATBBarrier && dest_uninitialized) { 62 __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done); 63 } else { 64 __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::YOUNG_MARKING | ShenandoahHeap::OLD_MARKING); 65 __ tst(rscratch1, rscratch2); 66 __ br(Assembler::EQ, done); 67 } 68 69 __ push(saved_regs, sp); 70 if (UseCompressedOops) { 71 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop_entry), src, dst, count); 72 } else { 73 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop_entry), src, dst, count); 74 } 75 __ pop(saved_regs, sp); 76 __ bind(done); 77 } 78 } 79 } 80 81 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop, 82 Register start, Register count, Register tmp, RegSet saved_regs) { 83 if (is_oop) { 84 gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp, saved_regs); 85 } 86 } 87 88 void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm, 89 Register obj, 90 Register pre_val, 91 Register thread, 92 Register tmp, 93 bool tosca_live, 94 bool expand_call) { 95 if (ShenandoahSATBBarrier) { 96 satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call); 97 } 98 } 99 100 void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm, 101 Register obj, 102 Register pre_val, 103 Register thread, 104 Register tmp, 105 bool tosca_live, 106 bool expand_call) { 107 // If expand_call is true then we expand the call_VM_leaf macro 108 // directly to skip generating the check by 109 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp. 110 111 assert(thread == rthread, "must be"); 112 113 Label done; 114 Label runtime; 115 116 assert_different_registers(obj, pre_val, tmp, rscratch1); 117 assert(pre_val != noreg && tmp != noreg, "expecting a register"); 118 119 Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset())); 120 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset())); 121 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset())); 122 123 // Is marking active? 124 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) { 125 __ ldrw(tmp, in_progress); 126 } else { 127 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption"); 128 __ ldrb(tmp, in_progress); 129 } 130 __ cbzw(tmp, done); 131 132 // Do we need to load the previous value? 133 if (obj != noreg) { 134 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW); 135 } 136 137 // Is the previous value null? 138 __ cbz(pre_val, done); 139 140 // Can we store original value in the thread's buffer? 141 // Is index == 0? 142 // (The index field is typed as size_t.) 143 144 __ ldr(tmp, index); // tmp := *index_adr 145 __ cbz(tmp, runtime); // tmp == 0? 146 // If yes, goto runtime 147 148 __ sub(tmp, tmp, wordSize); // tmp := tmp - wordSize 149 __ str(tmp, index); // *index_adr := tmp 150 __ ldr(rscratch1, buffer); 151 __ add(tmp, tmp, rscratch1); // tmp := tmp + *buffer_adr 152 153 // Record the previous value 154 __ str(pre_val, Address(tmp, 0)); 155 __ b(done); 156 157 __ bind(runtime); 158 // save the live input values 159 RegSet saved = RegSet::of(pre_val); 160 if (tosca_live) saved += RegSet::of(r0); 161 if (obj != noreg) saved += RegSet::of(obj); 162 163 __ push(saved, sp); 164 165 // Calling the runtime using the regular call_VM_leaf mechanism generates 166 // code (generated by InterpreterMacroAssember::call_VM_leaf_base) 167 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == NULL. 168 // 169 // If we care generating the pre-barrier without a frame (e.g. in the 170 // intrinsified Reference.get() routine) then ebp might be pointing to 171 // the caller frame and so this check will most likely fail at runtime. 172 // 173 // Expanding the call directly bypasses the generation of the check. 174 // So when we do not have have a full interpreter frame on the stack 175 // expand_call should be passed true. 176 177 if (expand_call) { 178 assert(pre_val != c_rarg1, "smashed arg"); 179 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), pre_val, thread); 180 } else { 181 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), pre_val, thread); 182 } 183 184 __ pop(saved, sp); 185 186 __ bind(done); 187 } 188 189 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) { 190 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled"); 191 Label is_null; 192 __ cbz(dst, is_null); 193 resolve_forward_pointer_not_null(masm, dst, tmp); 194 __ bind(is_null); 195 } 196 197 // IMPORTANT: This must preserve all registers, even rscratch1 and rscratch2, except those explicitely 198 // passed in. 199 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) { 200 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled"); 201 // The below loads the mark word, checks if the lowest two bits are 202 // set, and if so, clear the lowest two bits and copy the result 203 // to dst. Otherwise it leaves dst alone. 204 // Implementing this is surprisingly awkward. I do it here by: 205 // - Inverting the mark word 206 // - Test lowest two bits == 0 207 // - If so, set the lowest two bits 208 // - Invert the result back, and copy to dst 209 210 bool borrow_reg = (tmp == noreg); 211 if (borrow_reg) { 212 // No free registers available. Make one useful. 213 tmp = rscratch1; 214 if (tmp == dst) { 215 tmp = rscratch2; 216 } 217 __ push(RegSet::of(tmp), sp); 218 } 219 220 assert_different_registers(tmp, dst); 221 222 Label done; 223 __ ldr(tmp, Address(dst, oopDesc::mark_offset_in_bytes())); 224 __ eon(tmp, tmp, zr); 225 __ ands(zr, tmp, markWord::lock_mask_in_place); 226 __ br(Assembler::NE, done); 227 __ orr(tmp, tmp, markWord::marked_value); 228 __ eon(dst, tmp, zr); 229 __ bind(done); 230 231 if (borrow_reg) { 232 __ pop(RegSet::of(tmp), sp); 233 } 234 } 235 236 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) { 237 assert(ShenandoahLoadRefBarrier, "Should be enabled"); 238 assert(dst != rscratch2, "need rscratch2"); 239 assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2); 240 241 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators); 242 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators); 243 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators); 244 bool is_native = ShenandoahBarrierSet::is_native_access(decorators); 245 bool is_narrow = UseCompressedOops && !is_native; 246 247 Label heap_stable, not_cset; 248 __ enter(); 249 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset())); 250 __ ldrb(rscratch2, gc_state); 251 252 // Check for heap stability 253 if (is_strong) { 254 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable); 255 } else { 256 Label lrb; 257 __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb); 258 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable); 259 __ bind(lrb); 260 } 261 262 // use r1 for load address 263 Register result_dst = dst; 264 if (dst == r1) { 265 __ mov(rscratch1, dst); 266 dst = rscratch1; 267 } 268 269 // Save r0 and r1, unless it is an output register 270 RegSet to_save = RegSet::of(r0, r1) - result_dst; 271 __ push(to_save, sp); 272 __ lea(r1, load_addr); 273 __ mov(r0, dst); 274 275 // Test for in-cset 276 if (is_strong) { 277 __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr()); 278 __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint()); 279 __ ldrb(rscratch2, Address(rscratch2, rscratch1)); 280 __ tbz(rscratch2, 0, not_cset); 281 } 282 283 __ push_call_clobbered_registers(); 284 if (is_strong) { 285 if (is_narrow) { 286 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow)); 287 } else { 288 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong)); 289 } 290 } else if (is_weak) { 291 if (is_narrow) { 292 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow)); 293 } else { 294 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak)); 295 } 296 } else { 297 assert(is_phantom, "only remaining strength"); 298 assert(!is_narrow, "phantom access cannot be narrow"); 299 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom)); 300 } 301 __ blr(lr); 302 __ mov(rscratch1, r0); 303 __ pop_call_clobbered_registers(); 304 __ mov(r0, rscratch1); 305 306 __ bind(not_cset); 307 308 __ mov(result_dst, r0); 309 __ pop(to_save, sp); 310 311 __ bind(heap_stable); 312 __ leave(); 313 } 314 315 void ShenandoahBarrierSetAssembler::iu_barrier(MacroAssembler* masm, Register dst, Register tmp) { 316 if (ShenandoahIUBarrier) { 317 __ push_call_clobbered_registers(); 318 satb_write_barrier_pre(masm, noreg, dst, rthread, tmp, true, false); 319 __ pop_call_clobbered_registers(); 320 } 321 } 322 323 // 324 // Arguments: 325 // 326 // Inputs: 327 // src: oop location to load from, might be clobbered 328 // 329 // Output: 330 // dst: oop loaded from src location 331 // 332 // Kill: 333 // rscratch1 (scratch reg) 334 // 335 // Alias: 336 // dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src) 337 // 338 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, 339 Register dst, Address src, Register tmp1, Register tmp_thread) { 340 // 1: non-reference load, no additional barrier is needed 341 if (!is_reference_type(type)) { 342 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread); 343 return; 344 } 345 346 // 2: load a reference from src location and apply LRB if needed 347 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) { 348 Register result_dst = dst; 349 350 // Preserve src location for LRB 351 if (dst == src.base() || dst == src.index()) { 352 dst = rscratch1; 353 } 354 assert_different_registers(dst, src.base(), src.index()); 355 356 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread); 357 358 load_reference_barrier(masm, dst, src, decorators); 359 360 if (dst != result_dst) { 361 __ mov(result_dst, dst); 362 dst = result_dst; 363 } 364 } else { 365 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread); 366 } 367 368 // 3: apply keep-alive barrier if needed 369 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) { 370 __ enter(); 371 __ push_call_clobbered_registers(); 372 satb_write_barrier_pre(masm /* masm */, 373 noreg /* obj */, 374 dst /* pre_val */, 375 rthread /* thread */, 376 tmp1 /* tmp */, 377 true /* tosca_live */, 378 true /* expand_call */); 379 __ pop_call_clobbered_registers(); 380 __ leave(); 381 } 382 } 383 384 void ShenandoahBarrierSetAssembler::store_check(MacroAssembler* masm, Register obj) { 385 if (!ShenandoahHeap::heap()->mode()->is_generational()) { 386 return; 387 } 388 389 ShenandoahBarrierSet* ctbs = ShenandoahBarrierSet::barrier_set(); 390 CardTable* ct = ctbs->card_table(); 391 392 __ lsr(obj, obj, CardTable::card_shift()); 393 394 assert(CardTable::dirty_card_val() == 0, "must be"); 395 396 __ load_byte_map_base(rscratch1); 397 398 if (UseCondCardMark) { 399 Label L_already_dirty; 400 __ ldrb(rscratch2, Address(obj, rscratch1)); 401 __ cbz(rscratch2, L_already_dirty); 402 __ strb(zr, Address(obj, rscratch1)); 403 __ bind(L_already_dirty); 404 } else { 405 __ strb(zr, Address(obj, rscratch1)); 406 } 407 } 408 409 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type, 410 Address dst, Register val, Register tmp1, Register tmp2) { 411 bool on_oop = is_reference_type(type); 412 if (!on_oop) { 413 BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2); 414 return; 415 } 416 417 // flatten object address if needed 418 if (dst.index() == noreg && dst.offset() == 0) { 419 if (dst.base() != r3) { 420 __ mov(r3, dst.base()); 421 } 422 } else { 423 __ lea(r3, dst); 424 } 425 426 shenandoah_write_barrier_pre(masm, 427 r3 /* obj */, 428 tmp2 /* pre_val */, 429 rthread /* thread */, 430 tmp1 /* tmp */, 431 val != noreg /* tosca_live */, 432 false /* expand_call */); 433 434 if (val == noreg) { 435 BarrierSetAssembler::store_at(masm, decorators, type, Address(r3, 0), noreg, noreg, noreg); 436 } else { 437 iu_barrier(masm, val, tmp1); 438 // G1 barrier needs uncompressed oop for region cross check. 439 Register new_val = val; 440 if (UseCompressedOops) { 441 new_val = rscratch2; 442 __ mov(new_val, val); 443 } 444 BarrierSetAssembler::store_at(masm, decorators, type, Address(r3, 0), val, noreg, noreg); 445 store_check(masm, r3); 446 } 447 448 } 449 450 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env, 451 Register obj, Register tmp, Label& slowpath) { 452 Label done; 453 // Resolve jobject 454 BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath); 455 456 // Check for null. 457 __ cbz(obj, done); 458 459 assert(obj != rscratch2, "need rscratch2"); 460 Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset()); 461 __ lea(rscratch2, gc_state); 462 __ ldrb(rscratch2, Address(rscratch2)); 463 464 // Check for heap in evacuation phase 465 __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath); 466 467 __ bind(done); 468 } 469 470 // Special Shenandoah CAS implementation that handles false negatives due 471 // to concurrent evacuation. The service is more complex than a 472 // traditional CAS operation because the CAS operation is intended to 473 // succeed if the reference at addr exactly matches expected or if the 474 // reference at addr holds a pointer to a from-space object that has 475 // been relocated to the location named by expected. There are two 476 // races that must be addressed: 477 // a) A parallel thread may mutate the contents of addr so that it points 478 // to a different object. In this case, the CAS operation should fail. 479 // b) A parallel thread may heal the contents of addr, replacing a 480 // from-space pointer held in addr with the to-space pointer 481 // representing the new location of the object. 482 // Upon entry to cmpxchg_oop, it is assured that new_val equals NULL 483 // or it refers to an object that is not being evacuated out of 484 // from-space, or it refers to the to-space version of an object that 485 // is being evacuated out of from-space. 486 // 487 // By default the value held in the result register following execution 488 // of the generated code sequence is 0 to indicate failure of CAS, 489 // non-zero to indicate success. If is_cae, the result is the value most 490 // recently fetched from addr rather than a boolean success indicator. 491 // 492 // Clobbers rscratch1, rscratch2 493 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm, 494 Register addr, 495 Register expected, 496 Register new_val, 497 bool acquire, bool release, 498 bool is_cae, 499 Register result) { 500 Register tmp1 = rscratch1; 501 Register tmp2 = rscratch2; 502 bool is_narrow = UseCompressedOops; 503 Assembler::operand_size size = is_narrow ? Assembler::word : Assembler::xword; 504 505 assert_different_registers(addr, expected, tmp1, tmp2); 506 assert_different_registers(addr, new_val, tmp1, tmp2); 507 508 Label step4, done; 509 510 // There are two ways to reach this label. Initial entry into the 511 // cmpxchg_oop code expansion starts at step1 (which is equivalent 512 // to label step4). Additionally, in the rare case that four steps 513 // are required to perform the requested operation, the fourth step 514 // is the same as the first. On a second pass through step 1, 515 // control may flow through step 2 on its way to failure. It will 516 // not flow from step 2 to step 3 since we are assured that the 517 // memory at addr no longer holds a from-space pointer. 518 // 519 // The comments that immediately follow the step4 label apply only 520 // to the case in which control reaches this label by branch from 521 // step 3. 522 523 __ bind (step4); 524 525 // Step 4. CAS has failed because the value most recently fetched 526 // from addr is no longer the from-space pointer held in tmp2. If a 527 // different thread replaced the in-memory value with its equivalent 528 // to-space pointer, then CAS may still be able to succeed. The 529 // value held in the expected register has not changed. 530 // 531 // It is extremely rare we reach this point. For this reason, the 532 // implementation opts for smaller rather than potentially faster 533 // code. Ultimately, smaller code for this rare case most likely 534 // delivers higher overall throughput by enabling improved icache 535 // performance. 536 537 // Step 1. Fast-path. 538 // 539 // Try to CAS with given arguments. If successful, then we are done. 540 // 541 // No label required for step 1. 542 543 __ cmpxchg(addr, expected, new_val, size, acquire, release, false, tmp2); 544 // EQ flag set iff success. tmp2 holds value fetched. 545 546 // If expected equals null but tmp2 does not equal null, the 547 // following branches to done to report failure of CAS. If both 548 // expected and tmp2 equal null, the following branches to done to 549 // report success of CAS. There's no need for a special test of 550 // expected equal to null. 551 552 __ br(Assembler::EQ, done); 553 // if CAS failed, fall through to step 2 554 555 // Step 2. CAS has failed because the value held at addr does not 556 // match expected. This may be a false negative because the value fetched 557 // from addr (now held in tmp2) may be a from-space pointer to the 558 // original copy of same object referenced by to-space pointer expected. 559 // 560 // To resolve this, it suffices to find the forward pointer associated 561 // with fetched value. If this matches expected, retry CAS with new 562 // parameters. If this mismatches, then we have a legitimate 563 // failure, and we're done. 564 // 565 // No need for step2 label. 566 567 // overwrite tmp1 with from-space pointer fetched from memory 568 __ mov(tmp1, tmp2); 569 570 if (is_narrow) { 571 // Decode tmp1 in order to resolve its forward pointer 572 __ decode_heap_oop(tmp1, tmp1); 573 } 574 resolve_forward_pointer(masm, tmp1); 575 // Encode tmp1 to compare against expected. 576 __ encode_heap_oop(tmp1, tmp1); 577 578 // Does forwarded value of fetched from-space pointer match original 579 // value of expected? If tmp1 holds null, this comparison will fail 580 // because we know from step1 that expected is not null. There is 581 // no need for a separate test for tmp1 (the value originally held 582 // in memory) equal to null. 583 __ cmp(tmp1, expected); 584 585 // If not, then the failure was legitimate and we're done. 586 // Branching to done with NE condition denotes failure. 587 __ br(Assembler::NE, done); 588 589 // Fall through to step 3. No need for step3 label. 590 591 // Step 3. We've confirmed that the value originally held in memory 592 // (now held in tmp2) pointed to from-space version of original 593 // expected value. Try the CAS again with the from-space expected 594 // value. If it now succeeds, we're good. 595 // 596 // Note: tmp2 holds encoded from-space pointer that matches to-space 597 // object residing at expected. tmp2 is the new "expected". 598 599 // Note that macro implementation of __cmpxchg cannot use same register 600 // tmp2 for result and expected since it overwrites result before it 601 // compares result with expected. 602 __ cmpxchg(addr, tmp2, new_val, size, acquire, release, false, noreg); 603 // EQ flag set iff success. tmp2 holds value fetched, tmp1 (rscratch1) clobbered. 604 605 // If fetched value did not equal the new expected, this could 606 // still be a false negative because some other thread may have 607 // newly overwritten the memory value with its to-space equivalent. 608 __ br(Assembler::NE, step4); 609 610 if (is_cae) { 611 // We're falling through to done to indicate success. Success 612 // with is_cae is denoted by returning the value of expected as 613 // result. 614 __ mov(tmp2, expected); 615 } 616 617 __ bind(done); 618 // At entry to done, the Z (EQ) flag is on iff if the CAS 619 // operation was successful. Additionally, if is_cae, tmp2 holds 620 // the value most recently fetched from addr. In this case, success 621 // is denoted by tmp2 matching expected. 622 623 if (is_cae) { 624 __ mov(result, tmp2); 625 } else { 626 __ cset(result, Assembler::EQ); 627 } 628 } 629 630 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators, 631 Register start, Register count, Register scratch, RegSet saved_regs) { 632 if (!ShenandoahHeap::heap()->mode()->is_generational()) { 633 return; 634 } 635 636 ShenandoahBarrierSet* bs = ShenandoahBarrierSet::barrier_set(); 637 CardTable* ct = bs->card_table(); 638 639 Label L_loop, L_done; 640 const Register end = count; 641 642 __ cbz(count, L_done); // zero count - nothing to do 643 644 __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop))); // end = start + count << LogBytesPerHeapOop 645 __ sub(end, end, BytesPerHeapOop); // last element address to make inclusive 646 __ lsr(start, start, CardTable::card_shift()); 647 __ lsr(end, end, CardTable::card_shift()); 648 __ sub(count, end, start); // number of bytes to copy 649 650 __ load_byte_map_base(scratch); 651 __ add(start, start, scratch); 652 __ bind(L_loop); 653 __ strb(zr, Address(start, count)); 654 __ subs(count, count, 1); 655 __ br(Assembler::GE, L_loop); 656 __ bind(L_done); 657 } 658 659 #undef __ 660 661 #ifdef COMPILER1 662 663 #define __ ce->masm()-> 664 665 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) { 666 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1(); 667 // At this point we know that marking is in progress. 668 // If do_load() is true then we have to emit the 669 // load of the previous value; otherwise it has already 670 // been loaded into _pre_val. 671 672 __ bind(*stub->entry()); 673 674 assert(stub->pre_val()->is_register(), "Precondition."); 675 676 Register pre_val_reg = stub->pre_val()->as_register(); 677 678 if (stub->do_load()) { 679 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/); 680 } 681 __ cbz(pre_val_reg, *stub->continuation()); 682 ce->store_parameter(stub->pre_val()->as_register(), 0); 683 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin())); 684 __ b(*stub->continuation()); 685 } 686 687 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) { 688 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1(); 689 __ bind(*stub->entry()); 690 691 DecoratorSet decorators = stub->decorators(); 692 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators); 693 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators); 694 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators); 695 bool is_native = ShenandoahBarrierSet::is_native_access(decorators); 696 697 Register obj = stub->obj()->as_register(); 698 Register res = stub->result()->as_register(); 699 Register addr = stub->addr()->as_pointer_register(); 700 Register tmp1 = stub->tmp1()->as_register(); 701 Register tmp2 = stub->tmp2()->as_register(); 702 703 assert(res == r0, "result must arrive in r0"); 704 705 if (res != obj) { 706 __ mov(res, obj); 707 } 708 709 if (is_strong) { 710 // Check for object in cset. 711 __ mov(tmp2, ShenandoahHeap::in_cset_fast_test_addr()); 712 __ lsr(tmp1, res, ShenandoahHeapRegion::region_size_bytes_shift_jint()); 713 __ ldrb(tmp2, Address(tmp2, tmp1)); 714 __ cbz(tmp2, *stub->continuation()); 715 } 716 717 ce->store_parameter(res, 0); 718 ce->store_parameter(addr, 1); 719 if (is_strong) { 720 if (is_native) { 721 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_native_rt_code_blob()->code_begin())); 722 } else { 723 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_rt_code_blob()->code_begin())); 724 } 725 } else if (is_weak) { 726 __ far_call(RuntimeAddress(bs->load_reference_barrier_weak_rt_code_blob()->code_begin())); 727 } else { 728 assert(is_phantom, "only remaining strength"); 729 __ far_call(RuntimeAddress(bs->load_reference_barrier_phantom_rt_code_blob()->code_begin())); 730 } 731 732 __ b(*stub->continuation()); 733 } 734 735 #undef __ 736 737 #define __ sasm-> 738 739 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) { 740 __ prologue("shenandoah_pre_barrier", false); 741 742 // arg0 : previous value of memory 743 744 BarrierSet* bs = BarrierSet::barrier_set(); 745 746 const Register pre_val = r0; 747 const Register thread = rthread; 748 const Register tmp = rscratch1; 749 750 Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset())); 751 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset())); 752 753 Label done; 754 Label runtime; 755 756 // Is marking still active? 757 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset())); 758 __ ldrb(tmp, gc_state); 759 if (!ShenandoahHeap::heap()->mode()->is_generational()) { 760 __ tbz(tmp, ShenandoahHeap::YOUNG_MARKING_BITPOS, done); 761 } else { 762 __ mov(rscratch2, ShenandoahHeap::YOUNG_MARKING | ShenandoahHeap::OLD_MARKING); 763 __ tst(tmp, rscratch2); 764 __ br(Assembler::EQ, done); 765 } 766 767 // Can we store original value in the thread's buffer? 768 __ ldr(tmp, queue_index); 769 __ cbz(tmp, runtime); 770 771 __ sub(tmp, tmp, wordSize); 772 __ str(tmp, queue_index); 773 __ ldr(rscratch2, buffer); 774 __ add(tmp, tmp, rscratch2); 775 __ load_parameter(0, rscratch2); 776 __ str(rscratch2, Address(tmp, 0)); 777 __ b(done); 778 779 __ bind(runtime); 780 __ push_call_clobbered_registers(); 781 __ load_parameter(0, pre_val); 782 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), pre_val, thread); 783 __ pop_call_clobbered_registers(); 784 __ bind(done); 785 786 __ epilogue(); 787 } 788 789 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) { 790 __ prologue("shenandoah_load_reference_barrier", false); 791 // arg0 : object to be resolved 792 793 __ push_call_clobbered_registers(); 794 __ load_parameter(0, r0); 795 __ load_parameter(1, r1); 796 797 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators); 798 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators); 799 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators); 800 bool is_native = ShenandoahBarrierSet::is_native_access(decorators); 801 if (is_strong) { 802 if (is_native) { 803 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong)); 804 } else { 805 if (UseCompressedOops) { 806 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow)); 807 } else { 808 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong)); 809 } 810 } 811 } else if (is_weak) { 812 assert(!is_native, "weak must not be called off-heap"); 813 if (UseCompressedOops) { 814 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow)); 815 } else { 816 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak)); 817 } 818 } else { 819 assert(is_phantom, "only remaining strength"); 820 assert(is_native, "phantom must only be called off-heap"); 821 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom)); 822 } 823 __ blr(lr); 824 __ mov(rscratch1, r0); 825 __ pop_call_clobbered_registers(); 826 __ mov(r0, rscratch1); 827 828 __ epilogue(); 829 } 830 831 #undef __ 832 833 #endif // COMPILER1