1 /*
2 * Copyright (c) 2018, 2022, Red Hat, Inc. All rights reserved.
3 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
28 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
29 #include "gc/shenandoah/shenandoahForwarding.hpp"
30 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
31 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
32 #include "gc/shenandoah/shenandoahRuntime.hpp"
33 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
34 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
35 #include "gc/shenandoah/mode/shenandoahMode.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "interpreter/interp_masm.hpp"
38 #include "runtime/javaThread.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #ifdef COMPILER1
41 #include "c1/c1_LIRAssembler.hpp"
42 #include "c1/c1_MacroAssembler.hpp"
43 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
44 #endif
45
46 #define __ masm->
47
48 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
49 Register src, Register dst, Register count, RegSet saved_regs) {
50 if (is_oop) {
51 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
52 if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahIUBarrier || ShenandoahLoadRefBarrier) {
53
54 Label done;
55
56 // Avoid calling runtime if count == 0
57 __ cbz(count, done);
58
59 // Is GC active?
60 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
61 __ ldrb(rscratch1, gc_state);
62 if (ShenandoahSATBBarrier && dest_uninitialized) {
63 __ tbz(rscratch1, ShenandoahHeap::HAS_FORWARDED_BITPOS, done);
64 } else {
65 __ mov(rscratch2, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING);
66 __ tst(rscratch1, rscratch2);
67 __ br(Assembler::EQ, done);
68 }
69
70 __ push(saved_regs, sp);
71 if (UseCompressedOops) {
72 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop_entry), src, dst, count);
73 } else {
74 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop_entry), src, dst, count);
75 }
76 __ pop(saved_regs, sp);
77 __ bind(done);
78 }
79 }
80 }
81
82 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
83 Register start, Register count, Register tmp, RegSet saved_regs) {
84 if (ShenandoahCardBarrier && is_oop) {
85 gen_write_ref_array_post_barrier(masm, decorators, start, count, tmp, saved_regs);
86 }
87 }
88
89 void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,
90 Register obj,
91 Register pre_val,
92 Register thread,
93 Register tmp,
94 bool tosca_live,
95 bool expand_call) {
96 if (ShenandoahSATBBarrier) {
97 satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, rscratch1, tosca_live, expand_call);
98 }
99 }
100
101 void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
102 Register obj,
103 Register pre_val,
104 Register thread,
105 Register tmp1,
106 Register tmp2,
107 bool tosca_live,
108 bool expand_call) {
109 // If expand_call is true then we expand the call_VM_leaf macro
110 // directly to skip generating the check by
111 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
112
113 assert(thread == rthread, "must be");
114
115 Label done;
116 Label runtime;
117
118 assert_different_registers(obj, pre_val, tmp1, tmp2);
119 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
120
121 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
122 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
123
124 // Is marking active?
125 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
126 __ ldrb(tmp1, gc_state);
127 __ tbz(tmp1, ShenandoahHeap::MARKING_BITPOS, done);
128
129 // Do we need to load the previous value?
130 if (obj != noreg) {
131 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
132 }
133
134 // Is the previous value null?
135 __ cbz(pre_val, done);
136
137 // Can we store original value in the thread's buffer?
138 // Is index == 0?
139 // (The index field is typed as size_t.)
140
141 __ ldr(tmp1, index); // tmp := *index_adr
142 __ cbz(tmp1, runtime); // tmp == 0?
143 // If yes, goto runtime
144
145 __ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
146 __ str(tmp1, index); // *index_adr := tmp
147 __ ldr(tmp2, buffer);
148 __ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
149
150 // Record the previous value
151 __ str(pre_val, Address(tmp1, 0));
152 __ b(done);
153
154 __ bind(runtime);
155 // save the live input values
156 RegSet saved = RegSet::of(pre_val);
157 if (tosca_live) saved += RegSet::of(r0);
158 if (obj != noreg) saved += RegSet::of(obj);
159
160 __ push(saved, sp);
161
162 // Calling the runtime using the regular call_VM_leaf mechanism generates
163 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
164 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
165 //
166 // If we care generating the pre-barrier without a frame (e.g. in the
167 // intrinsified Reference.get() routine) then rfp might be pointing to
168 // the caller frame and so this check will most likely fail at runtime.
169 //
170 // Expanding the call directly bypasses the generation of the check.
171 // So when we do not have have a full interpreter frame on the stack
172 // expand_call should be passed true.
173
174 if (expand_call) {
175 assert(pre_val != c_rarg1, "smashed arg");
176 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), pre_val, thread);
177 } else {
178 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), pre_val, thread);
179 }
180
181 __ pop(saved, sp);
182
183 __ bind(done);
184 }
185
186 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) {
187 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
188 Label is_null;
189 __ cbz(dst, is_null);
190 resolve_forward_pointer_not_null(masm, dst, tmp);
191 __ bind(is_null);
192 }
193
194 // IMPORTANT: This must preserve all registers, even rscratch1 and rscratch2, except those explicitly
195 // passed in.
196 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) {
197 assert(ShenandoahLoadRefBarrier || ShenandoahCASBarrier, "Should be enabled");
198 // The below loads the mark word, checks if the lowest two bits are
199 // set, and if so, clear the lowest two bits and copy the result
200 // to dst. Otherwise it leaves dst alone.
201 // Implementing this is surprisingly awkward. I do it here by:
202 // - Inverting the mark word
203 // - Test lowest two bits == 0
204 // - If so, set the lowest two bits
205 // - Invert the result back, and copy to dst
206
207 bool borrow_reg = (tmp == noreg);
208 if (borrow_reg) {
209 // No free registers available. Make one useful.
210 tmp = rscratch1;
211 if (tmp == dst) {
212 tmp = rscratch2;
213 }
214 __ push(RegSet::of(tmp), sp);
215 }
216
217 assert_different_registers(tmp, dst);
218
219 Label done;
220 __ ldr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
221 __ eon(tmp, tmp, zr);
222 __ ands(zr, tmp, markWord::lock_mask_in_place);
223 __ br(Assembler::NE, done);
224 __ orr(tmp, tmp, markWord::marked_value);
225 __ eon(dst, tmp, zr);
226 __ bind(done);
227
228 if (borrow_reg) {
229 __ pop(RegSet::of(tmp), sp);
230 }
231 }
232
233 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators) {
234 assert(ShenandoahLoadRefBarrier, "Should be enabled");
235 assert(dst != rscratch2, "need rscratch2");
236 assert_different_registers(load_addr.base(), load_addr.index(), rscratch1, rscratch2);
237
238 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
239 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
240 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
241 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
242 bool is_narrow = UseCompressedOops && !is_native;
243
244 Label heap_stable, not_cset;
245 __ enter(/*strip_ret_addr*/true);
246 Address gc_state(rthread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
247 __ ldrb(rscratch2, gc_state);
248
249 // Check for heap stability
250 if (is_strong) {
251 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
252 } else {
253 Label lrb;
254 __ tbnz(rscratch2, ShenandoahHeap::WEAK_ROOTS_BITPOS, lrb);
255 __ tbz(rscratch2, ShenandoahHeap::HAS_FORWARDED_BITPOS, heap_stable);
256 __ bind(lrb);
257 }
258
259 // use r1 for load address
260 Register result_dst = dst;
261 if (dst == r1) {
262 __ mov(rscratch1, dst);
263 dst = rscratch1;
264 }
265
266 // Save r0 and r1, unless it is an output register
267 RegSet to_save = RegSet::of(r0, r1) - result_dst;
268 __ push(to_save, sp);
269 __ lea(r1, load_addr);
270 __ mov(r0, dst);
271
272 // Test for in-cset
273 if (is_strong) {
274 __ mov(rscratch2, ShenandoahHeap::in_cset_fast_test_addr());
275 __ lsr(rscratch1, r0, ShenandoahHeapRegion::region_size_bytes_shift_jint());
276 __ ldrb(rscratch2, Address(rscratch2, rscratch1));
277 __ tbz(rscratch2, 0, not_cset);
278 }
279
280 __ push_call_clobbered_registers();
281 if (is_strong) {
282 if (is_narrow) {
283 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
284 } else {
285 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
286 }
287 } else if (is_weak) {
288 if (is_narrow) {
289 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
290 } else {
291 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
292 }
293 } else {
294 assert(is_phantom, "only remaining strength");
295 assert(!is_narrow, "phantom access cannot be narrow");
296 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom));
297 }
298 __ blr(lr);
299 __ mov(rscratch1, r0);
300 __ pop_call_clobbered_registers();
301 __ mov(r0, rscratch1);
302
303 __ bind(not_cset);
304
305 __ mov(result_dst, r0);
306 __ pop(to_save, sp);
307
308 __ bind(heap_stable);
309 __ leave();
310 }
311
312 void ShenandoahBarrierSetAssembler::iu_barrier(MacroAssembler* masm, Register dst, Register tmp) {
313 if (ShenandoahIUBarrier) {
314 __ push_call_clobbered_registers();
315 satb_write_barrier_pre(masm, noreg, dst, rthread, tmp, rscratch1, true, false);
316 __ pop_call_clobbered_registers();
317 }
318 }
319
320 //
321 // Arguments:
322 //
323 // Inputs:
324 // src: oop location to load from, might be clobbered
325 //
326 // Output:
327 // dst: oop loaded from src location
328 //
329 // Kill:
330 // rscratch1 (scratch reg)
331 //
332 // Alias:
333 // dst: rscratch1 (might use rscratch1 as temporary output register to avoid clobbering src)
334 //
335 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
336 Register dst, Address src, Register tmp1, Register tmp2) {
337 // 1: non-reference load, no additional barrier is needed
338 if (!is_reference_type(type)) {
339 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
340 return;
341 }
342
343 // 2: load a reference from src location and apply LRB if needed
344 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
345 Register result_dst = dst;
346
347 // Preserve src location for LRB
348 if (dst == src.base() || dst == src.index()) {
349 dst = rscratch1;
350 }
351 assert_different_registers(dst, src.base(), src.index());
352
353 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
354
355 load_reference_barrier(masm, dst, src, decorators);
356
357 if (dst != result_dst) {
358 __ mov(result_dst, dst);
359 dst = result_dst;
360 }
361 } else {
362 BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
363 }
364
365 // 3: apply keep-alive barrier if needed
366 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
367 __ enter(/*strip_ret_addr*/true);
368 __ push_call_clobbered_registers();
369 satb_write_barrier_pre(masm /* masm */,
370 noreg /* obj */,
371 dst /* pre_val */,
372 rthread /* thread */,
373 tmp1 /* tmp1 */,
374 tmp2 /* tmp2 */,
375 true /* tosca_live */,
376 true /* expand_call */);
377 __ pop_call_clobbered_registers();
378 __ leave();
379 }
380 }
381
382 void ShenandoahBarrierSetAssembler::store_check(MacroAssembler* masm, Register obj) {
383 assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");
384
385 __ lsr(obj, obj, CardTable::card_shift());
386
387 assert(CardTable::dirty_card_val() == 0, "must be");
388
389 __ load_byte_map_base(rscratch1);
390
391 if (UseCondCardMark) {
392 Label L_already_dirty;
393 __ ldrb(rscratch2, Address(obj, rscratch1));
394 __ cbz(rscratch2, L_already_dirty);
395 __ strb(zr, Address(obj, rscratch1));
396 __ bind(L_already_dirty);
397 } else {
398 __ strb(zr, Address(obj, rscratch1));
399 }
400 }
401
402 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
403 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
404 bool on_oop = is_reference_type(type);
405 if (!on_oop) {
406 BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
407 return;
408 }
409
410 // flatten object address if needed
411 if (dst.index() == noreg && dst.offset() == 0) {
412 if (dst.base() != tmp3) {
413 __ mov(tmp3, dst.base());
414 }
415 } else {
416 __ lea(tmp3, dst);
417 }
418
419 shenandoah_write_barrier_pre(masm,
420 tmp3 /* obj */,
421 tmp2 /* pre_val */,
422 rthread /* thread */,
423 tmp1 /* tmp */,
424 val != noreg /* tosca_live */,
425 false /* expand_call */);
426
427 if (val == noreg) {
428 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
429 } else {
430 iu_barrier(masm, val, tmp1);
431 // G1 barrier needs uncompressed oop for region cross check.
432 Register new_val = val;
433 if (UseCompressedOops) {
434 new_val = rscratch2;
435 __ mov(new_val, val);
436 }
437 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
438 if (ShenandoahCardBarrier) {
439 store_check(masm, r3);
440 }
441 }
442
443 }
444
445 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
446 Register obj, Register tmp, Label& slowpath) {
447 Label done;
448 // Resolve jobject
449 BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
450
451 // Check for null.
452 __ cbz(obj, done);
453
454 assert(obj != rscratch2, "need rscratch2");
455 Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
456 __ lea(rscratch2, gc_state);
457 __ ldrb(rscratch2, Address(rscratch2));
458
459 // Check for heap in evacuation phase
460 __ tbnz(rscratch2, ShenandoahHeap::EVACUATION_BITPOS, slowpath);
461
462 __ bind(done);
463 }
464
465 // Special Shenandoah CAS implementation that handles false negatives due
466 // to concurrent evacuation. The service is more complex than a
467 // traditional CAS operation because the CAS operation is intended to
468 // succeed if the reference at addr exactly matches expected or if the
469 // reference at addr holds a pointer to a from-space object that has
470 // been relocated to the location named by expected. There are two
471 // races that must be addressed:
472 // a) A parallel thread may mutate the contents of addr so that it points
473 // to a different object. In this case, the CAS operation should fail.
474 // b) A parallel thread may heal the contents of addr, replacing a
475 // from-space pointer held in addr with the to-space pointer
476 // representing the new location of the object.
477 // Upon entry to cmpxchg_oop, it is assured that new_val equals null
478 // or it refers to an object that is not being evacuated out of
479 // from-space, or it refers to the to-space version of an object that
480 // is being evacuated out of from-space.
481 //
482 // By default the value held in the result register following execution
483 // of the generated code sequence is 0 to indicate failure of CAS,
484 // non-zero to indicate success. If is_cae, the result is the value most
485 // recently fetched from addr rather than a boolean success indicator.
486 //
487 // Clobbers rscratch1, rscratch2
488 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
489 Register addr,
490 Register expected,
491 Register new_val,
492 bool acquire, bool release,
493 bool is_cae,
494 Register result) {
495 Register tmp1 = rscratch1;
496 Register tmp2 = rscratch2;
497 bool is_narrow = UseCompressedOops;
498 Assembler::operand_size size = is_narrow ? Assembler::word : Assembler::xword;
499
500 assert_different_registers(addr, expected, tmp1, tmp2);
501 assert_different_registers(addr, new_val, tmp1, tmp2);
502
503 Label step4, done;
504
505 // There are two ways to reach this label. Initial entry into the
506 // cmpxchg_oop code expansion starts at step1 (which is equivalent
507 // to label step4). Additionally, in the rare case that four steps
508 // are required to perform the requested operation, the fourth step
509 // is the same as the first. On a second pass through step 1,
510 // control may flow through step 2 on its way to failure. It will
511 // not flow from step 2 to step 3 since we are assured that the
512 // memory at addr no longer holds a from-space pointer.
513 //
514 // The comments that immediately follow the step4 label apply only
515 // to the case in which control reaches this label by branch from
516 // step 3.
517
518 __ bind (step4);
519
520 // Step 4. CAS has failed because the value most recently fetched
521 // from addr is no longer the from-space pointer held in tmp2. If a
522 // different thread replaced the in-memory value with its equivalent
523 // to-space pointer, then CAS may still be able to succeed. The
524 // value held in the expected register has not changed.
525 //
526 // It is extremely rare we reach this point. For this reason, the
527 // implementation opts for smaller rather than potentially faster
528 // code. Ultimately, smaller code for this rare case most likely
529 // delivers higher overall throughput by enabling improved icache
530 // performance.
531
532 // Step 1. Fast-path.
533 //
534 // Try to CAS with given arguments. If successful, then we are done.
535 //
536 // No label required for step 1.
537
538 __ cmpxchg(addr, expected, new_val, size, acquire, release, false, tmp2);
539 // EQ flag set iff success. tmp2 holds value fetched.
540
541 // If expected equals null but tmp2 does not equal null, the
542 // following branches to done to report failure of CAS. If both
543 // expected and tmp2 equal null, the following branches to done to
544 // report success of CAS. There's no need for a special test of
545 // expected equal to null.
546
547 __ br(Assembler::EQ, done);
548 // if CAS failed, fall through to step 2
549
550 // Step 2. CAS has failed because the value held at addr does not
551 // match expected. This may be a false negative because the value fetched
552 // from addr (now held in tmp2) may be a from-space pointer to the
553 // original copy of same object referenced by to-space pointer expected.
554 //
555 // To resolve this, it suffices to find the forward pointer associated
556 // with fetched value. If this matches expected, retry CAS with new
557 // parameters. If this mismatches, then we have a legitimate
558 // failure, and we're done.
559 //
560 // No need for step2 label.
561
562 // overwrite tmp1 with from-space pointer fetched from memory
563 __ mov(tmp1, tmp2);
564
565 if (is_narrow) {
566 // Decode tmp1 in order to resolve its forward pointer
567 __ decode_heap_oop(tmp1, tmp1);
568 }
569 resolve_forward_pointer(masm, tmp1);
570 // Encode tmp1 to compare against expected.
571 __ encode_heap_oop(tmp1, tmp1);
572
573 // Does forwarded value of fetched from-space pointer match original
574 // value of expected? If tmp1 holds null, this comparison will fail
575 // because we know from step1 that expected is not null. There is
576 // no need for a separate test for tmp1 (the value originally held
577 // in memory) equal to null.
578 __ cmp(tmp1, expected);
579
580 // If not, then the failure was legitimate and we're done.
581 // Branching to done with NE condition denotes failure.
582 __ br(Assembler::NE, done);
583
584 // Fall through to step 3. No need for step3 label.
585
586 // Step 3. We've confirmed that the value originally held in memory
587 // (now held in tmp2) pointed to from-space version of original
588 // expected value. Try the CAS again with the from-space expected
589 // value. If it now succeeds, we're good.
590 //
591 // Note: tmp2 holds encoded from-space pointer that matches to-space
592 // object residing at expected. tmp2 is the new "expected".
593
594 // Note that macro implementation of __cmpxchg cannot use same register
595 // tmp2 for result and expected since it overwrites result before it
596 // compares result with expected.
597 __ cmpxchg(addr, tmp2, new_val, size, acquire, release, false, noreg);
598 // EQ flag set iff success. tmp2 holds value fetched, tmp1 (rscratch1) clobbered.
599
600 // If fetched value did not equal the new expected, this could
601 // still be a false negative because some other thread may have
602 // newly overwritten the memory value with its to-space equivalent.
603 __ br(Assembler::NE, step4);
604
605 if (is_cae) {
606 // We're falling through to done to indicate success. Success
607 // with is_cae is denoted by returning the value of expected as
608 // result.
609 __ mov(tmp2, expected);
610 }
611
612 __ bind(done);
613 // At entry to done, the Z (EQ) flag is on iff if the CAS
614 // operation was successful. Additionally, if is_cae, tmp2 holds
615 // the value most recently fetched from addr. In this case, success
616 // is denoted by tmp2 matching expected.
617
618 if (is_cae) {
619 __ mov(result, tmp2);
620 } else {
621 __ cset(result, Assembler::EQ);
622 }
623 }
624
625 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
626 Register start, Register count, Register scratch, RegSet saved_regs) {
627 assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");
628
629 Label L_loop, L_done;
630 const Register end = count;
631
632 // Zero count? Nothing to do.
633 __ cbz(count, L_done);
634
635 // end = start + count << LogBytesPerHeapOop
636 // last element address to make inclusive
637 __ lea(end, Address(start, count, Address::lsl(LogBytesPerHeapOop)));
638 __ sub(end, end, BytesPerHeapOop);
639 __ lsr(start, start, CardTable::card_shift());
640 __ lsr(end, end, CardTable::card_shift());
641
642 // number of bytes to copy
643 __ sub(count, end, start);
644
645 __ load_byte_map_base(scratch);
646 __ add(start, start, scratch);
647 __ bind(L_loop);
648 __ strb(zr, Address(start, count));
649 __ subs(count, count, 1);
650 __ br(Assembler::GE, L_loop);
651 __ bind(L_done);
652 }
653
654 #undef __
655
656 #ifdef COMPILER1
657
658 #define __ ce->masm()->
659
660 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
661 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
662 // At this point we know that marking is in progress.
663 // If do_load() is true then we have to emit the
664 // load of the previous value; otherwise it has already
665 // been loaded into _pre_val.
666
667 __ bind(*stub->entry());
668
669 assert(stub->pre_val()->is_register(), "Precondition.");
670
671 Register pre_val_reg = stub->pre_val()->as_register();
672
673 if (stub->do_load()) {
674 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
675 }
676 __ cbz(pre_val_reg, *stub->continuation());
677 ce->store_parameter(stub->pre_val()->as_register(), 0);
678 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
679 __ b(*stub->continuation());
680 }
681
682 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
683 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
684 __ bind(*stub->entry());
685
686 DecoratorSet decorators = stub->decorators();
687 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
688 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
689 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
690 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
691
692 Register obj = stub->obj()->as_register();
693 Register res = stub->result()->as_register();
694 Register addr = stub->addr()->as_pointer_register();
695 Register tmp1 = stub->tmp1()->as_register();
696 Register tmp2 = stub->tmp2()->as_register();
697
698 assert(res == r0, "result must arrive in r0");
699
700 if (res != obj) {
701 __ mov(res, obj);
702 }
703
704 if (is_strong) {
705 // Check for object in cset.
706 __ mov(tmp2, ShenandoahHeap::in_cset_fast_test_addr());
707 __ lsr(tmp1, res, ShenandoahHeapRegion::region_size_bytes_shift_jint());
708 __ ldrb(tmp2, Address(tmp2, tmp1));
709 __ cbz(tmp2, *stub->continuation());
710 }
711
712 ce->store_parameter(res, 0);
713 ce->store_parameter(addr, 1);
714 if (is_strong) {
715 if (is_native) {
716 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_native_rt_code_blob()->code_begin()));
717 } else {
718 __ far_call(RuntimeAddress(bs->load_reference_barrier_strong_rt_code_blob()->code_begin()));
719 }
720 } else if (is_weak) {
721 __ far_call(RuntimeAddress(bs->load_reference_barrier_weak_rt_code_blob()->code_begin()));
722 } else {
723 assert(is_phantom, "only remaining strength");
724 __ far_call(RuntimeAddress(bs->load_reference_barrier_phantom_rt_code_blob()->code_begin()));
725 }
726
727 __ b(*stub->continuation());
728 }
729
730 #undef __
731
732 #define __ sasm->
733
734 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
735 __ prologue("shenandoah_pre_barrier", false);
736
737 // arg0 : previous value of memory
738
739 BarrierSet* bs = BarrierSet::barrier_set();
740
741 const Register pre_val = r0;
742 const Register thread = rthread;
743 const Register tmp = rscratch1;
744
745 Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
746 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
747
748 Label done;
749 Label runtime;
750
751 // Is marking still active?
752 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
753 __ ldrb(tmp, gc_state);
754 __ tbz(tmp, ShenandoahHeap::MARKING_BITPOS, done);
755
756 // Can we store original value in the thread's buffer?
757 __ ldr(tmp, queue_index);
758 __ cbz(tmp, runtime);
759
760 __ sub(tmp, tmp, wordSize);
761 __ str(tmp, queue_index);
762 __ ldr(rscratch2, buffer);
763 __ add(tmp, tmp, rscratch2);
764 __ load_parameter(0, rscratch2);
765 __ str(rscratch2, Address(tmp, 0));
766 __ b(done);
767
768 __ bind(runtime);
769 __ push_call_clobbered_registers();
770 __ load_parameter(0, pre_val);
771 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), pre_val, thread);
772 __ pop_call_clobbered_registers();
773 __ bind(done);
774
775 __ epilogue();
776 }
777
778 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
779 __ prologue("shenandoah_load_reference_barrier", false);
780 // arg0 : object to be resolved
781
782 __ push_call_clobbered_registers();
783 __ load_parameter(0, r0);
784 __ load_parameter(1, r1);
785
786 bool is_strong = ShenandoahBarrierSet::is_strong_access(decorators);
787 bool is_weak = ShenandoahBarrierSet::is_weak_access(decorators);
788 bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
789 bool is_native = ShenandoahBarrierSet::is_native_access(decorators);
790 if (is_strong) {
791 if (is_native) {
792 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
793 } else {
794 if (UseCompressedOops) {
795 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow));
796 } else {
797 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong));
798 }
799 }
800 } else if (is_weak) {
801 assert(!is_native, "weak must not be called off-heap");
802 if (UseCompressedOops) {
803 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow));
804 } else {
805 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak));
806 }
807 } else {
808 assert(is_phantom, "only remaining strength");
809 assert(is_native, "phantom must only be called off-heap");
810 __ mov(lr, CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom));
811 }
812 __ blr(lr);
813 __ mov(rscratch1, r0);
814 __ pop_call_clobbered_registers();
815 __ mov(r0, rscratch1);
816
817 __ epilogue();
818 }
819
820 #undef __
821
822 #endif // COMPILER1