85
86 if (access.is_oop()) {
87 LIRGenerator* gen = access.gen();
88
89 if (ShenandoahSATBBarrier) {
90 pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
91 LIR_OprFact::illegalOpr);
92 }
93
94 if (ShenandoahCASBarrier) {
95 cmp_value.load_item();
96 new_value.load_item();
97
98 LIR_Opr t1 = gen->new_register(T_OBJECT);
99 LIR_Opr t2 = gen->new_register(T_OBJECT);
100 LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
101 LIR_Opr result = gen->new_register(T_INT);
102
103 __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));
104
105 return result;
106 }
107 }
108
109 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
110 }
111
112 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess &access, LIRItem &value) {
113 LIRGenerator* gen = access.gen();
114 BasicType type = access.type();
115
116 LIR_Opr result = gen->new_register(type);
117 value.load_item();
118 LIR_Opr value_opr = value.result();
119
120 assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
121 LIR_Opr tmp_xchg = gen->new_register(T_INT);
122 __ xchg(access.resolved_addr(), value_opr, result, tmp_xchg);
123
124 if (access.is_oop()) {
125 result = load_reference_barrier_impl(access.gen(), result, LIR_OprFact::addressConst(0),
126 access.decorators());
127
128 LIR_Opr tmp_barrier = gen->new_register(type);
129 __ move(result, tmp_barrier);
130 result = tmp_barrier;
131
132 if (ShenandoahSATBBarrier) {
133 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr, result);
134 }
135 }
136
137 return result;
138 }
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85
86 if (access.is_oop()) {
87 LIRGenerator* gen = access.gen();
88
89 if (ShenandoahSATBBarrier) {
90 pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
91 LIR_OprFact::illegalOpr);
92 }
93
94 if (ShenandoahCASBarrier) {
95 cmp_value.load_item();
96 new_value.load_item();
97
98 LIR_Opr t1 = gen->new_register(T_OBJECT);
99 LIR_Opr t2 = gen->new_register(T_OBJECT);
100 LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
101 LIR_Opr result = gen->new_register(T_INT);
102
103 __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));
104
105 if (ShenandoahCardBarrier) {
106 post_barrier(access, access.resolved_addr(), new_value.result());
107 }
108
109 return result;
110 }
111 }
112
113 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
114 }
115
116 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess &access, LIRItem &value) {
117 LIRGenerator* gen = access.gen();
118 BasicType type = access.type();
119
120 LIR_Opr result = gen->new_register(type);
121 value.load_item();
122 LIR_Opr value_opr = value.result();
123
124 assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
125 LIR_Opr tmp_xchg = gen->new_register(T_INT);
126 __ xchg(access.resolved_addr(), value_opr, result, tmp_xchg);
127
128 if (access.is_oop()) {
129 result = load_reference_barrier_impl(access.gen(), result, LIR_OprFact::addressConst(0),
130 access.decorators());
131
132 LIR_Opr tmp_barrier = gen->new_register(type);
133 __ move(result, tmp_barrier);
134 result = tmp_barrier;
135
136 if (ShenandoahSATBBarrier) {
137 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr, result);
138 }
139
140 if (ShenandoahCardBarrier) {
141 post_barrier(access, access.resolved_addr(), result);
142 }
143 }
144
145 return result;
146 }
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