1 /*
  2  * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved.
  3  * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
  4  * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
  5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  6  *
  7  * This code is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License version 2 only, as
  9  * published by the Free Software Foundation.
 10  *
 11  * This code is distributed in the hope that it will be useful, but WITHOUT
 12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 14  * version 2 for more details (a copy is included in the LICENSE file that
 15  * accompanied this code).
 16  *
 17  * You should have received a copy of the GNU General Public License version
 18  * 2 along with this work; if not, write to the Free Software Foundation,
 19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 20  *
 21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 22  * or visit www.oracle.com if you need additional information or have any
 23  * questions.
 24  *
 25  */
 26 
 27 #include "precompiled.hpp"
 28 #include "c1/c1_LIRAssembler.hpp"
 29 #include "c1/c1_MacroAssembler.hpp"
 30 #include "gc/shared/gc_globals.hpp"
 31 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
 32 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
 33 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
 34 
 35 #define __ masm->masm()->
 36 
 37 void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) {
 38   Register addr = _addr->as_register_lo();
 39   Register newval = _new_value->as_register();
 40   Register cmpval = _cmp_value->as_register();
 41   Register tmp1 = _tmp1->as_register();
 42   Register tmp2 = _tmp2->as_register();
 43   Register result = result_opr()->as_register();
 44 
 45   ShenandoahBarrierSet::assembler()->iu_barrier(masm->masm(), newval, t1);
 46 
 47   if (UseCompressedOops) {
 48     __ encode_heap_oop(tmp1, cmpval);
 49     cmpval = tmp1;
 50     __ encode_heap_oop(tmp2, newval);
 51     newval = tmp2;
 52   }
 53 
 54   ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), addr, cmpval, newval, /* acquire */ Assembler::aq,
 55                                                  /* release */ Assembler::rl, /* is_cae */ false, result);
 56 }
 57 
 58 #undef __
 59 
 60 #ifdef ASSERT
 61 #define __ gen->lir(__FILE__, __LINE__)->
 62 #else
 63 #define __ gen->lir()->
 64 #endif
 65 
 66 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
 67   BasicType bt = access.type();
 68   if (access.is_oop()) {
 69     LIRGenerator *gen = access.gen();
 70     if (ShenandoahSATBBarrier) {
 71       pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
 72                   LIR_OprFact::illegalOpr /* pre_val */);
 73     }
 74     if (ShenandoahCASBarrier) {
 75       cmp_value.load_item();
 76       new_value.load_item();
 77 
 78       LIR_Opr tmp1 = gen->new_register(T_OBJECT);
 79       LIR_Opr tmp2 = gen->new_register(T_OBJECT);
 80       LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
 81       LIR_Opr result = gen->new_register(T_INT);
 82 
 83       __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), tmp1, tmp2, result));
 84       return result;
 85     }
 86   }
 87   return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
 88 }
 89 
 90 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
 91   LIRGenerator* gen = access.gen();
 92   BasicType type = access.type();
 93 
 94   LIR_Opr result = gen->new_register(type);
 95   value.load_item();
 96   LIR_Opr value_opr = value.result();
 97 
 98   if (access.is_oop()) {
 99     value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
100   }
101 
102   assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
103   LIR_Opr tmp = gen->new_register(T_INT);
104   __ xchg(access.resolved_addr(), value_opr, result, tmp);
105 
106   if (access.is_oop()) {
107     result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0), access.decorators());
108     LIR_Opr tmp_opr = gen->new_register(type);
109     __ move(result, tmp_opr);
110     result = tmp_opr;
111     if (ShenandoahSATBBarrier) {
112       pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
113                   result /* pre_val */);
114     }
115   }
116 
117   return result;
118 }