1 /*
 2  * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved.
 3  * Copyright (c) 2020, 2021, Huawei Technologies Co., Ltd. All rights reserved.
 4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 5  *
 6  * This code is free software; you can redistribute it and/or modify it
 7  * under the terms of the GNU General Public License version 2 only, as
 8  * published by the Free Software Foundation.
 9  *
10  * This code is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * version 2 for more details (a copy is included in the LICENSE file that
14  * accompanied this code).
15  *
16  * You should have received a copy of the GNU General Public License version
17  * 2 along with this work; if not, write to the Free Software Foundation,
18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21  * or visit www.oracle.com if you need additional information or have any
22  * questions.
23  *
24  */
25 
26 #ifndef CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
27 #define CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP
28 
29 #include "asm/macroAssembler.hpp"
30 #include "gc/shared/barrierSetAssembler.hpp"
31 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
32 
33 #ifdef COMPILER1
34 class LIR_Assembler;
35 class ShenandoahPreBarrierStub;
36 class ShenandoahLoadReferenceBarrierStub;
37 class StubAssembler;
38 #endif
39 class StubCodeGenerator;
40 
41 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
42 private:
43 
44   void satb_write_barrier_pre(MacroAssembler* masm,
45                               Register obj,
46                               Register pre_val,
47                               Register thread,
48                               Register tmp1,
49                               Register tmp2,
50                               bool tosca_live,
51                               bool expand_call);
52   void shenandoah_write_barrier_pre(MacroAssembler* masm,
53                                     Register obj,
54                                     Register pre_val,
55                                     Register thread,
56                                     Register tmp,
57                                     bool tosca_live,
58                                     bool expand_call);
59 
60   void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
61   void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
62   void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators);
63 
64 public:
65 
66   virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_data_patch; }
67 
68 #ifdef COMPILER1
69   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
70   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
71   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
72   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
73 #endif
74 
75   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
76                                   Register src, Register dst, Register count, RegSet saved_regs);
77 
78   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
79                        Register dst, Address src, Register tmp1, Register tmp2);
80   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
81                         Address dst, Register val, Register tmp1, Register tmp2, Register tmp3);
82 
83   virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
84                                              Register obj, Register tmp, Label& slowpath);
85 
86   void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
87                    Assembler::Aqrl acquire, Assembler::Aqrl release, bool is_cae, Register result);
88 };
89 
90 #endif // CPU_RISCV_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_RISCV_HPP