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src/hotspot/cpu/x86/gc/shenandoah/c1/shenandoahBarrierSetC1_x86.cpp

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 70 #endif
 71 
 72 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
 73 
 74   if (access.is_oop()) {
 75     LIRGenerator* gen = access.gen();
 76     if (ShenandoahSATBBarrier) {
 77       pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
 78                   LIR_OprFact::illegalOpr /* pre_val */);
 79     }
 80     if (ShenandoahCASBarrier) {
 81       cmp_value.load_item_force(FrameMap::rax_oop_opr);
 82       new_value.load_item();
 83 
 84       LIR_Opr t1 = gen->new_register(T_OBJECT);
 85       LIR_Opr t2 = gen->new_register(T_OBJECT);
 86       LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
 87       LIR_Opr result = gen->new_register(T_INT);
 88 
 89       __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));


 90       return result;
 91     }
 92   }
 93   return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);







 94 }
 95 
 96 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
 97   LIRGenerator* gen = access.gen();
 98   BasicType type = access.type();
 99 
100   LIR_Opr result = gen->new_register(type);
101   value.load_item();
102   LIR_Opr value_opr = value.result();
103 
104   if (access.is_oop()) {
105     value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
106   }
107 
108   // Because we want a 2-arg form of xchg and xadd
109   __ move(value_opr, result);
110 
111   assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
112   __ xchg(access.resolved_addr(), result, result, LIR_OprFact::illegalOpr);
113 
114   if (access.is_oop()) {
115     result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0), access.decorators());
116     LIR_Opr tmp = gen->new_register(type);
117     __ move(result, tmp);
118     result = tmp;
119     if (ShenandoahSATBBarrier) {
120       pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
121                   result /* pre_val */);
122     }

123   }
124 
125   return result;
126 }

 70 #endif
 71 
 72 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
 73 
 74   if (access.is_oop()) {
 75     LIRGenerator* gen = access.gen();
 76     if (ShenandoahSATBBarrier) {
 77       pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
 78                   LIR_OprFact::illegalOpr /* pre_val */);
 79     }
 80     if (ShenandoahCASBarrier) {
 81       cmp_value.load_item_force(FrameMap::rax_oop_opr);
 82       new_value.load_item();
 83 
 84       LIR_Opr t1 = gen->new_register(T_OBJECT);
 85       LIR_Opr t2 = gen->new_register(T_OBJECT);
 86       LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
 87       LIR_Opr result = gen->new_register(T_INT);
 88 
 89       __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));
 90 
 91       post_barrier(access, access.resolved_addr(), new_value.result());
 92       return result;
 93     }
 94   }
 95 
 96   LIR_Opr result =  BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
 97 
 98   if (access.is_oop()) {
 99     post_barrier(access, access.resolved_addr(), new_value.result());
100   }
101 
102   return result;
103 }
104 
105 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
106   LIRGenerator* gen = access.gen();
107   BasicType type = access.type();
108 
109   LIR_Opr result = gen->new_register(type);
110   value.load_item();
111   LIR_Opr value_opr = value.result();
112 
113   if (access.is_oop()) {
114     value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
115   }
116 
117   // Because we want a 2-arg form of xchg and xadd
118   __ move(value_opr, result);
119 
120   assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
121   __ xchg(access.resolved_addr(), result, result, LIR_OprFact::illegalOpr);
122 
123   if (access.is_oop()) {
124     result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0), access.decorators());
125     LIR_Opr tmp = gen->new_register(type);
126     __ move(result, tmp);
127     result = tmp;
128     if (ShenandoahSATBBarrier) {
129       pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
130                   result /* pre_val */);
131     }
132     post_barrier(access, access.resolved_addr(), result);
133   }
134 
135   return result;
136 }
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