1 /*
   2  * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
   3  * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
  28 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
  29 #include "gc/shenandoah/shenandoahForwarding.hpp"
  30 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
  31 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
  32 #include "gc/shenandoah/shenandoahRuntime.hpp"
  33 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
  34 #include "gc/shenandoah/heuristics/shenandoahHeuristics.hpp"
  35 #include "gc/shenandoah/mode/shenandoahMode.hpp"
  36 #include "interpreter/interpreter.hpp"
  37 #include "runtime/javaThread.hpp"
  38 #include "runtime/sharedRuntime.hpp"
  39 #include "utilities/macros.hpp"
  40 #ifdef COMPILER1
  41 #include "c1/c1_LIRAssembler.hpp"
  42 #include "c1/c1_MacroAssembler.hpp"
  43 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
  44 #endif
  45 
  46 #define __ masm->
  47 
  48 static void save_machine_state(MacroAssembler* masm, bool handle_gpr, bool handle_fp) {
  49   if (handle_gpr) {
  50     __ push_IU_state();
  51   }
  52 
  53   if (handle_fp) {
  54     // Some paths can be reached from the c2i adapter with live fp arguments in registers.
  55     LP64_ONLY(assert(Argument::n_float_register_parameters_j == 8, "8 fp registers to save at java call"));
  56 
  57     if (UseSSE >= 2) {
  58       const int xmm_size = wordSize * LP64_ONLY(2) NOT_LP64(4);
  59       __ subptr(rsp, xmm_size * 8);
  60       __ movdbl(Address(rsp, xmm_size * 0), xmm0);
  61       __ movdbl(Address(rsp, xmm_size * 1), xmm1);
  62       __ movdbl(Address(rsp, xmm_size * 2), xmm2);
  63       __ movdbl(Address(rsp, xmm_size * 3), xmm3);
  64       __ movdbl(Address(rsp, xmm_size * 4), xmm4);
  65       __ movdbl(Address(rsp, xmm_size * 5), xmm5);
  66       __ movdbl(Address(rsp, xmm_size * 6), xmm6);
  67       __ movdbl(Address(rsp, xmm_size * 7), xmm7);
  68     } else if (UseSSE >= 1) {
  69       const int xmm_size = wordSize * LP64_ONLY(1) NOT_LP64(2);
  70       __ subptr(rsp, xmm_size * 8);
  71       __ movflt(Address(rsp, xmm_size * 0), xmm0);
  72       __ movflt(Address(rsp, xmm_size * 1), xmm1);
  73       __ movflt(Address(rsp, xmm_size * 2), xmm2);
  74       __ movflt(Address(rsp, xmm_size * 3), xmm3);
  75       __ movflt(Address(rsp, xmm_size * 4), xmm4);
  76       __ movflt(Address(rsp, xmm_size * 5), xmm5);
  77       __ movflt(Address(rsp, xmm_size * 6), xmm6);
  78       __ movflt(Address(rsp, xmm_size * 7), xmm7);
  79     } else {
  80       __ push_FPU_state();
  81     }
  82   }
  83 }
  84 
  85 static void restore_machine_state(MacroAssembler* masm, bool handle_gpr, bool handle_fp) {
  86   if (handle_fp) {
  87     if (UseSSE >= 2) {
  88       const int xmm_size = wordSize * LP64_ONLY(2) NOT_LP64(4);
  89       __ movdbl(xmm0, Address(rsp, xmm_size * 0));
  90       __ movdbl(xmm1, Address(rsp, xmm_size * 1));
  91       __ movdbl(xmm2, Address(rsp, xmm_size * 2));
  92       __ movdbl(xmm3, Address(rsp, xmm_size * 3));
  93       __ movdbl(xmm4, Address(rsp, xmm_size * 4));
  94       __ movdbl(xmm5, Address(rsp, xmm_size * 5));
  95       __ movdbl(xmm6, Address(rsp, xmm_size * 6));
  96       __ movdbl(xmm7, Address(rsp, xmm_size * 7));
  97       __ addptr(rsp, xmm_size * 8);
  98     } else if (UseSSE >= 1) {
  99       const int xmm_size = wordSize * LP64_ONLY(1) NOT_LP64(2);
 100       __ movflt(xmm0, Address(rsp, xmm_size * 0));
 101       __ movflt(xmm1, Address(rsp, xmm_size * 1));
 102       __ movflt(xmm2, Address(rsp, xmm_size * 2));
 103       __ movflt(xmm3, Address(rsp, xmm_size * 3));
 104       __ movflt(xmm4, Address(rsp, xmm_size * 4));
 105       __ movflt(xmm5, Address(rsp, xmm_size * 5));
 106       __ movflt(xmm6, Address(rsp, xmm_size * 6));
 107       __ movflt(xmm7, Address(rsp, xmm_size * 7));
 108       __ addptr(rsp, xmm_size * 8);
 109     } else {
 110       __ pop_FPU_state();
 111     }
 112   }
 113 
 114   if (handle_gpr) {
 115     __ pop_IU_state();
 116   }
 117 }
 118 
 119 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 120                                                        Register src, Register dst, Register count) {
 121 
 122   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 123 
 124   if (is_reference_type(type)) {
 125     if (ShenandoahCardBarrier) {
 126       bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
 127       bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
 128       bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
 129 
 130       // We need to save the original element count because the array copy stub
 131       // will destroy the value and we need it for the card marking barrier.
 132 #ifdef _LP64
 133       if (!checkcast) {
 134         if (!obj_int) {
 135           // Save count for barrier
 136           __ movptr(r11, count);
 137         } else if (disjoint) {
 138           // Save dst in r11 in the disjoint case
 139           __ movq(r11, dst);
 140         }
 141       }
 142 #else
 143       if (disjoint) {
 144         __ mov(rdx, dst);          // save 'to'
 145       }
 146 #endif
 147     }
 148 
 149     if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahIUBarrier || ShenandoahLoadRefBarrier) {
 150 #ifdef _LP64
 151       Register thread = r15_thread;
 152 #else
 153       Register thread = rax;
 154       if (thread == src || thread == dst || thread == count) {
 155         thread = rbx;
 156       }
 157       if (thread == src || thread == dst || thread == count) {
 158         thread = rcx;
 159       }
 160       if (thread == src || thread == dst || thread == count) {
 161         thread = rdx;
 162       }
 163       __ push(thread);
 164       __ get_thread(thread);
 165 #endif
 166       assert_different_registers(src, dst, count, thread);
 167 
 168       Label L_done;
 169       // Short-circuit if count == 0.
 170       __ testptr(count, count);
 171       __ jcc(Assembler::zero, L_done);
 172 
 173       // Avoid runtime call when not active.
 174       Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 175       int flags;
 176       if (ShenandoahSATBBarrier && dest_uninitialized) {
 177         flags = ShenandoahHeap::HAS_FORWARDED;
 178       } else {
 179         flags = ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::MARKING;
 180       }
 181       __ testb(gc_state, flags);
 182       __ jcc(Assembler::zero, L_done);
 183 
 184       save_machine_state(masm, /* handle_gpr = */ true, /* handle_fp = */ false);
 185 
 186 #ifdef _LP64
 187       assert(src == rdi, "expected");
 188       assert(dst == rsi, "expected");
 189       assert(count == rdx, "expected");
 190       if (UseCompressedOops) {
 191         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_narrow_oop_entry),
 192                         src, dst, count);
 193       } else
 194 #endif
 195       {
 196         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::arraycopy_barrier_oop_entry),
 197                         src, dst, count);
 198       }
 199 
 200       restore_machine_state(masm, /* handle_gpr = */ true, /* handle_fp = */ false);
 201 
 202       __ bind(L_done);
 203       NOT_LP64(__ pop(thread);)
 204     }
 205   }
 206 
 207 }
 208 
 209 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 210                                                        Register src, Register dst, Register count) {
 211 
 212   if (ShenandoahCardBarrier && is_reference_type(type)) {
 213     bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
 214     bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
 215     bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
 216     Register tmp = rax;
 217 
 218 #ifdef _LP64
 219     if (!checkcast) {
 220       if (!obj_int) {
 221         // Save count for barrier
 222         count = r11;
 223       } else if (disjoint) {
 224         // Use the saved dst in the disjoint case
 225         dst = r11;
 226       }
 227     } else {
 228       tmp = rscratch1;
 229     }
 230 #else
 231     if (disjoint) {
 232       __ mov(dst, rdx); // restore 'to'
 233     }
 234 #endif
 235     gen_write_ref_array_post_barrier(masm, decorators, dst, count, tmp);
 236   }
 237 }
 238 
 239 void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,
 240                                                                  Register obj,
 241                                                                  Register pre_val,
 242                                                                  Register thread,
 243                                                                  Register tmp,
 244                                                                  bool tosca_live,
 245                                                                  bool expand_call) {
 246 
 247   if (ShenandoahSATBBarrier) {
 248     satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call);
 249   }
 250 }
 251 
 252 void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
 253                                                            Register obj,
 254                                                            Register pre_val,
 255                                                            Register thread,
 256                                                            Register tmp,
 257                                                            bool tosca_live,
 258                                                            bool expand_call) {
 259   // If expand_call is true then we expand the call_VM_leaf macro
 260   // directly to skip generating the check by
 261   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
 262 
 263 #ifdef _LP64
 264   assert(thread == r15_thread, "must be");
 265 #endif // _LP64
 266 
 267   Label done;
 268   Label runtime;
 269 
 270   assert(pre_val != noreg, "check this code");
 271 
 272   if (obj != noreg) {
 273     assert_different_registers(obj, pre_val, tmp);
 274     assert(pre_val != rax, "check this code");
 275   }
 276 
 277   Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 278   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 279 
 280   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 281   __ testb(gc_state, ShenandoahHeap::MARKING);
 282   __ jcc(Assembler::zero, done);
 283 
 284   // Do we need to load the previous value?
 285   if (obj != noreg) {
 286     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
 287   }
 288 
 289   // Is the previous value null?
 290   __ cmpptr(pre_val, NULL_WORD);
 291   __ jcc(Assembler::equal, done);
 292 
 293   // Can we store original value in the thread's buffer?
 294   // Is index == 0?
 295   // (The index field is typed as size_t.)
 296 
 297   __ movptr(tmp, index);                   // tmp := *index_adr
 298   __ cmpptr(tmp, 0);                       // tmp == 0?
 299   __ jcc(Assembler::equal, runtime);       // If yes, goto runtime
 300 
 301   __ subptr(tmp, wordSize);                // tmp := tmp - wordSize
 302   __ movptr(index, tmp);                   // *index_adr := tmp
 303   __ addptr(tmp, buffer);                  // tmp := tmp + *buffer_adr
 304 
 305   // Record the previous value
 306   __ movptr(Address(tmp, 0), pre_val);
 307   __ jmp(done);
 308 
 309   __ bind(runtime);
 310   // save the live input values
 311   if(tosca_live) __ push(rax);
 312 
 313   if (obj != noreg && obj != rax)
 314     __ push(obj);
 315 
 316   if (pre_val != rax)
 317     __ push(pre_val);
 318 
 319   // Calling the runtime using the regular call_VM_leaf mechanism generates
 320   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
 321   // that checks that the *(ebp+frame::interpreter_frame_last_sp) == nullptr.
 322   //
 323   // If we care generating the pre-barrier without a frame (e.g. in the
 324   // intrinsified Reference.get() routine) then ebp might be pointing to
 325   // the caller frame and so this check will most likely fail at runtime.
 326   //
 327   // Expanding the call directly bypasses the generation of the check.
 328   // So when we do not have have a full interpreter frame on the stack
 329   // expand_call should be passed true.
 330 
 331   NOT_LP64( __ push(thread); )
 332 
 333 #ifdef _LP64
 334   // We move pre_val into c_rarg0 early, in order to avoid smashing it, should
 335   // pre_val be c_rarg1 (where the call prologue would copy thread argument).
 336   // Note: this should not accidentally smash thread, because thread is always r15.
 337   assert(thread != c_rarg0, "smashed arg");
 338   if (c_rarg0 != pre_val) {
 339     __ mov(c_rarg0, pre_val);
 340   }
 341 #endif
 342 
 343   if (expand_call) {
 344     LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
 345 #ifdef _LP64
 346     if (c_rarg1 != thread) {
 347       __ mov(c_rarg1, thread);
 348     }
 349     // Already moved pre_val into c_rarg0 above
 350 #else
 351     __ push(thread);
 352     __ push(pre_val);
 353 #endif
 354     __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), 2);
 355   } else {
 356     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), LP64_ONLY(c_rarg0) NOT_LP64(pre_val), thread);
 357   }
 358 
 359   NOT_LP64( __ pop(thread); )
 360 
 361   // save the live input values
 362   if (pre_val != rax)
 363     __ pop(pre_val);
 364 
 365   if (obj != noreg && obj != rax)
 366     __ pop(obj);
 367 
 368   if(tosca_live) __ pop(rax);
 369 
 370   __ bind(done);
 371 }
 372 
 373 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst, Address src, DecoratorSet decorators) {
 374   assert(ShenandoahLoadRefBarrier, "Should be enabled");
 375 
 376   bool is_strong  = ShenandoahBarrierSet::is_strong_access(decorators);
 377   bool is_weak    = ShenandoahBarrierSet::is_weak_access(decorators);
 378   bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
 379   bool is_native  = ShenandoahBarrierSet::is_native_access(decorators);
 380   bool is_narrow  = UseCompressedOops && !is_native;
 381 
 382   Label heap_stable, not_cset;
 383 
 384   __ block_comment("load_reference_barrier { ");
 385 
 386   // Check if GC is active
 387 #ifdef _LP64
 388   Register thread = r15_thread;
 389 #else
 390   Register thread = rcx;
 391   if (thread == dst) {
 392     thread = rbx;
 393   }
 394   __ push(thread);
 395   __ get_thread(thread);
 396 #endif
 397 
 398   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 399   int flags = ShenandoahHeap::HAS_FORWARDED;
 400   if (!is_strong) {
 401     flags |= ShenandoahHeap::WEAK_ROOTS;
 402   }
 403   __ testb(gc_state, flags);
 404   __ jcc(Assembler::zero, heap_stable);
 405 
 406   Register tmp1 = noreg, tmp2 = noreg;
 407   if (is_strong) {
 408     // Test for object in cset
 409     // Allocate temporary registers
 410     for (int i = 0; i < 8; i++) {
 411       Register r = as_Register(i);
 412       if (r != rsp && r != rbp && r != dst && r != src.base() && r != src.index()) {
 413         if (tmp1 == noreg) {
 414           tmp1 = r;
 415         } else {
 416           tmp2 = r;
 417           break;
 418         }
 419       }
 420     }
 421     assert(tmp1 != noreg, "tmp1 allocated");
 422     assert(tmp2 != noreg, "tmp2 allocated");
 423     assert_different_registers(tmp1, tmp2, src.base(), src.index());
 424     assert_different_registers(tmp1, tmp2, dst);
 425 
 426     __ push(tmp1);
 427     __ push(tmp2);
 428 
 429     // Optimized cset-test
 430     __ movptr(tmp1, dst);
 431     __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 432     __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
 433     __ movbool(tmp1, Address(tmp1, tmp2, Address::times_1));
 434     __ testbool(tmp1);
 435     __ jcc(Assembler::zero, not_cset);
 436   }
 437 
 438   save_machine_state(masm, /* handle_gpr = */ false, /* handle_fp = */ true);
 439 
 440   // The rest is saved with the optimized path
 441 
 442   uint num_saved_regs = 4 + (dst != rax ? 1 : 0) LP64_ONLY(+4);
 443   __ subptr(rsp, num_saved_regs * wordSize);
 444   uint slot = num_saved_regs;
 445   if (dst != rax) {
 446     __ movptr(Address(rsp, (--slot) * wordSize), rax);
 447   }
 448   __ movptr(Address(rsp, (--slot) * wordSize), rcx);
 449   __ movptr(Address(rsp, (--slot) * wordSize), rdx);
 450   __ movptr(Address(rsp, (--slot) * wordSize), rdi);
 451   __ movptr(Address(rsp, (--slot) * wordSize), rsi);
 452 #ifdef _LP64
 453   __ movptr(Address(rsp, (--slot) * wordSize), r8);
 454   __ movptr(Address(rsp, (--slot) * wordSize), r9);
 455   __ movptr(Address(rsp, (--slot) * wordSize), r10);
 456   __ movptr(Address(rsp, (--slot) * wordSize), r11);
 457   // r12-r15 are callee saved in all calling conventions
 458 #endif
 459   assert(slot == 0, "must use all slots");
 460 
 461   // Shuffle registers such that dst is in c_rarg0 and addr in c_rarg1.
 462 #ifdef _LP64
 463   Register arg0 = c_rarg0, arg1 = c_rarg1;
 464 #else
 465   Register arg0 = rdi, arg1 = rsi;
 466 #endif
 467   if (dst == arg1) {
 468     __ lea(arg0, src);
 469     __ xchgptr(arg1, arg0);
 470   } else {
 471     __ lea(arg1, src);
 472     __ movptr(arg0, dst);
 473   }
 474 
 475   if (is_strong) {
 476     if (is_narrow) {
 477       __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow), arg0, arg1);
 478     } else {
 479       __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong), arg0, arg1);
 480     }
 481   } else if (is_weak) {
 482     if (is_narrow) {
 483       __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow), arg0, arg1);
 484     } else {
 485       __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak), arg0, arg1);
 486     }
 487   } else {
 488     assert(is_phantom, "only remaining strength");
 489     assert(!is_narrow, "phantom access cannot be narrow");
 490     __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom), arg0, arg1);
 491   }
 492 
 493 #ifdef _LP64
 494   __ movptr(r11, Address(rsp, (slot++) * wordSize));
 495   __ movptr(r10, Address(rsp, (slot++) * wordSize));
 496   __ movptr(r9,  Address(rsp, (slot++) * wordSize));
 497   __ movptr(r8,  Address(rsp, (slot++) * wordSize));
 498 #endif
 499   __ movptr(rsi, Address(rsp, (slot++) * wordSize));
 500   __ movptr(rdi, Address(rsp, (slot++) * wordSize));
 501   __ movptr(rdx, Address(rsp, (slot++) * wordSize));
 502   __ movptr(rcx, Address(rsp, (slot++) * wordSize));
 503 
 504   if (dst != rax) {
 505     __ movptr(dst, rax);
 506     __ movptr(rax, Address(rsp, (slot++) * wordSize));
 507   }
 508 
 509   assert(slot == num_saved_regs, "must use all slots");
 510   __ addptr(rsp, num_saved_regs * wordSize);
 511 
 512   restore_machine_state(masm, /* handle_gpr = */ false, /* handle_fp = */ true);
 513 
 514   __ bind(not_cset);
 515 
 516   if  (is_strong) {
 517     __ pop(tmp2);
 518     __ pop(tmp1);
 519   }
 520 
 521   __ bind(heap_stable);
 522 
 523   __ block_comment("} load_reference_barrier");
 524 
 525 #ifndef _LP64
 526     __ pop(thread);
 527 #endif
 528 }
 529 
 530 void ShenandoahBarrierSetAssembler::iu_barrier(MacroAssembler* masm, Register dst, Register tmp) {
 531   if (ShenandoahIUBarrier) {
 532     iu_barrier_impl(masm, dst, tmp);
 533   }
 534 }
 535 
 536 void ShenandoahBarrierSetAssembler::iu_barrier_impl(MacroAssembler* masm, Register dst, Register tmp) {
 537   assert(ShenandoahIUBarrier, "should be enabled");
 538 
 539   if (dst == noreg) return;
 540 
 541   if (ShenandoahIUBarrier) {
 542     save_machine_state(masm, /* handle_gpr = */ true, /* handle_fp = */ true);
 543 
 544 #ifdef _LP64
 545     Register thread = r15_thread;
 546 #else
 547     Register thread = rcx;
 548     if (thread == dst || thread == tmp) {
 549       thread = rdi;
 550     }
 551     if (thread == dst || thread == tmp) {
 552       thread = rbx;
 553     }
 554     __ get_thread(thread);
 555 #endif
 556     assert_different_registers(dst, tmp, thread);
 557 
 558     satb_write_barrier_pre(masm, noreg, dst, thread, tmp, true, false);
 559 
 560     restore_machine_state(masm, /* handle_gpr = */ true, /* handle_fp = */ true);
 561   }
 562 }
 563 
 564 //
 565 // Arguments:
 566 //
 567 // Inputs:
 568 //   src:        oop location, might be clobbered
 569 //   tmp1:       scratch register, might not be valid.
 570 //
 571 // Output:
 572 //   dst:        oop loaded from src location
 573 //
 574 // Kill:
 575 //   tmp1 (if it is valid)
 576 //
 577 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 578              Register dst, Address src, Register tmp1, Register tmp_thread) {
 579   // 1: non-reference load, no additional barrier is needed
 580   if (!is_reference_type(type)) {
 581     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 582     return;
 583   }
 584 
 585   assert((decorators & ON_UNKNOWN_OOP_REF) == 0, "Not expected");
 586 
 587   // 2: load a reference from src location and apply LRB if needed
 588   if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
 589     Register result_dst = dst;
 590     bool use_tmp1_for_dst = false;
 591 
 592     // Preserve src location for LRB
 593     if (dst == src.base() || dst == src.index()) {
 594     // Use tmp1 for dst if possible, as it is not used in BarrierAssembler::load_at()
 595       if (tmp1->is_valid() && tmp1 != src.base() && tmp1 != src.index()) {
 596         dst = tmp1;
 597         use_tmp1_for_dst = true;
 598       } else {
 599         dst = rdi;
 600         __ push(dst);
 601       }
 602       assert_different_registers(dst, src.base(), src.index());
 603     }
 604 
 605     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 606 
 607     load_reference_barrier(masm, dst, src, decorators);
 608 
 609     // Move loaded oop to final destination
 610     if (dst != result_dst) {
 611       __ movptr(result_dst, dst);
 612 
 613       if (!use_tmp1_for_dst) {
 614         __ pop(dst);
 615       }
 616 
 617       dst = result_dst;
 618     }
 619   } else {
 620     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 621   }
 622 
 623   // 3: apply keep-alive barrier if needed
 624   if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
 625     save_machine_state(masm, /* handle_gpr = */ true, /* handle_fp = */ true);
 626 
 627     Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
 628     assert_different_registers(dst, tmp1, tmp_thread);
 629     if (!thread->is_valid()) {
 630       thread = rdx;
 631     }
 632     NOT_LP64(__ get_thread(thread));
 633     // Generate the SATB pre-barrier code to log the value of
 634     // the referent field in an SATB buffer.
 635     shenandoah_write_barrier_pre(masm /* masm */,
 636                                  noreg /* obj */,
 637                                  dst /* pre_val */,
 638                                  thread /* thread */,
 639                                  tmp1 /* tmp */,
 640                                  true /* tosca_live */,
 641                                  true /* expand_call */);
 642 
 643     restore_machine_state(masm, /* handle_gpr = */ true, /* handle_fp = */ true);
 644   }
 645 }
 646 
 647 void ShenandoahBarrierSetAssembler::store_check(MacroAssembler* masm, Register obj) {
 648   assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");
 649 
 650   // Does a store check for the oop in register obj. The content of
 651   // register obj is destroyed afterwards.
 652 
 653   ShenandoahBarrierSet* ctbs = ShenandoahBarrierSet::barrier_set();
 654   CardTable* ct = ctbs->card_table();
 655 
 656   __ shrptr(obj, CardTable::card_shift());
 657 
 658   Address card_addr;
 659 
 660   // The calculation for byte_map_base is as follows:
 661   // byte_map_base = _byte_map - (uintptr_t(low_bound) >> card_shift);
 662   // So this essentially converts an address to a displacement and it will
 663   // never need to be relocated. On 64-bit however the value may be too
 664   // large for a 32-bit displacement.
 665   intptr_t byte_map_base = (intptr_t)ct->byte_map_base();
 666   if (__ is_simm32(byte_map_base)) {
 667     card_addr = Address(noreg, obj, Address::times_1, byte_map_base);
 668   } else {
 669     // By doing it as an ExternalAddress 'byte_map_base' could be converted to a rip-relative
 670     // displacement and done in a single instruction given favorable mapping and a
 671     // smarter version of as_Address. However, 'ExternalAddress' generates a relocation
 672     // entry and that entry is not properly handled by the relocation code.
 673     AddressLiteral cardtable((address)byte_map_base, relocInfo::none);
 674     Address index(noreg, obj, Address::times_1);
 675     card_addr = __ as_Address(ArrayAddress(cardtable, index), rscratch1);
 676   }
 677 
 678   int dirty = CardTable::dirty_card_val();
 679   if (UseCondCardMark) {
 680     Label L_already_dirty;
 681     __ cmpb(card_addr, dirty);
 682     __ jccb(Assembler::equal, L_already_dirty);
 683     __ movb(card_addr, dirty);
 684     __ bind(L_already_dirty);
 685   } else {
 686     __ movb(card_addr, dirty);
 687   }
 688 }
 689 
 690 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 691               Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
 692 
 693   bool on_oop = is_reference_type(type);
 694   bool in_heap = (decorators & IN_HEAP) != 0;
 695   bool as_normal = (decorators & AS_NORMAL) != 0;
 696   if (on_oop && in_heap) {
 697     bool needs_pre_barrier = as_normal;
 698 
 699     Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 700     // flatten object address if needed
 701     // We do it regardless of precise because we need the registers
 702     if (dst.index() == noreg && dst.disp() == 0) {
 703       if (dst.base() != tmp1) {
 704         __ movptr(tmp1, dst.base());
 705       }
 706     } else {
 707       __ lea(tmp1, dst);
 708     }
 709 
 710     assert_different_registers(val, tmp1, tmp2, tmp3, rthread);
 711 
 712 #ifndef _LP64
 713     __ get_thread(rthread);
 714     InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
 715     imasm->save_bcp();
 716 #endif
 717 
 718     if (needs_pre_barrier) {
 719       shenandoah_write_barrier_pre(masm /*masm*/,
 720                                    tmp1 /* obj */,
 721                                    tmp2 /* pre_val */,
 722                                    rthread /* thread */,
 723                                    tmp3  /* tmp */,
 724                                    val != noreg /* tosca_live */,
 725                                    false /* expand_call */);
 726     }
 727     if (val == noreg) {
 728       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg);
 729     } else {
 730       iu_barrier(masm, val, tmp3);
 731       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg, noreg);
 732       if (ShenandoahCardBarrier) {
 733         store_check(masm, tmp1);
 734       }
 735     }
 736     NOT_LP64(imasm->restore_bcp());
 737   } else {
 738     BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2, tmp3);
 739   }
 740 }
 741 
 742 void ShenandoahBarrierSetAssembler::try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
 743                                                                   Register obj, Register tmp, Label& slowpath) {
 744   Label done;
 745   // Resolve jobject
 746   BarrierSetAssembler::try_resolve_jobject_in_native(masm, jni_env, obj, tmp, slowpath);
 747 
 748   // Check for null.
 749   __ testptr(obj, obj);
 750   __ jcc(Assembler::zero, done);
 751 
 752   Address gc_state(jni_env, ShenandoahThreadLocalData::gc_state_offset() - JavaThread::jni_environment_offset());
 753   __ testb(gc_state, ShenandoahHeap::EVACUATION);
 754   __ jccb(Assembler::notZero, slowpath);
 755   __ bind(done);
 756 }
 757 
 758 // Special Shenandoah CAS implementation that handles false negatives
 759 // due to concurrent evacuation.
 760 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
 761                                                 Register res, Address addr, Register oldval, Register newval,
 762                                                 bool exchange, Register tmp1, Register tmp2) {
 763   assert(ShenandoahCASBarrier, "Should only be used when CAS barrier is enabled");
 764   assert(oldval == rax, "must be in rax for implicit use in cmpxchg");
 765   assert_different_registers(oldval, tmp1, tmp2);
 766   assert_different_registers(newval, tmp1, tmp2);
 767 
 768   Label L_success, L_failure;
 769 
 770   // Remember oldval for retry logic below
 771 #ifdef _LP64
 772   if (UseCompressedOops) {
 773     __ movl(tmp1, oldval);
 774   } else
 775 #endif
 776   {
 777     __ movptr(tmp1, oldval);
 778   }
 779 
 780   // Step 1. Fast-path.
 781   //
 782   // Try to CAS with given arguments. If successful, then we are done.
 783 
 784 #ifdef _LP64
 785   if (UseCompressedOops) {
 786     __ lock();
 787     __ cmpxchgl(newval, addr);
 788   } else
 789 #endif
 790   {
 791     __ lock();
 792     __ cmpxchgptr(newval, addr);
 793   }
 794   __ jcc(Assembler::equal, L_success);
 795 
 796   // Step 2. CAS had failed. This may be a false negative.
 797   //
 798   // The trouble comes when we compare the to-space pointer with the from-space
 799   // pointer to the same object. To resolve this, it will suffice to resolve
 800   // the value from memory -- this will give both to-space pointers.
 801   // If they mismatch, then it was a legitimate failure.
 802   //
 803   // Before reaching to resolve sequence, see if we can avoid the whole shebang
 804   // with filters.
 805 
 806   // Filter: when offending in-memory value is null, the failure is definitely legitimate
 807   __ testptr(oldval, oldval);
 808   __ jcc(Assembler::zero, L_failure);
 809 
 810   // Filter: when heap is stable, the failure is definitely legitimate
 811 #ifdef _LP64
 812   const Register thread = r15_thread;
 813 #else
 814   const Register thread = tmp2;
 815   __ get_thread(thread);
 816 #endif
 817   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 818   __ testb(gc_state, ShenandoahHeap::HAS_FORWARDED);
 819   __ jcc(Assembler::zero, L_failure);
 820 
 821 #ifdef _LP64
 822   if (UseCompressedOops) {
 823     __ movl(tmp2, oldval);
 824     __ decode_heap_oop(tmp2);
 825   } else
 826 #endif
 827   {
 828     __ movptr(tmp2, oldval);
 829   }
 830 
 831   // Decode offending in-memory value.
 832   // Test if-forwarded
 833   __ testb(Address(tmp2, oopDesc::mark_offset_in_bytes()), markWord::marked_value);
 834   __ jcc(Assembler::noParity, L_failure);  // When odd number of bits, then not forwarded
 835   __ jcc(Assembler::zero, L_failure);      // When it is 00, then also not forwarded
 836 
 837   // Load and mask forwarding pointer
 838   __ movptr(tmp2, Address(tmp2, oopDesc::mark_offset_in_bytes()));
 839   __ shrptr(tmp2, 2);
 840   __ shlptr(tmp2, 2);
 841 
 842 #ifdef _LP64
 843   if (UseCompressedOops) {
 844     __ decode_heap_oop(tmp1); // decode for comparison
 845   }
 846 #endif
 847 
 848   // Now we have the forwarded offender in tmp2.
 849   // Compare and if they don't match, we have legitimate failure
 850   __ cmpptr(tmp1, tmp2);
 851   __ jcc(Assembler::notEqual, L_failure);
 852 
 853   // Step 3. Need to fix the memory ptr before continuing.
 854   //
 855   // At this point, we have from-space oldval in the register, and its to-space
 856   // address is in tmp2. Let's try to update it into memory. We don't care if it
 857   // succeeds or not. If it does, then the retrying CAS would see it and succeed.
 858   // If this fixup fails, this means somebody else beat us to it, and necessarily
 859   // with to-space ptr store. We still have to do the retry, because the GC might
 860   // have updated the reference for us.
 861 
 862 #ifdef _LP64
 863   if (UseCompressedOops) {
 864     __ encode_heap_oop(tmp2); // previously decoded at step 2.
 865   }
 866 #endif
 867 
 868 #ifdef _LP64
 869   if (UseCompressedOops) {
 870     __ lock();
 871     __ cmpxchgl(tmp2, addr);
 872   } else
 873 #endif
 874   {
 875     __ lock();
 876     __ cmpxchgptr(tmp2, addr);
 877   }
 878 
 879   // Step 4. Try to CAS again.
 880   //
 881   // This is guaranteed not to have false negatives, because oldval is definitely
 882   // to-space, and memory pointer is to-space as well. Nothing is able to store
 883   // from-space ptr into memory anymore. Make sure oldval is restored, after being
 884   // garbled during retries.
 885   //
 886 #ifdef _LP64
 887   if (UseCompressedOops) {
 888     __ movl(oldval, tmp2);
 889   } else
 890 #endif
 891   {
 892     __ movptr(oldval, tmp2);
 893   }
 894 
 895 #ifdef _LP64
 896   if (UseCompressedOops) {
 897     __ lock();
 898     __ cmpxchgl(newval, addr);
 899   } else
 900 #endif
 901   {
 902     __ lock();
 903     __ cmpxchgptr(newval, addr);
 904   }
 905   if (!exchange) {
 906     __ jccb(Assembler::equal, L_success); // fastpath, peeking into Step 5, no need to jump
 907   }
 908 
 909   // Step 5. If we need a boolean result out of CAS, set the flag appropriately.
 910   // and promote the result. Note that we handle the flag from both the 1st and 2nd CAS.
 911   // Otherwise, failure witness for CAE is in oldval on all paths, and we can return.
 912 
 913   if (exchange) {
 914     __ bind(L_failure);
 915     __ bind(L_success);
 916   } else {
 917     assert(res != noreg, "need result register");
 918 
 919     Label exit;
 920     __ bind(L_failure);
 921     __ xorptr(res, res);
 922     __ jmpb(exit);
 923 
 924     __ bind(L_success);
 925     __ movptr(res, 1);
 926     __ bind(exit);
 927   }
 928 }
 929 
 930 #ifdef PRODUCT
 931 #define BLOCK_COMMENT(str) /* nothing */
 932 #else
 933 #define BLOCK_COMMENT(str) __ block_comment(str)
 934 #endif
 935 
 936 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
 937 
 938 #define TIMES_OOP (UseCompressedOops ? Address::times_4 : Address::times_8)
 939 
 940 void ShenandoahBarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
 941                                                                      Register addr, Register count,
 942                                                                      Register tmp) {
 943   assert(ShenandoahCardBarrier, "Did you mean to enable ShenandoahCardBarrier?");
 944 
 945   ShenandoahBarrierSet* bs = ShenandoahBarrierSet::barrier_set();
 946   CardTable* ct = bs->card_table();
 947   intptr_t disp = (intptr_t) ct->byte_map_base();
 948 
 949   Label L_loop, L_done;
 950   const Register end = count;
 951   assert_different_registers(addr, end);
 952 
 953   // Zero count? Nothing to do.
 954   __ testl(count, count);
 955   __ jccb(Assembler::zero, L_done);
 956 
 957 #ifdef _LP64
 958   __ leaq(end, Address(addr, count, TIMES_OOP, 0));  // end == addr+count*oop_size
 959   __ subptr(end, BytesPerHeapOop); // end - 1 to make inclusive
 960   __ shrptr(addr, CardTable::card_shift());
 961   __ shrptr(end, CardTable::card_shift());
 962   __ subptr(end, addr); // end --> cards count
 963 
 964   __ mov64(tmp, disp);
 965   __ addptr(addr, tmp);
 966 
 967   __ BIND(L_loop);
 968   __ movb(Address(addr, count, Address::times_1), 0);
 969   __ decrement(count);
 970   __ jccb(Assembler::greaterEqual, L_loop);
 971 #else
 972   __ lea(end, Address(addr, count, Address::times_ptr, -wordSize));
 973   __ shrptr(addr, CardTable::card_shift());
 974   __ shrptr(end,  CardTable::card_shift());
 975   __ subptr(end, addr); // end --> count
 976 
 977   __ BIND(L_loop);
 978   Address cardtable(addr, count, Address::times_1, disp);
 979   __ movb(cardtable, 0);
 980   __ decrement(count);
 981   __ jccb(Assembler::greaterEqual, L_loop);
 982 #endif
 983 
 984   __ BIND(L_done);
 985 }
 986 
 987 #undef __
 988 
 989 #ifdef COMPILER1
 990 
 991 #define __ ce->masm()->
 992 
 993 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
 994   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 995   // At this point we know that marking is in progress.
 996   // If do_load() is true then we have to emit the
 997   // load of the previous value; otherwise it has already
 998   // been loaded into _pre_val.
 999 
1000   __ bind(*stub->entry());
1001   assert(stub->pre_val()->is_register(), "Precondition.");
1002 
1003   Register pre_val_reg = stub->pre_val()->as_register();
1004 
1005   if (stub->do_load()) {
1006     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
1007   }
1008 
1009   __ cmpptr(pre_val_reg, NULL_WORD);
1010   __ jcc(Assembler::equal, *stub->continuation());
1011   ce->store_parameter(stub->pre_val()->as_register(), 0);
1012   __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
1013   __ jmp(*stub->continuation());
1014 
1015 }
1016 
1017 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
1018   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
1019   __ bind(*stub->entry());
1020 
1021   DecoratorSet decorators = stub->decorators();
1022   bool is_strong  = ShenandoahBarrierSet::is_strong_access(decorators);
1023   bool is_weak    = ShenandoahBarrierSet::is_weak_access(decorators);
1024   bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
1025   bool is_native  = ShenandoahBarrierSet::is_native_access(decorators);
1026 
1027   Register obj = stub->obj()->as_register();
1028   Register res = stub->result()->as_register();
1029   Register addr = stub->addr()->as_pointer_register();
1030   Register tmp1 = stub->tmp1()->as_register();
1031   Register tmp2 = stub->tmp2()->as_register();
1032   assert_different_registers(obj, res, addr, tmp1, tmp2);
1033 
1034   Label slow_path;
1035 
1036   assert(res == rax, "result must arrive in rax");
1037 
1038   if (res != obj) {
1039     __ mov(res, obj);
1040   }
1041 
1042   if (is_strong) {
1043     // Check for object being in the collection set.
1044     __ mov(tmp1, res);
1045     __ shrptr(tmp1, ShenandoahHeapRegion::region_size_bytes_shift_jint());
1046     __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
1047 #ifdef _LP64
1048     __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
1049     __ testbool(tmp2);
1050 #else
1051     // On x86_32, C1 register allocator can give us the register without 8-bit support.
1052     // Do the full-register access and test to avoid compilation failures.
1053     __ movptr(tmp2, Address(tmp2, tmp1, Address::times_1));
1054     __ testptr(tmp2, 0xFF);
1055 #endif
1056     __ jcc(Assembler::zero, *stub->continuation());
1057   }
1058 
1059   __ bind(slow_path);
1060   ce->store_parameter(res, 0);
1061   ce->store_parameter(addr, 1);
1062   if (is_strong) {
1063     if (is_native) {
1064       __ call(RuntimeAddress(bs->load_reference_barrier_strong_native_rt_code_blob()->code_begin()));
1065     } else {
1066       __ call(RuntimeAddress(bs->load_reference_barrier_strong_rt_code_blob()->code_begin()));
1067     }
1068   } else if (is_weak) {
1069     __ call(RuntimeAddress(bs->load_reference_barrier_weak_rt_code_blob()->code_begin()));
1070   } else {
1071     assert(is_phantom, "only remaining strength");
1072     __ call(RuntimeAddress(bs->load_reference_barrier_phantom_rt_code_blob()->code_begin()));
1073   }
1074   __ jmp(*stub->continuation());
1075 }
1076 
1077 #undef __
1078 
1079 #define __ sasm->
1080 
1081 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
1082   __ prologue("shenandoah_pre_barrier", false);
1083   // arg0 : previous value of memory
1084 
1085   __ push(rax);
1086   __ push(rdx);
1087 
1088   const Register pre_val = rax;
1089   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
1090   const Register tmp = rdx;
1091 
1092   NOT_LP64(__ get_thread(thread);)
1093 
1094   Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
1095   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
1096 
1097   Label done;
1098   Label runtime;
1099 
1100   // Is SATB still active?
1101   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
1102   __ testb(gc_state, ShenandoahHeap::MARKING);
1103   __ jcc(Assembler::zero, done);
1104 
1105   // Can we store original value in the thread's buffer?
1106 
1107   __ movptr(tmp, queue_index);
1108   __ testptr(tmp, tmp);
1109   __ jcc(Assembler::zero, runtime);
1110   __ subptr(tmp, wordSize);
1111   __ movptr(queue_index, tmp);
1112   __ addptr(tmp, buffer);
1113 
1114   // prev_val (rax)
1115   __ load_parameter(0, pre_val);
1116   __ movptr(Address(tmp, 0), pre_val);
1117   __ jmp(done);
1118 
1119   __ bind(runtime);
1120 
1121   __ save_live_registers_no_oop_map(true);
1122 
1123   // load the pre-value
1124   __ load_parameter(0, rcx);
1125   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), rcx, thread);
1126 
1127   __ restore_live_registers(true);
1128 
1129   __ bind(done);
1130 
1131   __ pop(rdx);
1132   __ pop(rax);
1133 
1134   __ epilogue();
1135 }
1136 
1137 void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators) {
1138   __ prologue("shenandoah_load_reference_barrier", false);
1139   // arg0 : object to be resolved
1140 
1141   __ save_live_registers_no_oop_map(true);
1142 
1143   bool is_strong  = ShenandoahBarrierSet::is_strong_access(decorators);
1144   bool is_weak    = ShenandoahBarrierSet::is_weak_access(decorators);
1145   bool is_phantom = ShenandoahBarrierSet::is_phantom_access(decorators);
1146   bool is_native  = ShenandoahBarrierSet::is_native_access(decorators);
1147 
1148 #ifdef _LP64
1149   __ load_parameter(0, c_rarg0);
1150   __ load_parameter(1, c_rarg1);
1151   if (is_strong) {
1152     if (is_native) {
1153       __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong), c_rarg0, c_rarg1);
1154     } else {
1155       if (UseCompressedOops) {
1156         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong_narrow), c_rarg0, c_rarg1);
1157       } else {
1158         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong), c_rarg0, c_rarg1);
1159       }
1160     }
1161   } else if (is_weak) {
1162     assert(!is_native, "weak must not be called off-heap");
1163     if (UseCompressedOops) {
1164       __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak_narrow), c_rarg0, c_rarg1);
1165     } else {
1166       __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak), c_rarg0, c_rarg1);
1167     }
1168   } else {
1169     assert(is_phantom, "only remaining strength");
1170     assert(is_native, "phantom must only be called off-heap");
1171     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom), c_rarg0, c_rarg1);
1172   }
1173 #else
1174   __ load_parameter(0, rax);
1175   __ load_parameter(1, rbx);
1176   if (is_strong) {
1177     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_strong), rax, rbx);
1178   } else if (is_weak) {
1179     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak), rax, rbx);
1180   } else {
1181     assert(is_phantom, "only remaining strength");
1182     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom), rax, rbx);
1183   }
1184 #endif
1185 
1186   __ restore_live_registers_except_rax(true);
1187 
1188   __ epilogue();
1189 }
1190 
1191 #undef __
1192 
1193 #endif // COMPILER1
--- EOF ---