1 /*
2 * Copyright (c) 2018, 2024, Red Hat, Inc. All rights reserved.
3 * Copyright Amazon.com Inc. or its affiliates. All Rights Reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_IR.hpp"
28 #include "gc/shared/satbMarkQueue.hpp"
29 #include "gc/shenandoah/mode/shenandoahMode.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
31 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
32 #include "gc/shenandoah/shenandoahHeap.inline.hpp"
33 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
34 #include "gc/shenandoah/shenandoahRuntime.hpp"
35 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
36 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
37
38 #ifdef ASSERT
39 #define __ gen->lir(__FILE__, __LINE__)->
40 #else
41 #define __ gen->lir()->
42 #endif
43
44 void ShenandoahPreBarrierStub::emit_code(LIR_Assembler* ce) {
45 ShenandoahBarrierSetAssembler* bs = (ShenandoahBarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
46 bs->gen_pre_barrier_stub(ce, this);
47 }
48
49 void ShenandoahLoadReferenceBarrierStub::emit_code(LIR_Assembler* ce) {
50 ShenandoahBarrierSetAssembler* bs = (ShenandoahBarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
51 bs->gen_load_reference_barrier_stub(ce, this);
52 }
53
54 ShenandoahBarrierSetC1::ShenandoahBarrierSetC1() :
55 _pre_barrier_c1_runtime_code_blob(nullptr),
56 _load_reference_barrier_strong_rt_code_blob(nullptr),
57 _load_reference_barrier_strong_native_rt_code_blob(nullptr),
58 _load_reference_barrier_weak_rt_code_blob(nullptr),
59 _load_reference_barrier_phantom_rt_code_blob(nullptr) {}
60
61 void ShenandoahBarrierSetC1::pre_barrier(LIRGenerator* gen, CodeEmitInfo* info, DecoratorSet decorators, LIR_Opr addr_opr, LIR_Opr pre_val) {
62 // First we test whether marking is in progress.
63
64 bool patch = (decorators & C1_NEEDS_PATCHING) != 0;
65 bool do_load = pre_val == LIR_OprFact::illegalOpr;
66
67 LIR_Opr thrd = gen->getThreadPointer();
68 LIR_Address* gc_state_addr =
69 new LIR_Address(thrd,
70 in_bytes(ShenandoahThreadLocalData::gc_state_offset()),
71 T_BYTE);
72 // Read the gc_state flag.
73 LIR_Opr flag_val = gen->new_register(T_INT);
74 __ load(gc_state_addr, flag_val);
75
76 // Create a mask to test if the marking bit is set.
77 LIR_Opr mask = LIR_OprFact::intConst(ShenandoahHeap::MARKING);
78 LIR_Opr mask_reg = gen->new_register(T_INT);
79 __ move(mask, mask_reg);
80
81 if (two_operand_lir_form) {
82 __ logical_and(flag_val, mask_reg, flag_val);
83 } else {
84 LIR_Opr masked_flag = gen->new_register(T_INT);
85 __ logical_and(flag_val, mask_reg, masked_flag);
86 flag_val = masked_flag;
87 }
88 __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
89
90 LIR_PatchCode pre_val_patch_code = lir_patch_none;
91
92 CodeStub* slow;
93
94 if (do_load) {
95 assert(pre_val == LIR_OprFact::illegalOpr, "sanity");
96 assert(addr_opr != LIR_OprFact::illegalOpr, "sanity");
97
98 if (patch)
99 pre_val_patch_code = lir_patch_normal;
100
101 pre_val = gen->new_register(T_OBJECT);
102
103 if (!addr_opr->is_address()) {
104 assert(addr_opr->is_register(), "must be");
105 addr_opr = LIR_OprFact::address(new LIR_Address(addr_opr, T_OBJECT));
106 }
107 slow = new ShenandoahPreBarrierStub(addr_opr, pre_val, pre_val_patch_code, info ? new CodeEmitInfo(info) : nullptr);
108 } else {
109 assert(addr_opr == LIR_OprFact::illegalOpr, "sanity");
110 assert(pre_val->is_register(), "must be");
111 assert(pre_val->type() == T_OBJECT, "must be an object");
112
113 slow = new ShenandoahPreBarrierStub(pre_val);
114 }
115
116 __ branch(lir_cond_notEqual, slow);
117 __ branch_destination(slow->continuation());
118 }
119
120 LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier(LIRGenerator* gen, LIR_Opr obj, LIR_Opr addr, DecoratorSet decorators) {
121 if (ShenandoahLoadRefBarrier) {
122 return load_reference_barrier_impl(gen, obj, addr, decorators);
123 } else {
124 return obj;
125 }
126 }
127
128 LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier_impl(LIRGenerator* gen, LIR_Opr obj, LIR_Opr addr, DecoratorSet decorators) {
129 assert(ShenandoahLoadRefBarrier, "Should be enabled");
130
131 obj = ensure_in_register(gen, obj, T_OBJECT);
132 assert(obj->is_register(), "must be a register at this point");
133 addr = ensure_in_register(gen, addr, T_ADDRESS);
134 assert(addr->is_register(), "must be a register at this point");
135 LIR_Opr result = gen->result_register_for(obj->value_type());
136 __ move(obj, result);
137 LIR_Opr tmp1 = gen->new_register(T_ADDRESS);
138 LIR_Opr tmp2 = gen->new_register(T_ADDRESS);
139
140 LIR_Opr thrd = gen->getThreadPointer();
141 LIR_Address* active_flag_addr =
142 new LIR_Address(thrd,
143 in_bytes(ShenandoahThreadLocalData::gc_state_offset()),
144 T_BYTE);
145 // Read and check the gc-state-flag.
146 LIR_Opr flag_val = gen->new_register(T_INT);
147 __ load(active_flag_addr, flag_val);
148 int flags = ShenandoahHeap::HAS_FORWARDED;
149 if (!ShenandoahBarrierSet::is_strong_access(decorators)) {
150 flags |= ShenandoahHeap::WEAK_ROOTS;
151 }
152 LIR_Opr mask = LIR_OprFact::intConst(flags);
153 LIR_Opr mask_reg = gen->new_register(T_INT);
154 __ move(mask, mask_reg);
155
156 if (two_operand_lir_form) {
157 __ logical_and(flag_val, mask_reg, flag_val);
158 } else {
159 LIR_Opr masked_flag = gen->new_register(T_INT);
160 __ logical_and(flag_val, mask_reg, masked_flag);
161 flag_val = masked_flag;
162 }
163 __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
164
165 CodeStub* slow = new ShenandoahLoadReferenceBarrierStub(obj, addr, result, tmp1, tmp2, decorators);
166 __ branch(lir_cond_notEqual, slow);
167 __ branch_destination(slow->continuation());
168
169 return result;
170 }
171
172 LIR_Opr ShenandoahBarrierSetC1::ensure_in_register(LIRGenerator* gen, LIR_Opr obj, BasicType type) {
173 if (!obj->is_register()) {
174 LIR_Opr obj_reg;
175 if (obj->is_constant()) {
176 obj_reg = gen->new_register(type);
177 __ move(obj, obj_reg);
178 } else {
179 obj_reg = gen->new_pointer_register();
180 __ leal(obj, obj_reg);
181 }
182 obj = obj_reg;
183 }
184 return obj;
185 }
186
187 void ShenandoahBarrierSetC1::store_at_resolved(LIRAccess& access, LIR_Opr value) {
188 if (access.is_oop()) {
189 if (ShenandoahSATBBarrier) {
190 pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), access.resolved_addr(), LIR_OprFact::illegalOpr /* pre_val */);
191 }
192 }
193 BarrierSetC1::store_at_resolved(access, value);
194
195 if (ShenandoahCardBarrier && access.is_oop()) {
196 DecoratorSet decorators = access.decorators();
197 bool is_array = (decorators & IS_ARRAY) != 0;
198 bool on_anonymous = (decorators & ON_UNKNOWN_OOP_REF) != 0;
199
200 bool precise = is_array || on_anonymous;
201 LIR_Opr post_addr = precise ? access.resolved_addr() : access.base().opr();
202 post_barrier(access, post_addr, value);
203 }
204 }
205
206 LIR_Opr ShenandoahBarrierSetC1::resolve_address(LIRAccess& access, bool resolve_in_register) {
207 // We must resolve in register when patching. This is to avoid
208 // having a patch area in the load barrier stub, since the call
209 // into the runtime to patch will not have the proper oop map.
210 const bool patch_before_barrier = access.is_oop() && (access.decorators() & C1_NEEDS_PATCHING) != 0;
211 return BarrierSetC1::resolve_address(access, resolve_in_register || patch_before_barrier);
212 }
213
214 void ShenandoahBarrierSetC1::load_at_resolved(LIRAccess& access, LIR_Opr result) {
215 // 1: non-reference load, no additional barrier is needed
216 if (!access.is_oop()) {
217 BarrierSetC1::load_at_resolved(access, result);
218 return;
219 }
220
221 LIRGenerator* gen = access.gen();
222 DecoratorSet decorators = access.decorators();
223 BasicType type = access.type();
224
225 // 2: load a reference from src location and apply LRB if ShenandoahLoadRefBarrier is set
226 if (ShenandoahBarrierSet::need_load_reference_barrier(decorators, type)) {
227 LIR_Opr tmp = gen->new_register(T_OBJECT);
228 BarrierSetC1::load_at_resolved(access, tmp);
229 tmp = load_reference_barrier(gen, tmp, access.resolved_addr(), decorators);
230 __ move(tmp, result);
231 } else {
232 BarrierSetC1::load_at_resolved(access, result);
233 }
234
235 // 3: apply keep-alive barrier for java.lang.ref.Reference if needed
236 if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
237 bool is_anonymous = (decorators & ON_UNKNOWN_OOP_REF) != 0;
238
239 // Register the value in the referent field with the pre-barrier
240 LabelObj *Lcont_anonymous;
241 if (is_anonymous) {
242 Lcont_anonymous = new LabelObj();
243 generate_referent_check(access, Lcont_anonymous);
244 }
245 pre_barrier(gen, access.access_emit_info(), decorators, LIR_OprFact::illegalOpr /* addr_opr */,
246 result /* pre_val */);
247 if (is_anonymous) {
248 __ branch_destination(Lcont_anonymous->label());
249 }
250 }
251 }
252
253 class C1ShenandoahPreBarrierCodeGenClosure : public StubAssemblerCodeGenClosure {
254 virtual OopMapSet* generate_code(StubAssembler* sasm) {
255 ShenandoahBarrierSetAssembler* bs = (ShenandoahBarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
256 bs->generate_c1_pre_barrier_runtime_stub(sasm);
257 return nullptr;
258 }
259 };
260
261 class C1ShenandoahLoadReferenceBarrierCodeGenClosure : public StubAssemblerCodeGenClosure {
262 private:
263 const DecoratorSet _decorators;
264
265 public:
266 C1ShenandoahLoadReferenceBarrierCodeGenClosure(DecoratorSet decorators) : _decorators(decorators) {}
267
268 virtual OopMapSet* generate_code(StubAssembler* sasm) {
269 ShenandoahBarrierSetAssembler* bs = (ShenandoahBarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
270 bs->generate_c1_load_reference_barrier_runtime_stub(sasm, _decorators);
271 return nullptr;
272 }
273 };
274
275 void ShenandoahBarrierSetC1::generate_c1_runtime_stubs(BufferBlob* buffer_blob) {
276 C1ShenandoahPreBarrierCodeGenClosure pre_code_gen_cl;
277 _pre_barrier_c1_runtime_code_blob = Runtime1::generate_blob(buffer_blob, C1StubId::NO_STUBID,
278 "shenandoah_pre_barrier_slow",
279 false, &pre_code_gen_cl);
280 if (ShenandoahLoadRefBarrier) {
281 C1ShenandoahLoadReferenceBarrierCodeGenClosure lrb_strong_code_gen_cl(ON_STRONG_OOP_REF);
282 _load_reference_barrier_strong_rt_code_blob = Runtime1::generate_blob(buffer_blob, C1StubId::NO_STUBID,
283 "shenandoah_load_reference_barrier_strong_slow",
284 false, &lrb_strong_code_gen_cl);
285
286 C1ShenandoahLoadReferenceBarrierCodeGenClosure lrb_strong_native_code_gen_cl(ON_STRONG_OOP_REF | IN_NATIVE);
287 _load_reference_barrier_strong_native_rt_code_blob = Runtime1::generate_blob(buffer_blob, C1StubId::NO_STUBID,
288 "shenandoah_load_reference_barrier_strong_native_slow",
289 false, &lrb_strong_native_code_gen_cl);
290
291 C1ShenandoahLoadReferenceBarrierCodeGenClosure lrb_weak_code_gen_cl(ON_WEAK_OOP_REF);
292 _load_reference_barrier_weak_rt_code_blob = Runtime1::generate_blob(buffer_blob, C1StubId::NO_STUBID,
293 "shenandoah_load_reference_barrier_weak_slow",
294 false, &lrb_weak_code_gen_cl);
295
296 C1ShenandoahLoadReferenceBarrierCodeGenClosure lrb_phantom_code_gen_cl(ON_PHANTOM_OOP_REF | IN_NATIVE);
297 _load_reference_barrier_phantom_rt_code_blob = Runtime1::generate_blob(buffer_blob, C1StubId::NO_STUBID,
298 "shenandoah_load_reference_barrier_phantom_slow",
299 false, &lrb_phantom_code_gen_cl);
300 }
301 }
302
303 void ShenandoahBarrierSetC1::post_barrier(LIRAccess& access, LIR_Opr addr, LIR_Opr new_val) {
304 assert(ShenandoahCardBarrier, "Should have been checked by caller");
305
306 DecoratorSet decorators = access.decorators();
307 LIRGenerator* gen = access.gen();
308 bool in_heap = (decorators & IN_HEAP) != 0;
309 if (!in_heap) {
310 return;
311 }
312
313 BarrierSet* bs = BarrierSet::barrier_set();
314 ShenandoahBarrierSet* ctbs = barrier_set_cast<ShenandoahBarrierSet>(bs);
315 CardTable* ct = ctbs->card_table();
316 LIR_Const* card_table_base = new LIR_Const(ct->byte_map_base());
317 if (addr->is_address()) {
318 LIR_Address* address = addr->as_address_ptr();
319 // ptr cannot be an object because we use this barrier for array card marks
320 // and addr can point in the middle of an array.
321 LIR_Opr ptr = gen->new_pointer_register();
322 if (!address->index()->is_valid() && address->disp() == 0) {
323 __ move(address->base(), ptr);
324 } else {
325 assert(address->disp() != max_jint, "lea doesn't support patched addresses!");
326 __ leal(addr, ptr);
327 }
328 addr = ptr;
329 }
330 assert(addr->is_register(), "must be a register at this point");
331
332 LIR_Opr tmp = gen->new_pointer_register();
333 if (two_operand_lir_form) {
334 __ move(addr, tmp);
335 __ unsigned_shift_right(tmp, CardTable::card_shift(), tmp);
336 } else {
337 __ unsigned_shift_right(addr, CardTable::card_shift(), tmp);
338 }
339
340 LIR_Address* card_addr;
341 if (gen->can_inline_as_constant(card_table_base)) {
342 card_addr = new LIR_Address(tmp, card_table_base->as_jint(), T_BYTE);
343 } else {
344 card_addr = new LIR_Address(tmp, gen->load_constant(card_table_base), T_BYTE);
345 }
346
347 LIR_Opr dirty = LIR_OprFact::intConst(CardTable::dirty_card_val());
348 if (UseCondCardMark) {
349 LIR_Opr cur_value = gen->new_register(T_INT);
350 __ move(card_addr, cur_value);
351
352 LabelObj* L_already_dirty = new LabelObj();
353 __ cmp(lir_cond_equal, cur_value, dirty);
354 __ branch(lir_cond_equal, L_already_dirty->label());
355 __ move(dirty, card_addr);
356 __ branch_destination(L_already_dirty->label());
357 } else {
358 __ move(dirty, card_addr);
359 }
360 }