1673
1674 int MachCallDynamicJavaNode::ret_addr_offset()
1675 {
1676 return 16; // movz, movk, movk, bl
1677 }
1678
1679 int MachCallRuntimeNode::ret_addr_offset() {
1680 // for generated stubs the call will be
1681 // bl(addr)
1682 // or with far branches
1683 // bl(trampoline_stub)
1684 // for real runtime callouts it will be six instructions
1685 // see aarch64_enc_java_to_runtime
1686 // adr(rscratch2, retaddr)
1687 // str(rscratch2, Address(rthread, JavaThread::last_Java_pc_offset()));
1688 // lea(rscratch1, RuntimeAddress(addr)
1689 // blr(rscratch1)
1690 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1691 if (cb) {
1692 return 1 * NativeInstruction::instruction_size;
1693 } else {
1694 return 6 * NativeInstruction::instruction_size;
1695 }
1696 }
1697
1698 //=============================================================================
1699
1700 #ifndef PRODUCT
1701 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1702 st->print("BREAKPOINT");
1703 }
1704 #endif
1705
1706 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1707 __ brk(0);
1708 }
1709
1710 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1711 return MachNode::size(ra_);
1712 }
1781 if (C->stub_function() == nullptr) {
1782 st->print("\n\t");
1783 st->print("ldr rscratch1, [guard]\n\t");
1784 st->print("dmb ishld\n\t");
1785 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1786 st->print("cmp rscratch1, rscratch2\n\t");
1787 st->print("b.eq skip");
1788 st->print("\n\t");
1789 st->print("blr #nmethod_entry_barrier_stub\n\t");
1790 st->print("b skip\n\t");
1791 st->print("guard: int\n\t");
1792 st->print("\n\t");
1793 st->print("skip:\n\t");
1794 }
1795 }
1796 #endif
1797
1798 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1799 Compile* C = ra_->C;
1800
1801 // n.b. frame size includes space for return pc and rfp
1802 const int framesize = C->output()->frame_size_in_bytes();
1803
1804 if (C->clinit_barrier_on_entry()) {
1805 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
1806
1807 Label L_skip_barrier;
1808
1809 __ mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
1810 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1811 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1812 __ bind(L_skip_barrier);
1813 }
1814
1815 if (C->max_vector_size() > 0) {
1816 __ reinitialize_ptrue();
1817 }
1818
1819 int bangsize = C->output()->bang_size_in_bytes();
1820 if (C->output()->need_stack_bang(bangsize))
1821 __ generate_stack_overflow_check(bangsize);
1822
1823 __ build_frame(framesize);
1824
1825 if (C->stub_function() == nullptr) {
1826 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1827 // Dummy labels for just measuring the code size
1828 Label dummy_slow_path;
1829 Label dummy_continuation;
1830 Label dummy_guard;
1831 Label* slow_path = &dummy_slow_path;
1832 Label* continuation = &dummy_continuation;
1833 Label* guard = &dummy_guard;
1834 if (!Compile::current()->output()->in_scratch_emit_size()) {
1835 // Use real labels from actual stub when not emitting code for the purpose of measuring its size
1836 C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
1837 Compile::current()->output()->add_stub(stub);
1838 slow_path = &stub->entry();
1839 continuation = &stub->continuation();
1840 guard = &stub->guard();
1841 }
1842 // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
1843 bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
1844 }
1845
1846 if (VerifyStackAtCalls) {
1847 Unimplemented();
1848 }
1849
1850 C->output()->set_frame_complete(__ offset());
1851
1852 if (C->has_mach_constant_base_node()) {
1853 // NOTE: We set the table base offset here because users might be
1854 // emitted before MachConstantBaseNode.
1855 ConstantTable& constant_table = C->output()->constant_table();
1856 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1857 }
1858 }
1859
1860 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
1861 {
1862 return MachNode::size(ra_); // too many variables; just compute it
1863 // the hard way
1864 }
1865
1866 int MachPrologNode::reloc() const
1867 {
1868 return 0;
1869 }
1870
1871 //=============================================================================
1872
1873 #ifndef PRODUCT
1874 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1875 Compile* C = ra_->C;
1876 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1877
1878 st->print("# pop frame %d\n\t",framesize);
1879
1880 if (framesize == 0) {
1881 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1882 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1883 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1884 st->print("add sp, sp, #%d\n\t", framesize);
1885 } else {
1888 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1889 }
1890 if (VM_Version::use_rop_protection()) {
1891 st->print("autiaz\n\t");
1892 st->print("ldr zr, [lr]\n\t");
1893 }
1894
1895 if (do_polling() && C->is_method_compilation()) {
1896 st->print("# test polling word\n\t");
1897 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1898 st->print("cmp sp, rscratch1\n\t");
1899 st->print("bhi #slow_path");
1900 }
1901 }
1902 #endif
1903
1904 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1905 Compile* C = ra_->C;
1906 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1907
1908 __ remove_frame(framesize);
1909
1910 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1911 __ reserved_stack_check();
1912 }
1913
1914 if (do_polling() && C->is_method_compilation()) {
1915 Label dummy_label;
1916 Label* code_stub = &dummy_label;
1917 if (!C->output()->in_scratch_emit_size()) {
1918 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1919 C->output()->add_stub(stub);
1920 code_stub = &stub->entry();
1921 }
1922 __ relocate(relocInfo::poll_return_type);
1923 __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
1924 }
1925 }
1926
1927 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
1928 // Variable size. Determine dynamically.
1929 return MachNode::size(ra_);
1930 }
1931
1932 int MachEpilogNode::reloc() const {
1933 // Return number of relocatable values contained in this instruction.
1934 return 1; // 1 for polling page.
1935 }
1936
1937 const Pipeline * MachEpilogNode::pipeline() const {
1938 return MachNode::pipeline_class();
1939 }
1940
1941 //=============================================================================
1942
1943 static enum RC rc_class(OptoReg::Name reg) {
1944
1945 if (reg == OptoReg::Bad) {
1946 return rc_bad;
1947 }
1948
1949 // we have 32 int registers * 2 halves
1950 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1951
2207 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2208 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2209 int reg = ra_->get_encode(this);
2210
2211 // This add will handle any 24-bit signed offset. 24 bits allows an
2212 // 8 megabyte stack frame.
2213 __ add(as_Register(reg), sp, offset);
2214 }
2215
2216 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2217 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2218 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2219
2220 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2221 return NativeInstruction::instruction_size;
2222 } else {
2223 return 2 * NativeInstruction::instruction_size;
2224 }
2225 }
2226
2227 //=============================================================================
2228
2229 #ifndef PRODUCT
2230 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2231 {
2232 st->print_cr("# MachUEPNode");
2233 if (UseCompressedClassPointers) {
2234 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2235 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2236 st->print_cr("\tcmpw rscratch1, r10");
2237 } else {
2238 st->print_cr("\tldr rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2239 st->print_cr("\tldr r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2240 st->print_cr("\tcmp rscratch1, r10");
2241 }
2242 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2243 }
2244 #endif
2245
2246 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2247 {
2248 __ ic_check(InteriorEntryAlignment);
2249 }
2250
2251 uint MachUEPNode::size(PhaseRegAlloc* ra_) const
2252 {
2253 return MachNode::size(ra_);
2254 }
2255
2256 // REQUIRED EMIT CODE
2257
2258 //=============================================================================
2259
2260 // Emit deopt handler code.
2261 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
2262 {
2263 // Note that the code buffer's insts_mark is always relative to insts.
2264 // That's why we must use the macroassembler to generate a handler.
2265 address base = __ start_a_stub(size_deopt_handler());
2266 if (base == nullptr) {
2267 ciEnv::current()->record_failure("CodeCache is full");
2268 return 0; // CodeBuffer::expand failed
2269 }
2270
2271 int offset = __ offset();
2272 Label start;
2273 __ bind(start);
2274 __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
2275
3724 %}
3725
3726 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3727 int method_index = resolved_method_index(masm);
3728 address call = __ ic_call((address)$meth$$method, method_index);
3729 if (call == nullptr) {
3730 ciEnv::current()->record_failure("CodeCache is full");
3731 return;
3732 }
3733 __ post_call_nop();
3734 if (Compile::current()->max_vector_size() > 0) {
3735 __ reinitialize_ptrue();
3736 }
3737 %}
3738
3739 enc_class aarch64_enc_call_epilog() %{
3740 if (VerifyStackAtCalls) {
3741 // Check that stack depth is unchanged: find majik cookie on stack
3742 __ call_Unimplemented();
3743 }
3744 %}
3745
3746 enc_class aarch64_enc_java_to_runtime(method meth) %{
3747 // some calls to generated routines (arraycopy code) are scheduled
3748 // by C2 as runtime calls. if so we can call them using a br (they
3749 // will be in a reachable segment) otherwise we have to use a blr
3750 // which loads the absolute address into a register.
3751 address entry = (address)$meth$$method;
3752 CodeBlob *cb = CodeCache::find_blob(entry);
3753 if (cb) {
3754 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3755 if (call == nullptr) {
3756 ciEnv::current()->record_failure("CodeCache is full");
3757 return;
3758 }
3759 __ post_call_nop();
3760 } else {
3761 Label retaddr;
3762 // Make the anchor frame walkable
3763 __ adr(rscratch2, retaddr);
6905 instruct loadConL(iRegLNoSp dst, immL src)
6906 %{
6907 match(Set dst src);
6908
6909 ins_cost(INSN_COST);
6910 format %{ "mov $dst, $src\t# long" %}
6911
6912 ins_encode( aarch64_enc_mov_imm(dst, src) );
6913
6914 ins_pipe(ialu_imm);
6915 %}
6916
6917 // Load Pointer Constant
6918
6919 instruct loadConP(iRegPNoSp dst, immP con)
6920 %{
6921 match(Set dst con);
6922
6923 ins_cost(INSN_COST * 4);
6924 format %{
6925 "mov $dst, $con\t# ptr\n\t"
6926 %}
6927
6928 ins_encode(aarch64_enc_mov_p(dst, con));
6929
6930 ins_pipe(ialu_imm);
6931 %}
6932
6933 // Load Null Pointer Constant
6934
6935 instruct loadConP0(iRegPNoSp dst, immP0 con)
6936 %{
6937 match(Set dst con);
6938
6939 ins_cost(INSN_COST);
6940 format %{ "mov $dst, $con\t# nullptr ptr" %}
6941
6942 ins_encode(aarch64_enc_mov_p0(dst, con));
6943
6944 ins_pipe(ialu_imm);
6945 %}
8098 %}
8099
8100 // ============================================================================
8101 // Cast/Convert Instructions
8102
8103 instruct castX2P(iRegPNoSp dst, iRegL src) %{
8104 match(Set dst (CastX2P src));
8105
8106 ins_cost(INSN_COST);
8107 format %{ "mov $dst, $src\t# long -> ptr" %}
8108
8109 ins_encode %{
8110 if ($dst$$reg != $src$$reg) {
8111 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8112 }
8113 %}
8114
8115 ins_pipe(ialu_reg);
8116 %}
8117
8118 instruct castP2X(iRegLNoSp dst, iRegP src) %{
8119 match(Set dst (CastP2X src));
8120
8121 ins_cost(INSN_COST);
8122 format %{ "mov $dst, $src\t# ptr -> long" %}
8123
8124 ins_encode %{
8125 if ($dst$$reg != $src$$reg) {
8126 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8127 }
8128 %}
8129
8130 ins_pipe(ialu_reg);
8131 %}
8132
8133 // Convert oop into int for vectors alignment masking
8134 instruct convP2I(iRegINoSp dst, iRegP src) %{
8135 match(Set dst (ConvL2I (CastP2X src)));
8136
8137 ins_cost(INSN_COST);
15051
15052 match(Set dst (MoveL2D src));
15053
15054 effect(DEF dst, USE src);
15055
15056 ins_cost(INSN_COST);
15057
15058 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
15059
15060 ins_encode %{
15061 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
15062 %}
15063
15064 ins_pipe(fp_l2d);
15065
15066 %}
15067
15068 // ============================================================================
15069 // clearing of an array
15070
15071 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, Universe dummy, rFlagsReg cr)
15072 %{
15073 match(Set dummy (ClearArray cnt base));
15074 effect(USE_KILL cnt, USE_KILL base, KILL cr);
15075
15076 ins_cost(4 * INSN_COST);
15077 format %{ "ClearArray $cnt, $base" %}
15078
15079 ins_encode %{
15080 address tpc = __ zero_words($base$$Register, $cnt$$Register);
15081 if (tpc == nullptr) {
15082 ciEnv::current()->record_failure("CodeCache is full");
15083 return;
15084 }
15085 %}
15086
15087 ins_pipe(pipe_class_memory);
15088 %}
15089
15090 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, Universe dummy, rFlagsReg cr)
15091 %{
15092 predicate((uint64_t)n->in(2)->get_long()
15093 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord));
15094 match(Set dummy (ClearArray cnt base));
15095 effect(TEMP temp, USE_KILL base, KILL cr);
15096
15097 ins_cost(4 * INSN_COST);
15098 format %{ "ClearArray $cnt, $base" %}
15099
15100 ins_encode %{
15101 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
15102 if (tpc == nullptr) {
15103 ciEnv::current()->record_failure("CodeCache is full");
15104 return;
15105 }
15106 %}
15107
15108 ins_pipe(pipe_class_memory);
15109 %}
15110
15111 // ============================================================================
15112 // Overflow Math Instructions
15113
16390 %}
16391
16392 // Call Runtime Instruction without safepoint and with vector arguments
16393 instruct CallLeafDirectVector(method meth)
16394 %{
16395 match(CallLeafVector);
16396
16397 effect(USE meth);
16398
16399 ins_cost(CALL_COST);
16400
16401 format %{ "CALL, runtime leaf vector $meth" %}
16402
16403 ins_encode(aarch64_enc_java_to_runtime(meth));
16404
16405 ins_pipe(pipe_class_call);
16406 %}
16407
16408 // Call Runtime Instruction
16409
16410 instruct CallLeafNoFPDirect(method meth)
16411 %{
16412 match(CallLeafNoFP);
16413
16414 effect(USE meth);
16415
16416 ins_cost(CALL_COST);
16417
16418 format %{ "CALL, runtime leaf nofp $meth" %}
16419
16420 ins_encode( aarch64_enc_java_to_runtime(meth) );
16421
16422 ins_pipe(pipe_class_call);
16423 %}
16424
16425 // Tail Call; Jump from runtime stub to Java code.
16426 // Also known as an 'interprocedural jump'.
16427 // Target of jump will eventually return to caller.
16428 // TailJump below removes the return address.
16429 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
16430 // emitted just above the TailCall which has reset rfp to the caller state.
16431 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|
1673
1674 int MachCallDynamicJavaNode::ret_addr_offset()
1675 {
1676 return 16; // movz, movk, movk, bl
1677 }
1678
1679 int MachCallRuntimeNode::ret_addr_offset() {
1680 // for generated stubs the call will be
1681 // bl(addr)
1682 // or with far branches
1683 // bl(trampoline_stub)
1684 // for real runtime callouts it will be six instructions
1685 // see aarch64_enc_java_to_runtime
1686 // adr(rscratch2, retaddr)
1687 // str(rscratch2, Address(rthread, JavaThread::last_Java_pc_offset()));
1688 // lea(rscratch1, RuntimeAddress(addr)
1689 // blr(rscratch1)
1690 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1691 if (cb) {
1692 return 1 * NativeInstruction::instruction_size;
1693 } else if (_entry_point == nullptr) {
1694 // See CallLeafNoFPIndirect
1695 return 1 * NativeInstruction::instruction_size;
1696 } else {
1697 return 6 * NativeInstruction::instruction_size;
1698 }
1699 }
1700
1701 //=============================================================================
1702
1703 #ifndef PRODUCT
1704 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1705 st->print("BREAKPOINT");
1706 }
1707 #endif
1708
1709 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1710 __ brk(0);
1711 }
1712
1713 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1714 return MachNode::size(ra_);
1715 }
1784 if (C->stub_function() == nullptr) {
1785 st->print("\n\t");
1786 st->print("ldr rscratch1, [guard]\n\t");
1787 st->print("dmb ishld\n\t");
1788 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1789 st->print("cmp rscratch1, rscratch2\n\t");
1790 st->print("b.eq skip");
1791 st->print("\n\t");
1792 st->print("blr #nmethod_entry_barrier_stub\n\t");
1793 st->print("b skip\n\t");
1794 st->print("guard: int\n\t");
1795 st->print("\n\t");
1796 st->print("skip:\n\t");
1797 }
1798 }
1799 #endif
1800
1801 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1802 Compile* C = ra_->C;
1803
1804
1805 __ verified_entry(C, 0);
1806
1807 if (C->stub_function() == nullptr) {
1808 __ entry_barrier();
1809 }
1810
1811 if (!Compile::current()->output()->in_scratch_emit_size()) {
1812 __ bind(*_verified_entry);
1813 }
1814
1815 if (VerifyStackAtCalls) {
1816 Unimplemented();
1817 }
1818
1819 C->output()->set_frame_complete(__ offset());
1820
1821 if (C->has_mach_constant_base_node()) {
1822 // NOTE: We set the table base offset here because users might be
1823 // emitted before MachConstantBaseNode.
1824 ConstantTable& constant_table = C->output()->constant_table();
1825 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1826 }
1827 }
1828
1829 int MachPrologNode::reloc() const
1830 {
1831 return 0;
1832 }
1833
1834 //=============================================================================
1835
1836 #ifndef PRODUCT
1837 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1838 Compile* C = ra_->C;
1839 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1840
1841 st->print("# pop frame %d\n\t",framesize);
1842
1843 if (framesize == 0) {
1844 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1845 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1846 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1847 st->print("add sp, sp, #%d\n\t", framesize);
1848 } else {
1851 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1852 }
1853 if (VM_Version::use_rop_protection()) {
1854 st->print("autiaz\n\t");
1855 st->print("ldr zr, [lr]\n\t");
1856 }
1857
1858 if (do_polling() && C->is_method_compilation()) {
1859 st->print("# test polling word\n\t");
1860 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1861 st->print("cmp sp, rscratch1\n\t");
1862 st->print("bhi #slow_path");
1863 }
1864 }
1865 #endif
1866
1867 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1868 Compile* C = ra_->C;
1869 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1870
1871 __ remove_frame(framesize, C->needs_stack_repair());
1872
1873 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1874 __ reserved_stack_check();
1875 }
1876
1877 if (do_polling() && C->is_method_compilation()) {
1878 Label dummy_label;
1879 Label* code_stub = &dummy_label;
1880 if (!C->output()->in_scratch_emit_size()) {
1881 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1882 C->output()->add_stub(stub);
1883 code_stub = &stub->entry();
1884 }
1885 __ relocate(relocInfo::poll_return_type);
1886 __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
1887 }
1888 }
1889
1890 int MachEpilogNode::reloc() const {
1891 // Return number of relocatable values contained in this instruction.
1892 return 1; // 1 for polling page.
1893 }
1894
1895 const Pipeline * MachEpilogNode::pipeline() const {
1896 return MachNode::pipeline_class();
1897 }
1898
1899 //=============================================================================
1900
1901 static enum RC rc_class(OptoReg::Name reg) {
1902
1903 if (reg == OptoReg::Bad) {
1904 return rc_bad;
1905 }
1906
1907 // we have 32 int registers * 2 halves
1908 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1909
2165 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2166 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2167 int reg = ra_->get_encode(this);
2168
2169 // This add will handle any 24-bit signed offset. 24 bits allows an
2170 // 8 megabyte stack frame.
2171 __ add(as_Register(reg), sp, offset);
2172 }
2173
2174 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2175 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2176 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2177
2178 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2179 return NativeInstruction::instruction_size;
2180 } else {
2181 return 2 * NativeInstruction::instruction_size;
2182 }
2183 }
2184
2185 ///=============================================================================
2186 #ifndef PRODUCT
2187 void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2188 {
2189 st->print_cr("# MachVEPNode");
2190 if (!_verified) {
2191 st->print_cr("\t load_class");
2192 } else {
2193 st->print_cr("\t unpack_inline_arg");
2194 }
2195 }
2196 #endif
2197
2198 void MachVEPNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const
2199 {
2200 if (!_verified) {
2201 __ ic_check(1);
2202 } else {
2203 // TODO 8284443 Avoid creation of temporary frame
2204 if (ra_->C->stub_function() == nullptr) {
2205 __ verified_entry(ra_->C, 0);
2206 __ entry_barrier();
2207 int framesize = ra_->C->output()->frame_slots() << LogBytesPerInt;
2208 __ remove_frame(framesize, false);
2209 }
2210 // Unpack inline type args passed as oop and then jump to
2211 // the verified entry point (skipping the unverified entry).
2212 int sp_inc = __ unpack_inline_args(ra_->C, _receiver_only);
2213 // Emit code for verified entry and save increment for stack repair on return
2214 __ verified_entry(ra_->C, sp_inc);
2215 if (Compile::current()->output()->in_scratch_emit_size()) {
2216 Label dummy_verified_entry;
2217 __ b(dummy_verified_entry);
2218 } else {
2219 __ b(*_verified_entry);
2220 }
2221 }
2222 }
2223
2224 //=============================================================================
2225 #ifndef PRODUCT
2226 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2227 {
2228 st->print_cr("# MachUEPNode");
2229 if (UseCompressedClassPointers) {
2230 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2231 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2232 st->print_cr("\tcmpw rscratch1, r10");
2233 } else {
2234 st->print_cr("\tldr rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2235 st->print_cr("\tldr r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2236 st->print_cr("\tcmp rscratch1, r10");
2237 }
2238 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2239 }
2240 #endif
2241
2242 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2243 {
2244 __ ic_check(InteriorEntryAlignment);
2245 }
2246
2247 // REQUIRED EMIT CODE
2248
2249 //=============================================================================
2250
2251 // Emit deopt handler code.
2252 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
2253 {
2254 // Note that the code buffer's insts_mark is always relative to insts.
2255 // That's why we must use the macroassembler to generate a handler.
2256 address base = __ start_a_stub(size_deopt_handler());
2257 if (base == nullptr) {
2258 ciEnv::current()->record_failure("CodeCache is full");
2259 return 0; // CodeBuffer::expand failed
2260 }
2261
2262 int offset = __ offset();
2263 Label start;
2264 __ bind(start);
2265 __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
2266
3715 %}
3716
3717 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3718 int method_index = resolved_method_index(masm);
3719 address call = __ ic_call((address)$meth$$method, method_index);
3720 if (call == nullptr) {
3721 ciEnv::current()->record_failure("CodeCache is full");
3722 return;
3723 }
3724 __ post_call_nop();
3725 if (Compile::current()->max_vector_size() > 0) {
3726 __ reinitialize_ptrue();
3727 }
3728 %}
3729
3730 enc_class aarch64_enc_call_epilog() %{
3731 if (VerifyStackAtCalls) {
3732 // Check that stack depth is unchanged: find majik cookie on stack
3733 __ call_Unimplemented();
3734 }
3735 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic() && _method->return_type()->is_loaded()) {
3736 // The last return value is not set by the callee but used to pass the null marker to compiled code.
3737 // Search for the corresponding projection, get the register and emit code that initialized it.
3738 uint con = (tf()->range_cc()->cnt() - 1);
3739 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
3740 ProjNode* proj = fast_out(i)->as_Proj();
3741 if (proj->_con == con) {
3742 // Set null marker if r0 is non-null (a non-null value is returned buffered or scalarized)
3743 OptoReg::Name optoReg = ra_->get_reg_first(proj);
3744 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
3745 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
3746 __ cmp(r0, zr);
3747 __ cset(toReg, Assembler::NE);
3748 if (reg->is_stack()) {
3749 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
3750 __ str(toReg, Address(sp, st_off));
3751 }
3752 break;
3753 }
3754 }
3755 if (return_value_is_used()) {
3756 // An inline type is returned as fields in multiple registers.
3757 // R0 either contains an oop if the inline type is buffered or a pointer
3758 // to the corresponding InlineKlass with the lowest bit set to 1. Zero r0
3759 // if the lowest bit is set to allow C2 to use the oop after null checking.
3760 // r0 &= (r0 & 1) - 1
3761 __ andr(rscratch1, r0, 0x1);
3762 __ sub(rscratch1, rscratch1, 0x1);
3763 __ andr(r0, r0, rscratch1);
3764 }
3765 }
3766 %}
3767
3768 enc_class aarch64_enc_java_to_runtime(method meth) %{
3769 // some calls to generated routines (arraycopy code) are scheduled
3770 // by C2 as runtime calls. if so we can call them using a br (they
3771 // will be in a reachable segment) otherwise we have to use a blr
3772 // which loads the absolute address into a register.
3773 address entry = (address)$meth$$method;
3774 CodeBlob *cb = CodeCache::find_blob(entry);
3775 if (cb) {
3776 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3777 if (call == nullptr) {
3778 ciEnv::current()->record_failure("CodeCache is full");
3779 return;
3780 }
3781 __ post_call_nop();
3782 } else {
3783 Label retaddr;
3784 // Make the anchor frame walkable
3785 __ adr(rscratch2, retaddr);
6927 instruct loadConL(iRegLNoSp dst, immL src)
6928 %{
6929 match(Set dst src);
6930
6931 ins_cost(INSN_COST);
6932 format %{ "mov $dst, $src\t# long" %}
6933
6934 ins_encode( aarch64_enc_mov_imm(dst, src) );
6935
6936 ins_pipe(ialu_imm);
6937 %}
6938
6939 // Load Pointer Constant
6940
6941 instruct loadConP(iRegPNoSp dst, immP con)
6942 %{
6943 match(Set dst con);
6944
6945 ins_cost(INSN_COST * 4);
6946 format %{
6947 "mov $dst, $con\t# ptr"
6948 %}
6949
6950 ins_encode(aarch64_enc_mov_p(dst, con));
6951
6952 ins_pipe(ialu_imm);
6953 %}
6954
6955 // Load Null Pointer Constant
6956
6957 instruct loadConP0(iRegPNoSp dst, immP0 con)
6958 %{
6959 match(Set dst con);
6960
6961 ins_cost(INSN_COST);
6962 format %{ "mov $dst, $con\t# nullptr ptr" %}
6963
6964 ins_encode(aarch64_enc_mov_p0(dst, con));
6965
6966 ins_pipe(ialu_imm);
6967 %}
8120 %}
8121
8122 // ============================================================================
8123 // Cast/Convert Instructions
8124
8125 instruct castX2P(iRegPNoSp dst, iRegL src) %{
8126 match(Set dst (CastX2P src));
8127
8128 ins_cost(INSN_COST);
8129 format %{ "mov $dst, $src\t# long -> ptr" %}
8130
8131 ins_encode %{
8132 if ($dst$$reg != $src$$reg) {
8133 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8134 }
8135 %}
8136
8137 ins_pipe(ialu_reg);
8138 %}
8139
8140 instruct castI2N(iRegNNoSp dst, iRegI src) %{
8141 match(Set dst (CastI2N src));
8142
8143 ins_cost(INSN_COST);
8144 format %{ "mov $dst, $src\t# int -> narrow ptr" %}
8145
8146 ins_encode %{
8147 if ($dst$$reg != $src$$reg) {
8148 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8149 }
8150 %}
8151
8152 ins_pipe(ialu_reg);
8153 %}
8154
8155 instruct castN2X(iRegLNoSp dst, iRegN src) %{
8156 match(Set dst (CastP2X src));
8157
8158 ins_cost(INSN_COST);
8159 format %{ "mov $dst, $src\t# ptr -> long" %}
8160
8161 ins_encode %{
8162 if ($dst$$reg != $src$$reg) {
8163 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8164 }
8165 %}
8166
8167 ins_pipe(ialu_reg);
8168 %}
8169
8170 instruct castP2X(iRegLNoSp dst, iRegP src) %{
8171 match(Set dst (CastP2X src));
8172
8173 ins_cost(INSN_COST);
8174 format %{ "mov $dst, $src\t# ptr -> long" %}
8175
8176 ins_encode %{
8177 if ($dst$$reg != $src$$reg) {
8178 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8179 }
8180 %}
8181
8182 ins_pipe(ialu_reg);
8183 %}
8184
8185 // Convert oop into int for vectors alignment masking
8186 instruct convP2I(iRegINoSp dst, iRegP src) %{
8187 match(Set dst (ConvL2I (CastP2X src)));
8188
8189 ins_cost(INSN_COST);
15103
15104 match(Set dst (MoveL2D src));
15105
15106 effect(DEF dst, USE src);
15107
15108 ins_cost(INSN_COST);
15109
15110 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
15111
15112 ins_encode %{
15113 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
15114 %}
15115
15116 ins_pipe(fp_l2d);
15117
15118 %}
15119
15120 // ============================================================================
15121 // clearing of an array
15122
15123 instruct clearArray_reg_reg_immL0(iRegL_R11 cnt, iRegP_R10 base, immL0 zero, Universe dummy, rFlagsReg cr)
15124 %{
15125 match(Set dummy (ClearArray (Binary cnt base) zero));
15126 effect(USE_KILL cnt, USE_KILL base, KILL cr);
15127
15128 ins_cost(4 * INSN_COST);
15129 format %{ "ClearArray $cnt, $base" %}
15130
15131 ins_encode %{
15132 address tpc = __ zero_words($base$$Register, $cnt$$Register);
15133 if (tpc == nullptr) {
15134 ciEnv::current()->record_failure("CodeCache is full");
15135 return;
15136 }
15137 %}
15138
15139 ins_pipe(pipe_class_memory);
15140 %}
15141
15142 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, iRegL val, Universe dummy, rFlagsReg cr)
15143 %{
15144 predicate(((ClearArrayNode*)n)->word_copy_only());
15145 match(Set dummy (ClearArray (Binary cnt base) val));
15146 effect(USE_KILL cnt, USE_KILL base, KILL cr);
15147
15148 ins_cost(4 * INSN_COST);
15149 format %{ "ClearArray $cnt, $base, $val" %}
15150
15151 ins_encode %{
15152 __ fill_words($base$$Register, $cnt$$Register, $val$$Register);
15153 %}
15154
15155 ins_pipe(pipe_class_memory);
15156 %}
15157
15158 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, Universe dummy, rFlagsReg cr)
15159 %{
15160 predicate((uint64_t)n->in(2)->get_long()
15161 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord)
15162 && !((ClearArrayNode*)n)->word_copy_only());
15163 match(Set dummy (ClearArray cnt base));
15164 effect(TEMP temp, USE_KILL base, KILL cr);
15165
15166 ins_cost(4 * INSN_COST);
15167 format %{ "ClearArray $cnt, $base" %}
15168
15169 ins_encode %{
15170 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
15171 if (tpc == nullptr) {
15172 ciEnv::current()->record_failure("CodeCache is full");
15173 return;
15174 }
15175 %}
15176
15177 ins_pipe(pipe_class_memory);
15178 %}
15179
15180 // ============================================================================
15181 // Overflow Math Instructions
15182
16459 %}
16460
16461 // Call Runtime Instruction without safepoint and with vector arguments
16462 instruct CallLeafDirectVector(method meth)
16463 %{
16464 match(CallLeafVector);
16465
16466 effect(USE meth);
16467
16468 ins_cost(CALL_COST);
16469
16470 format %{ "CALL, runtime leaf vector $meth" %}
16471
16472 ins_encode(aarch64_enc_java_to_runtime(meth));
16473
16474 ins_pipe(pipe_class_call);
16475 %}
16476
16477 // Call Runtime Instruction
16478
16479 // entry point is null, target holds the address to call
16480 instruct CallLeafNoFPIndirect(iRegP target)
16481 %{
16482 predicate(n->as_Call()->entry_point() == nullptr);
16483
16484 match(CallLeafNoFP target);
16485
16486 ins_cost(CALL_COST);
16487
16488 format %{ "CALL, runtime leaf nofp indirect $target" %}
16489
16490 ins_encode %{
16491 __ blr($target$$Register);
16492 %}
16493
16494 ins_pipe(pipe_class_call);
16495 %}
16496
16497 instruct CallLeafNoFPDirect(method meth)
16498 %{
16499 predicate(n->as_Call()->entry_point() != nullptr);
16500
16501 match(CallLeafNoFP);
16502
16503 effect(USE meth);
16504
16505 ins_cost(CALL_COST);
16506
16507 format %{ "CALL, runtime leaf nofp $meth" %}
16508
16509 ins_encode( aarch64_enc_java_to_runtime(meth) );
16510
16511 ins_pipe(pipe_class_call);
16512 %}
16513
16514 // Tail Call; Jump from runtime stub to Java code.
16515 // Also known as an 'interprocedural jump'.
16516 // Target of jump will eventually return to caller.
16517 // TailJump below removes the return address.
16518 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
16519 // emitted just above the TailCall which has reset rfp to the caller state.
16520 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|