1637
1638 int MachCallDynamicJavaNode::ret_addr_offset()
1639 {
1640 return 16; // movz, movk, movk, bl
1641 }
1642
1643 int MachCallRuntimeNode::ret_addr_offset() {
1644 // for generated stubs the call will be
1645 // bl(addr)
1646 // or with far branches
1647 // bl(trampoline_stub)
1648 // for real runtime callouts it will be six instructions
1649 // see aarch64_enc_java_to_runtime
1650 // adr(rscratch2, retaddr)
1651 // lea(rscratch1, RuntimeAddress(addr)
1652 // stp(zr, rscratch2, Address(__ pre(sp, -2 * wordSize)))
1653 // blr(rscratch1)
1654 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1655 if (cb) {
1656 return 1 * NativeInstruction::instruction_size;
1657 } else {
1658 return 6 * NativeInstruction::instruction_size;
1659 }
1660 }
1661
1662 //=============================================================================
1663
1664 #ifndef PRODUCT
1665 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1666 st->print("BREAKPOINT");
1667 }
1668 #endif
1669
1670 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1671 __ brk(0);
1672 }
1673
1674 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1675 return MachNode::size(ra_);
1676 }
1745 if (C->stub_function() == nullptr && BarrierSet::barrier_set()->barrier_set_nmethod() != nullptr) {
1746 st->print("\n\t");
1747 st->print("ldr rscratch1, [guard]\n\t");
1748 st->print("dmb ishld\n\t");
1749 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1750 st->print("cmp rscratch1, rscratch2\n\t");
1751 st->print("b.eq skip");
1752 st->print("\n\t");
1753 st->print("blr #nmethod_entry_barrier_stub\n\t");
1754 st->print("b skip\n\t");
1755 st->print("guard: int\n\t");
1756 st->print("\n\t");
1757 st->print("skip:\n\t");
1758 }
1759 }
1760 #endif
1761
1762 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1763 Compile* C = ra_->C;
1764
1765 // n.b. frame size includes space for return pc and rfp
1766 const int framesize = C->output()->frame_size_in_bytes();
1767
1768 // insert a nop at the start of the prolog so we can patch in a
1769 // branch if we need to invalidate the method later
1770 __ nop();
1771
1772 if (C->clinit_barrier_on_entry()) {
1773 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
1774
1775 Label L_skip_barrier;
1776
1777 __ mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
1778 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1779 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1780 __ bind(L_skip_barrier);
1781 }
1782
1783 if (C->max_vector_size() > 0) {
1784 __ reinitialize_ptrue();
1785 }
1786
1787 int bangsize = C->output()->bang_size_in_bytes();
1788 if (C->output()->need_stack_bang(bangsize))
1789 __ generate_stack_overflow_check(bangsize);
1790
1791 __ build_frame(framesize);
1792
1793 if (C->stub_function() == nullptr) {
1794 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1795 if (BarrierSet::barrier_set()->barrier_set_nmethod() != nullptr) {
1796 // Dummy labels for just measuring the code size
1797 Label dummy_slow_path;
1798 Label dummy_continuation;
1799 Label dummy_guard;
1800 Label* slow_path = &dummy_slow_path;
1801 Label* continuation = &dummy_continuation;
1802 Label* guard = &dummy_guard;
1803 if (!Compile::current()->output()->in_scratch_emit_size()) {
1804 // Use real labels from actual stub when not emitting code for the purpose of measuring its size
1805 C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
1806 Compile::current()->output()->add_stub(stub);
1807 slow_path = &stub->entry();
1808 continuation = &stub->continuation();
1809 guard = &stub->guard();
1810 }
1811 // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
1812 bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
1813 }
1814 }
1815
1816 if (VerifyStackAtCalls) {
1817 Unimplemented();
1818 }
1819
1820 C->output()->set_frame_complete(__ offset());
1821
1822 if (C->has_mach_constant_base_node()) {
1823 // NOTE: We set the table base offset here because users might be
1824 // emitted before MachConstantBaseNode.
1825 ConstantTable& constant_table = C->output()->constant_table();
1826 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1827 }
1828 }
1829
1830 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
1831 {
1832 return MachNode::size(ra_); // too many variables; just compute it
1833 // the hard way
1834 }
1835
1836 int MachPrologNode::reloc() const
1837 {
1838 return 0;
1839 }
1840
1841 //=============================================================================
1842
1843 #ifndef PRODUCT
1844 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1845 Compile* C = ra_->C;
1846 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1847
1848 st->print("# pop frame %d\n\t",framesize);
1849
1850 if (framesize == 0) {
1851 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1852 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1853 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1854 st->print("add sp, sp, #%d\n\t", framesize);
1855 } else {
1858 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1859 }
1860 if (VM_Version::use_rop_protection()) {
1861 st->print("autiaz\n\t");
1862 st->print("ldr zr, [lr]\n\t");
1863 }
1864
1865 if (do_polling() && C->is_method_compilation()) {
1866 st->print("# test polling word\n\t");
1867 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1868 st->print("cmp sp, rscratch1\n\t");
1869 st->print("bhi #slow_path");
1870 }
1871 }
1872 #endif
1873
1874 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1875 Compile* C = ra_->C;
1876 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1877
1878 __ remove_frame(framesize);
1879
1880 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1881 __ reserved_stack_check();
1882 }
1883
1884 if (do_polling() && C->is_method_compilation()) {
1885 Label dummy_label;
1886 Label* code_stub = &dummy_label;
1887 if (!C->output()->in_scratch_emit_size()) {
1888 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1889 C->output()->add_stub(stub);
1890 code_stub = &stub->entry();
1891 }
1892 __ relocate(relocInfo::poll_return_type);
1893 __ safepoint_poll(*code_stub, true /* at_return */, false /* acquire */, true /* in_nmethod */);
1894 }
1895 }
1896
1897 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
1898 // Variable size. Determine dynamically.
1899 return MachNode::size(ra_);
1900 }
1901
1902 int MachEpilogNode::reloc() const {
1903 // Return number of relocatable values contained in this instruction.
1904 return 1; // 1 for polling page.
1905 }
1906
1907 const Pipeline * MachEpilogNode::pipeline() const {
1908 return MachNode::pipeline_class();
1909 }
1910
1911 //=============================================================================
1912
1913 static enum RC rc_class(OptoReg::Name reg) {
1914
1915 if (reg == OptoReg::Bad) {
1916 return rc_bad;
1917 }
1918
1919 // we have 32 int registers * 2 halves
1920 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1921
2177 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2178 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2179 int reg = ra_->get_encode(this);
2180
2181 // This add will handle any 24-bit signed offset. 24 bits allows an
2182 // 8 megabyte stack frame.
2183 __ add(as_Register(reg), sp, offset);
2184 }
2185
2186 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2187 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2188 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2189
2190 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2191 return NativeInstruction::instruction_size;
2192 } else {
2193 return 2 * NativeInstruction::instruction_size;
2194 }
2195 }
2196
2197 //=============================================================================
2198
2199 #ifndef PRODUCT
2200 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2201 {
2202 st->print_cr("# MachUEPNode");
2203 if (UseCompressedClassPointers) {
2204 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2205 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2206 st->print_cr("\tcmpw rscratch1, r10");
2207 } else {
2208 st->print_cr("\tldr rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2209 st->print_cr("\tldr r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2210 st->print_cr("\tcmp rscratch1, r10");
2211 }
2212 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2213 }
2214 #endif
2215
2216 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2217 {
2218 __ ic_check(InteriorEntryAlignment);
2219 }
2220
2221 uint MachUEPNode::size(PhaseRegAlloc* ra_) const
2222 {
2223 return MachNode::size(ra_);
2224 }
2225
2226 // REQUIRED EMIT CODE
2227
2228 //=============================================================================
2229
2230 // Emit exception handler code.
2231 int HandlerImpl::emit_exception_handler(C2_MacroAssembler* masm)
2232 {
2233 // mov rscratch1 #exception_blob_entry_point
2234 // br rscratch1
2235 // Note that the code buffer's insts_mark is always relative to insts.
2236 // That's why we must use the macroassembler to generate a handler.
2237 address base = __ start_a_stub(size_exception_handler());
2238 if (base == nullptr) {
2239 ciEnv::current()->record_failure("CodeCache is full");
2240 return 0; // CodeBuffer::expand failed
2241 }
2242 int offset = __ offset();
2243 __ far_jump(RuntimeAddress(OptoRuntime::exception_blob()->entry_point()));
2244 assert(__ offset() - offset <= (int) size_exception_handler(), "overflow");
2245 __ end_a_stub();
3657 %}
3658
3659 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3660 int method_index = resolved_method_index(masm);
3661 address call = __ ic_call((address)$meth$$method, method_index);
3662 if (call == nullptr) {
3663 ciEnv::current()->record_failure("CodeCache is full");
3664 return;
3665 }
3666 __ post_call_nop();
3667 if (Compile::current()->max_vector_size() > 0) {
3668 __ reinitialize_ptrue();
3669 }
3670 %}
3671
3672 enc_class aarch64_enc_call_epilog() %{
3673 if (VerifyStackAtCalls) {
3674 // Check that stack depth is unchanged: find majik cookie on stack
3675 __ call_Unimplemented();
3676 }
3677 %}
3678
3679 enc_class aarch64_enc_java_to_runtime(method meth) %{
3680 // some calls to generated routines (arraycopy code) are scheduled
3681 // by C2 as runtime calls. if so we can call them using a br (they
3682 // will be in a reachable segment) otherwise we have to use a blr
3683 // which loads the absolute address into a register.
3684 address entry = (address)$meth$$method;
3685 CodeBlob *cb = CodeCache::find_blob(entry);
3686 if (cb) {
3687 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3688 if (call == nullptr) {
3689 ciEnv::current()->record_failure("CodeCache is full");
3690 return;
3691 }
3692 __ post_call_nop();
3693 } else {
3694 Label retaddr;
3695 __ adr(rscratch2, retaddr);
3696 __ lea(rscratch1, RuntimeAddress(entry));
6716 instruct loadConL(iRegLNoSp dst, immL src)
6717 %{
6718 match(Set dst src);
6719
6720 ins_cost(INSN_COST);
6721 format %{ "mov $dst, $src\t# long" %}
6722
6723 ins_encode( aarch64_enc_mov_imm(dst, src) );
6724
6725 ins_pipe(ialu_imm);
6726 %}
6727
6728 // Load Pointer Constant
6729
6730 instruct loadConP(iRegPNoSp dst, immP con)
6731 %{
6732 match(Set dst con);
6733
6734 ins_cost(INSN_COST * 4);
6735 format %{
6736 "mov $dst, $con\t# ptr\n\t"
6737 %}
6738
6739 ins_encode(aarch64_enc_mov_p(dst, con));
6740
6741 ins_pipe(ialu_imm);
6742 %}
6743
6744 // Load Null Pointer Constant
6745
6746 instruct loadConP0(iRegPNoSp dst, immP0 con)
6747 %{
6748 match(Set dst con);
6749
6750 ins_cost(INSN_COST);
6751 format %{ "mov $dst, $con\t# nullptr ptr" %}
6752
6753 ins_encode(aarch64_enc_mov_p0(dst, con));
6754
6755 ins_pipe(ialu_imm);
6756 %}
7912 %}
7913
7914 // ============================================================================
7915 // Cast/Convert Instructions
7916
7917 instruct castX2P(iRegPNoSp dst, iRegL src) %{
7918 match(Set dst (CastX2P src));
7919
7920 ins_cost(INSN_COST);
7921 format %{ "mov $dst, $src\t# long -> ptr" %}
7922
7923 ins_encode %{
7924 if ($dst$$reg != $src$$reg) {
7925 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
7926 }
7927 %}
7928
7929 ins_pipe(ialu_reg);
7930 %}
7931
7932 instruct castP2X(iRegLNoSp dst, iRegP src) %{
7933 match(Set dst (CastP2X src));
7934
7935 ins_cost(INSN_COST);
7936 format %{ "mov $dst, $src\t# ptr -> long" %}
7937
7938 ins_encode %{
7939 if ($dst$$reg != $src$$reg) {
7940 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
7941 }
7942 %}
7943
7944 ins_pipe(ialu_reg);
7945 %}
7946
7947 // Convert oop into int for vectors alignment masking
7948 instruct convP2I(iRegINoSp dst, iRegP src) %{
7949 match(Set dst (ConvL2I (CastP2X src)));
7950
7951 ins_cost(INSN_COST);
14737
14738 match(Set dst (MoveL2D src));
14739
14740 effect(DEF dst, USE src);
14741
14742 ins_cost(INSN_COST);
14743
14744 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
14745
14746 ins_encode %{
14747 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
14748 %}
14749
14750 ins_pipe(fp_l2d);
14751
14752 %}
14753
14754 // ============================================================================
14755 // clearing of an array
14756
14757 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, Universe dummy, rFlagsReg cr)
14758 %{
14759 match(Set dummy (ClearArray cnt base));
14760 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14761
14762 ins_cost(4 * INSN_COST);
14763 format %{ "ClearArray $cnt, $base" %}
14764
14765 ins_encode %{
14766 address tpc = __ zero_words($base$$Register, $cnt$$Register);
14767 if (tpc == nullptr) {
14768 ciEnv::current()->record_failure("CodeCache is full");
14769 return;
14770 }
14771 %}
14772
14773 ins_pipe(pipe_class_memory);
14774 %}
14775
14776 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, Universe dummy, rFlagsReg cr)
14777 %{
14778 predicate((uint64_t)n->in(2)->get_long()
14779 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord));
14780 match(Set dummy (ClearArray cnt base));
14781 effect(TEMP temp, USE_KILL base, KILL cr);
14782
14783 ins_cost(4 * INSN_COST);
14784 format %{ "ClearArray $cnt, $base" %}
14785
14786 ins_encode %{
14787 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
14788 if (tpc == nullptr) {
14789 ciEnv::current()->record_failure("CodeCache is full");
14790 return;
14791 }
14792 %}
14793
14794 ins_pipe(pipe_class_memory);
14795 %}
14796
14797 // ============================================================================
14798 // Overflow Math Instructions
14799
16094
16095 // Call Runtime Instruction
16096
16097 instruct CallLeafDirect(method meth)
16098 %{
16099 match(CallLeaf);
16100
16101 effect(USE meth);
16102
16103 ins_cost(CALL_COST);
16104
16105 format %{ "CALL, runtime leaf $meth" %}
16106
16107 ins_encode( aarch64_enc_java_to_runtime(meth) );
16108
16109 ins_pipe(pipe_class_call);
16110 %}
16111
16112 // Call Runtime Instruction
16113
16114 instruct CallLeafNoFPDirect(method meth)
16115 %{
16116 match(CallLeafNoFP);
16117
16118 effect(USE meth);
16119
16120 ins_cost(CALL_COST);
16121
16122 format %{ "CALL, runtime leaf nofp $meth" %}
16123
16124 ins_encode( aarch64_enc_java_to_runtime(meth) );
16125
16126 ins_pipe(pipe_class_call);
16127 %}
16128
16129 // Tail Call; Jump from runtime stub to Java code.
16130 // Also known as an 'interprocedural jump'.
16131 // Target of jump will eventually return to caller.
16132 // TailJump below removes the return address.
16133 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
16134 // emitted just above the TailCall which has reset rfp to the caller state.
16135 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|
1637
1638 int MachCallDynamicJavaNode::ret_addr_offset()
1639 {
1640 return 16; // movz, movk, movk, bl
1641 }
1642
1643 int MachCallRuntimeNode::ret_addr_offset() {
1644 // for generated stubs the call will be
1645 // bl(addr)
1646 // or with far branches
1647 // bl(trampoline_stub)
1648 // for real runtime callouts it will be six instructions
1649 // see aarch64_enc_java_to_runtime
1650 // adr(rscratch2, retaddr)
1651 // lea(rscratch1, RuntimeAddress(addr)
1652 // stp(zr, rscratch2, Address(__ pre(sp, -2 * wordSize)))
1653 // blr(rscratch1)
1654 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1655 if (cb) {
1656 return 1 * NativeInstruction::instruction_size;
1657 } else if (_entry_point == nullptr) {
1658 // See CallLeafNoFPIndirect
1659 return 1 * NativeInstruction::instruction_size;
1660 } else {
1661 return 6 * NativeInstruction::instruction_size;
1662 }
1663 }
1664
1665 //=============================================================================
1666
1667 #ifndef PRODUCT
1668 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1669 st->print("BREAKPOINT");
1670 }
1671 #endif
1672
1673 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1674 __ brk(0);
1675 }
1676
1677 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1678 return MachNode::size(ra_);
1679 }
1748 if (C->stub_function() == nullptr && BarrierSet::barrier_set()->barrier_set_nmethod() != nullptr) {
1749 st->print("\n\t");
1750 st->print("ldr rscratch1, [guard]\n\t");
1751 st->print("dmb ishld\n\t");
1752 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1753 st->print("cmp rscratch1, rscratch2\n\t");
1754 st->print("b.eq skip");
1755 st->print("\n\t");
1756 st->print("blr #nmethod_entry_barrier_stub\n\t");
1757 st->print("b skip\n\t");
1758 st->print("guard: int\n\t");
1759 st->print("\n\t");
1760 st->print("skip:\n\t");
1761 }
1762 }
1763 #endif
1764
1765 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1766 Compile* C = ra_->C;
1767
1768 // insert a nop at the start of the prolog so we can patch in a
1769 // branch if we need to invalidate the method later
1770 __ nop();
1771
1772 __ verified_entry(C, 0);
1773
1774 if (C->stub_function() == nullptr) {
1775 __ entry_barrier();
1776 }
1777
1778 if (!Compile::current()->output()->in_scratch_emit_size()) {
1779 __ bind(*_verified_entry);
1780 }
1781
1782 if (VerifyStackAtCalls) {
1783 Unimplemented();
1784 }
1785
1786 C->output()->set_frame_complete(__ offset());
1787
1788 if (C->has_mach_constant_base_node()) {
1789 // NOTE: We set the table base offset here because users might be
1790 // emitted before MachConstantBaseNode.
1791 ConstantTable& constant_table = C->output()->constant_table();
1792 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1793 }
1794 }
1795
1796 int MachPrologNode::reloc() const
1797 {
1798 return 0;
1799 }
1800
1801 //=============================================================================
1802
1803 #ifndef PRODUCT
1804 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1805 Compile* C = ra_->C;
1806 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1807
1808 st->print("# pop frame %d\n\t",framesize);
1809
1810 if (framesize == 0) {
1811 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1812 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1813 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1814 st->print("add sp, sp, #%d\n\t", framesize);
1815 } else {
1818 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1819 }
1820 if (VM_Version::use_rop_protection()) {
1821 st->print("autiaz\n\t");
1822 st->print("ldr zr, [lr]\n\t");
1823 }
1824
1825 if (do_polling() && C->is_method_compilation()) {
1826 st->print("# test polling word\n\t");
1827 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1828 st->print("cmp sp, rscratch1\n\t");
1829 st->print("bhi #slow_path");
1830 }
1831 }
1832 #endif
1833
1834 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1835 Compile* C = ra_->C;
1836 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1837
1838 __ remove_frame(framesize, C->needs_stack_repair());
1839
1840 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1841 __ reserved_stack_check();
1842 }
1843
1844 if (do_polling() && C->is_method_compilation()) {
1845 Label dummy_label;
1846 Label* code_stub = &dummy_label;
1847 if (!C->output()->in_scratch_emit_size()) {
1848 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1849 C->output()->add_stub(stub);
1850 code_stub = &stub->entry();
1851 }
1852 __ relocate(relocInfo::poll_return_type);
1853 __ safepoint_poll(*code_stub, true /* at_return */, false /* acquire */, true /* in_nmethod */);
1854 }
1855 }
1856
1857 int MachEpilogNode::reloc() const {
1858 // Return number of relocatable values contained in this instruction.
1859 return 1; // 1 for polling page.
1860 }
1861
1862 const Pipeline * MachEpilogNode::pipeline() const {
1863 return MachNode::pipeline_class();
1864 }
1865
1866 //=============================================================================
1867
1868 static enum RC rc_class(OptoReg::Name reg) {
1869
1870 if (reg == OptoReg::Bad) {
1871 return rc_bad;
1872 }
1873
1874 // we have 32 int registers * 2 halves
1875 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1876
2132 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2133 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2134 int reg = ra_->get_encode(this);
2135
2136 // This add will handle any 24-bit signed offset. 24 bits allows an
2137 // 8 megabyte stack frame.
2138 __ add(as_Register(reg), sp, offset);
2139 }
2140
2141 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2142 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2143 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2144
2145 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2146 return NativeInstruction::instruction_size;
2147 } else {
2148 return 2 * NativeInstruction::instruction_size;
2149 }
2150 }
2151
2152 ///=============================================================================
2153 #ifndef PRODUCT
2154 void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2155 {
2156 st->print_cr("# MachVEPNode");
2157 if (!_verified) {
2158 st->print_cr("\t load_class");
2159 } else {
2160 st->print_cr("\t unpack_inline_arg");
2161 }
2162 }
2163 #endif
2164
2165 void MachVEPNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const
2166 {
2167 if (!_verified) {
2168 __ ic_check(1);
2169 } else {
2170 // insert a nop at the start of the prolog so we can patch in a
2171 // branch if we need to invalidate the method later
2172 __ nop();
2173
2174 // TODO 8284443 Avoid creation of temporary frame
2175 if (ra_->C->stub_function() == nullptr) {
2176 __ verified_entry(ra_->C, 0);
2177 __ entry_barrier();
2178 int framesize = ra_->C->output()->frame_slots() << LogBytesPerInt;
2179 __ remove_frame(framesize, false);
2180 }
2181 // Unpack inline type args passed as oop and then jump to
2182 // the verified entry point (skipping the unverified entry).
2183 int sp_inc = __ unpack_inline_args(ra_->C, _receiver_only);
2184 // Emit code for verified entry and save increment for stack repair on return
2185 __ verified_entry(ra_->C, sp_inc);
2186 if (Compile::current()->output()->in_scratch_emit_size()) {
2187 Label dummy_verified_entry;
2188 __ b(dummy_verified_entry);
2189 } else {
2190 __ b(*_verified_entry);
2191 }
2192 }
2193 }
2194
2195 //=============================================================================
2196 #ifndef PRODUCT
2197 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2198 {
2199 st->print_cr("# MachUEPNode");
2200 if (UseCompressedClassPointers) {
2201 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2202 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2203 st->print_cr("\tcmpw rscratch1, r10");
2204 } else {
2205 st->print_cr("\tldr rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2206 st->print_cr("\tldr r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2207 st->print_cr("\tcmp rscratch1, r10");
2208 }
2209 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2210 }
2211 #endif
2212
2213 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2214 {
2215 __ ic_check(InteriorEntryAlignment);
2216 }
2217
2218 // REQUIRED EMIT CODE
2219
2220 //=============================================================================
2221
2222 // Emit exception handler code.
2223 int HandlerImpl::emit_exception_handler(C2_MacroAssembler* masm)
2224 {
2225 // mov rscratch1 #exception_blob_entry_point
2226 // br rscratch1
2227 // Note that the code buffer's insts_mark is always relative to insts.
2228 // That's why we must use the macroassembler to generate a handler.
2229 address base = __ start_a_stub(size_exception_handler());
2230 if (base == nullptr) {
2231 ciEnv::current()->record_failure("CodeCache is full");
2232 return 0; // CodeBuffer::expand failed
2233 }
2234 int offset = __ offset();
2235 __ far_jump(RuntimeAddress(OptoRuntime::exception_blob()->entry_point()));
2236 assert(__ offset() - offset <= (int) size_exception_handler(), "overflow");
2237 __ end_a_stub();
3649 %}
3650
3651 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3652 int method_index = resolved_method_index(masm);
3653 address call = __ ic_call((address)$meth$$method, method_index);
3654 if (call == nullptr) {
3655 ciEnv::current()->record_failure("CodeCache is full");
3656 return;
3657 }
3658 __ post_call_nop();
3659 if (Compile::current()->max_vector_size() > 0) {
3660 __ reinitialize_ptrue();
3661 }
3662 %}
3663
3664 enc_class aarch64_enc_call_epilog() %{
3665 if (VerifyStackAtCalls) {
3666 // Check that stack depth is unchanged: find majik cookie on stack
3667 __ call_Unimplemented();
3668 }
3669 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic()) {
3670 // The last return value is not set by the callee but used to pass IsInit information to compiled code.
3671 // Search for the corresponding projection, get the register and emit code that initialized it.
3672 uint con = (tf()->range_cc()->cnt() - 1);
3673 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
3674 ProjNode* proj = fast_out(i)->as_Proj();
3675 if (proj->_con == con) {
3676 // Set IsInit if r0 is non-null (a non-null value is returned buffered or scalarized)
3677 OptoReg::Name optoReg = ra_->get_reg_first(proj);
3678 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
3679 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
3680 __ cmp(r0, zr);
3681 __ cset(toReg, Assembler::NE);
3682 if (reg->is_stack()) {
3683 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
3684 __ str(toReg, Address(sp, st_off));
3685 }
3686 break;
3687 }
3688 }
3689 if (return_value_is_used()) {
3690 // An inline type is returned as fields in multiple registers.
3691 // R0 either contains an oop if the inline type is buffered or a pointer
3692 // to the corresponding InlineKlass with the lowest bit set to 1. Zero r0
3693 // if the lowest bit is set to allow C2 to use the oop after null checking.
3694 // r0 &= (r0 & 1) - 1
3695 __ andr(rscratch1, r0, 0x1);
3696 __ sub(rscratch1, rscratch1, 0x1);
3697 __ andr(r0, r0, rscratch1);
3698 }
3699 }
3700 %}
3701
3702 enc_class aarch64_enc_java_to_runtime(method meth) %{
3703 // some calls to generated routines (arraycopy code) are scheduled
3704 // by C2 as runtime calls. if so we can call them using a br (they
3705 // will be in a reachable segment) otherwise we have to use a blr
3706 // which loads the absolute address into a register.
3707 address entry = (address)$meth$$method;
3708 CodeBlob *cb = CodeCache::find_blob(entry);
3709 if (cb) {
3710 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3711 if (call == nullptr) {
3712 ciEnv::current()->record_failure("CodeCache is full");
3713 return;
3714 }
3715 __ post_call_nop();
3716 } else {
3717 Label retaddr;
3718 __ adr(rscratch2, retaddr);
3719 __ lea(rscratch1, RuntimeAddress(entry));
6739 instruct loadConL(iRegLNoSp dst, immL src)
6740 %{
6741 match(Set dst src);
6742
6743 ins_cost(INSN_COST);
6744 format %{ "mov $dst, $src\t# long" %}
6745
6746 ins_encode( aarch64_enc_mov_imm(dst, src) );
6747
6748 ins_pipe(ialu_imm);
6749 %}
6750
6751 // Load Pointer Constant
6752
6753 instruct loadConP(iRegPNoSp dst, immP con)
6754 %{
6755 match(Set dst con);
6756
6757 ins_cost(INSN_COST * 4);
6758 format %{
6759 "mov $dst, $con\t# ptr"
6760 %}
6761
6762 ins_encode(aarch64_enc_mov_p(dst, con));
6763
6764 ins_pipe(ialu_imm);
6765 %}
6766
6767 // Load Null Pointer Constant
6768
6769 instruct loadConP0(iRegPNoSp dst, immP0 con)
6770 %{
6771 match(Set dst con);
6772
6773 ins_cost(INSN_COST);
6774 format %{ "mov $dst, $con\t# nullptr ptr" %}
6775
6776 ins_encode(aarch64_enc_mov_p0(dst, con));
6777
6778 ins_pipe(ialu_imm);
6779 %}
7935 %}
7936
7937 // ============================================================================
7938 // Cast/Convert Instructions
7939
7940 instruct castX2P(iRegPNoSp dst, iRegL src) %{
7941 match(Set dst (CastX2P src));
7942
7943 ins_cost(INSN_COST);
7944 format %{ "mov $dst, $src\t# long -> ptr" %}
7945
7946 ins_encode %{
7947 if ($dst$$reg != $src$$reg) {
7948 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
7949 }
7950 %}
7951
7952 ins_pipe(ialu_reg);
7953 %}
7954
7955 instruct castN2X(iRegLNoSp dst, iRegN src) %{
7956 match(Set dst (CastP2X src));
7957
7958 ins_cost(INSN_COST);
7959 format %{ "mov $dst, $src\t# ptr -> long" %}
7960
7961 ins_encode %{
7962 if ($dst$$reg != $src$$reg) {
7963 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
7964 }
7965 %}
7966
7967 ins_pipe(ialu_reg);
7968 %}
7969
7970 instruct castP2X(iRegLNoSp dst, iRegP src) %{
7971 match(Set dst (CastP2X src));
7972
7973 ins_cost(INSN_COST);
7974 format %{ "mov $dst, $src\t# ptr -> long" %}
7975
7976 ins_encode %{
7977 if ($dst$$reg != $src$$reg) {
7978 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
7979 }
7980 %}
7981
7982 ins_pipe(ialu_reg);
7983 %}
7984
7985 // Convert oop into int for vectors alignment masking
7986 instruct convP2I(iRegINoSp dst, iRegP src) %{
7987 match(Set dst (ConvL2I (CastP2X src)));
7988
7989 ins_cost(INSN_COST);
14775
14776 match(Set dst (MoveL2D src));
14777
14778 effect(DEF dst, USE src);
14779
14780 ins_cost(INSN_COST);
14781
14782 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
14783
14784 ins_encode %{
14785 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
14786 %}
14787
14788 ins_pipe(fp_l2d);
14789
14790 %}
14791
14792 // ============================================================================
14793 // clearing of an array
14794
14795 instruct clearArray_reg_reg_immL0(iRegL_R11 cnt, iRegP_R10 base, immL0 zero, Universe dummy, rFlagsReg cr)
14796 %{
14797 match(Set dummy (ClearArray (Binary cnt base) zero));
14798 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14799
14800 ins_cost(4 * INSN_COST);
14801 format %{ "ClearArray $cnt, $base" %}
14802
14803 ins_encode %{
14804 address tpc = __ zero_words($base$$Register, $cnt$$Register);
14805 if (tpc == nullptr) {
14806 ciEnv::current()->record_failure("CodeCache is full");
14807 return;
14808 }
14809 %}
14810
14811 ins_pipe(pipe_class_memory);
14812 %}
14813
14814 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, iRegL val, Universe dummy, rFlagsReg cr)
14815 %{
14816 predicate(((ClearArrayNode*)n)->word_copy_only());
14817 match(Set dummy (ClearArray (Binary cnt base) val));
14818 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14819
14820 ins_cost(4 * INSN_COST);
14821 format %{ "ClearArray $cnt, $base, $val" %}
14822
14823 ins_encode %{
14824 __ fill_words($base$$Register, $cnt$$Register, $val$$Register);
14825 %}
14826
14827 ins_pipe(pipe_class_memory);
14828 %}
14829
14830 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, Universe dummy, rFlagsReg cr)
14831 %{
14832 predicate((uint64_t)n->in(2)->get_long()
14833 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord)
14834 && !((ClearArrayNode*)n)->word_copy_only());
14835 match(Set dummy (ClearArray cnt base));
14836 effect(TEMP temp, USE_KILL base, KILL cr);
14837
14838 ins_cost(4 * INSN_COST);
14839 format %{ "ClearArray $cnt, $base" %}
14840
14841 ins_encode %{
14842 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
14843 if (tpc == nullptr) {
14844 ciEnv::current()->record_failure("CodeCache is full");
14845 return;
14846 }
14847 %}
14848
14849 ins_pipe(pipe_class_memory);
14850 %}
14851
14852 // ============================================================================
14853 // Overflow Math Instructions
14854
16149
16150 // Call Runtime Instruction
16151
16152 instruct CallLeafDirect(method meth)
16153 %{
16154 match(CallLeaf);
16155
16156 effect(USE meth);
16157
16158 ins_cost(CALL_COST);
16159
16160 format %{ "CALL, runtime leaf $meth" %}
16161
16162 ins_encode( aarch64_enc_java_to_runtime(meth) );
16163
16164 ins_pipe(pipe_class_call);
16165 %}
16166
16167 // Call Runtime Instruction
16168
16169 // entry point is null, target holds the address to call
16170 instruct CallLeafNoFPIndirect(iRegP target)
16171 %{
16172 predicate(n->as_Call()->entry_point() == nullptr);
16173
16174 match(CallLeafNoFP target);
16175
16176 ins_cost(CALL_COST);
16177
16178 format %{ "CALL, runtime leaf nofp indirect $target" %}
16179
16180 ins_encode %{
16181 __ blr($target$$Register);
16182 %}
16183
16184 ins_pipe(pipe_class_call);
16185 %}
16186
16187 instruct CallLeafNoFPDirect(method meth)
16188 %{
16189 predicate(n->as_Call()->entry_point() != nullptr);
16190
16191 match(CallLeafNoFP);
16192
16193 effect(USE meth);
16194
16195 ins_cost(CALL_COST);
16196
16197 format %{ "CALL, runtime leaf nofp $meth" %}
16198
16199 ins_encode( aarch64_enc_java_to_runtime(meth) );
16200
16201 ins_pipe(pipe_class_call);
16202 %}
16203
16204 // Tail Call; Jump from runtime stub to Java code.
16205 // Also known as an 'interprocedural jump'.
16206 // Target of jump will eventually return to caller.
16207 // TailJump below removes the return address.
16208 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
16209 // emitted just above the TailCall which has reset rfp to the caller state.
16210 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|