1673
1674 int MachCallDynamicJavaNode::ret_addr_offset()
1675 {
1676 return 16; // movz, movk, movk, bl
1677 }
1678
1679 int MachCallRuntimeNode::ret_addr_offset() {
1680 // for generated stubs the call will be
1681 // bl(addr)
1682 // or with far branches
1683 // bl(trampoline_stub)
1684 // for real runtime callouts it will be six instructions
1685 // see aarch64_enc_java_to_runtime
1686 // adr(rscratch2, retaddr)
1687 // str(rscratch2, Address(rthread, JavaThread::last_Java_pc_offset()));
1688 // lea(rscratch1, RuntimeAddress(addr)
1689 // blr(rscratch1)
1690 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1691 if (cb) {
1692 return 1 * NativeInstruction::instruction_size;
1693 } else {
1694 return 6 * NativeInstruction::instruction_size;
1695 }
1696 }
1697
1698 //=============================================================================
1699
1700 #ifndef PRODUCT
1701 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1702 st->print("BREAKPOINT");
1703 }
1704 #endif
1705
1706 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1707 __ brk(0);
1708 }
1709
1710 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1711 return MachNode::size(ra_);
1712 }
1781 if (C->stub_function() == nullptr) {
1782 st->print("\n\t");
1783 st->print("ldr rscratch1, [guard]\n\t");
1784 st->print("dmb ishld\n\t");
1785 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1786 st->print("cmp rscratch1, rscratch2\n\t");
1787 st->print("b.eq skip");
1788 st->print("\n\t");
1789 st->print("blr #nmethod_entry_barrier_stub\n\t");
1790 st->print("b skip\n\t");
1791 st->print("guard: int\n\t");
1792 st->print("\n\t");
1793 st->print("skip:\n\t");
1794 }
1795 }
1796 #endif
1797
1798 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1799 Compile* C = ra_->C;
1800
1801 // n.b. frame size includes space for return pc and rfp
1802 const int framesize = C->output()->frame_size_in_bytes();
1803
1804 if (C->clinit_barrier_on_entry()) {
1805 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
1806
1807 Label L_skip_barrier;
1808
1809 __ mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
1810 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1811 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1812 __ bind(L_skip_barrier);
1813 }
1814
1815 if (C->max_vector_size() > 0) {
1816 __ reinitialize_ptrue();
1817 }
1818
1819 int bangsize = C->output()->bang_size_in_bytes();
1820 if (C->output()->need_stack_bang(bangsize))
1821 __ generate_stack_overflow_check(bangsize);
1822
1823 __ build_frame(framesize);
1824
1825 if (C->stub_function() == nullptr) {
1826 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1827 // Dummy labels for just measuring the code size
1828 Label dummy_slow_path;
1829 Label dummy_continuation;
1830 Label dummy_guard;
1831 Label* slow_path = &dummy_slow_path;
1832 Label* continuation = &dummy_continuation;
1833 Label* guard = &dummy_guard;
1834 if (!Compile::current()->output()->in_scratch_emit_size()) {
1835 // Use real labels from actual stub when not emitting code for the purpose of measuring its size
1836 C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
1837 Compile::current()->output()->add_stub(stub);
1838 slow_path = &stub->entry();
1839 continuation = &stub->continuation();
1840 guard = &stub->guard();
1841 }
1842 // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
1843 bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
1844 }
1845
1846 if (VerifyStackAtCalls) {
1847 Unimplemented();
1848 }
1849
1850 C->output()->set_frame_complete(__ offset());
1851
1852 if (C->has_mach_constant_base_node()) {
1853 // NOTE: We set the table base offset here because users might be
1854 // emitted before MachConstantBaseNode.
1855 ConstantTable& constant_table = C->output()->constant_table();
1856 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1857 }
1858 }
1859
1860 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
1861 {
1862 return MachNode::size(ra_); // too many variables; just compute it
1863 // the hard way
1864 }
1865
1866 int MachPrologNode::reloc() const
1867 {
1868 return 0;
1869 }
1870
1871 //=============================================================================
1872
1873 #ifndef PRODUCT
1874 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1875 Compile* C = ra_->C;
1876 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1877
1878 st->print("# pop frame %d\n\t",framesize);
1879
1880 if (framesize == 0) {
1881 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1882 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1883 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1884 st->print("add sp, sp, #%d\n\t", framesize);
1885 } else {
1888 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1889 }
1890 if (VM_Version::use_rop_protection()) {
1891 st->print("autiaz\n\t");
1892 st->print("ldr zr, [lr]\n\t");
1893 }
1894
1895 if (do_polling() && C->is_method_compilation()) {
1896 st->print("# test polling word\n\t");
1897 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1898 st->print("cmp sp, rscratch1\n\t");
1899 st->print("bhi #slow_path");
1900 }
1901 }
1902 #endif
1903
1904 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1905 Compile* C = ra_->C;
1906 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1907
1908 __ remove_frame(framesize);
1909
1910 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1911 __ reserved_stack_check();
1912 }
1913
1914 if (do_polling() && C->is_method_compilation()) {
1915 Label dummy_label;
1916 Label* code_stub = &dummy_label;
1917 if (!C->output()->in_scratch_emit_size()) {
1918 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1919 C->output()->add_stub(stub);
1920 code_stub = &stub->entry();
1921 }
1922 __ relocate(relocInfo::poll_return_type);
1923 __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
1924 }
1925 }
1926
1927 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
1928 // Variable size. Determine dynamically.
1929 return MachNode::size(ra_);
1930 }
1931
1932 int MachEpilogNode::reloc() const {
1933 // Return number of relocatable values contained in this instruction.
1934 return 1; // 1 for polling page.
1935 }
1936
1937 const Pipeline * MachEpilogNode::pipeline() const {
1938 return MachNode::pipeline_class();
1939 }
1940
1941 //=============================================================================
1942
1943 static enum RC rc_class(OptoReg::Name reg) {
1944
1945 if (reg == OptoReg::Bad) {
1946 return rc_bad;
1947 }
1948
1949 // we have 32 int registers * 2 halves
1950 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1951
2210 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2211 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2212 int reg = ra_->get_encode(this);
2213
2214 // This add will handle any 24-bit signed offset. 24 bits allows an
2215 // 8 megabyte stack frame.
2216 __ add(as_Register(reg), sp, offset);
2217 }
2218
2219 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2220 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2221 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2222
2223 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2224 return NativeInstruction::instruction_size;
2225 } else {
2226 return 2 * NativeInstruction::instruction_size;
2227 }
2228 }
2229
2230 //=============================================================================
2231
2232 #ifndef PRODUCT
2233 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2234 {
2235 st->print_cr("# MachUEPNode");
2236 if (UseCompressedClassPointers) {
2237 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2238 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2239 st->print_cr("\tcmpw rscratch1, r10");
2240 } else {
2241 st->print_cr("\tldr rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2242 st->print_cr("\tldr r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2243 st->print_cr("\tcmp rscratch1, r10");
2244 }
2245 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2246 }
2247 #endif
2248
2249 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2250 {
2251 __ ic_check(InteriorEntryAlignment);
2252 }
2253
2254 uint MachUEPNode::size(PhaseRegAlloc* ra_) const
2255 {
2256 return MachNode::size(ra_);
2257 }
2258
2259 // REQUIRED EMIT CODE
2260
2261 //=============================================================================
2262
2263 // Emit deopt handler code.
2264 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
2265 {
2266 // Note that the code buffer's insts_mark is always relative to insts.
2267 // That's why we must use the macroassembler to generate a handler.
2268 address base = __ start_a_stub(size_deopt_handler());
2269 if (base == nullptr) {
2270 ciEnv::current()->record_failure("CodeCache is full");
2271 return 0; // CodeBuffer::expand failed
2272 }
2273
2274 int offset = __ offset();
2275 Label start;
2276 __ bind(start);
2277 __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
2278
3664 %}
3665
3666 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3667 int method_index = resolved_method_index(masm);
3668 address call = __ ic_call((address)$meth$$method, method_index);
3669 if (call == nullptr) {
3670 ciEnv::current()->record_failure("CodeCache is full");
3671 return;
3672 }
3673 __ post_call_nop();
3674 if (Compile::current()->max_vector_size() > 0) {
3675 __ reinitialize_ptrue();
3676 }
3677 %}
3678
3679 enc_class aarch64_enc_call_epilog() %{
3680 if (VerifyStackAtCalls) {
3681 // Check that stack depth is unchanged: find majik cookie on stack
3682 __ call_Unimplemented();
3683 }
3684 %}
3685
3686 enc_class aarch64_enc_java_to_runtime(method meth) %{
3687 // some calls to generated routines (arraycopy code) are scheduled
3688 // by C2 as runtime calls. if so we can call them using a br (they
3689 // will be in a reachable segment) otherwise we have to use a blr
3690 // which loads the absolute address into a register.
3691 address entry = (address)$meth$$method;
3692 CodeBlob *cb = CodeCache::find_blob(entry);
3693 if (cb) {
3694 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3695 if (call == nullptr) {
3696 ciEnv::current()->record_failure("CodeCache is full");
3697 return;
3698 }
3699 __ post_call_nop();
3700 } else {
3701 Label retaddr;
3702 // Make the anchor frame walkable
3703 __ adr(rscratch2, retaddr);
6845 instruct loadConL(iRegLNoSp dst, immL src)
6846 %{
6847 match(Set dst src);
6848
6849 ins_cost(INSN_COST);
6850 format %{ "mov $dst, $src\t# long" %}
6851
6852 ins_encode( aarch64_enc_mov_imm(dst, src) );
6853
6854 ins_pipe(ialu_imm);
6855 %}
6856
6857 // Load Pointer Constant
6858
6859 instruct loadConP(iRegPNoSp dst, immP con)
6860 %{
6861 match(Set dst con);
6862
6863 ins_cost(INSN_COST * 4);
6864 format %{
6865 "mov $dst, $con\t# ptr\n\t"
6866 %}
6867
6868 ins_encode(aarch64_enc_mov_p(dst, con));
6869
6870 ins_pipe(ialu_imm);
6871 %}
6872
6873 // Load Null Pointer Constant
6874
6875 instruct loadConP0(iRegPNoSp dst, immP0 con)
6876 %{
6877 match(Set dst con);
6878
6879 ins_cost(INSN_COST);
6880 format %{ "mov $dst, $con\t# nullptr ptr" %}
6881
6882 ins_encode(aarch64_enc_mov_p0(dst, con));
6883
6884 ins_pipe(ialu_imm);
6885 %}
8038 %}
8039
8040 // ============================================================================
8041 // Cast/Convert Instructions
8042
8043 instruct castX2P(iRegPNoSp dst, iRegL src) %{
8044 match(Set dst (CastX2P src));
8045
8046 ins_cost(INSN_COST);
8047 format %{ "mov $dst, $src\t# long -> ptr" %}
8048
8049 ins_encode %{
8050 if ($dst$$reg != $src$$reg) {
8051 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8052 }
8053 %}
8054
8055 ins_pipe(ialu_reg);
8056 %}
8057
8058 instruct castP2X(iRegLNoSp dst, iRegP src) %{
8059 match(Set dst (CastP2X src));
8060
8061 ins_cost(INSN_COST);
8062 format %{ "mov $dst, $src\t# ptr -> long" %}
8063
8064 ins_encode %{
8065 if ($dst$$reg != $src$$reg) {
8066 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8067 }
8068 %}
8069
8070 ins_pipe(ialu_reg);
8071 %}
8072
8073 // Convert oop into int for vectors alignment masking
8074 instruct convP2I(iRegINoSp dst, iRegP src) %{
8075 match(Set dst (ConvL2I (CastP2X src)));
8076
8077 ins_cost(INSN_COST);
14026
14027 match(Set dst (MoveL2D src));
14028
14029 effect(DEF dst, USE src);
14030
14031 ins_cost(INSN_COST);
14032
14033 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
14034
14035 ins_encode %{
14036 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
14037 %}
14038
14039 ins_pipe(fp_l2d);
14040
14041 %}
14042
14043 // ============================================================================
14044 // clearing of an array
14045
14046 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, Universe dummy, rFlagsReg cr)
14047 %{
14048 match(Set dummy (ClearArray cnt base));
14049 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14050
14051 ins_cost(4 * INSN_COST);
14052 format %{ "ClearArray $cnt, $base" %}
14053
14054 ins_encode %{
14055 address tpc = __ zero_words($base$$Register, $cnt$$Register);
14056 if (tpc == nullptr) {
14057 ciEnv::current()->record_failure("CodeCache is full");
14058 return;
14059 }
14060 %}
14061
14062 ins_pipe(pipe_class_memory);
14063 %}
14064
14065 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, Universe dummy, rFlagsReg cr)
14066 %{
14067 predicate((uint64_t)n->in(2)->get_long()
14068 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord));
14069 match(Set dummy (ClearArray cnt base));
14070 effect(TEMP temp, USE_KILL base, KILL cr);
14071
14072 ins_cost(4 * INSN_COST);
14073 format %{ "ClearArray $cnt, $base" %}
14074
14075 ins_encode %{
14076 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
14077 if (tpc == nullptr) {
14078 ciEnv::current()->record_failure("CodeCache is full");
14079 return;
14080 }
14081 %}
14082
14083 ins_pipe(pipe_class_memory);
14084 %}
14085
14086 // ============================================================================
14087 // Overflow Math Instructions
14088
15365 %}
15366
15367 // Call Runtime Instruction without safepoint and with vector arguments
15368 instruct CallLeafDirectVector(method meth)
15369 %{
15370 match(CallLeafVector);
15371
15372 effect(USE meth);
15373
15374 ins_cost(CALL_COST);
15375
15376 format %{ "CALL, runtime leaf vector $meth" %}
15377
15378 ins_encode(aarch64_enc_java_to_runtime(meth));
15379
15380 ins_pipe(pipe_class_call);
15381 %}
15382
15383 // Call Runtime Instruction
15384
15385 instruct CallLeafNoFPDirect(method meth)
15386 %{
15387 match(CallLeafNoFP);
15388
15389 effect(USE meth);
15390
15391 ins_cost(CALL_COST);
15392
15393 format %{ "CALL, runtime leaf nofp $meth" %}
15394
15395 ins_encode( aarch64_enc_java_to_runtime(meth) );
15396
15397 ins_pipe(pipe_class_call);
15398 %}
15399
15400 // Tail Call; Jump from runtime stub to Java code.
15401 // Also known as an 'interprocedural jump'.
15402 // Target of jump will eventually return to caller.
15403 // TailJump below removes the return address.
15404 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
15405 // emitted just above the TailCall which has reset rfp to the caller state.
15406 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|
1673
1674 int MachCallDynamicJavaNode::ret_addr_offset()
1675 {
1676 return 16; // movz, movk, movk, bl
1677 }
1678
1679 int MachCallRuntimeNode::ret_addr_offset() {
1680 // for generated stubs the call will be
1681 // bl(addr)
1682 // or with far branches
1683 // bl(trampoline_stub)
1684 // for real runtime callouts it will be six instructions
1685 // see aarch64_enc_java_to_runtime
1686 // adr(rscratch2, retaddr)
1687 // str(rscratch2, Address(rthread, JavaThread::last_Java_pc_offset()));
1688 // lea(rscratch1, RuntimeAddress(addr)
1689 // blr(rscratch1)
1690 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1691 if (cb) {
1692 return 1 * NativeInstruction::instruction_size;
1693 } else if (_entry_point == nullptr) {
1694 // See CallLeafNoFPIndirect
1695 return 1 * NativeInstruction::instruction_size;
1696 } else {
1697 return 6 * NativeInstruction::instruction_size;
1698 }
1699 }
1700
1701 //=============================================================================
1702
1703 #ifndef PRODUCT
1704 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1705 st->print("BREAKPOINT");
1706 }
1707 #endif
1708
1709 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1710 __ brk(0);
1711 }
1712
1713 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1714 return MachNode::size(ra_);
1715 }
1784 if (C->stub_function() == nullptr) {
1785 st->print("\n\t");
1786 st->print("ldr rscratch1, [guard]\n\t");
1787 st->print("dmb ishld\n\t");
1788 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1789 st->print("cmp rscratch1, rscratch2\n\t");
1790 st->print("b.eq skip");
1791 st->print("\n\t");
1792 st->print("blr #nmethod_entry_barrier_stub\n\t");
1793 st->print("b skip\n\t");
1794 st->print("guard: int\n\t");
1795 st->print("\n\t");
1796 st->print("skip:\n\t");
1797 }
1798 }
1799 #endif
1800
1801 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1802 Compile* C = ra_->C;
1803
1804
1805 __ verified_entry(C, 0);
1806
1807 if (C->stub_function() == nullptr) {
1808 __ entry_barrier();
1809 }
1810
1811 if (!Compile::current()->output()->in_scratch_emit_size()) {
1812 __ bind(*_verified_entry);
1813 }
1814
1815 if (VerifyStackAtCalls) {
1816 Unimplemented();
1817 }
1818
1819 C->output()->set_frame_complete(__ offset());
1820
1821 if (C->has_mach_constant_base_node()) {
1822 // NOTE: We set the table base offset here because users might be
1823 // emitted before MachConstantBaseNode.
1824 ConstantTable& constant_table = C->output()->constant_table();
1825 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1826 }
1827 }
1828
1829 int MachPrologNode::reloc() const
1830 {
1831 return 0;
1832 }
1833
1834 //=============================================================================
1835
1836 #ifndef PRODUCT
1837 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1838 Compile* C = ra_->C;
1839 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1840
1841 st->print("# pop frame %d\n\t",framesize);
1842
1843 if (framesize == 0) {
1844 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1845 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1846 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1847 st->print("add sp, sp, #%d\n\t", framesize);
1848 } else {
1851 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1852 }
1853 if (VM_Version::use_rop_protection()) {
1854 st->print("autiaz\n\t");
1855 st->print("ldr zr, [lr]\n\t");
1856 }
1857
1858 if (do_polling() && C->is_method_compilation()) {
1859 st->print("# test polling word\n\t");
1860 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1861 st->print("cmp sp, rscratch1\n\t");
1862 st->print("bhi #slow_path");
1863 }
1864 }
1865 #endif
1866
1867 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1868 Compile* C = ra_->C;
1869 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1870
1871 __ remove_frame(framesize, C->needs_stack_repair());
1872
1873 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1874 __ reserved_stack_check();
1875 }
1876
1877 if (do_polling() && C->is_method_compilation()) {
1878 Label dummy_label;
1879 Label* code_stub = &dummy_label;
1880 if (!C->output()->in_scratch_emit_size()) {
1881 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1882 C->output()->add_stub(stub);
1883 code_stub = &stub->entry();
1884 }
1885 __ relocate(relocInfo::poll_return_type);
1886 __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
1887 }
1888 }
1889
1890 int MachEpilogNode::reloc() const {
1891 // Return number of relocatable values contained in this instruction.
1892 return 1; // 1 for polling page.
1893 }
1894
1895 const Pipeline * MachEpilogNode::pipeline() const {
1896 return MachNode::pipeline_class();
1897 }
1898
1899 //=============================================================================
1900
1901 static enum RC rc_class(OptoReg::Name reg) {
1902
1903 if (reg == OptoReg::Bad) {
1904 return rc_bad;
1905 }
1906
1907 // we have 32 int registers * 2 halves
1908 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1909
2168 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2169 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2170 int reg = ra_->get_encode(this);
2171
2172 // This add will handle any 24-bit signed offset. 24 bits allows an
2173 // 8 megabyte stack frame.
2174 __ add(as_Register(reg), sp, offset);
2175 }
2176
2177 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2178 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2179 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2180
2181 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2182 return NativeInstruction::instruction_size;
2183 } else {
2184 return 2 * NativeInstruction::instruction_size;
2185 }
2186 }
2187
2188 ///=============================================================================
2189 #ifndef PRODUCT
2190 void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2191 {
2192 st->print_cr("# MachVEPNode");
2193 if (!_verified) {
2194 st->print_cr("\t load_class");
2195 } else {
2196 st->print_cr("\t unpack_inline_arg");
2197 }
2198 }
2199 #endif
2200
2201 void MachVEPNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const
2202 {
2203 if (!_verified) {
2204 __ ic_check(1);
2205 } else {
2206 // TODO 8284443 Avoid creation of temporary frame
2207 if (ra_->C->stub_function() == nullptr) {
2208 __ verified_entry(ra_->C, 0);
2209 __ entry_barrier();
2210 int framesize = ra_->C->output()->frame_slots() << LogBytesPerInt;
2211 __ remove_frame(framesize, false);
2212 }
2213 // Unpack inline type args passed as oop and then jump to
2214 // the verified entry point (skipping the unverified entry).
2215 int sp_inc = __ unpack_inline_args(ra_->C, _receiver_only);
2216 // Emit code for verified entry and save increment for stack repair on return
2217 __ verified_entry(ra_->C, sp_inc);
2218 if (Compile::current()->output()->in_scratch_emit_size()) {
2219 Label dummy_verified_entry;
2220 __ b(dummy_verified_entry);
2221 } else {
2222 __ b(*_verified_entry);
2223 }
2224 }
2225 }
2226
2227 //=============================================================================
2228 #ifndef PRODUCT
2229 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2230 {
2231 st->print_cr("# MachUEPNode");
2232 if (UseCompressedClassPointers) {
2233 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2234 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2235 st->print_cr("\tcmpw rscratch1, r10");
2236 } else {
2237 st->print_cr("\tldr rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2238 st->print_cr("\tldr r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2239 st->print_cr("\tcmp rscratch1, r10");
2240 }
2241 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2242 }
2243 #endif
2244
2245 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2246 {
2247 __ ic_check(InteriorEntryAlignment);
2248 }
2249
2250 // REQUIRED EMIT CODE
2251
2252 //=============================================================================
2253
2254 // Emit deopt handler code.
2255 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
2256 {
2257 // Note that the code buffer's insts_mark is always relative to insts.
2258 // That's why we must use the macroassembler to generate a handler.
2259 address base = __ start_a_stub(size_deopt_handler());
2260 if (base == nullptr) {
2261 ciEnv::current()->record_failure("CodeCache is full");
2262 return 0; // CodeBuffer::expand failed
2263 }
2264
2265 int offset = __ offset();
2266 Label start;
2267 __ bind(start);
2268 __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
2269
3655 %}
3656
3657 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3658 int method_index = resolved_method_index(masm);
3659 address call = __ ic_call((address)$meth$$method, method_index);
3660 if (call == nullptr) {
3661 ciEnv::current()->record_failure("CodeCache is full");
3662 return;
3663 }
3664 __ post_call_nop();
3665 if (Compile::current()->max_vector_size() > 0) {
3666 __ reinitialize_ptrue();
3667 }
3668 %}
3669
3670 enc_class aarch64_enc_call_epilog() %{
3671 if (VerifyStackAtCalls) {
3672 // Check that stack depth is unchanged: find majik cookie on stack
3673 __ call_Unimplemented();
3674 }
3675 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic() && _method->return_type()->is_loaded()) {
3676 // The last return value is not set by the callee but used to pass the null marker to compiled code.
3677 // Search for the corresponding projection, get the register and emit code that initialized it.
3678 uint con = (tf()->range_cc()->cnt() - 1);
3679 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
3680 ProjNode* proj = fast_out(i)->as_Proj();
3681 if (proj->_con == con) {
3682 // Set null marker if r0 is non-null (a non-null value is returned buffered or scalarized)
3683 OptoReg::Name optoReg = ra_->get_reg_first(proj);
3684 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
3685 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
3686 __ cmp(r0, zr);
3687 __ cset(toReg, Assembler::NE);
3688 if (reg->is_stack()) {
3689 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
3690 __ str(toReg, Address(sp, st_off));
3691 }
3692 break;
3693 }
3694 }
3695 if (return_value_is_used()) {
3696 // An inline type is returned as fields in multiple registers.
3697 // R0 either contains an oop if the inline type is buffered or a pointer
3698 // to the corresponding InlineKlass with the lowest bit set to 1. Zero r0
3699 // if the lowest bit is set to allow C2 to use the oop after null checking.
3700 // r0 &= (r0 & 1) - 1
3701 __ andr(rscratch1, r0, 0x1);
3702 __ sub(rscratch1, rscratch1, 0x1);
3703 __ andr(r0, r0, rscratch1);
3704 }
3705 }
3706 %}
3707
3708 enc_class aarch64_enc_java_to_runtime(method meth) %{
3709 // some calls to generated routines (arraycopy code) are scheduled
3710 // by C2 as runtime calls. if so we can call them using a br (they
3711 // will be in a reachable segment) otherwise we have to use a blr
3712 // which loads the absolute address into a register.
3713 address entry = (address)$meth$$method;
3714 CodeBlob *cb = CodeCache::find_blob(entry);
3715 if (cb) {
3716 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3717 if (call == nullptr) {
3718 ciEnv::current()->record_failure("CodeCache is full");
3719 return;
3720 }
3721 __ post_call_nop();
3722 } else {
3723 Label retaddr;
3724 // Make the anchor frame walkable
3725 __ adr(rscratch2, retaddr);
6867 instruct loadConL(iRegLNoSp dst, immL src)
6868 %{
6869 match(Set dst src);
6870
6871 ins_cost(INSN_COST);
6872 format %{ "mov $dst, $src\t# long" %}
6873
6874 ins_encode( aarch64_enc_mov_imm(dst, src) );
6875
6876 ins_pipe(ialu_imm);
6877 %}
6878
6879 // Load Pointer Constant
6880
6881 instruct loadConP(iRegPNoSp dst, immP con)
6882 %{
6883 match(Set dst con);
6884
6885 ins_cost(INSN_COST * 4);
6886 format %{
6887 "mov $dst, $con\t# ptr"
6888 %}
6889
6890 ins_encode(aarch64_enc_mov_p(dst, con));
6891
6892 ins_pipe(ialu_imm);
6893 %}
6894
6895 // Load Null Pointer Constant
6896
6897 instruct loadConP0(iRegPNoSp dst, immP0 con)
6898 %{
6899 match(Set dst con);
6900
6901 ins_cost(INSN_COST);
6902 format %{ "mov $dst, $con\t# nullptr ptr" %}
6903
6904 ins_encode(aarch64_enc_mov_p0(dst, con));
6905
6906 ins_pipe(ialu_imm);
6907 %}
8060 %}
8061
8062 // ============================================================================
8063 // Cast/Convert Instructions
8064
8065 instruct castX2P(iRegPNoSp dst, iRegL src) %{
8066 match(Set dst (CastX2P src));
8067
8068 ins_cost(INSN_COST);
8069 format %{ "mov $dst, $src\t# long -> ptr" %}
8070
8071 ins_encode %{
8072 if ($dst$$reg != $src$$reg) {
8073 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8074 }
8075 %}
8076
8077 ins_pipe(ialu_reg);
8078 %}
8079
8080 instruct castI2N(iRegNNoSp dst, iRegI src) %{
8081 match(Set dst (CastI2N src));
8082
8083 ins_cost(INSN_COST);
8084 format %{ "mov $dst, $src\t# int -> narrow ptr" %}
8085
8086 ins_encode %{
8087 if ($dst$$reg != $src$$reg) {
8088 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8089 }
8090 %}
8091
8092 ins_pipe(ialu_reg);
8093 %}
8094
8095 instruct castN2X(iRegLNoSp dst, iRegN src) %{
8096 match(Set dst (CastP2X src));
8097
8098 ins_cost(INSN_COST);
8099 format %{ "mov $dst, $src\t# ptr -> long" %}
8100
8101 ins_encode %{
8102 if ($dst$$reg != $src$$reg) {
8103 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8104 }
8105 %}
8106
8107 ins_pipe(ialu_reg);
8108 %}
8109
8110 instruct castP2X(iRegLNoSp dst, iRegP src) %{
8111 match(Set dst (CastP2X src));
8112
8113 ins_cost(INSN_COST);
8114 format %{ "mov $dst, $src\t# ptr -> long" %}
8115
8116 ins_encode %{
8117 if ($dst$$reg != $src$$reg) {
8118 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8119 }
8120 %}
8121
8122 ins_pipe(ialu_reg);
8123 %}
8124
8125 // Convert oop into int for vectors alignment masking
8126 instruct convP2I(iRegINoSp dst, iRegP src) %{
8127 match(Set dst (ConvL2I (CastP2X src)));
8128
8129 ins_cost(INSN_COST);
14078
14079 match(Set dst (MoveL2D src));
14080
14081 effect(DEF dst, USE src);
14082
14083 ins_cost(INSN_COST);
14084
14085 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
14086
14087 ins_encode %{
14088 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
14089 %}
14090
14091 ins_pipe(fp_l2d);
14092
14093 %}
14094
14095 // ============================================================================
14096 // clearing of an array
14097
14098 instruct clearArray_reg_reg_immL0(iRegL_R11 cnt, iRegP_R10 base, immL0 zero, Universe dummy, rFlagsReg cr)
14099 %{
14100 match(Set dummy (ClearArray (Binary cnt base) zero));
14101 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14102
14103 ins_cost(4 * INSN_COST);
14104 format %{ "ClearArray $cnt, $base" %}
14105
14106 ins_encode %{
14107 address tpc = __ zero_words($base$$Register, $cnt$$Register);
14108 if (tpc == nullptr) {
14109 ciEnv::current()->record_failure("CodeCache is full");
14110 return;
14111 }
14112 %}
14113
14114 ins_pipe(pipe_class_memory);
14115 %}
14116
14117 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, iRegL val, Universe dummy, rFlagsReg cr)
14118 %{
14119 predicate(((ClearArrayNode*)n)->word_copy_only());
14120 match(Set dummy (ClearArray (Binary cnt base) val));
14121 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14122
14123 ins_cost(4 * INSN_COST);
14124 format %{ "ClearArray $cnt, $base, $val" %}
14125
14126 ins_encode %{
14127 __ fill_words($base$$Register, $cnt$$Register, $val$$Register);
14128 %}
14129
14130 ins_pipe(pipe_class_memory);
14131 %}
14132
14133 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, Universe dummy, rFlagsReg cr)
14134 %{
14135 predicate((uint64_t)n->in(2)->get_long()
14136 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord)
14137 && !((ClearArrayNode*)n)->word_copy_only());
14138 match(Set dummy (ClearArray cnt base));
14139 effect(TEMP temp, USE_KILL base, KILL cr);
14140
14141 ins_cost(4 * INSN_COST);
14142 format %{ "ClearArray $cnt, $base" %}
14143
14144 ins_encode %{
14145 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
14146 if (tpc == nullptr) {
14147 ciEnv::current()->record_failure("CodeCache is full");
14148 return;
14149 }
14150 %}
14151
14152 ins_pipe(pipe_class_memory);
14153 %}
14154
14155 // ============================================================================
14156 // Overflow Math Instructions
14157
15434 %}
15435
15436 // Call Runtime Instruction without safepoint and with vector arguments
15437 instruct CallLeafDirectVector(method meth)
15438 %{
15439 match(CallLeafVector);
15440
15441 effect(USE meth);
15442
15443 ins_cost(CALL_COST);
15444
15445 format %{ "CALL, runtime leaf vector $meth" %}
15446
15447 ins_encode(aarch64_enc_java_to_runtime(meth));
15448
15449 ins_pipe(pipe_class_call);
15450 %}
15451
15452 // Call Runtime Instruction
15453
15454 // entry point is null, target holds the address to call
15455 instruct CallLeafNoFPIndirect(iRegP target)
15456 %{
15457 predicate(n->as_Call()->entry_point() == nullptr);
15458
15459 match(CallLeafNoFP target);
15460
15461 ins_cost(CALL_COST);
15462
15463 format %{ "CALL, runtime leaf nofp indirect $target" %}
15464
15465 ins_encode %{
15466 __ blr($target$$Register);
15467 %}
15468
15469 ins_pipe(pipe_class_call);
15470 %}
15471
15472 instruct CallLeafNoFPDirect(method meth)
15473 %{
15474 predicate(n->as_Call()->entry_point() != nullptr);
15475
15476 match(CallLeafNoFP);
15477
15478 effect(USE meth);
15479
15480 ins_cost(CALL_COST);
15481
15482 format %{ "CALL, runtime leaf nofp $meth" %}
15483
15484 ins_encode( aarch64_enc_java_to_runtime(meth) );
15485
15486 ins_pipe(pipe_class_call);
15487 %}
15488
15489 // Tail Call; Jump from runtime stub to Java code.
15490 // Also known as an 'interprocedural jump'.
15491 // Target of jump will eventually return to caller.
15492 // TailJump below removes the return address.
15493 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
15494 // emitted just above the TailCall which has reset rfp to the caller state.
15495 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|