1673
1674 int MachCallDynamicJavaNode::ret_addr_offset()
1675 {
1676 return 16; // movz, movk, movk, bl
1677 }
1678
1679 int MachCallRuntimeNode::ret_addr_offset() {
1680 // for generated stubs the call will be
1681 // bl(addr)
1682 // or with far branches
1683 // bl(trampoline_stub)
1684 // for real runtime callouts it will be six instructions
1685 // see aarch64_enc_java_to_runtime
1686 // adr(rscratch2, retaddr)
1687 // str(rscratch2, Address(rthread, JavaThread::last_Java_pc_offset()));
1688 // lea(rscratch1, RuntimeAddress(addr)
1689 // blr(rscratch1)
1690 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1691 if (cb) {
1692 return 1 * NativeInstruction::instruction_size;
1693 } else {
1694 return 6 * NativeInstruction::instruction_size;
1695 }
1696 }
1697
1698 //=============================================================================
1699
1700 #ifndef PRODUCT
1701 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1702 st->print("BREAKPOINT");
1703 }
1704 #endif
1705
1706 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1707 __ brk(0);
1708 }
1709
1710 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1711 return MachNode::size(ra_);
1712 }
1781 if (C->stub_function() == nullptr) {
1782 st->print("\n\t");
1783 st->print("ldr rscratch1, [guard]\n\t");
1784 st->print("dmb ishld\n\t");
1785 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1786 st->print("cmp rscratch1, rscratch2\n\t");
1787 st->print("b.eq skip");
1788 st->print("\n\t");
1789 st->print("blr #nmethod_entry_barrier_stub\n\t");
1790 st->print("b skip\n\t");
1791 st->print("guard: int\n\t");
1792 st->print("\n\t");
1793 st->print("skip:\n\t");
1794 }
1795 }
1796 #endif
1797
1798 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1799 Compile* C = ra_->C;
1800
1801 // n.b. frame size includes space for return pc and rfp
1802 const int framesize = C->output()->frame_size_in_bytes();
1803
1804 if (C->clinit_barrier_on_entry()) {
1805 assert(!C->method()->holder()->is_not_initialized(), "initialization should have been started");
1806
1807 Label L_skip_barrier;
1808
1809 __ mov_metadata(rscratch2, C->method()->holder()->constant_encoding());
1810 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1811 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1812 __ bind(L_skip_barrier);
1813 }
1814
1815 if (C->max_vector_size() > 0) {
1816 __ reinitialize_ptrue();
1817 }
1818
1819 int bangsize = C->output()->bang_size_in_bytes();
1820 if (C->output()->need_stack_bang(bangsize))
1821 __ generate_stack_overflow_check(bangsize);
1822
1823 __ build_frame(framesize);
1824
1825 if (C->stub_function() == nullptr) {
1826 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1827 // Dummy labels for just measuring the code size
1828 Label dummy_slow_path;
1829 Label dummy_continuation;
1830 Label dummy_guard;
1831 Label* slow_path = &dummy_slow_path;
1832 Label* continuation = &dummy_continuation;
1833 Label* guard = &dummy_guard;
1834 if (!Compile::current()->output()->in_scratch_emit_size()) {
1835 // Use real labels from actual stub when not emitting code for the purpose of measuring its size
1836 C2EntryBarrierStub* stub = new (Compile::current()->comp_arena()) C2EntryBarrierStub();
1837 Compile::current()->output()->add_stub(stub);
1838 slow_path = &stub->entry();
1839 continuation = &stub->continuation();
1840 guard = &stub->guard();
1841 }
1842 // In the C2 code, we move the non-hot part of nmethod entry barriers out-of-line to a stub.
1843 bs->nmethod_entry_barrier(masm, slow_path, continuation, guard);
1844 }
1845
1846 if (VerifyStackAtCalls) {
1847 Unimplemented();
1848 }
1849
1850 C->output()->set_frame_complete(__ offset());
1851
1852 if (C->has_mach_constant_base_node()) {
1853 // NOTE: We set the table base offset here because users might be
1854 // emitted before MachConstantBaseNode.
1855 ConstantTable& constant_table = C->output()->constant_table();
1856 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1857 }
1858 }
1859
1860 uint MachPrologNode::size(PhaseRegAlloc* ra_) const
1861 {
1862 return MachNode::size(ra_); // too many variables; just compute it
1863 // the hard way
1864 }
1865
1866 int MachPrologNode::reloc() const
1867 {
1868 return 0;
1869 }
1870
1871 //=============================================================================
1872
1873 #ifndef PRODUCT
1874 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1875 Compile* C = ra_->C;
1876 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1877
1878 st->print("# pop frame %d\n\t",framesize);
1879
1880 if (framesize == 0) {
1881 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1882 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1883 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1884 st->print("add sp, sp, #%d\n\t", framesize);
1885 } else {
1888 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1889 }
1890 if (VM_Version::use_rop_protection()) {
1891 st->print("autiaz\n\t");
1892 st->print("ldr zr, [lr]\n\t");
1893 }
1894
1895 if (do_polling() && C->is_method_compilation()) {
1896 st->print("# test polling word\n\t");
1897 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1898 st->print("cmp sp, rscratch1\n\t");
1899 st->print("bhi #slow_path");
1900 }
1901 }
1902 #endif
1903
1904 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1905 Compile* C = ra_->C;
1906 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1907
1908 __ remove_frame(framesize);
1909
1910 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1911 __ reserved_stack_check();
1912 }
1913
1914 if (do_polling() && C->is_method_compilation()) {
1915 Label dummy_label;
1916 Label* code_stub = &dummy_label;
1917 if (!C->output()->in_scratch_emit_size()) {
1918 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1919 C->output()->add_stub(stub);
1920 code_stub = &stub->entry();
1921 }
1922 __ relocate(relocInfo::poll_return_type);
1923 __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
1924 }
1925 }
1926
1927 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
1928 // Variable size. Determine dynamically.
1929 return MachNode::size(ra_);
1930 }
1931
1932 int MachEpilogNode::reloc() const {
1933 // Return number of relocatable values contained in this instruction.
1934 return 1; // 1 for polling page.
1935 }
1936
1937 const Pipeline * MachEpilogNode::pipeline() const {
1938 return MachNode::pipeline_class();
1939 }
1940
1941 //=============================================================================
1942
1943 static enum RC rc_class(OptoReg::Name reg) {
1944
1945 if (reg == OptoReg::Bad) {
1946 return rc_bad;
1947 }
1948
1949 // we have 32 int registers * 2 halves
1950 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1951
2210 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2211 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2212 int reg = ra_->get_encode(this);
2213
2214 // This add will handle any 24-bit signed offset. 24 bits allows an
2215 // 8 megabyte stack frame.
2216 __ add(as_Register(reg), sp, offset);
2217 }
2218
2219 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2220 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2221 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2222
2223 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2224 return NativeInstruction::instruction_size;
2225 } else {
2226 return 2 * NativeInstruction::instruction_size;
2227 }
2228 }
2229
2230 //=============================================================================
2231
2232 #ifndef PRODUCT
2233 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2234 {
2235 st->print_cr("# MachUEPNode");
2236 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2237 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2238 st->print_cr("\tcmpw rscratch1, r10");
2239 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2240 }
2241 #endif
2242
2243 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2244 {
2245 __ ic_check(InteriorEntryAlignment);
2246 }
2247
2248 uint MachUEPNode::size(PhaseRegAlloc* ra_) const
2249 {
2250 return MachNode::size(ra_);
2251 }
2252
2253 // REQUIRED EMIT CODE
2254
2255 //=============================================================================
2256
2257 // Emit deopt handler code.
2258 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
2259 {
2260 // Note that the code buffer's insts_mark is always relative to insts.
2261 // That's why we must use the macroassembler to generate a handler.
2262 address base = __ start_a_stub(size_deopt_handler());
2263 if (base == nullptr) {
2264 ciEnv::current()->record_failure("CodeCache is full");
2265 return 0; // CodeBuffer::expand failed
2266 }
2267
2268 int offset = __ offset();
2269 Label start;
2270 __ bind(start);
2271 __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
2272
3676 %}
3677
3678 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3679 int method_index = resolved_method_index(masm);
3680 address call = __ ic_call((address)$meth$$method, method_index);
3681 if (call == nullptr) {
3682 ciEnv::current()->record_failure("CodeCache is full");
3683 return;
3684 }
3685 __ post_call_nop();
3686 if (Compile::current()->max_vector_size() > 0) {
3687 __ reinitialize_ptrue();
3688 }
3689 %}
3690
3691 enc_class aarch64_enc_call_epilog() %{
3692 if (VerifyStackAtCalls) {
3693 // Check that stack depth is unchanged: find majik cookie on stack
3694 __ call_Unimplemented();
3695 }
3696 %}
3697
3698 enc_class aarch64_enc_java_to_runtime(method meth) %{
3699 // some calls to generated routines (arraycopy code) are scheduled
3700 // by C2 as runtime calls. if so we can call them using a br (they
3701 // will be in a reachable segment) otherwise we have to use a blr
3702 // which loads the absolute address into a register.
3703 address entry = (address)$meth$$method;
3704 CodeBlob *cb = CodeCache::find_blob(entry);
3705 if (cb) {
3706 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3707 if (call == nullptr) {
3708 ciEnv::current()->record_failure("CodeCache is full");
3709 return;
3710 }
3711 __ post_call_nop();
3712 } else {
3713 Label retaddr;
3714 // Make the anchor frame walkable
3715 __ adr(rscratch2, retaddr);
3965 operand immI_gt_1()
3966 %{
3967 predicate(n->get_int() > 1);
3968 match(ConI);
3969
3970 op_cost(0);
3971 format %{ %}
3972 interface(CONST_INTER);
3973 %}
3974
3975 operand immI_le_4()
3976 %{
3977 predicate(n->get_int() <= 4);
3978 match(ConI);
3979
3980 op_cost(0);
3981 format %{ %}
3982 interface(CONST_INTER);
3983 %}
3984
3985 operand immI_16()
3986 %{
3987 predicate(n->get_int() == 16);
3988 match(ConI);
3989
3990 op_cost(0);
3991 format %{ %}
3992 interface(CONST_INTER);
3993 %}
3994
3995 operand immI_24()
3996 %{
3997 predicate(n->get_int() == 24);
3998 match(ConI);
3999
4000 op_cost(0);
4001 format %{ %}
4002 interface(CONST_INTER);
4003 %}
4004
8101 %}
8102
8103 // ============================================================================
8104 // Cast/Convert Instructions
8105
8106 instruct castX2P(iRegPNoSp dst, iRegL src) %{
8107 match(Set dst (CastX2P src));
8108
8109 ins_cost(INSN_COST);
8110 format %{ "mov $dst, $src\t# long -> ptr" %}
8111
8112 ins_encode %{
8113 if ($dst$$reg != $src$$reg) {
8114 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8115 }
8116 %}
8117
8118 ins_pipe(ialu_reg);
8119 %}
8120
8121 instruct castP2X(iRegLNoSp dst, iRegP src) %{
8122 match(Set dst (CastP2X src));
8123
8124 ins_cost(INSN_COST);
8125 format %{ "mov $dst, $src\t# ptr -> long" %}
8126
8127 ins_encode %{
8128 if ($dst$$reg != $src$$reg) {
8129 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8130 }
8131 %}
8132
8133 ins_pipe(ialu_reg);
8134 %}
8135
8136 // Convert oop into int for vectors alignment masking
8137 instruct convP2I(iRegINoSp dst, iRegP src) %{
8138 match(Set dst (ConvL2I (CastP2X src)));
8139
8140 ins_cost(INSN_COST);
14089
14090 match(Set dst (MoveL2D src));
14091
14092 effect(DEF dst, USE src);
14093
14094 ins_cost(INSN_COST);
14095
14096 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
14097
14098 ins_encode %{
14099 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
14100 %}
14101
14102 ins_pipe(fp_l2d);
14103
14104 %}
14105
14106 // ============================================================================
14107 // clearing of an array
14108
14109 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, Universe dummy, rFlagsReg cr)
14110 %{
14111 match(Set dummy (ClearArray cnt base));
14112 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14113
14114 ins_cost(4 * INSN_COST);
14115 format %{ "ClearArray $cnt, $base" %}
14116
14117 ins_encode %{
14118 address tpc = __ zero_words($base$$Register, $cnt$$Register);
14119 if (tpc == nullptr) {
14120 ciEnv::current()->record_failure("CodeCache is full");
14121 return;
14122 }
14123 %}
14124
14125 ins_pipe(pipe_class_memory);
14126 %}
14127
14128 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, Universe dummy, rFlagsReg cr)
14129 %{
14130 predicate((uint64_t)n->in(2)->get_long()
14131 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord));
14132 match(Set dummy (ClearArray cnt base));
14133 effect(TEMP temp, USE_KILL base, KILL cr);
14134
14135 ins_cost(4 * INSN_COST);
14136 format %{ "ClearArray $cnt, $base" %}
14137
14138 ins_encode %{
14139 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
14140 if (tpc == nullptr) {
14141 ciEnv::current()->record_failure("CodeCache is full");
14142 return;
14143 }
14144 %}
14145
14146 ins_pipe(pipe_class_memory);
14147 %}
14148
14149 // ============================================================================
14150 // Overflow Math Instructions
14151
14152 instruct overflowAddI_reg_reg(rFlagsReg cr, iRegIorL2I op1, iRegIorL2I op2)
15428 %}
15429
15430 // Call Runtime Instruction without safepoint and with vector arguments
15431 instruct CallLeafDirectVector(method meth)
15432 %{
15433 match(CallLeafVector);
15434
15435 effect(USE meth);
15436
15437 ins_cost(CALL_COST);
15438
15439 format %{ "CALL, runtime leaf vector $meth" %}
15440
15441 ins_encode(aarch64_enc_java_to_runtime(meth));
15442
15443 ins_pipe(pipe_class_call);
15444 %}
15445
15446 // Call Runtime Instruction
15447
15448 instruct CallLeafNoFPDirect(method meth)
15449 %{
15450 match(CallLeafNoFP);
15451
15452 effect(USE meth);
15453
15454 ins_cost(CALL_COST);
15455
15456 format %{ "CALL, runtime leaf nofp $meth" %}
15457
15458 ins_encode( aarch64_enc_java_to_runtime(meth) );
15459
15460 ins_pipe(pipe_class_call);
15461 %}
15462
15463 // Tail Call; Jump from runtime stub to Java code.
15464 // Also known as an 'interprocedural jump'.
15465 // Target of jump will eventually return to caller.
15466 // TailJump below removes the return address.
15467 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
15468 // emitted just above the TailCall which has reset rfp to the caller state.
15469 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|
1673
1674 int MachCallDynamicJavaNode::ret_addr_offset()
1675 {
1676 return 16; // movz, movk, movk, bl
1677 }
1678
1679 int MachCallRuntimeNode::ret_addr_offset() {
1680 // for generated stubs the call will be
1681 // bl(addr)
1682 // or with far branches
1683 // bl(trampoline_stub)
1684 // for real runtime callouts it will be six instructions
1685 // see aarch64_enc_java_to_runtime
1686 // adr(rscratch2, retaddr)
1687 // str(rscratch2, Address(rthread, JavaThread::last_Java_pc_offset()));
1688 // lea(rscratch1, RuntimeAddress(addr)
1689 // blr(rscratch1)
1690 CodeBlob *cb = CodeCache::find_blob(_entry_point);
1691 if (cb) {
1692 return 1 * NativeInstruction::instruction_size;
1693 } else if (_entry_point == nullptr) {
1694 // See CallLeafNoFPIndirect
1695 return 1 * NativeInstruction::instruction_size;
1696 } else {
1697 return 6 * NativeInstruction::instruction_size;
1698 }
1699 }
1700
1701 //=============================================================================
1702
1703 #ifndef PRODUCT
1704 void MachBreakpointNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1705 st->print("BREAKPOINT");
1706 }
1707 #endif
1708
1709 void MachBreakpointNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1710 __ brk(0);
1711 }
1712
1713 uint MachBreakpointNode::size(PhaseRegAlloc *ra_) const {
1714 return MachNode::size(ra_);
1715 }
1784 if (C->stub_function() == nullptr) {
1785 st->print("\n\t");
1786 st->print("ldr rscratch1, [guard]\n\t");
1787 st->print("dmb ishld\n\t");
1788 st->print("ldr rscratch2, [rthread, #thread_disarmed_guard_value_offset]\n\t");
1789 st->print("cmp rscratch1, rscratch2\n\t");
1790 st->print("b.eq skip");
1791 st->print("\n\t");
1792 st->print("blr #nmethod_entry_barrier_stub\n\t");
1793 st->print("b skip\n\t");
1794 st->print("guard: int\n\t");
1795 st->print("\n\t");
1796 st->print("skip:\n\t");
1797 }
1798 }
1799 #endif
1800
1801 void MachPrologNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1802 Compile* C = ra_->C;
1803
1804
1805 __ verified_entry(C, 0);
1806
1807 if (C->stub_function() == nullptr) {
1808 __ entry_barrier();
1809 }
1810
1811 if (!Compile::current()->output()->in_scratch_emit_size()) {
1812 __ bind(*_verified_entry);
1813 }
1814
1815 if (VerifyStackAtCalls) {
1816 Unimplemented();
1817 }
1818
1819 C->output()->set_frame_complete(__ offset());
1820
1821 if (C->has_mach_constant_base_node()) {
1822 // NOTE: We set the table base offset here because users might be
1823 // emitted before MachConstantBaseNode.
1824 ConstantTable& constant_table = C->output()->constant_table();
1825 constant_table.set_table_base_offset(constant_table.calculate_table_base_offset());
1826 }
1827 }
1828
1829 int MachPrologNode::reloc() const
1830 {
1831 return 0;
1832 }
1833
1834 //=============================================================================
1835
1836 #ifndef PRODUCT
1837 void MachEpilogNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1838 Compile* C = ra_->C;
1839 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1840
1841 st->print("# pop frame %d\n\t",framesize);
1842
1843 if (framesize == 0) {
1844 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1845 } else if (framesize < ((1 << 9) + 2 * wordSize)) {
1846 st->print("ldp lr, rfp, [sp,#%d]\n\t", framesize - 2 * wordSize);
1847 st->print("add sp, sp, #%d\n\t", framesize);
1848 } else {
1851 st->print("ldp lr, rfp, [sp],#%d\n\t", (2 * wordSize));
1852 }
1853 if (VM_Version::use_rop_protection()) {
1854 st->print("autiaz\n\t");
1855 st->print("ldr zr, [lr]\n\t");
1856 }
1857
1858 if (do_polling() && C->is_method_compilation()) {
1859 st->print("# test polling word\n\t");
1860 st->print("ldr rscratch1, [rthread],#%d\n\t", in_bytes(JavaThread::polling_word_offset()));
1861 st->print("cmp sp, rscratch1\n\t");
1862 st->print("bhi #slow_path");
1863 }
1864 }
1865 #endif
1866
1867 void MachEpilogNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
1868 Compile* C = ra_->C;
1869 int framesize = C->output()->frame_slots() << LogBytesPerInt;
1870
1871 __ remove_frame(framesize, C->needs_stack_repair());
1872
1873 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
1874 __ reserved_stack_check();
1875 }
1876
1877 if (do_polling() && C->is_method_compilation()) {
1878 Label dummy_label;
1879 Label* code_stub = &dummy_label;
1880 if (!C->output()->in_scratch_emit_size()) {
1881 C2SafepointPollStub* stub = new (C->comp_arena()) C2SafepointPollStub(__ offset());
1882 C->output()->add_stub(stub);
1883 code_stub = &stub->entry();
1884 }
1885 __ relocate(relocInfo::poll_return_type);
1886 __ safepoint_poll(*code_stub, true /* at_return */, true /* in_nmethod */);
1887 }
1888 }
1889
1890 int MachEpilogNode::reloc() const {
1891 // Return number of relocatable values contained in this instruction.
1892 return 1; // 1 for polling page.
1893 }
1894
1895 const Pipeline * MachEpilogNode::pipeline() const {
1896 return MachNode::pipeline_class();
1897 }
1898
1899 //=============================================================================
1900
1901 static enum RC rc_class(OptoReg::Name reg) {
1902
1903 if (reg == OptoReg::Bad) {
1904 return rc_bad;
1905 }
1906
1907 // we have 32 int registers * 2 halves
1908 int slots_of_int_registers = Register::number_of_registers * Register::max_slots_per_register;
1909
2168 void BoxLockNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc *ra_) const {
2169 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2170 int reg = ra_->get_encode(this);
2171
2172 // This add will handle any 24-bit signed offset. 24 bits allows an
2173 // 8 megabyte stack frame.
2174 __ add(as_Register(reg), sp, offset);
2175 }
2176
2177 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
2178 // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
2179 int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
2180
2181 if (Assembler::operand_valid_for_add_sub_immediate(offset)) {
2182 return NativeInstruction::instruction_size;
2183 } else {
2184 return 2 * NativeInstruction::instruction_size;
2185 }
2186 }
2187
2188 ///=============================================================================
2189 #ifndef PRODUCT
2190 void MachVEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2191 {
2192 st->print_cr("# MachVEPNode");
2193 if (!_verified) {
2194 st->print_cr("\t load_class");
2195 } else {
2196 st->print_cr("\t unpack_inline_arg");
2197 }
2198 }
2199 #endif
2200
2201 void MachVEPNode::emit(C2_MacroAssembler *masm, PhaseRegAlloc* ra_) const
2202 {
2203 if (!_verified) {
2204 __ ic_check(1);
2205 } else {
2206 if (ra_->C->stub_function() == nullptr) {
2207 // Emit the entry barrier in a temporary frame before unpacking because
2208 // it can deopt, which would require packing the scalarized args again.
2209 __ verified_entry(ra_->C, 0);
2210 __ entry_barrier();
2211 int framesize = ra_->C->output()->frame_slots() << LogBytesPerInt;
2212 __ remove_frame(framesize, false);
2213 }
2214 // Unpack inline type args passed as oop and then jump to
2215 // the verified entry point (skipping the unverified entry).
2216 int sp_inc = __ unpack_inline_args(ra_->C, _receiver_only);
2217 // Emit code for verified entry and save increment for stack repair on return
2218 __ verified_entry(ra_->C, sp_inc);
2219 if (Compile::current()->output()->in_scratch_emit_size()) {
2220 Label dummy_verified_entry;
2221 __ b(dummy_verified_entry);
2222 } else {
2223 __ b(*_verified_entry);
2224 }
2225 }
2226 }
2227
2228 //=============================================================================
2229 #ifndef PRODUCT
2230 void MachUEPNode::format(PhaseRegAlloc* ra_, outputStream* st) const
2231 {
2232 st->print_cr("# MachUEPNode");
2233 st->print_cr("\tldrw rscratch1, [j_rarg0 + oopDesc::klass_offset_in_bytes()]\t# compressed klass");
2234 st->print_cr("\tldrw r10, [rscratch2 + CompiledICData::speculated_klass_offset()]\t# compressed klass");
2235 st->print_cr("\tcmpw rscratch1, r10");
2236 st->print_cr("\tbne, SharedRuntime::_ic_miss_stub");
2237 }
2238 #endif
2239
2240 void MachUEPNode::emit(C2_MacroAssembler* masm, PhaseRegAlloc* ra_) const
2241 {
2242 __ ic_check(InteriorEntryAlignment);
2243 }
2244
2245 // REQUIRED EMIT CODE
2246
2247 //=============================================================================
2248
2249 // Emit deopt handler code.
2250 int HandlerImpl::emit_deopt_handler(C2_MacroAssembler* masm)
2251 {
2252 // Note that the code buffer's insts_mark is always relative to insts.
2253 // That's why we must use the macroassembler to generate a handler.
2254 address base = __ start_a_stub(size_deopt_handler());
2255 if (base == nullptr) {
2256 ciEnv::current()->record_failure("CodeCache is full");
2257 return 0; // CodeBuffer::expand failed
2258 }
2259
2260 int offset = __ offset();
2261 Label start;
2262 __ bind(start);
2263 __ far_call(RuntimeAddress(SharedRuntime::deopt_blob()->unpack()));
2264
3668 %}
3669
3670 enc_class aarch64_enc_java_dynamic_call(method meth) %{
3671 int method_index = resolved_method_index(masm);
3672 address call = __ ic_call((address)$meth$$method, method_index);
3673 if (call == nullptr) {
3674 ciEnv::current()->record_failure("CodeCache is full");
3675 return;
3676 }
3677 __ post_call_nop();
3678 if (Compile::current()->max_vector_size() > 0) {
3679 __ reinitialize_ptrue();
3680 }
3681 %}
3682
3683 enc_class aarch64_enc_call_epilog() %{
3684 if (VerifyStackAtCalls) {
3685 // Check that stack depth is unchanged: find majik cookie on stack
3686 __ call_Unimplemented();
3687 }
3688 if (tf()->returns_inline_type_as_fields() && !_method->is_method_handle_intrinsic() && _method->return_type()->is_loaded()) {
3689 // The last return value is not set by the callee but used to pass the null marker to compiled code.
3690 // Search for the corresponding projection, get the register and emit code that initialized it.
3691 uint con = (tf()->range_cc()->cnt() - 1);
3692 for (DUIterator_Fast imax, i = fast_outs(imax); i < imax; i++) {
3693 ProjNode* proj = fast_out(i)->as_Proj();
3694 if (proj->_con == con) {
3695 // Set null marker if r0 is non-null (a non-null value is returned buffered or scalarized)
3696 OptoReg::Name optoReg = ra_->get_reg_first(proj);
3697 VMReg reg = OptoReg::as_VMReg(optoReg, ra_->_framesize, OptoReg::reg2stack(ra_->_matcher._new_SP));
3698 Register toReg = reg->is_reg() ? reg->as_Register() : rscratch1;
3699 __ cmp(r0, zr);
3700 __ cset(toReg, Assembler::NE);
3701 if (reg->is_stack()) {
3702 int st_off = reg->reg2stack() * VMRegImpl::stack_slot_size;
3703 __ str(toReg, Address(sp, st_off));
3704 }
3705 break;
3706 }
3707 }
3708 if (return_value_is_used()) {
3709 // An inline type is returned as fields in multiple registers.
3710 // R0 either contains an oop if the inline type is buffered or a pointer
3711 // to the corresponding InlineKlass with the lowest bit set to 1. Zero r0
3712 // if the lowest bit is set to allow C2 to use the oop after null checking.
3713 // r0 &= (r0 & 1) - 1
3714 __ andr(rscratch1, r0, 0x1);
3715 __ sub(rscratch1, rscratch1, 0x1);
3716 __ andr(r0, r0, rscratch1);
3717 }
3718 }
3719 %}
3720
3721 enc_class aarch64_enc_java_to_runtime(method meth) %{
3722 // some calls to generated routines (arraycopy code) are scheduled
3723 // by C2 as runtime calls. if so we can call them using a br (they
3724 // will be in a reachable segment) otherwise we have to use a blr
3725 // which loads the absolute address into a register.
3726 address entry = (address)$meth$$method;
3727 CodeBlob *cb = CodeCache::find_blob(entry);
3728 if (cb) {
3729 address call = __ trampoline_call(Address(entry, relocInfo::runtime_call_type));
3730 if (call == nullptr) {
3731 ciEnv::current()->record_failure("CodeCache is full");
3732 return;
3733 }
3734 __ post_call_nop();
3735 } else {
3736 Label retaddr;
3737 // Make the anchor frame walkable
3738 __ adr(rscratch2, retaddr);
3988 operand immI_gt_1()
3989 %{
3990 predicate(n->get_int() > 1);
3991 match(ConI);
3992
3993 op_cost(0);
3994 format %{ %}
3995 interface(CONST_INTER);
3996 %}
3997
3998 operand immI_le_4()
3999 %{
4000 predicate(n->get_int() <= 4);
4001 match(ConI);
4002
4003 op_cost(0);
4004 format %{ %}
4005 interface(CONST_INTER);
4006 %}
4007
4008 operand immI_4()
4009 %{
4010 predicate(n->get_int() == 4);
4011 match(ConI);
4012
4013 op_cost(0);
4014 format %{ %}
4015 interface(CONST_INTER);
4016 %}
4017
4018 operand immI_16()
4019 %{
4020 predicate(n->get_int() == 16);
4021 match(ConI);
4022
4023 op_cost(0);
4024 format %{ %}
4025 interface(CONST_INTER);
4026 %}
4027
4028 operand immI_24()
4029 %{
4030 predicate(n->get_int() == 24);
4031 match(ConI);
4032
4033 op_cost(0);
4034 format %{ %}
4035 interface(CONST_INTER);
4036 %}
4037
8134 %}
8135
8136 // ============================================================================
8137 // Cast/Convert Instructions
8138
8139 instruct castX2P(iRegPNoSp dst, iRegL src) %{
8140 match(Set dst (CastX2P src));
8141
8142 ins_cost(INSN_COST);
8143 format %{ "mov $dst, $src\t# long -> ptr" %}
8144
8145 ins_encode %{
8146 if ($dst$$reg != $src$$reg) {
8147 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8148 }
8149 %}
8150
8151 ins_pipe(ialu_reg);
8152 %}
8153
8154 instruct castI2N(iRegNNoSp dst, iRegI src) %{
8155 match(Set dst (CastI2N src));
8156
8157 ins_cost(INSN_COST);
8158 format %{ "mov $dst, $src\t# int -> narrow ptr" %}
8159
8160 ins_encode %{
8161 if ($dst$$reg != $src$$reg) {
8162 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8163 }
8164 %}
8165
8166 ins_pipe(ialu_reg);
8167 %}
8168
8169 instruct castN2X(iRegLNoSp dst, iRegN src) %{
8170 match(Set dst (CastP2X src));
8171
8172 ins_cost(INSN_COST);
8173 format %{ "mov $dst, $src\t# ptr -> long" %}
8174
8175 ins_encode %{
8176 if ($dst$$reg != $src$$reg) {
8177 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8178 }
8179 %}
8180
8181 ins_pipe(ialu_reg);
8182 %}
8183
8184 instruct castP2X(iRegLNoSp dst, iRegP src) %{
8185 match(Set dst (CastP2X src));
8186
8187 ins_cost(INSN_COST);
8188 format %{ "mov $dst, $src\t# ptr -> long" %}
8189
8190 ins_encode %{
8191 if ($dst$$reg != $src$$reg) {
8192 __ mov(as_Register($dst$$reg), as_Register($src$$reg));
8193 }
8194 %}
8195
8196 ins_pipe(ialu_reg);
8197 %}
8198
8199 // Convert oop into int for vectors alignment masking
8200 instruct convP2I(iRegINoSp dst, iRegP src) %{
8201 match(Set dst (ConvL2I (CastP2X src)));
8202
8203 ins_cost(INSN_COST);
14152
14153 match(Set dst (MoveL2D src));
14154
14155 effect(DEF dst, USE src);
14156
14157 ins_cost(INSN_COST);
14158
14159 format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
14160
14161 ins_encode %{
14162 __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
14163 %}
14164
14165 ins_pipe(fp_l2d);
14166
14167 %}
14168
14169 // ============================================================================
14170 // clearing of an array
14171
14172 instruct clearArray_reg_reg_immL0(iRegL_R11 cnt, iRegP_R10 base, immL0 zero, Universe dummy, rFlagsReg cr)
14173 %{
14174 match(Set dummy (ClearArray (Binary cnt base) zero));
14175 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14176
14177 ins_cost(4 * INSN_COST);
14178 format %{ "ClearArray $cnt, $base" %}
14179
14180 ins_encode %{
14181 address tpc = __ zero_words($base$$Register, $cnt$$Register);
14182 if (tpc == nullptr) {
14183 ciEnv::current()->record_failure("CodeCache is full");
14184 return;
14185 }
14186 %}
14187
14188 ins_pipe(pipe_class_memory);
14189 %}
14190
14191 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, iRegL val, Universe dummy, rFlagsReg cr)
14192 %{
14193 predicate(((ClearArrayNode*)n)->word_copy_only());
14194 match(Set dummy (ClearArray (Binary cnt base) val));
14195 effect(USE_KILL cnt, USE_KILL base, KILL cr);
14196
14197 ins_cost(4 * INSN_COST);
14198 format %{ "ClearArray $cnt, $base, $val" %}
14199
14200 ins_encode %{
14201 __ fill_words($base$$Register, $cnt$$Register, $val$$Register);
14202 %}
14203
14204 ins_pipe(pipe_class_memory);
14205 %}
14206
14207 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 temp, immL0 zero, Universe dummy, rFlagsReg cr)
14208 %{
14209 predicate((uint64_t)n->in(2)->in(1)->get_long()
14210 < (uint64_t)(BlockZeroingLowLimit >> LogBytesPerWord)
14211 && !((ClearArrayNode*)n)->word_copy_only());
14212 match(Set dummy (ClearArray (Binary cnt base) zero));
14213 effect(TEMP temp, USE_KILL base, KILL cr);
14214
14215 ins_cost(4 * INSN_COST);
14216 format %{ "ClearArray $cnt, $base" %}
14217
14218 ins_encode %{
14219 address tpc = __ zero_words($base$$Register, (uint64_t)$cnt$$constant);
14220 if (tpc == nullptr) {
14221 ciEnv::current()->record_failure("CodeCache is full");
14222 return;
14223 }
14224 %}
14225
14226 ins_pipe(pipe_class_memory);
14227 %}
14228
14229 // ============================================================================
14230 // Overflow Math Instructions
14231
14232 instruct overflowAddI_reg_reg(rFlagsReg cr, iRegIorL2I op1, iRegIorL2I op2)
15508 %}
15509
15510 // Call Runtime Instruction without safepoint and with vector arguments
15511 instruct CallLeafDirectVector(method meth)
15512 %{
15513 match(CallLeafVector);
15514
15515 effect(USE meth);
15516
15517 ins_cost(CALL_COST);
15518
15519 format %{ "CALL, runtime leaf vector $meth" %}
15520
15521 ins_encode(aarch64_enc_java_to_runtime(meth));
15522
15523 ins_pipe(pipe_class_call);
15524 %}
15525
15526 // Call Runtime Instruction
15527
15528 // entry point is null, target holds the address to call
15529 instruct CallLeafNoFPIndirect(iRegP target)
15530 %{
15531 predicate(n->as_Call()->entry_point() == nullptr);
15532
15533 match(CallLeafNoFP target);
15534
15535 ins_cost(CALL_COST);
15536
15537 format %{ "CALL, runtime leaf nofp indirect $target" %}
15538
15539 ins_encode %{
15540 __ blr($target$$Register);
15541 %}
15542
15543 ins_pipe(pipe_class_call);
15544 %}
15545
15546 instruct CallLeafNoFPDirect(method meth)
15547 %{
15548 predicate(n->as_Call()->entry_point() != nullptr);
15549
15550 match(CallLeafNoFP);
15551
15552 effect(USE meth);
15553
15554 ins_cost(CALL_COST);
15555
15556 format %{ "CALL, runtime leaf nofp $meth" %}
15557
15558 ins_encode( aarch64_enc_java_to_runtime(meth) );
15559
15560 ins_pipe(pipe_class_call);
15561 %}
15562
15563 // Tail Call; Jump from runtime stub to Java code.
15564 // Also known as an 'interprocedural jump'.
15565 // Target of jump will eventually return to caller.
15566 // TailJump below removes the return address.
15567 // Don't use rfp for 'jump_target' because a MachEpilogNode has already been
15568 // emitted just above the TailCall which has reset rfp to the caller state.
15569 instruct TailCalljmpInd(iRegPNoSpNoRfp jump_target, inline_cache_RegP method_ptr)
|