1 /*
2 * Copyright (c) 2005, 2024, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "c1/c1_Compilation.hpp"
29 #include "c1/c1_FrameMap.hpp"
30 #include "c1/c1_Instruction.hpp"
31 #include "c1/c1_LIRAssembler.hpp"
32 #include "c1/c1_LIRGenerator.hpp"
33 #include "c1/c1_Runtime1.hpp"
34 #include "c1/c1_ValueStack.hpp"
35 #include "ci/ciArray.hpp"
36 #include "ci/ciInlineKlass.hpp"
37 #include "ci/ciObjArrayKlass.hpp"
38 #include "ci/ciTypeArrayKlass.hpp"
39 #include "compiler/compilerDefinitions.inline.hpp"
40 #include "runtime/sharedRuntime.hpp"
41 #include "runtime/stubRoutines.hpp"
42 #include "utilities/powerOfTwo.hpp"
43 #include "vmreg_aarch64.inline.hpp"
44
45 #ifdef ASSERT
46 #define __ gen()->lir(__FILE__, __LINE__)->
47 #else
48 #define __ gen()->lir()->
49 #endif
50
51 // Item will be loaded into a byte register; Intel only
52 void LIRItem::load_byte_item() {
53 load_item();
54 }
55
56
57 void LIRItem::load_nonconstant() {
58 LIR_Opr r = value()->operand();
59 if (r->is_constant()) {
60 _result = r;
61 } else {
62 load_item();
63 }
64 }
65
66 //--------------------------------------------------------------
67 // LIRGenerator
68 //--------------------------------------------------------------
69
70
71 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::r0_oop_opr; }
72 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::r3_opr; }
73 LIR_Opr LIRGenerator::divInOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
74 LIR_Opr LIRGenerator::divOutOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
75 LIR_Opr LIRGenerator::remOutOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
76 LIR_Opr LIRGenerator::shiftCountOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
77 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
78 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::r0_opr; }
79 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
80
81
82 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
83 LIR_Opr opr;
84 switch (type->tag()) {
85 case intTag: opr = FrameMap::r0_opr; break;
86 case objectTag: opr = FrameMap::r0_oop_opr; break;
87 case longTag: opr = FrameMap::long0_opr; break;
88 case floatTag: opr = FrameMap::fpu0_float_opr; break;
89 case doubleTag: opr = FrameMap::fpu0_double_opr; break;
90
91 case addressTag:
92 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
93 }
94
95 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
96 return opr;
97 }
98
99
100 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
101 LIR_Opr reg = new_register(T_INT);
102 set_vreg_flag(reg, LIRGenerator::byte_reg);
103 return reg;
104 }
105
106
107 void LIRGenerator::init_temps_for_substitutability_check(LIR_Opr& tmp1, LIR_Opr& tmp2) {
108 tmp1 = new_register(T_INT);
109 tmp2 = LIR_OprFact::illegalOpr;
110 }
111
112
113 //--------- loading items into registers --------------------------------
114
115
116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
117 if (v->type()->as_IntConstant() != nullptr) {
118 return v->type()->as_IntConstant()->value() == 0L;
119 } else if (v->type()->as_LongConstant() != nullptr) {
120 return v->type()->as_LongConstant()->value() == 0L;
121 } else if (v->type()->as_ObjectConstant() != nullptr) {
122 return v->type()->as_ObjectConstant()->value()->is_null_object();
123 } else {
124 return false;
125 }
126 }
127
128 bool LIRGenerator::can_inline_as_constant(Value v) const {
129 // FIXME: Just a guess
130 if (v->type()->as_IntConstant() != nullptr) {
131 return Assembler::operand_valid_for_add_sub_immediate(v->type()->as_IntConstant()->value());
132 } else if (v->type()->as_LongConstant() != nullptr) {
133 return v->type()->as_LongConstant()->value() == 0L;
134 } else if (v->type()->as_ObjectConstant() != nullptr) {
135 return v->type()->as_ObjectConstant()->value()->is_null_object();
136 } else {
137 return false;
138 }
139 }
140
141
142 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { return false; }
143
144
145 LIR_Opr LIRGenerator::safepoint_poll_register() {
146 return LIR_OprFact::illegalOpr;
147 }
148
149
150 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
151 int shift, int disp, BasicType type) {
152 assert(base->is_register(), "must be");
153 intx large_disp = disp;
154
155 // accumulate fixed displacements
156 if (index->is_constant()) {
157 LIR_Const *constant = index->as_constant_ptr();
158 if (constant->type() == T_INT) {
159 large_disp += ((intx)index->as_jint()) << shift;
160 } else {
161 assert(constant->type() == T_LONG, "should be");
162 jlong c = index->as_jlong() << shift;
163 if ((jlong)((jint)c) == c) {
164 large_disp += c;
165 index = LIR_OprFact::illegalOpr;
166 } else {
167 LIR_Opr tmp = new_register(T_LONG);
168 __ move(index, tmp);
169 index = tmp;
170 // apply shift and displacement below
171 }
172 }
173 }
174
175 if (index->is_register()) {
176 // apply the shift and accumulate the displacement
177 if (shift > 0) {
178 // Use long register to avoid overflow when shifting large index values left.
179 LIR_Opr tmp = new_register(T_LONG);
180 __ convert(Bytecodes::_i2l, index, tmp);
181 __ shift_left(tmp, shift, tmp);
182 index = tmp;
183 }
184 if (large_disp != 0) {
185 LIR_Opr tmp = new_pointer_register();
186 if (Assembler::operand_valid_for_add_sub_immediate(large_disp)) {
187 __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
188 index = tmp;
189 } else {
190 __ move(LIR_OprFact::intptrConst(large_disp), tmp);
191 __ add(tmp, index, tmp);
192 index = tmp;
193 }
194 large_disp = 0;
195 }
196 } else if (large_disp != 0 && !Address::offset_ok_for_immed(large_disp, shift)) {
197 // index is illegal so replace it with the displacement loaded into a register
198 index = new_pointer_register();
199 __ move(LIR_OprFact::intptrConst(large_disp), index);
200 large_disp = 0;
201 }
202
203 // at this point we either have base + index or base + displacement
204 if (large_disp == 0 && index->is_register()) {
205 return new LIR_Address(base, index, type);
206 } else {
207 assert(Address::offset_ok_for_immed(large_disp, shift), "failed for large_disp: " INTPTR_FORMAT " and shift %d", large_disp, shift);
208 return new LIR_Address(base, large_disp, type);
209 }
210 }
211
212 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
213 BasicType type) {
214 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
215 int elem_size = type2aelembytes(type);
216 int shift = exact_log2(elem_size);
217 return generate_address(array_opr, index_opr, shift, offset_in_bytes, type);
218 }
219
220 LIR_Opr LIRGenerator::load_immediate(jlong x, BasicType type) {
221 LIR_Opr r;
222 if (type == T_LONG) {
223 r = LIR_OprFact::longConst(x);
224 if (!Assembler::operand_valid_for_logical_immediate(false, x)) {
225 LIR_Opr tmp = new_register(type);
226 __ move(r, tmp);
227 return tmp;
228 }
229 } else if (type == T_INT) {
230 r = LIR_OprFact::intConst(checked_cast<jint>(x));
231 if (!Assembler::operand_valid_for_logical_immediate(true, x)) {
232 // This is all rather nasty. We don't know whether our constant
233 // is required for a logical or an arithmetic operation, wo we
234 // don't know what the range of valid values is!!
235 LIR_Opr tmp = new_register(type);
236 __ move(r, tmp);
237 return tmp;
238 }
239 } else {
240 ShouldNotReachHere();
241 }
242 return r;
243 }
244
245
246
247 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
248 LIR_Opr pointer = new_pointer_register();
249 __ move(LIR_OprFact::intptrConst(counter), pointer);
250 LIR_Address* addr = new LIR_Address(pointer, type);
251 increment_counter(addr, step);
252 }
253
254
255 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
256 LIR_Opr imm;
257 switch(addr->type()) {
258 case T_INT:
259 imm = LIR_OprFact::intConst(step);
260 break;
261 case T_LONG:
262 imm = LIR_OprFact::longConst(step);
263 break;
264 default:
265 ShouldNotReachHere();
266 }
267 LIR_Opr reg = new_register(addr->type());
268 __ load(addr, reg);
269 __ add(reg, imm, reg);
270 __ store(reg, addr);
271 }
272
273 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
274 LIR_Opr reg = new_register(T_INT);
275 __ load(generate_address(base, disp, T_INT), reg, info);
276 __ cmp(condition, reg, LIR_OprFact::intConst(c));
277 }
278
279 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
280 LIR_Opr reg1 = new_register(T_INT);
281 __ load(generate_address(base, disp, type), reg1, info);
282 __ cmp(condition, reg, reg1);
283 }
284
285
286 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
287
288 if (is_power_of_2(c - 1)) {
289 __ shift_left(left, exact_log2(c - 1), tmp);
290 __ add(tmp, left, result);
291 return true;
292 } else if (is_power_of_2(c + 1)) {
293 __ shift_left(left, exact_log2(c + 1), tmp);
294 __ sub(tmp, left, result);
295 return true;
296 } else {
297 return false;
298 }
299 }
300
301 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
302 BasicType type = item->type();
303 __ store(item, new LIR_Address(FrameMap::sp_opr, in_bytes(offset_from_sp), type));
304 }
305
306 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
307 LIR_Opr tmp1 = new_register(objectType);
308 LIR_Opr tmp2 = new_register(objectType);
309 LIR_Opr tmp3 = new_register(objectType);
310 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
311 }
312
313 //----------------------------------------------------------------------
314 // visitor functions
315 //----------------------------------------------------------------------
316
317 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
318 assert(x->is_pinned(),"");
319 LIRItem obj(x->obj(), this);
320 obj.load_item();
321
322 set_no_result(x);
323
324 // "lock" stores the address of the monitor stack slot, so this is not an oop
325 LIR_Opr lock = new_register(T_INT);
326 LIR_Opr scratch = new_register(T_INT);
327
328 CodeEmitInfo* info_for_exception = nullptr;
329 if (x->needs_null_check()) {
330 info_for_exception = state_for(x);
331 }
332
333 CodeStub* throw_ie_stub =
334 x->maybe_inlinetype() ?
335 new SimpleExceptionStub(C1StubId::throw_identity_exception_id, obj.result(), state_for(x)) :
336 nullptr;
337
338 // this CodeEmitInfo must not have the xhandlers because here the
339 // object is already locked (xhandlers expect object to be unlocked)
340 CodeEmitInfo* info = state_for(x, x->state(), true);
341 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
342 x->monitor_no(), info_for_exception, info, throw_ie_stub);
343 }
344
345
346 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
347 assert(x->is_pinned(),"");
348
349 LIRItem obj(x->obj(), this);
350 obj.dont_load_item();
351
352 LIR_Opr lock = new_register(T_INT);
353 LIR_Opr obj_temp = new_register(T_INT);
354 LIR_Opr scratch = new_register(T_INT);
355 set_no_result(x);
356 monitor_exit(obj_temp, lock, syncTempOpr(), scratch, x->monitor_no());
357 }
358
359 void LIRGenerator::do_NegateOp(NegateOp* x) {
360
361 LIRItem from(x->x(), this);
362 from.load_item();
363 LIR_Opr result = rlock_result(x);
364 __ negate (from.result(), result);
365
366 }
367
368 // for _fadd, _fmul, _fsub, _fdiv, _frem
369 // _dadd, _dmul, _dsub, _ddiv, _drem
370 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
371
372 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
373 // float remainder is implemented as a direct call into the runtime
374 LIRItem right(x->x(), this);
375 LIRItem left(x->y(), this);
376
377 BasicTypeList signature(2);
378 if (x->op() == Bytecodes::_frem) {
379 signature.append(T_FLOAT);
380 signature.append(T_FLOAT);
381 } else {
382 signature.append(T_DOUBLE);
383 signature.append(T_DOUBLE);
384 }
385 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
386
387 const LIR_Opr result_reg = result_register_for(x->type());
388 left.load_item_force(cc->at(1));
389 right.load_item();
390
391 __ move(right.result(), cc->at(0));
392
393 address entry;
394 if (x->op() == Bytecodes::_frem) {
395 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
396 } else {
397 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
398 }
399
400 LIR_Opr result = rlock_result(x);
401 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
402 __ move(result_reg, result);
403
404 return;
405 }
406
407 LIRItem left(x->x(), this);
408 LIRItem right(x->y(), this);
409 LIRItem* left_arg = &left;
410 LIRItem* right_arg = &right;
411
412 // Always load right hand side.
413 right.load_item();
414
415 if (!left.is_register())
416 left.load_item();
417
418 LIR_Opr reg = rlock(x);
419
420 arithmetic_op_fpu(x->op(), reg, left.result(), right.result());
421
422 set_result(x, round_item(reg));
423 }
424
425 // for _ladd, _lmul, _lsub, _ldiv, _lrem
426 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
427
428 // missing test if instr is commutative and if we should swap
429 LIRItem left(x->x(), this);
430 LIRItem right(x->y(), this);
431
432 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
433
434 left.load_item();
435 bool need_zero_check = true;
436 if (right.is_constant()) {
437 jlong c = right.get_jlong_constant();
438 // no need to do div-by-zero check if the divisor is a non-zero constant
439 if (c != 0) need_zero_check = false;
440 // do not load right if the divisor is a power-of-2 constant
441 if (c > 0 && is_power_of_2(c)) {
442 right.dont_load_item();
443 } else {
444 right.load_item();
445 }
446 } else {
447 right.load_item();
448 }
449 if (need_zero_check) {
450 CodeEmitInfo* info = state_for(x);
451 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
452 __ branch(lir_cond_equal, new DivByZeroStub(info));
453 }
454
455 rlock_result(x);
456 switch (x->op()) {
457 case Bytecodes::_lrem:
458 __ rem (left.result(), right.result(), x->operand());
459 break;
460 case Bytecodes::_ldiv:
461 __ div (left.result(), right.result(), x->operand());
462 break;
463 default:
464 ShouldNotReachHere();
465 break;
466 }
467
468
469 } else {
470 assert (x->op() == Bytecodes::_lmul || x->op() == Bytecodes::_ladd || x->op() == Bytecodes::_lsub,
471 "expect lmul, ladd or lsub");
472 // add, sub, mul
473 left.load_item();
474 if (! right.is_register()) {
475 if (x->op() == Bytecodes::_lmul
476 || ! right.is_constant()
477 || ! Assembler::operand_valid_for_add_sub_immediate(right.get_jlong_constant())) {
478 right.load_item();
479 } else { // add, sub
480 assert (x->op() == Bytecodes::_ladd || x->op() == Bytecodes::_lsub, "expect ladd or lsub");
481 // don't load constants to save register
482 right.load_nonconstant();
483 }
484 }
485 rlock_result(x);
486 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), nullptr);
487 }
488 }
489
490 // for: _iadd, _imul, _isub, _idiv, _irem
491 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
492
493 // Test if instr is commutative and if we should swap
494 LIRItem left(x->x(), this);
495 LIRItem right(x->y(), this);
496 LIRItem* left_arg = &left;
497 LIRItem* right_arg = &right;
498 if (x->is_commutative() && left.is_stack() && right.is_register()) {
499 // swap them if left is real stack (or cached) and right is real register(not cached)
500 left_arg = &right;
501 right_arg = &left;
502 }
503
504 left_arg->load_item();
505
506 // do not need to load right, as we can handle stack and constants
507 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
508
509 rlock_result(x);
510 bool need_zero_check = true;
511 if (right.is_constant()) {
512 jint c = right.get_jint_constant();
513 // no need to do div-by-zero check if the divisor is a non-zero constant
514 if (c != 0) need_zero_check = false;
515 // do not load right if the divisor is a power-of-2 constant
516 if (c > 0 && is_power_of_2(c)) {
517 right_arg->dont_load_item();
518 } else {
519 right_arg->load_item();
520 }
521 } else {
522 right_arg->load_item();
523 }
524 if (need_zero_check) {
525 CodeEmitInfo* info = state_for(x);
526 __ cmp(lir_cond_equal, right_arg->result(), LIR_OprFact::longConst(0));
527 __ branch(lir_cond_equal, new DivByZeroStub(info));
528 }
529
530 LIR_Opr ill = LIR_OprFact::illegalOpr;
531 if (x->op() == Bytecodes::_irem) {
532 __ irem(left_arg->result(), right_arg->result(), x->operand(), ill, nullptr);
533 } else if (x->op() == Bytecodes::_idiv) {
534 __ idiv(left_arg->result(), right_arg->result(), x->operand(), ill, nullptr);
535 }
536
537 } else if (x->op() == Bytecodes::_iadd || x->op() == Bytecodes::_isub) {
538 if (right.is_constant()
539 && Assembler::operand_valid_for_add_sub_immediate(right.get_jint_constant())) {
540 right.load_nonconstant();
541 } else {
542 right.load_item();
543 }
544 rlock_result(x);
545 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), LIR_OprFact::illegalOpr);
546 } else {
547 assert (x->op() == Bytecodes::_imul, "expect imul");
548 if (right.is_constant()) {
549 jint c = right.get_jint_constant();
550 if (c > 0 && c < max_jint && (is_power_of_2(c) || is_power_of_2(c - 1) || is_power_of_2(c + 1))) {
551 right_arg->dont_load_item();
552 } else {
553 // Cannot use constant op.
554 right_arg->load_item();
555 }
556 } else {
557 right.load_item();
558 }
559 rlock_result(x);
560 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), new_register(T_INT));
561 }
562 }
563
564 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
565 // when an operand with use count 1 is the left operand, then it is
566 // likely that no move for 2-operand-LIR-form is necessary
567 if (x->is_commutative() && x->y()->as_Constant() == nullptr && x->x()->use_count() > x->y()->use_count()) {
568 x->swap_operands();
569 }
570
571 ValueTag tag = x->type()->tag();
572 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
573 switch (tag) {
574 case floatTag:
575 case doubleTag: do_ArithmeticOp_FPU(x); return;
576 case longTag: do_ArithmeticOp_Long(x); return;
577 case intTag: do_ArithmeticOp_Int(x); return;
578 default: ShouldNotReachHere(); return;
579 }
580 }
581
582 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
583 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
584
585 LIRItem left(x->x(), this);
586 LIRItem right(x->y(), this);
587
588 left.load_item();
589
590 rlock_result(x);
591 if (right.is_constant()) {
592 right.dont_load_item();
593
594 switch (x->op()) {
595 case Bytecodes::_ishl: {
596 int c = right.get_jint_constant() & 0x1f;
597 __ shift_left(left.result(), c, x->operand());
598 break;
599 }
600 case Bytecodes::_ishr: {
601 int c = right.get_jint_constant() & 0x1f;
602 __ shift_right(left.result(), c, x->operand());
603 break;
604 }
605 case Bytecodes::_iushr: {
606 int c = right.get_jint_constant() & 0x1f;
607 __ unsigned_shift_right(left.result(), c, x->operand());
608 break;
609 }
610 case Bytecodes::_lshl: {
611 int c = right.get_jint_constant() & 0x3f;
612 __ shift_left(left.result(), c, x->operand());
613 break;
614 }
615 case Bytecodes::_lshr: {
616 int c = right.get_jint_constant() & 0x3f;
617 __ shift_right(left.result(), c, x->operand());
618 break;
619 }
620 case Bytecodes::_lushr: {
621 int c = right.get_jint_constant() & 0x3f;
622 __ unsigned_shift_right(left.result(), c, x->operand());
623 break;
624 }
625 default:
626 ShouldNotReachHere();
627 }
628 } else {
629 right.load_item();
630 LIR_Opr tmp = new_register(T_INT);
631 switch (x->op()) {
632 case Bytecodes::_ishl: {
633 __ logical_and(right.result(), LIR_OprFact::intConst(0x1f), tmp);
634 __ shift_left(left.result(), tmp, x->operand(), tmp);
635 break;
636 }
637 case Bytecodes::_ishr: {
638 __ logical_and(right.result(), LIR_OprFact::intConst(0x1f), tmp);
639 __ shift_right(left.result(), tmp, x->operand(), tmp);
640 break;
641 }
642 case Bytecodes::_iushr: {
643 __ logical_and(right.result(), LIR_OprFact::intConst(0x1f), tmp);
644 __ unsigned_shift_right(left.result(), tmp, x->operand(), tmp);
645 break;
646 }
647 case Bytecodes::_lshl: {
648 __ logical_and(right.result(), LIR_OprFact::intConst(0x3f), tmp);
649 __ shift_left(left.result(), tmp, x->operand(), tmp);
650 break;
651 }
652 case Bytecodes::_lshr: {
653 __ logical_and(right.result(), LIR_OprFact::intConst(0x3f), tmp);
654 __ shift_right(left.result(), tmp, x->operand(), tmp);
655 break;
656 }
657 case Bytecodes::_lushr: {
658 __ logical_and(right.result(), LIR_OprFact::intConst(0x3f), tmp);
659 __ unsigned_shift_right(left.result(), tmp, x->operand(), tmp);
660 break;
661 }
662 default:
663 ShouldNotReachHere();
664 }
665 }
666 }
667
668 // _iand, _land, _ior, _lor, _ixor, _lxor
669 void LIRGenerator::do_LogicOp(LogicOp* x) {
670
671 LIRItem left(x->x(), this);
672 LIRItem right(x->y(), this);
673
674 left.load_item();
675
676 rlock_result(x);
677 if (right.is_constant()
678 && ((right.type()->tag() == intTag
679 && Assembler::operand_valid_for_logical_immediate(true, right.get_jint_constant()))
680 || (right.type()->tag() == longTag
681 && Assembler::operand_valid_for_logical_immediate(false, right.get_jlong_constant())))) {
682 right.dont_load_item();
683 } else {
684 right.load_item();
685 }
686 switch (x->op()) {
687 case Bytecodes::_iand:
688 case Bytecodes::_land:
689 __ logical_and(left.result(), right.result(), x->operand()); break;
690 case Bytecodes::_ior:
691 case Bytecodes::_lor:
692 __ logical_or (left.result(), right.result(), x->operand()); break;
693 case Bytecodes::_ixor:
694 case Bytecodes::_lxor:
695 __ logical_xor(left.result(), right.result(), x->operand()); break;
696 default: Unimplemented();
697 }
698 }
699
700 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
701 void LIRGenerator::do_CompareOp(CompareOp* x) {
702 LIRItem left(x->x(), this);
703 LIRItem right(x->y(), this);
704 ValueTag tag = x->x()->type()->tag();
705 if (tag == longTag) {
706 left.set_destroys_register();
707 }
708 left.load_item();
709 right.load_item();
710 LIR_Opr reg = rlock_result(x);
711
712 if (x->x()->type()->is_float_kind()) {
713 Bytecodes::Code code = x->op();
714 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
715 } else if (x->x()->type()->tag() == longTag) {
716 __ lcmp2int(left.result(), right.result(), reg);
717 } else {
718 Unimplemented();
719 }
720 }
721
722 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
723 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
724 new_value.load_item();
725 cmp_value.load_item();
726 LIR_Opr result = new_register(T_INT);
727 if (is_reference_type(type)) {
728 __ cas_obj(addr, cmp_value.result(), new_value.result(), new_register(T_INT), new_register(T_INT), result);
729 } else if (type == T_INT) {
730 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
731 } else if (type == T_LONG) {
732 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
733 } else {
734 ShouldNotReachHere();
735 Unimplemented();
736 }
737 __ logical_xor(FrameMap::r8_opr, LIR_OprFact::intConst(1), result);
738 return result;
739 }
740
741 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
742 bool is_oop = is_reference_type(type);
743 LIR_Opr result = new_register(type);
744 value.load_item();
745 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
746 LIR_Opr tmp = new_register(T_INT);
747 __ xchg(addr, value.result(), result, tmp);
748 return result;
749 }
750
751 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
752 LIR_Opr result = new_register(type);
753 value.load_item();
754 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
755 LIR_Opr tmp = new_register(T_INT);
756 __ xadd(addr, value.result(), result, tmp);
757 return result;
758 }
759
760 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
761 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
762 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
763 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
764 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
765 x->id() == vmIntrinsics::_dlog10) {
766 do_LibmIntrinsic(x);
767 return;
768 }
769 switch (x->id()) {
770 case vmIntrinsics::_dabs:
771 case vmIntrinsics::_dsqrt:
772 case vmIntrinsics::_dsqrt_strict:
773 case vmIntrinsics::_floatToFloat16:
774 case vmIntrinsics::_float16ToFloat: {
775 assert(x->number_of_arguments() == 1, "wrong type");
776 LIRItem value(x->argument_at(0), this);
777 value.load_item();
778 LIR_Opr src = value.result();
779 LIR_Opr dst = rlock_result(x);
780
781 switch (x->id()) {
782 case vmIntrinsics::_dsqrt:
783 case vmIntrinsics::_dsqrt_strict: {
784 __ sqrt(src, dst, LIR_OprFact::illegalOpr);
785 break;
786 }
787 case vmIntrinsics::_dabs: {
788 __ abs(src, dst, LIR_OprFact::illegalOpr);
789 break;
790 }
791 case vmIntrinsics::_floatToFloat16: {
792 LIR_Opr tmp = new_register(T_FLOAT);
793 __ move(LIR_OprFact::floatConst(-0.0), tmp);
794 __ f2hf(src, dst, tmp);
795 break;
796 }
797 case vmIntrinsics::_float16ToFloat: {
798 LIR_Opr tmp = new_register(T_FLOAT);
799 __ move(LIR_OprFact::floatConst(-0.0), tmp);
800 __ hf2f(src, dst, tmp);
801 break;
802 }
803 default:
804 ShouldNotReachHere();
805 }
806 break;
807 }
808 default:
809 ShouldNotReachHere();
810 }
811 }
812
813 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
814 LIRItem value(x->argument_at(0), this);
815 value.set_destroys_register();
816
817 LIR_Opr calc_result = rlock_result(x);
818 LIR_Opr result_reg = result_register_for(x->type());
819
820 CallingConvention* cc = nullptr;
821
822 if (x->id() == vmIntrinsics::_dpow) {
823 LIRItem value1(x->argument_at(1), this);
824
825 value1.set_destroys_register();
826
827 BasicTypeList signature(2);
828 signature.append(T_DOUBLE);
829 signature.append(T_DOUBLE);
830 cc = frame_map()->c_calling_convention(&signature);
831 value.load_item_force(cc->at(0));
832 value1.load_item_force(cc->at(1));
833 } else {
834 BasicTypeList signature(1);
835 signature.append(T_DOUBLE);
836 cc = frame_map()->c_calling_convention(&signature);
837 value.load_item_force(cc->at(0));
838 }
839
840 switch (x->id()) {
841 case vmIntrinsics::_dexp:
842 if (StubRoutines::dexp() != nullptr) {
843 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
844 } else {
845 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
846 }
847 break;
848 case vmIntrinsics::_dlog:
849 // Math.log intrinsic is not implemented on AArch64 (see JDK-8210858),
850 // but we can still call the shared runtime.
851 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
852 break;
853 case vmIntrinsics::_dlog10:
854 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
855 break;
856 case vmIntrinsics::_dpow:
857 if (StubRoutines::dpow() != nullptr) {
858 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
859 } else {
860 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
861 }
862 break;
863 case vmIntrinsics::_dsin:
864 if (StubRoutines::dsin() != nullptr) {
865 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
866 } else {
867 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
868 }
869 break;
870 case vmIntrinsics::_dcos:
871 if (StubRoutines::dcos() != nullptr) {
872 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
873 } else {
874 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
875 }
876 break;
877 case vmIntrinsics::_dtan:
878 if (StubRoutines::dtan() != nullptr) {
879 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
880 } else {
881 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
882 }
883 break;
884 default: ShouldNotReachHere();
885 }
886 __ move(result_reg, calc_result);
887 }
888
889
890 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
891 assert(x->number_of_arguments() == 5, "wrong type");
892
893 // Make all state_for calls early since they can emit code
894 CodeEmitInfo* info = nullptr;
895 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
896 info = state_for(x, x->state_before());
897 info->set_force_reexecute();
898 } else {
899 info = state_for(x, x->state());
900 }
901
902 LIRItem src(x->argument_at(0), this);
903 LIRItem src_pos(x->argument_at(1), this);
904 LIRItem dst(x->argument_at(2), this);
905 LIRItem dst_pos(x->argument_at(3), this);
906 LIRItem length(x->argument_at(4), this);
907
908 // operands for arraycopy must use fixed registers, otherwise
909 // LinearScan will fail allocation (because arraycopy always needs a
910 // call)
911
912 // The java calling convention will give us enough registers
913 // so that on the stub side the args will be perfect already.
914 // On the other slow/special case side we call C and the arg
915 // positions are not similar enough to pick one as the best.
916 // Also because the java calling convention is a "shifted" version
917 // of the C convention we can process the java args trivially into C
918 // args without worry of overwriting during the xfer
919
920 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
921 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
922 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
923 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
924 length.load_item_force (FrameMap::as_opr(j_rarg4));
925
926 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
927
928 set_no_result(x);
929
930 int flags;
931 ciArrayKlass* expected_type;
932 arraycopy_helper(x, &flags, &expected_type);
933 if (x->check_flag(Instruction::OmitChecksFlag)) {
934 flags = 0;
935 }
936
937 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
938 }
939
940 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
941 assert(UseCRC32Intrinsics, "why are we here?");
942 // Make all state_for calls early since they can emit code
943 LIR_Opr result = rlock_result(x);
944 switch (x->id()) {
945 case vmIntrinsics::_updateCRC32: {
946 LIRItem crc(x->argument_at(0), this);
947 LIRItem val(x->argument_at(1), this);
948 // val is destroyed by update_crc32
949 val.set_destroys_register();
950 crc.load_item();
951 val.load_item();
952 __ update_crc32(crc.result(), val.result(), result);
953 break;
954 }
955 case vmIntrinsics::_updateBytesCRC32:
956 case vmIntrinsics::_updateByteBufferCRC32: {
957 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
958
959 LIRItem crc(x->argument_at(0), this);
960 LIRItem buf(x->argument_at(1), this);
961 LIRItem off(x->argument_at(2), this);
962 LIRItem len(x->argument_at(3), this);
963 buf.load_item();
964 off.load_nonconstant();
965
966 LIR_Opr index = off.result();
967 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
968 if (off.result()->is_constant()) {
969 index = LIR_OprFact::illegalOpr;
970 offset += off.result()->as_jint();
971 }
972 LIR_Opr base_op = buf.result();
973
974 if (index->is_valid()) {
975 LIR_Opr tmp = new_register(T_LONG);
976 __ convert(Bytecodes::_i2l, index, tmp);
977 index = tmp;
978 }
979
980 if (offset) {
981 LIR_Opr tmp = new_pointer_register();
982 __ add(base_op, LIR_OprFact::intConst(offset), tmp);
983 base_op = tmp;
984 offset = 0;
985 }
986
987 LIR_Address* a = new LIR_Address(base_op,
988 index,
989 offset,
990 T_BYTE);
991 BasicTypeList signature(3);
992 signature.append(T_INT);
993 signature.append(T_ADDRESS);
994 signature.append(T_INT);
995 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
996 const LIR_Opr result_reg = result_register_for(x->type());
997
998 LIR_Opr addr = new_pointer_register();
999 __ leal(LIR_OprFact::address(a), addr);
1000
1001 crc.load_item_force(cc->at(0));
1002 __ move(addr, cc->at(1));
1003 len.load_item_force(cc->at(2));
1004
1005 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1006 __ move(result_reg, result);
1007
1008 break;
1009 }
1010 default: {
1011 ShouldNotReachHere();
1012 }
1013 }
1014 }
1015
1016 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1017 assert(UseCRC32CIntrinsics, "why are we here?");
1018 // Make all state_for calls early since they can emit code
1019 LIR_Opr result = rlock_result(x);
1020 switch (x->id()) {
1021 case vmIntrinsics::_updateBytesCRC32C:
1022 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1023 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1024 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1025
1026 LIRItem crc(x->argument_at(0), this);
1027 LIRItem buf(x->argument_at(1), this);
1028 LIRItem off(x->argument_at(2), this);
1029 LIRItem end(x->argument_at(3), this);
1030
1031 buf.load_item();
1032 off.load_nonconstant();
1033 end.load_nonconstant();
1034
1035 // len = end - off
1036 LIR_Opr len = end.result();
1037 LIR_Opr tmpA = new_register(T_INT);
1038 LIR_Opr tmpB = new_register(T_INT);
1039 __ move(end.result(), tmpA);
1040 __ move(off.result(), tmpB);
1041 __ sub(tmpA, tmpB, tmpA);
1042 len = tmpA;
1043
1044 LIR_Opr index = off.result();
1045 if(off.result()->is_constant()) {
1046 index = LIR_OprFact::illegalOpr;
1047 offset += off.result()->as_jint();
1048 }
1049 LIR_Opr base_op = buf.result();
1050
1051 if (index->is_valid()) {
1052 LIR_Opr tmp = new_register(T_LONG);
1053 __ convert(Bytecodes::_i2l, index, tmp);
1054 index = tmp;
1055 }
1056
1057 if (offset) {
1058 LIR_Opr tmp = new_pointer_register();
1059 __ add(base_op, LIR_OprFact::intConst(offset), tmp);
1060 base_op = tmp;
1061 offset = 0;
1062 }
1063
1064 LIR_Address* a = new LIR_Address(base_op,
1065 index,
1066 offset,
1067 T_BYTE);
1068 BasicTypeList signature(3);
1069 signature.append(T_INT);
1070 signature.append(T_ADDRESS);
1071 signature.append(T_INT);
1072 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1073 const LIR_Opr result_reg = result_register_for(x->type());
1074
1075 LIR_Opr addr = new_pointer_register();
1076 __ leal(LIR_OprFact::address(a), addr);
1077
1078 crc.load_item_force(cc->at(0));
1079 __ move(addr, cc->at(1));
1080 __ move(len, cc->at(2));
1081
1082 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args());
1083 __ move(result_reg, result);
1084
1085 break;
1086 }
1087 default: {
1088 ShouldNotReachHere();
1089 }
1090 }
1091 }
1092
1093 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1094 assert(x->number_of_arguments() == 3, "wrong type");
1095 assert(UseFMA, "Needs FMA instructions support.");
1096 LIRItem value(x->argument_at(0), this);
1097 LIRItem value1(x->argument_at(1), this);
1098 LIRItem value2(x->argument_at(2), this);
1099
1100 value.load_item();
1101 value1.load_item();
1102 value2.load_item();
1103
1104 LIR_Opr calc_input = value.result();
1105 LIR_Opr calc_input1 = value1.result();
1106 LIR_Opr calc_input2 = value2.result();
1107 LIR_Opr calc_result = rlock_result(x);
1108
1109 switch (x->id()) {
1110 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1111 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1112 default: ShouldNotReachHere();
1113 }
1114 }
1115
1116 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1117 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1118 }
1119
1120 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1121 // _i2b, _i2c, _i2s
1122 void LIRGenerator::do_Convert(Convert* x) {
1123 LIRItem value(x->value(), this);
1124 value.load_item();
1125 LIR_Opr input = value.result();
1126 LIR_Opr result = rlock(x);
1127
1128 // arguments of lir_convert
1129 LIR_Opr conv_input = input;
1130 LIR_Opr conv_result = result;
1131
1132 __ convert(x->op(), conv_input, conv_result);
1133
1134 assert(result->is_virtual(), "result must be virtual register");
1135 set_result(x, result);
1136 }
1137
1138 void LIRGenerator::do_NewInstance(NewInstance* x) {
1139 #ifndef PRODUCT
1140 if (PrintNotLoaded && !x->klass()->is_loaded()) {
1141 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
1142 }
1143 #endif
1144 CodeEmitInfo* info = state_for(x, x->needs_state_before() ? x->state_before() : x->state());
1145 LIR_Opr reg = result_register_for(x->type());
1146 new_instance(reg, x->klass(), x->is_unresolved(),
1147 /* allow_inline */ false,
1148 FrameMap::r10_oop_opr,
1149 FrameMap::r11_oop_opr,
1150 FrameMap::r4_oop_opr,
1151 LIR_OprFact::illegalOpr,
1152 FrameMap::r3_metadata_opr, info);
1153 LIR_Opr result = rlock_result(x);
1154 __ move(reg, result);
1155 }
1156
1157 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1158 CodeEmitInfo* info = nullptr;
1159 if (x->state_before() != nullptr && x->state_before()->force_reexecute()) {
1160 info = state_for(x, x->state_before());
1161 info->set_force_reexecute();
1162 } else {
1163 info = state_for(x, x->state());
1164 }
1165
1166 LIRItem length(x->length(), this);
1167 length.load_item_force(FrameMap::r19_opr);
1168
1169 LIR_Opr reg = result_register_for(x->type());
1170 LIR_Opr tmp1 = FrameMap::r10_oop_opr;
1171 LIR_Opr tmp2 = FrameMap::r11_oop_opr;
1172 LIR_Opr tmp3 = FrameMap::r5_oop_opr;
1173 LIR_Opr tmp4 = reg;
1174 LIR_Opr klass_reg = FrameMap::r3_metadata_opr;
1175 LIR_Opr len = length.result();
1176 BasicType elem_type = x->elt_type();
1177
1178 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1179
1180 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1181 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path, x->zero_array());
1182
1183 LIR_Opr result = rlock_result(x);
1184 __ move(reg, result);
1185 }
1186
1187 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1188 LIRItem length(x->length(), this);
1189 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1190 // and therefore provide the state before the parameters have been consumed
1191 CodeEmitInfo* patching_info = nullptr;
1192 if (!x->klass()->is_loaded() || PatchALot) {
1193 patching_info = state_for(x, x->state_before());
1194 }
1195
1196 CodeEmitInfo* info = state_for(x, x->state());
1197
1198 LIR_Opr reg = result_register_for(x->type());
1199 LIR_Opr tmp1 = FrameMap::r10_oop_opr;
1200 LIR_Opr tmp2 = FrameMap::r11_oop_opr;
1201 LIR_Opr tmp3 = FrameMap::r5_oop_opr;
1202 LIR_Opr tmp4 = reg;
1203 LIR_Opr klass_reg = FrameMap::r3_metadata_opr;
1204
1205 length.load_item_force(FrameMap::r19_opr);
1206 LIR_Opr len = length.result();
1207
1208 ciKlass* obj = (ciKlass*) x->exact_type();
1209 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info, x->is_null_free());
1210 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1211 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1212 }
1213
1214 klass2reg_with_patching(klass_reg, obj, patching_info);
1215 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path, true, x->is_null_free());
1216
1217 LIR_Opr result = rlock_result(x);
1218 __ move(reg, result);
1219 }
1220
1221
1222 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1223 Values* dims = x->dims();
1224 int i = dims->length();
1225 LIRItemList* items = new LIRItemList(i, i, nullptr);
1226 while (i-- > 0) {
1227 LIRItem* size = new LIRItem(dims->at(i), this);
1228 items->at_put(i, size);
1229 }
1230
1231 // Evaluate state_for early since it may emit code.
1232 CodeEmitInfo* patching_info = nullptr;
1233 if (!x->klass()->is_loaded() || PatchALot) {
1234 patching_info = state_for(x, x->state_before());
1235
1236 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1237 // clone all handlers (NOTE: Usually this is handled transparently
1238 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1239 // is done explicitly here because a stub isn't being used).
1240 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1241 }
1242 CodeEmitInfo* info = state_for(x, x->state());
1243
1244 i = dims->length();
1245 while (i-- > 0) {
1246 LIRItem* size = items->at(i);
1247 size->load_item();
1248
1249 store_stack_parameter(size->result(), in_ByteSize(i*4));
1250 }
1251
1252 LIR_Opr klass_reg = FrameMap::r0_metadata_opr;
1253 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1254
1255 LIR_Opr rank = FrameMap::r19_opr;
1256 __ move(LIR_OprFact::intConst(x->rank()), rank);
1257 LIR_Opr varargs = FrameMap::r2_opr;
1258 __ move(FrameMap::sp_opr, varargs);
1259 LIR_OprList* args = new LIR_OprList(3);
1260 args->append(klass_reg);
1261 args->append(rank);
1262 args->append(varargs);
1263 LIR_Opr reg = result_register_for(x->type());
1264 __ call_runtime(Runtime1::entry_for(C1StubId::new_multi_array_id),
1265 LIR_OprFact::illegalOpr,
1266 reg, args, info);
1267
1268 LIR_Opr result = rlock_result(x);
1269 __ move(reg, result);
1270 }
1271
1272 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1273 // nothing to do for now
1274 }
1275
1276 void LIRGenerator::do_CheckCast(CheckCast* x) {
1277 LIRItem obj(x->obj(), this);
1278
1279 CodeEmitInfo* patching_info = nullptr;
1280 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1281 // must do this before locking the destination register as an oop register,
1282 // and before the obj is loaded (the latter is for deoptimization)
1283 patching_info = state_for(x, x->state_before());
1284 }
1285 obj.load_item();
1286
1287 // info for exceptions
1288 CodeEmitInfo* info_for_exception =
1289 (x->needs_exception_state() ? state_for(x) :
1290 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1291 if (x->is_null_free()) {
1292 __ null_check(obj.result(), new CodeEmitInfo(info_for_exception));
1293 }
1294
1295 CodeStub* stub;
1296 if (x->is_incompatible_class_change_check()) {
1297 assert(patching_info == nullptr, "can't patch this");
1298 stub = new SimpleExceptionStub(C1StubId::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1299 } else if (x->is_invokespecial_receiver_check()) {
1300 assert(patching_info == nullptr, "can't patch this");
1301 stub = new DeoptimizeStub(info_for_exception,
1302 Deoptimization::Reason_class_check,
1303 Deoptimization::Action_none);
1304 } else {
1305 stub = new SimpleExceptionStub(C1StubId::throw_class_cast_exception_id, obj.result(), info_for_exception);
1306 }
1307 LIR_Opr reg = rlock_result(x);
1308 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1309 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1310 tmp3 = new_register(objectType);
1311 }
1312
1313
1314 __ checkcast(reg, obj.result(), x->klass(),
1315 new_register(objectType), new_register(objectType), tmp3,
1316 x->direct_compare(), info_for_exception, patching_info, stub,
1317 x->profiled_method(), x->profiled_bci(), x->is_null_free());
1318
1319 }
1320
1321 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1322 LIRItem obj(x->obj(), this);
1323
1324 // result and test object may not be in same register
1325 LIR_Opr reg = rlock_result(x);
1326 CodeEmitInfo* patching_info = nullptr;
1327 if ((!x->klass()->is_loaded() || PatchALot)) {
1328 // must do this before locking the destination register as an oop register
1329 patching_info = state_for(x, x->state_before());
1330 }
1331 obj.load_item();
1332 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1333 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1334 tmp3 = new_register(objectType);
1335 }
1336 __ instanceof(reg, obj.result(), x->klass(),
1337 new_register(objectType), new_register(objectType), tmp3,
1338 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1339 }
1340
1341 void LIRGenerator::do_If(If* x) {
1342 assert(x->number_of_sux() == 2, "inconsistency");
1343 ValueTag tag = x->x()->type()->tag();
1344 bool is_safepoint = x->is_safepoint();
1345
1346 If::Condition cond = x->cond();
1347
1348 LIRItem xitem(x->x(), this);
1349 LIRItem yitem(x->y(), this);
1350 LIRItem* xin = &xitem;
1351 LIRItem* yin = &yitem;
1352
1353 if (tag == longTag) {
1354 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1355 // mirror for other conditions
1356 if (cond == If::gtr || cond == If::leq) {
1357 cond = Instruction::mirror(cond);
1358 xin = &yitem;
1359 yin = &xitem;
1360 }
1361 xin->set_destroys_register();
1362 }
1363 xin->load_item();
1364
1365 if (tag == longTag) {
1366 if (yin->is_constant()
1367 && Assembler::operand_valid_for_add_sub_immediate(yin->get_jlong_constant())) {
1368 yin->dont_load_item();
1369 } else {
1370 yin->load_item();
1371 }
1372 } else if (tag == intTag) {
1373 if (yin->is_constant()
1374 && Assembler::operand_valid_for_add_sub_immediate(yin->get_jint_constant())) {
1375 yin->dont_load_item();
1376 } else {
1377 yin->load_item();
1378 }
1379 } else {
1380 yin->load_item();
1381 }
1382
1383 set_no_result(x);
1384
1385 LIR_Opr left = xin->result();
1386 LIR_Opr right = yin->result();
1387
1388 // add safepoint before generating condition code so it can be recomputed
1389 if (x->is_safepoint()) {
1390 // increment backedge counter if needed
1391 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1392 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1393 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1394 }
1395
1396 if (x->substitutability_check()) {
1397 substitutability_check(x, *xin, *yin);
1398 } else {
1399 __ cmp(lir_cond(cond), left, right);
1400 }
1401
1402 // Generate branch profiling. Profiling code doesn't kill flags.
1403 profile_branch(x, cond);
1404 move_to_phi(x->state());
1405 if (x->x()->type()->is_float_kind()) {
1406 __ branch(lir_cond(cond), x->tsux(), x->usux());
1407 } else {
1408 __ branch(lir_cond(cond), x->tsux());
1409 }
1410 assert(x->default_sux() == x->fsux(), "wrong destination above");
1411 __ jump(x->default_sux());
1412 }
1413
1414 LIR_Opr LIRGenerator::getThreadPointer() {
1415 return FrameMap::as_pointer_opr(rthread);
1416 }
1417
1418 void LIRGenerator::trace_block_entry(BlockBegin* block) { Unimplemented(); }
1419
1420 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1421 CodeEmitInfo* info) {
1422 __ volatile_store_mem_reg(value, address, info);
1423 }
1424
1425 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1426 CodeEmitInfo* info) {
1427 // 8179954: We need to make sure that the code generated for
1428 // volatile accesses forms a sequentially-consistent set of
1429 // operations when combined with STLR and LDAR. Without a leading
1430 // membar it's possible for a simple Dekker test to fail if loads
1431 // use LD;DMB but stores use STLR. This can happen if C2 compiles
1432 // the stores in one method and C1 compiles the loads in another.
1433 if (!CompilerConfig::is_c1_only_no_jvmci()) {
1434 __ membar();
1435 }
1436 __ volatile_load_mem_reg(address, result, info);
1437 }