32 FloatRegister LIR_Opr::as_double_reg() const {
33   return as_FloatRegister(fpu_regnrLo());
34 }
35 
36 // Reg2 unused.
37 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
38   assert(as_FloatRegister(reg2) == fnoreg, "Not used on this platform");
39   return (LIR_Opr)(intptr_t)((reg1 << LIR_Opr::reg1_shift) |
40                              (reg1 << LIR_Opr::reg2_shift) |
41                              LIR_Opr::double_type          |
42                              LIR_Opr::fpu_register         |
43                              LIR_Opr::double_size);
44 }
45 
46 #ifndef PRODUCT
47 void LIR_Address::verify() const {
48   assert(base()->is_cpu_register(), "wrong base operand");
49   assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand");
50   assert(base()->type() == T_ADDRESS || base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
51          "wrong type for addresses");

52 }
53 #endif // PRODUCT

32 FloatRegister LIR_Opr::as_double_reg() const {
33   return as_FloatRegister(fpu_regnrLo());
34 }
35 
36 // Reg2 unused.
37 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
38   assert(as_FloatRegister(reg2) == fnoreg, "Not used on this platform");
39   return (LIR_Opr)(intptr_t)((reg1 << LIR_Opr::reg1_shift) |
40                              (reg1 << LIR_Opr::reg2_shift) |
41                              LIR_Opr::double_type          |
42                              LIR_Opr::fpu_register         |
43                              LIR_Opr::double_size);
44 }
45 
46 #ifndef PRODUCT
47 void LIR_Address::verify() const {
48   assert(base()->is_cpu_register(), "wrong base operand");
49   assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand");
50   assert(base()->type() == T_ADDRESS || base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
51          "wrong type for addresses");
52   assert(index()->is_illegal() || disp() == 0, "cannot set both index and displacement");
53 }
54 #endif // PRODUCT