27
28 // C2_MacroAssembler contains high-level macros for C2
29
30 private:
31 // Return true if the phase output is in the scratch emit size mode.
32 virtual bool in_scratch_emit_size() override;
33
34 void neon_reduce_logical_helper(int opc, bool sf, Register Rd, Register Rn, Register Rm,
35 enum shift_kind kind = Assembler::LSL, unsigned shift = 0);
36
37 void select_from_two_vectors_neon(FloatRegister dst, FloatRegister src1,
38 FloatRegister src2, FloatRegister index,
39 FloatRegister tmp, unsigned vector_length_in_bytes);
40
41 void select_from_two_vectors_sve(FloatRegister dst, FloatRegister src1,
42 FloatRegister src2, FloatRegister index,
43 FloatRegister tmp, SIMD_RegVariant T,
44 unsigned vector_length_in_bytes);
45
46 public:
47 // jdk.internal.util.ArraysSupport.vectorizedHashCode
48 address arrays_hashcode(Register ary, Register cnt, Register result, FloatRegister vdata0,
49 FloatRegister vdata1, FloatRegister vdata2, FloatRegister vdata3,
50 FloatRegister vmul0, FloatRegister vmul1, FloatRegister vmul2,
51 FloatRegister vmul3, FloatRegister vpow, FloatRegister vpowm,
52 BasicType eltype);
53
54 // Code used by cmpFastLockLightweight and cmpFastUnlockLightweight mach instructions in .ad file.
55 void fast_lock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
56 void fast_unlock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
57
58 void string_compare(Register str1, Register str2,
59 Register cnt1, Register cnt2, Register result,
60 Register tmp1, Register tmp2, FloatRegister vtmp1,
61 FloatRegister vtmp2, FloatRegister vtmp3,
62 PRegister pgtmp1, PRegister pgtmp2, int ae);
63
64 void string_indexof(Register str1, Register str2,
65 Register cnt1, Register cnt2,
66 Register tmp1, Register tmp2,
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27
28 // C2_MacroAssembler contains high-level macros for C2
29
30 private:
31 // Return true if the phase output is in the scratch emit size mode.
32 virtual bool in_scratch_emit_size() override;
33
34 void neon_reduce_logical_helper(int opc, bool sf, Register Rd, Register Rn, Register Rm,
35 enum shift_kind kind = Assembler::LSL, unsigned shift = 0);
36
37 void select_from_two_vectors_neon(FloatRegister dst, FloatRegister src1,
38 FloatRegister src2, FloatRegister index,
39 FloatRegister tmp, unsigned vector_length_in_bytes);
40
41 void select_from_two_vectors_sve(FloatRegister dst, FloatRegister src1,
42 FloatRegister src2, FloatRegister index,
43 FloatRegister tmp, SIMD_RegVariant T,
44 unsigned vector_length_in_bytes);
45
46 public:
47 void entry_barrier();
48
49 // jdk.internal.util.ArraysSupport.vectorizedHashCode
50 address arrays_hashcode(Register ary, Register cnt, Register result, FloatRegister vdata0,
51 FloatRegister vdata1, FloatRegister vdata2, FloatRegister vdata3,
52 FloatRegister vmul0, FloatRegister vmul1, FloatRegister vmul2,
53 FloatRegister vmul3, FloatRegister vpow, FloatRegister vpowm,
54 BasicType eltype);
55
56 // Code used by cmpFastLockLightweight and cmpFastUnlockLightweight mach instructions in .ad file.
57 void fast_lock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
58 void fast_unlock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
59
60 void string_compare(Register str1, Register str2,
61 Register cnt1, Register cnt2, Register result,
62 Register tmp1, Register tmp2, FloatRegister vtmp1,
63 FloatRegister vtmp2, FloatRegister vtmp3,
64 PRegister pgtmp1, PRegister pgtmp2, int ae);
65
66 void string_indexof(Register str1, Register str2,
67 Register cnt1, Register cnt2,
68 Register tmp1, Register tmp2,
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