18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
26 #define CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
27
28 // C2_MacroAssembler contains high-level macros for C2
29
30 private:
31 // Return true if the phase output is in the scratch emit size mode.
32 virtual bool in_scratch_emit_size() override;
33
34 void neon_reduce_logical_helper(int opc, bool sf, Register Rd, Register Rn, Register Rm,
35 enum shift_kind kind = Assembler::LSL, unsigned shift = 0);
36
37 public:
38 // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
39 void fast_lock(Register object, Register box, Register tmp, Register tmp2, Register tmp3);
40 void fast_unlock(Register object, Register box, Register tmp, Register tmp2);
41 // Code used by cmpFastLockLightweight and cmpFastUnlockLightweight mach instructions in .ad file.
42 void fast_lock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
43 void fast_unlock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
44
45 void string_compare(Register str1, Register str2,
46 Register cnt1, Register cnt2, Register result,
47 Register tmp1, Register tmp2, FloatRegister vtmp1,
48 FloatRegister vtmp2, FloatRegister vtmp3,
49 PRegister pgtmp1, PRegister pgtmp2, int ae);
50
51 void string_indexof(Register str1, Register str2,
52 Register cnt1, Register cnt2,
53 Register tmp1, Register tmp2,
54 Register tmp3, Register tmp4,
55 Register tmp5, Register tmp6,
56 int int_cnt1, Register result, int ae);
57
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18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
26 #define CPU_AARCH64_C2_MACROASSEMBLER_AARCH64_HPP
27
28 // C2_MacroAssembler contains high-level macros for C2
29
30 private:
31 // Return true if the phase output is in the scratch emit size mode.
32 virtual bool in_scratch_emit_size() override;
33
34 void neon_reduce_logical_helper(int opc, bool sf, Register Rd, Register Rn, Register Rm,
35 enum shift_kind kind = Assembler::LSL, unsigned shift = 0);
36
37 public:
38 void entry_barrier();
39
40 // Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
41 void fast_lock(Register object, Register box, Register tmp, Register tmp2, Register tmp3);
42 void fast_unlock(Register object, Register box, Register tmp, Register tmp2);
43 // Code used by cmpFastLockLightweight and cmpFastUnlockLightweight mach instructions in .ad file.
44 void fast_lock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
45 void fast_unlock_lightweight(Register object, Register box, Register t1, Register t2, Register t3);
46
47 void string_compare(Register str1, Register str2,
48 Register cnt1, Register cnt2, Register result,
49 Register tmp1, Register tmp2, FloatRegister vtmp1,
50 FloatRegister vtmp2, FloatRegister vtmp3,
51 PRegister pgtmp1, PRegister pgtmp2, int ae);
52
53 void string_indexof(Register str1, Register str2,
54 Register cnt1, Register cnt2,
55 Register tmp1, Register tmp2,
56 Register tmp3, Register tmp4,
57 Register tmp5, Register tmp6,
58 int int_cnt1, Register result, int ae);
59
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