1 /*
  2  * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "asm/macroAssembler.inline.hpp"
 26 #include "gc/g1/g1BarrierSet.hpp"
 27 #include "gc/g1/g1BarrierSetAssembler.hpp"
 28 #include "gc/g1/g1BarrierSetRuntime.hpp"
 29 #include "gc/g1/g1CardTable.hpp"
 30 #include "gc/g1/g1HeapRegion.hpp"
 31 #include "gc/g1/g1ThreadLocalData.hpp"
 32 #include "gc/shared/collectedHeap.hpp"
 33 #include "interpreter/interp_masm.hpp"
 34 #include "runtime/javaThread.hpp"
 35 #include "runtime/sharedRuntime.hpp"
 36 #ifdef COMPILER1
 37 #include "c1/c1_LIRAssembler.hpp"
 38 #include "c1/c1_MacroAssembler.hpp"
 39 #include "gc/g1/c1/g1BarrierSetC1.hpp"
 40 #endif // COMPILER1
 41 #ifdef COMPILER2
 42 #include "gc/g1/c2/g1BarrierSetC2.hpp"
 43 #endif // COMPILER2
 44 
 45 #define __ masm->
 46 
 47 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
 48                                                             Register addr, Register count, RegSet saved_regs) {
 49   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 50   if (!dest_uninitialized) {
 51     Label done;
 52     Address in_progress(rthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
 53 
 54     // Is marking active?
 55     if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
 56       __ ldrw(rscratch1, in_progress);
 57     } else {
 58       assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
 59       __ ldrb(rscratch1, in_progress);
 60     }
 61     __ cbzw(rscratch1, done);
 62 
 63     __ push(saved_regs, sp);
 64     if (count == c_rarg0) {
 65       if (addr == c_rarg1) {
 66         // exactly backwards!!
 67         __ mov(rscratch1, c_rarg0);
 68         __ mov(c_rarg0, c_rarg1);
 69         __ mov(c_rarg1, rscratch1);
 70       } else {
 71         __ mov(c_rarg1, count);
 72         __ mov(c_rarg0, addr);
 73       }
 74     } else {
 75       __ mov(c_rarg0, addr);
 76       __ mov(c_rarg1, count);
 77     }
 78     if (UseCompressedOops) {
 79       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 80     } else {
 81       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
 82     }
 83     __ pop(saved_regs, sp);
 84 
 85     __ bind(done);
 86   }
 87 }
 88 
 89 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
 90                                                              DecoratorSet decorators,
 91                                                              Register start,
 92                                                              Register count,
 93                                                              Register scratch) {
 94 
 95   Label done;
 96   Label loop;
 97   Label next;
 98 
 99   __ cbz(count, done);
100 
101   // Calculate the number of card marks to set. Since the object might start and
102   // end within a card, we need to calculate this via the card table indexes of
103   // the actual start and last addresses covered by the object.
104   // Temporarily use the count register for the last element address.
105   __ lea(count, Address(start, count, Address::lsl(LogBytesPerHeapOop))); // end = start + count << LogBytesPerHeapOop
106   __ sub(count, count, BytesPerHeapOop);                                  // Use last element address for end.
107 
108   __ lsr(start, start, CardTable::card_shift());
109   __ lsr(count, count, CardTable::card_shift());
110   __ sub(count, count, start);                                            // Number of bytes to mark - 1.
111 
112   // Add card table base offset to start.
113   __ ldr(scratch, Address(rthread, in_bytes(G1ThreadLocalData::card_table_base_offset())));
114   __ add(start, start, scratch);
115 
116   __ bind(loop);
117   if (UseCondCardMark) {
118     __ ldrb(scratch, Address(start, count));
119     // Instead of loading clean_card_val and comparing, we exploit the fact that
120     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
121     __ tbz(scratch, 0, next);
122   }
123   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
124   __ strb(zr, Address(start, count));
125   __ bind(next);
126   __ subs(count, count, 1);
127   __ br(Assembler::GE, loop);
128 
129   __ bind(done);
130 }
131 
132 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
133                                               const Register thread, const Register value, const Register temp1, const Register temp2) {
134   // Can we store a value in the given thread's buffer?
135   // (The index field is typed as size_t.)
136   __ ldr(temp1, Address(thread, in_bytes(index_offset)));   // temp1 := *(index address)
137   __ cbz(temp1, runtime);                                   // jump to runtime if index == 0 (full buffer)
138   // The buffer is not full, store value into it.
139   __ sub(temp1, temp1, wordSize);                           // temp1 := next index
140   __ str(temp1, Address(thread, in_bytes(index_offset)));   // *(index address) := next index
141   __ ldr(temp2, Address(thread, in_bytes(buffer_offset)));  // temp2 := buffer address
142   __ str(value, Address(temp2, temp1));                     // *(buffer address + next index) := value
143 }
144 
145 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
146                                            const Register thread,
147                                            const Register tmp1) {
148   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
149   // Is marking active?
150   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
151     __ ldrw(tmp1, in_progress);
152   } else {
153     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
154     __ ldrb(tmp1, in_progress);
155   }
156 }
157 
158 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
159                                            const Register obj,
160                                            const Register pre_val,
161                                            const Register thread,
162                                            const Register tmp1,
163                                            const Register tmp2,
164                                            Label& done,
165                                            Label& runtime) {
166   // Do we need to load the previous value?
167   if (obj != noreg) {
168     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
169   }
170   // Is the previous value null?
171   __ cbz(pre_val, done);
172   generate_queue_test_and_insertion(masm,
173                                     G1ThreadLocalData::satb_mark_queue_index_offset(),
174                                     G1ThreadLocalData::satb_mark_queue_buffer_offset(),
175                                     runtime,
176                                     thread, pre_val, tmp1, tmp2);
177   __ b(done);
178 }
179 
180 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
181                                                  Register obj,
182                                                  Register pre_val,
183                                                  Register thread,
184                                                  Register tmp1,
185                                                  Register tmp2,
186                                                  bool tosca_live,
187                                                  bool expand_call) {
188   // If expand_call is true then we expand the call_VM_leaf macro
189   // directly to skip generating the check by
190   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
191 
192   assert(thread == rthread, "must be");
193 
194   Label done;
195   Label runtime;
196 
197   assert_different_registers(obj, pre_val, tmp1, tmp2);
198   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
199 
200   generate_pre_barrier_fast_path(masm, thread, tmp1);
201   // If marking is not active (*(mark queue active address) == 0), jump to done
202   __ cbzw(tmp1, done);
203   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
204 
205   __ bind(runtime);
206 
207   __ push_call_clobbered_registers();
208 
209   // Calling the runtime using the regular call_VM_leaf mechanism generates
210   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
211   // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
212   //
213   // If we care generating the pre-barrier without a frame (e.g. in the
214   // intrinsified Reference.get() routine) then rfp might be pointing to
215   // the caller frame and so this check will most likely fail at runtime.
216   //
217   // Expanding the call directly bypasses the generation of the check.
218   // So when we do not have have a full interpreter frame on the stack
219   // expand_call should be passed true.
220 
221   if (expand_call) {
222     assert(pre_val != c_rarg1, "smashed arg");
223     __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
224   } else {
225     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
226   }
227 
228   __ pop_call_clobbered_registers();
229 
230   __ bind(done);
231 
232 }
233 
234 static void generate_post_barrier(MacroAssembler* masm,
235                                   const Register store_addr,
236                                   const Register new_val,
237                                   const Register thread,
238                                   const Register tmp1,
239                                   const Register tmp2,
240                                   Label& done,
241                                   bool new_val_may_be_null) {
242   assert(thread == rthread, "must be");
243   assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
244 
245   // Does store cross heap regions?
246   __ eor(tmp1, store_addr, new_val);                     // tmp1 := store address ^ new value
247   __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);   // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
248   __ cbz(tmp1, done);
249   // Crosses regions, storing null?
250   if (new_val_may_be_null) {
251     __ cbz(new_val, done);
252   }
253   // Storing region crossing non-null.
254   __ lsr(tmp1, store_addr, CardTable::card_shift());     // tmp1 := card address relative to card table base
255 
256   Address card_table_addr(thread, in_bytes(G1ThreadLocalData::card_table_base_offset()));
257   __ ldr(tmp2, card_table_addr);                         // tmp2 := card table base address
258   if (UseCondCardMark) {
259     __ ldrb(rscratch1, Address(tmp1, tmp2));             // rscratch1 := card
260     // Instead of loading clean_card_val and comparing, we exploit the fact that
261     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
262     __ tbz(rscratch1, 0, done);
263   }
264   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
265   __ strb(zr, Address(tmp1, tmp2));                      // *(card address) := dirty_card_val
266 }
267 
268 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
269                                                   Register store_addr,
270                                                   Register new_val,
271                                                   Register thread,
272                                                   Register tmp1,
273                                                   Register tmp2) {
274   Label done;
275   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, false /* new_val_may_be_null */);
276   __ bind(done);
277 }
278 
279 #if defined(COMPILER2)
280 
281 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
282   SaveLiveRegisters save_registers(masm, stub);
283   if (c_rarg0 != arg) {
284     __ mov(c_rarg0, arg);
285   }
286   __ mov(c_rarg1, rthread);
287   __ mov(rscratch1, runtime_path);
288   __ blr(rscratch1);
289 }
290 
291 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
292                                                     Register obj,
293                                                     Register pre_val,
294                                                     Register thread,
295                                                     Register tmp1,
296                                                     Register tmp2,
297                                                     G1PreBarrierStubC2* stub) {
298   assert(thread == rthread, "must be");
299   assert_different_registers(obj, pre_val, tmp1, tmp2);
300   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
301 
302   stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
303 
304   generate_pre_barrier_fast_path(masm, thread, tmp1);
305   // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
306   __ cbnzw(tmp1, *stub->entry());
307 
308   __ bind(*stub->continuation());
309 }
310 
311 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
312                                                          G1PreBarrierStubC2* stub) const {
313   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
314   Label runtime;
315   Register obj = stub->obj();
316   Register pre_val = stub->pre_val();
317   Register thread = stub->thread();
318   Register tmp1 = stub->tmp1();
319   Register tmp2 = stub->tmp2();
320 
321   __ bind(*stub->entry());
322   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
323 
324   __ bind(runtime);
325   generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
326   __ b(*stub->continuation());
327 }
328 
329 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
330                                                      Register store_addr,
331                                                      Register new_val,
332                                                      Register thread,
333                                                      Register tmp1,
334                                                      Register tmp2,
335                                                      bool new_val_may_be_null) {
336   Label done;
337   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
338   __ bind(done);
339 }
340 
341 #endif // COMPILER2
342 
343 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
344                                     Register dst, Address src, Register tmp1, Register tmp2) {
345   bool on_oop = is_reference_type(type);
346   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
347   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
348   bool on_reference = on_weak || on_phantom;
349   CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
350   if (on_oop && on_reference) {
351     // LR is live.  It must be saved around calls.
352     __ enter(/*strip_ret_addr*/true); // barrier may call runtime
353     // Generate the G1 pre-barrier code to log the value of
354     // the referent field in an SATB buffer.
355     g1_write_barrier_pre(masm /* masm */,
356                          noreg /* obj */,
357                          dst /* pre_val */,
358                          rthread /* thread */,
359                          tmp1 /* tmp1 */,
360                          tmp2 /* tmp2 */,
361                          true /* tosca_live */,
362                          true /* expand_call */);
363     __ leave();
364   }
365 }
366 
367 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
368                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
369   // flatten object address if needed
370   if (dst.index() == noreg && dst.offset() == 0) {
371     if (dst.base() != tmp3) {
372       __ mov(tmp3, dst.base());
373     }
374   } else {
375     __ lea(tmp3, dst);
376   }
377 
378   g1_write_barrier_pre(masm,
379                        tmp3 /* obj */,
380                        tmp2 /* pre_val */,
381                        rthread /* thread */,
382                        tmp1  /* tmp1 */,
383                        rscratch2  /* tmp2 */,
384                        val != noreg /* tosca_live */,
385                        false /* expand_call */);
386 
387   if (val == noreg) {
388     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
389   } else {
390     // G1 barrier needs uncompressed oop for region cross check.
391     Register new_val = val;
392     if (UseCompressedOops) {
393       new_val = rscratch2;
394       __ mov(new_val, val);
395     }
396     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
397     g1_write_barrier_post(masm,
398                           tmp3 /* store_adr */,
399                           new_val /* new_val */,
400                           rthread /* thread */,
401                           tmp1 /* tmp1 */,
402                           tmp2 /* tmp2 */);
403   }
404 
405 }
406 
407 #ifdef COMPILER1
408 
409 #undef __
410 #define __ ce->masm()->
411 
412 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
413   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
414   // At this point we know that marking is in progress.
415   // If do_load() is true then we have to emit the
416   // load of the previous value; otherwise it has already
417   // been loaded into _pre_val.
418 
419   __ bind(*stub->entry());
420 
421   assert(stub->pre_val()->is_register(), "Precondition.");
422 
423   Register pre_val_reg = stub->pre_val()->as_register();
424 
425   if (stub->do_load()) {
426     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
427   }
428   __ cbz(pre_val_reg, *stub->continuation());
429   ce->store_parameter(stub->pre_val()->as_register(), 0);
430   __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
431   __ b(*stub->continuation());
432 }
433 
434 #undef __
435 
436 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
437                                                      Register store_addr,
438                                                      Register new_val,
439                                                      Register thread,
440                                                      Register tmp1,
441                                                      Register tmp2) {
442   Label done;
443   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
444   masm->bind(done);
445 }
446 
447 #define __ sasm->
448 
449 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
450   __ prologue("g1_pre_barrier", false);
451 
452   // arg0 : previous value of memory
453 
454   BarrierSet* bs = BarrierSet::barrier_set();
455 
456   const Register pre_val = r0;
457   const Register thread = rthread;
458   const Register tmp = rscratch1;
459 
460   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
461   Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
462   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
463 
464   Label done;
465   Label runtime;
466 
467   // Is marking still active?
468   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
469     __ ldrw(tmp, in_progress);
470   } else {
471     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
472     __ ldrb(tmp, in_progress);
473   }
474   __ cbzw(tmp, done);
475 
476   // Can we store original value in the thread's buffer?
477   __ ldr(tmp, queue_index);
478   __ cbz(tmp, runtime);
479 
480   __ sub(tmp, tmp, wordSize);
481   __ str(tmp, queue_index);
482   __ ldr(rscratch2, buffer);
483   __ add(tmp, tmp, rscratch2);
484   __ load_parameter(0, rscratch2);
485   __ str(rscratch2, Address(tmp, 0));
486   __ b(done);
487 
488   __ bind(runtime);
489   __ push_call_clobbered_registers();
490   __ load_parameter(0, pre_val);
491   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
492   __ pop_call_clobbered_registers();
493   __ bind(done);
494 
495   __ epilogue();
496 }
497 
498 #undef __
499 
500 #endif // COMPILER1