1 /*
  2  * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "asm/macroAssembler.inline.hpp"
 26 #include "gc/g1/g1BarrierSet.hpp"
 27 #include "gc/g1/g1BarrierSetAssembler.hpp"
 28 #include "gc/g1/g1BarrierSetRuntime.hpp"
 29 #include "gc/g1/g1CardTable.hpp"
 30 #include "gc/g1/g1HeapRegion.hpp"
 31 #include "gc/g1/g1ThreadLocalData.hpp"
 32 #include "gc/shared/collectedHeap.hpp"
 33 #include "interpreter/interp_masm.hpp"
 34 #include "runtime/javaThread.hpp"
 35 #include "runtime/sharedRuntime.hpp"
 36 #ifdef COMPILER1
 37 #include "c1/c1_LIRAssembler.hpp"
 38 #include "c1/c1_MacroAssembler.hpp"
 39 #include "gc/g1/c1/g1BarrierSetC1.hpp"
 40 #endif // COMPILER1
 41 #ifdef COMPILER2
 42 #include "gc/g1/c2/g1BarrierSetC2.hpp"
 43 #endif // COMPILER2
 44 
 45 #define __ masm->
 46 
 47 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
 48                                                             Register addr, Register count, RegSet saved_regs) {
 49   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 50   if (!dest_uninitialized) {
 51     Label done;
 52     Address in_progress(rthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
 53 
 54     // Is marking active?
 55     if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
 56       __ ldrw(rscratch1, in_progress);
 57     } else {
 58       assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
 59       __ ldrb(rscratch1, in_progress);
 60     }
 61     __ cbzw(rscratch1, done);
 62 
 63     __ push(saved_regs, sp);
 64     if (count == c_rarg0) {
 65       if (addr == c_rarg1) {
 66         // exactly backwards!!
 67         __ mov(rscratch1, c_rarg0);
 68         __ mov(c_rarg0, c_rarg1);
 69         __ mov(c_rarg1, rscratch1);
 70       } else {
 71         __ mov(c_rarg1, count);
 72         __ mov(c_rarg0, addr);
 73       }
 74     } else {
 75       __ mov(c_rarg0, addr);
 76       __ mov(c_rarg1, count);
 77     }
 78     if (UseCompressedOops) {
 79       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 80     } else {
 81       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
 82     }
 83     __ pop(saved_regs, sp);
 84 
 85     __ bind(done);
 86   }
 87 }
 88 
 89 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
 90                                                              DecoratorSet decorators,
 91                                                              Register start,
 92                                                              Register count,
 93                                                              Register scratch,
 94                                                              RegSet saved_regs) {
 95 
 96   Label done;
 97   Label loop;
 98   Label next;
 99 
100   __ cbz(count, done);
101 
102   // Calculate the number of card marks to set. Since the object might start and
103   // end within a card, we need to calculate this via the card table indexes of
104   // the actual start and last addresses covered by the object.
105   // Temporarily use the count register for the last element address.
106   __ lea(count, Address(start, count, Address::lsl(LogBytesPerHeapOop))); // end = start + count << LogBytesPerHeapOop
107   __ sub(count, count, BytesPerHeapOop);                                  // Use last element address for end.
108 
109   __ lsr(start, start, CardTable::card_shift());
110   __ lsr(count, count, CardTable::card_shift());
111   __ sub(count, count, start);                                            // Number of bytes to mark - 1.
112 
113   // Add card table base offset to start.
114   __ ldr(scratch, Address(rthread, in_bytes(G1ThreadLocalData::card_table_base_offset())));
115   __ add(start, start, scratch);
116 
117   __ bind(loop);
118   if (UseCondCardMark) {
119     __ ldrb(scratch, Address(start, count));
120     // Instead of loading clean_card_val and comparing, we exploit the fact that
121     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
122     __ tbz(scratch, 0, next);
123   }
124   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
125   __ strb(zr, Address(start, count));
126   __ bind(next);
127   __ subs(count, count, 1);
128   __ br(Assembler::GE, loop);
129 
130   __ bind(done);
131 }
132 
133 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
134                                               const Register thread, const Register value, const Register temp1, const Register temp2) {
135   assert_different_registers(value, temp1, temp2);
136   // Can we store a value in the given thread's buffer?
137   // (The index field is typed as size_t.)
138   __ ldr(temp1, Address(thread, in_bytes(index_offset)));   // temp1 := *(index address)
139   __ cbz(temp1, runtime);                                   // jump to runtime if index == 0 (full buffer)
140   // The buffer is not full, store value into it.
141   __ sub(temp1, temp1, wordSize);                           // temp1 := next index
142   __ str(temp1, Address(thread, in_bytes(index_offset)));   // *(index address) := next index
143   __ ldr(temp2, Address(thread, in_bytes(buffer_offset)));  // temp2 := buffer address
144   __ str(value, Address(temp2, temp1));                     // *(buffer address + next index) := value
145 }
146 
147 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
148                                            const Register thread,
149                                            const Register tmp1) {
150   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
151   // Is marking active?
152   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
153     __ ldrw(tmp1, in_progress);
154   } else {
155     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
156     __ ldrb(tmp1, in_progress);
157   }
158 }
159 
160 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
161                                            const Register obj,
162                                            const Register pre_val,
163                                            const Register thread,
164                                            const Register tmp1,
165                                            const Register tmp2,
166                                            Label& done,
167                                            Label& runtime) {
168   // Do we need to load the previous value?
169   if (obj != noreg) {
170     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
171   }
172   // Is the previous value null?
173   __ cbz(pre_val, done);
174   generate_queue_test_and_insertion(masm,
175                                     G1ThreadLocalData::satb_mark_queue_index_offset(),
176                                     G1ThreadLocalData::satb_mark_queue_buffer_offset(),
177                                     runtime,
178                                     thread, pre_val, tmp1, tmp2);
179   __ b(done);
180 }
181 
182 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
183                                                  Register obj,
184                                                  Register pre_val,
185                                                  Register thread,
186                                                  Register tmp1,
187                                                  Register tmp2,
188                                                  bool tosca_live,
189                                                  bool expand_call) {
190   // If expand_call is true then we expand the call_VM_leaf macro
191   // directly to skip generating the check by
192   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
193 
194   assert(thread == rthread, "must be");
195 
196   Label done;
197   Label runtime;
198 
199   assert_different_registers(obj, pre_val, tmp1, tmp2);
200   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
201 
202   generate_pre_barrier_fast_path(masm, thread, tmp1);
203   // If marking is not active (*(mark queue active address) == 0), jump to done
204   __ cbzw(tmp1, done);
205   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
206 
207   __ bind(runtime);
208 
209   // save the live input values
210   RegSet saved = RegSet::of(pre_val);
211   FloatRegSet fsaved;
212 
213   // Barriers might be emitted when converting between (scalarized) calling
214   // conventions for inline types. Save all argument registers before calling
215   // into the runtime.
216 
217   // TODO 8366717 This came with 8284161: Implementation of Virtual Threads (Preview) later in May 2022
218   // Check if it's sufficient
219   //__ push_call_clobbered_registers();
220   assert_different_registers(rscratch1, pre_val); // push_CPU_state trashes rscratch1
221   __ push_CPU_state(true);
222 
223   // Calling the runtime using the regular call_VM_leaf mechanism generates
224   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
225   // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
226   //
227   // If we care generating the pre-barrier without a frame (e.g. in the
228   // intrinsified Reference.get() routine) then rfp might be pointing to
229   // the caller frame and so this check will most likely fail at runtime.
230   //
231   // Expanding the call directly bypasses the generation of the check.
232   // So when we do not have have a full interpreter frame on the stack
233   // expand_call should be passed true.
234 
235   if (expand_call) {
236     assert(pre_val != c_rarg1, "smashed arg");
237     __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
238   } else {
239     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
240   }
241 
242   __ pop_CPU_state(true);
243 
244   __ bind(done);
245 
246 }
247 
248 static void generate_post_barrier(MacroAssembler* masm,
249                                   const Register store_addr,
250                                   const Register new_val,
251                                   const Register thread,
252                                   const Register tmp1,
253                                   const Register tmp2,
254                                   Label& done,
255                                   bool new_val_may_be_null) {
256   assert(thread == rthread, "must be");
257   assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
258 
259   // Does store cross heap regions?
260   __ eor(tmp1, store_addr, new_val);                     // tmp1 := store address ^ new value
261   __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);   // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
262   __ cbz(tmp1, done);
263   // Crosses regions, storing null?
264   if (new_val_may_be_null) {
265     __ cbz(new_val, done);
266   }
267   // Storing region crossing non-null.
268   __ lsr(tmp1, store_addr, CardTable::card_shift());     // tmp1 := card address relative to card table base
269 
270   Address card_table_addr(thread, in_bytes(G1ThreadLocalData::card_table_base_offset()));
271   __ ldr(tmp2, card_table_addr);                         // tmp2 := card table base address
272   if (UseCondCardMark) {
273     __ ldrb(rscratch1, Address(tmp1, tmp2));             // rscratch1 := card
274     // Instead of loading clean_card_val and comparing, we exploit the fact that
275     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
276     __ tbz(rscratch1, 0, done);
277   }
278   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
279   __ strb(zr, Address(tmp1, tmp2));                      // *(card address) := dirty_card_val
280 }
281 
282 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
283                                                   Register store_addr,
284                                                   Register new_val,
285                                                   Register thread,
286                                                   Register tmp1,
287                                                   Register tmp2) {
288   Label done;
289   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, false /* new_val_may_be_null */);
290   __ bind(done);
291 }
292 
293 #if defined(COMPILER2)
294 
295 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
296   SaveLiveRegisters save_registers(masm, stub);
297   if (c_rarg0 != arg) {
298     __ mov(c_rarg0, arg);
299   }
300   __ mov(c_rarg1, rthread);
301   __ mov(rscratch1, runtime_path);
302   __ blr(rscratch1);
303 }
304 
305 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
306                                                     Register obj,
307                                                     Register pre_val,
308                                                     Register thread,
309                                                     Register tmp1,
310                                                     Register tmp2,
311                                                     G1PreBarrierStubC2* stub) {
312   assert(thread == rthread, "must be");
313   assert_different_registers(obj, pre_val, tmp1, tmp2);
314   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
315 
316   stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
317 
318   generate_pre_barrier_fast_path(masm, thread, tmp1);
319   // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
320   __ cbnzw(tmp1, *stub->entry());
321 
322   __ bind(*stub->continuation());
323 }
324 
325 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
326                                                          G1PreBarrierStubC2* stub) const {
327   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
328   Label runtime;
329   Register obj = stub->obj();
330   Register pre_val = stub->pre_val();
331   Register thread = stub->thread();
332   Register tmp1 = stub->tmp1();
333   Register tmp2 = stub->tmp2();
334 
335   __ bind(*stub->entry());
336   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
337 
338   __ bind(runtime);
339   generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
340   __ b(*stub->continuation());
341 }
342 
343 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
344                                                      Register store_addr,
345                                                      Register new_val,
346                                                      Register thread,
347                                                      Register tmp1,
348                                                      Register tmp2,
349                                                      bool new_val_may_be_null) {
350   Label done;
351   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
352   __ bind(done);
353 }
354 
355 #endif // COMPILER2
356 
357 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
358                                     Register dst, Address src, Register tmp1, Register tmp2) {
359   bool on_oop = is_reference_type(type);
360   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
361   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
362   bool on_reference = on_weak || on_phantom;
363   ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
364   if (on_oop && on_reference) {
365     // LR is live.  It must be saved around calls.
366     __ enter(/*strip_ret_addr*/true); // barrier may call runtime
367     // Generate the G1 pre-barrier code to log the value of
368     // the referent field in an SATB buffer.
369     g1_write_barrier_pre(masm /* masm */,
370                          noreg /* obj */,
371                          dst /* pre_val */,
372                          rthread /* thread */,
373                          tmp1 /* tmp1 */,
374                          tmp2 /* tmp2 */,
375                          true /* tosca_live */,
376                          true /* expand_call */);
377     __ leave();
378   }
379 }
380 
381 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
382                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
383 
384   bool in_heap = (decorators & IN_HEAP) != 0;
385   bool as_normal = (decorators & AS_NORMAL) != 0;
386   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
387 
388   bool needs_pre_barrier = as_normal && !dest_uninitialized;
389   bool needs_post_barrier = (val != noreg && in_heap);
390 
391   assert_different_registers(val, tmp1, tmp2, tmp3);
392 
393   // flatten object address if needed
394   if (dst.index() == noreg && dst.offset() == 0) {
395     if (dst.base() != tmp3) {
396       __ mov(tmp3, dst.base());
397     }
398   } else {
399     __ lea(tmp3, dst);
400   }
401 
402   if (needs_pre_barrier) {
403     g1_write_barrier_pre(masm,
404                          tmp3 /* obj */,
405                          tmp2 /* pre_val */,
406                          rthread /* thread */,
407                          tmp1  /* tmp1 */,
408                          rscratch2  /* tmp2 */,
409                          val != noreg /* tosca_live */,
410                          false /* expand_call */);
411   }
412 
413   if (val == noreg) {
414     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
415   } else {
416     // G1 barrier needs uncompressed oop for region cross check.
417     Register new_val = val;
418     if (needs_post_barrier) {
419       if (UseCompressedOops) {
420         new_val = rscratch2;
421         __ mov(new_val, val);
422       }
423     }
424 
425     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
426     if (needs_post_barrier) {
427       g1_write_barrier_post(masm,
428                             tmp3 /* store_adr */,
429                             new_val /* new_val */,
430                             rthread /* thread */,
431                             tmp1 /* tmp1 */,
432                             tmp2 /* tmp2 */);
433     }
434   }
435 
436 }
437 
438 #ifdef COMPILER1
439 
440 #undef __
441 #define __ ce->masm()->
442 
443 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
444   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
445   // At this point we know that marking is in progress.
446   // If do_load() is true then we have to emit the
447   // load of the previous value; otherwise it has already
448   // been loaded into _pre_val.
449 
450   __ bind(*stub->entry());
451 
452   assert(stub->pre_val()->is_register(), "Precondition.");
453 
454   Register pre_val_reg = stub->pre_val()->as_register();
455 
456   if (stub->do_load()) {
457     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
458   }
459   __ cbz(pre_val_reg, *stub->continuation());
460   ce->store_parameter(stub->pre_val()->as_register(), 0);
461   __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
462   __ b(*stub->continuation());
463 }
464 
465 #undef __
466 
467 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
468                                                      Register store_addr,
469                                                      Register new_val,
470                                                      Register thread,
471                                                      Register tmp1,
472                                                      Register tmp2) {
473   Label done;
474   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
475   masm->bind(done);
476 }
477 
478 #define __ sasm->
479 
480 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
481   __ prologue("g1_pre_barrier", false);
482 
483   // arg0 : previous value of memory
484 
485   BarrierSet* bs = BarrierSet::barrier_set();
486 
487   const Register pre_val = r0;
488   const Register thread = rthread;
489   const Register tmp = rscratch1;
490 
491   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
492   Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
493   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
494 
495   Label done;
496   Label runtime;
497 
498   // Is marking still active?
499   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
500     __ ldrw(tmp, in_progress);
501   } else {
502     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
503     __ ldrb(tmp, in_progress);
504   }
505   __ cbzw(tmp, done);
506 
507   // Can we store original value in the thread's buffer?
508   __ ldr(tmp, queue_index);
509   __ cbz(tmp, runtime);
510 
511   __ sub(tmp, tmp, wordSize);
512   __ str(tmp, queue_index);
513   __ ldr(rscratch2, buffer);
514   __ add(tmp, tmp, rscratch2);
515   __ load_parameter(0, rscratch2);
516   __ str(rscratch2, Address(tmp, 0));
517   __ b(done);
518 
519   __ bind(runtime);
520   __ push_call_clobbered_registers();
521   __ load_parameter(0, pre_val);
522   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
523   __ pop_call_clobbered_registers();
524   __ bind(done);
525 
526   __ epilogue();
527 }
528 
529 #undef __
530 
531 #endif // COMPILER1