1 /*
2 * Copyright (c) 2018, 2025, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "asm/macroAssembler.inline.hpp"
26 #include "gc/g1/g1BarrierSet.hpp"
27 #include "gc/g1/g1BarrierSetAssembler.hpp"
28 #include "gc/g1/g1BarrierSetRuntime.hpp"
29 #include "gc/g1/g1CardTable.hpp"
30 #include "gc/g1/g1HeapRegion.hpp"
31 #include "gc/g1/g1ThreadLocalData.hpp"
32 #include "gc/shared/collectedHeap.hpp"
33 #include "interpreter/interp_masm.hpp"
34 #include "runtime/javaThread.hpp"
35 #include "runtime/sharedRuntime.hpp"
36 #ifdef COMPILER1
37 #include "c1/c1_LIRAssembler.hpp"
38 #include "c1/c1_MacroAssembler.hpp"
39 #include "gc/g1/c1/g1BarrierSetC1.hpp"
40 #endif // COMPILER1
41 #ifdef COMPILER2
42 #include "gc/g1/c2/g1BarrierSetC2.hpp"
43 #endif // COMPILER2
44
45 #define __ masm->
46
47 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
48 Register addr, Register count, RegSet saved_regs) {
49 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
50 if (!dest_uninitialized) {
51 Label done;
52 Address in_progress(rthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
53
54 // Is marking active?
55 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
56 __ ldrw(rscratch1, in_progress);
57 } else {
58 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
59 __ ldrb(rscratch1, in_progress);
60 }
61 __ cbzw(rscratch1, done);
62
63 __ push(saved_regs, sp);
64 if (count == c_rarg0) {
65 if (addr == c_rarg1) {
66 // exactly backwards!!
67 __ mov(rscratch1, c_rarg0);
68 __ mov(c_rarg0, c_rarg1);
69 __ mov(c_rarg1, rscratch1);
70 } else {
71 __ mov(c_rarg1, count);
72 __ mov(c_rarg0, addr);
73 }
74 } else {
75 __ mov(c_rarg0, addr);
76 __ mov(c_rarg1, count);
77 }
78 if (UseCompressedOops) {
79 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
80 } else {
81 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
82 }
83 __ pop(saved_regs, sp);
84
85 __ bind(done);
86 }
87 }
88
89 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
90 Register start, Register count, Register scratch, RegSet saved_regs) {
91 __ push(saved_regs, sp);
92 assert_different_registers(start, count, scratch);
93 assert_different_registers(c_rarg0, count);
94 __ mov(c_rarg0, start);
95 __ mov(c_rarg1, count);
96 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
97 __ pop(saved_regs, sp);
98 }
99
100 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
101 const Register thread, const Register value, const Register temp1, const Register temp2) {
102 assert_different_registers(value, temp1, temp2);
103 // Can we store a value in the given thread's buffer?
104 // (The index field is typed as size_t.)
105 __ ldr(temp1, Address(thread, in_bytes(index_offset))); // temp1 := *(index address)
106 __ cbz(temp1, runtime); // jump to runtime if index == 0 (full buffer)
107 // The buffer is not full, store value into it.
108 __ sub(temp1, temp1, wordSize); // temp1 := next index
109 __ str(temp1, Address(thread, in_bytes(index_offset))); // *(index address) := next index
110 __ ldr(temp2, Address(thread, in_bytes(buffer_offset))); // temp2 := buffer address
111 __ str(value, Address(temp2, temp1)); // *(buffer address + next index) := value
112 }
113
114 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
115 const Register thread,
116 const Register tmp1) {
117 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
118 // Is marking active?
119 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
120 __ ldrw(tmp1, in_progress);
121 } else {
122 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
123 __ ldrb(tmp1, in_progress);
124 }
125 }
126
127 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
128 const Register obj,
129 const Register pre_val,
130 const Register thread,
131 const Register tmp1,
132 const Register tmp2,
133 Label& done,
134 Label& runtime) {
135 // Do we need to load the previous value?
136 if (obj != noreg) {
137 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
138 }
139 // Is the previous value null?
140 __ cbz(pre_val, done);
141 generate_queue_test_and_insertion(masm,
142 G1ThreadLocalData::satb_mark_queue_index_offset(),
143 G1ThreadLocalData::satb_mark_queue_buffer_offset(),
144 runtime,
145 thread, pre_val, tmp1, tmp2);
146 __ b(done);
147 }
148
149 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
150 Register obj,
151 Register pre_val,
152 Register thread,
153 Register tmp1,
154 Register tmp2,
155 bool tosca_live,
156 bool expand_call) {
157 // If expand_call is true then we expand the call_VM_leaf macro
158 // directly to skip generating the check by
159 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
160
161 assert(thread == rthread, "must be");
162
163 Label done;
164 Label runtime;
165
166 assert_different_registers(obj, pre_val, tmp1, tmp2);
167 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
168
169 generate_pre_barrier_fast_path(masm, thread, tmp1);
170 // If marking is not active (*(mark queue active address) == 0), jump to done
171 __ cbzw(tmp1, done);
172 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
173
174 __ bind(runtime);
175
176 // save the live input values
177 RegSet saved = RegSet::of(pre_val);
178 FloatRegSet fsaved;
179
180 // Barriers might be emitted when converting between (scalarized) calling
181 // conventions for inline types. Save all argument registers before calling
182 // into the runtime.
183
184 // TODO 8366717 This came with 8284161: Implementation of Virtual Threads (Preview) later in May 2022
185 // Check if it's sufficient
186 //__ push_call_clobbered_registers();
187 assert_different_registers(rscratch1, pre_val); // push_CPU_state trashes rscratch1
188 __ push_CPU_state(true);
189
190 // Calling the runtime using the regular call_VM_leaf mechanism generates
191 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
192 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
193 //
194 // If we care generating the pre-barrier without a frame (e.g. in the
195 // intrinsified Reference.get() routine) then rfp might be pointing to
196 // the caller frame and so this check will most likely fail at runtime.
197 //
198 // Expanding the call directly bypasses the generation of the check.
199 // So when we do not have have a full interpreter frame on the stack
200 // expand_call should be passed true.
201
202 if (expand_call) {
203 assert(pre_val != c_rarg1, "smashed arg");
204 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
205 } else {
206 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
207 }
208
209 __ pop_CPU_state(true);
210
211 __ bind(done);
212
213 }
214
215 static void generate_post_barrier_fast_path(MacroAssembler* masm,
216 const Register store_addr,
217 const Register new_val,
218 const Register tmp1,
219 const Register tmp2,
220 Label& done,
221 bool new_val_may_be_null) {
222 // Does store cross heap regions?
223 __ eor(tmp1, store_addr, new_val); // tmp1 := store address ^ new value
224 __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes); // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
225 __ cbz(tmp1, done);
226 // Crosses regions, storing null?
227 if (new_val_may_be_null) {
228 __ cbz(new_val, done);
229 }
230 // Storing region crossing non-null, is card young?
231 __ lsr(tmp1, store_addr, CardTable::card_shift()); // tmp1 := card address relative to card table base
232 __ load_byte_map_base(tmp2); // tmp2 := card table base address
233 __ add(tmp1, tmp1, tmp2); // tmp1 := card address
234 __ ldrb(tmp2, Address(tmp1)); // tmp2 := card
235 __ cmpw(tmp2, (int)G1CardTable::g1_young_card_val()); // tmp2 := card == young_card_val?
236 }
237
238 static void generate_post_barrier_slow_path(MacroAssembler* masm,
239 const Register thread,
240 const Register tmp1,
241 const Register tmp2,
242 Label& done,
243 Label& runtime) {
244 __ membar(Assembler::StoreLoad); // StoreLoad membar
245 __ ldrb(tmp2, Address(tmp1)); // tmp2 := card
246 __ cbzw(tmp2, done);
247 // Storing a region crossing, non-null oop, card is clean.
248 // Dirty card and log.
249 STATIC_ASSERT(CardTable::dirty_card_val() == 0);
250 __ strb(zr, Address(tmp1)); // *(card address) := dirty_card_val
251 generate_queue_test_and_insertion(masm,
252 G1ThreadLocalData::dirty_card_queue_index_offset(),
253 G1ThreadLocalData::dirty_card_queue_buffer_offset(),
254 runtime,
255 thread, tmp1, tmp2, rscratch1);
256 __ b(done);
257 }
258
259 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
260 Register store_addr,
261 Register new_val,
262 Register thread,
263 Register tmp1,
264 Register tmp2) {
265 assert(thread == rthread, "must be");
266 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
267 rscratch1);
268 assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
269 && tmp2 != noreg, "expecting a register");
270
271 Label done;
272 Label runtime;
273
274 generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, done, true /* new_val_may_be_null */);
275 // If card is young, jump to done
276 __ br(Assembler::EQ, done);
277 generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, done, runtime);
278
279 __ bind(runtime);
280
281 // save the live input values
282 RegSet saved = RegSet::of(store_addr);
283 FloatRegSet fsaved;
284
285 // Barriers might be emitted when converting between (scalarized) calling
286 // conventions for inline types. Save all argument registers before calling
287 // into the runtime.
288 // TODO 8366717 Without this, r11 is corrupted below and it holds the array of pre-allocated value objects in the C2I adapter...
289 // Check if__ push_call_clobbered_registers() is sufficient
290 assert_different_registers(rscratch1, tmp1); // push_CPU_state trashes rscratch1
291 __ enter();
292 __ push_CPU_state(true);
293
294 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), tmp1, thread);
295
296 __ pop_CPU_state(true);
297 __ leave();
298
299 __ bind(done);
300 }
301
302 #if defined(COMPILER2)
303
304 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
305 SaveLiveRegisters save_registers(masm, stub);
306 if (c_rarg0 != arg) {
307 __ mov(c_rarg0, arg);
308 }
309 __ mov(c_rarg1, rthread);
310 __ mov(rscratch1, runtime_path);
311 __ blr(rscratch1);
312 }
313
314 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
315 Register obj,
316 Register pre_val,
317 Register thread,
318 Register tmp1,
319 Register tmp2,
320 G1PreBarrierStubC2* stub) {
321 assert(thread == rthread, "must be");
322 assert_different_registers(obj, pre_val, tmp1, tmp2);
323 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
324
325 stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
326
327 generate_pre_barrier_fast_path(masm, thread, tmp1);
328 // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
329 __ cbnzw(tmp1, *stub->entry());
330
331 __ bind(*stub->continuation());
332 }
333
334 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
335 G1PreBarrierStubC2* stub) const {
336 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
337 Label runtime;
338 Register obj = stub->obj();
339 Register pre_val = stub->pre_val();
340 Register thread = stub->thread();
341 Register tmp1 = stub->tmp1();
342 Register tmp2 = stub->tmp2();
343
344 __ bind(*stub->entry());
345 generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
346
347 __ bind(runtime);
348 generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
349 __ b(*stub->continuation());
350 }
351
352 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
353 Register store_addr,
354 Register new_val,
355 Register thread,
356 Register tmp1,
357 Register tmp2,
358 G1PostBarrierStubC2* stub) {
359 assert(thread == rthread, "must be");
360 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
361 rscratch1);
362 assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
363 && tmp2 != noreg, "expecting a register");
364
365 stub->initialize_registers(thread, tmp1, tmp2);
366
367 bool new_val_may_be_null = (stub->barrier_data() & G1C2BarrierPostNotNull) == 0;
368 generate_post_barrier_fast_path(masm, store_addr, new_val, tmp1, tmp2, *stub->continuation(), new_val_may_be_null);
369 // If card is not young, jump to stub (slow path)
370 __ br(Assembler::NE, *stub->entry());
371
372 __ bind(*stub->continuation());
373 }
374
375 void G1BarrierSetAssembler::generate_c2_post_barrier_stub(MacroAssembler* masm,
376 G1PostBarrierStubC2* stub) const {
377 Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
378 Label runtime;
379 Register thread = stub->thread();
380 Register tmp1 = stub->tmp1(); // tmp1 holds the card address.
381 Register tmp2 = stub->tmp2();
382 assert(stub->tmp3() == noreg, "not needed in this platform");
383
384 __ bind(*stub->entry());
385 generate_post_barrier_slow_path(masm, thread, tmp1, tmp2, *stub->continuation(), runtime);
386
387 __ bind(runtime);
388 generate_c2_barrier_runtime_call(masm, stub, tmp1, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry));
389 __ b(*stub->continuation());
390 }
391
392 #endif // COMPILER2
393
394 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
395 Register dst, Address src, Register tmp1, Register tmp2) {
396 bool on_oop = is_reference_type(type);
397 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
398 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
399 bool on_reference = on_weak || on_phantom;
400 ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
401 if (on_oop && on_reference) {
402 // LR is live. It must be saved around calls.
403 __ enter(/*strip_ret_addr*/true); // barrier may call runtime
404 // Generate the G1 pre-barrier code to log the value of
405 // the referent field in an SATB buffer.
406 g1_write_barrier_pre(masm /* masm */,
407 noreg /* obj */,
408 dst /* pre_val */,
409 rthread /* thread */,
410 tmp1 /* tmp1 */,
411 tmp2 /* tmp2 */,
412 true /* tosca_live */,
413 true /* expand_call */);
414 __ leave();
415 }
416 }
417
418 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
419 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
420
421 bool in_heap = (decorators & IN_HEAP) != 0;
422 bool as_normal = (decorators & AS_NORMAL) != 0;
423 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
424
425 bool needs_pre_barrier = as_normal && !dest_uninitialized;
426 bool needs_post_barrier = (val != noreg && in_heap);
427
428 assert_different_registers(val, tmp1, tmp2, tmp3);
429
430 // flatten object address if needed
431 if (dst.index() == noreg && dst.offset() == 0) {
432 if (dst.base() != tmp3) {
433 __ mov(tmp3, dst.base());
434 }
435 } else {
436 __ lea(tmp3, dst);
437 }
438
439 if (needs_pre_barrier) {
440 g1_write_barrier_pre(masm,
441 tmp3 /* obj */,
442 tmp2 /* pre_val */,
443 rthread /* thread */,
444 tmp1 /* tmp1 */,
445 rscratch2 /* tmp2 */,
446 val != noreg /* tosca_live */,
447 false /* expand_call */);
448 }
449
450 if (val == noreg) {
451 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
452 } else {
453 // G1 barrier needs uncompressed oop for region cross check.
454 Register new_val = val;
455 if (needs_post_barrier) {
456 if (UseCompressedOops) {
457 new_val = rscratch2;
458 __ mov(new_val, val);
459 }
460 }
461
462 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
463 if (needs_post_barrier) {
464 g1_write_barrier_post(masm,
465 tmp3 /* store_adr */,
466 new_val /* new_val */,
467 rthread /* thread */,
468 tmp1 /* tmp1 */,
469 tmp2 /* tmp2 */);
470 }
471 }
472
473 }
474
475 #ifdef COMPILER1
476
477 #undef __
478 #define __ ce->masm()->
479
480 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
481 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
482 // At this point we know that marking is in progress.
483 // If do_load() is true then we have to emit the
484 // load of the previous value; otherwise it has already
485 // been loaded into _pre_val.
486
487 __ bind(*stub->entry());
488
489 assert(stub->pre_val()->is_register(), "Precondition.");
490
491 Register pre_val_reg = stub->pre_val()->as_register();
492
493 if (stub->do_load()) {
494 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
495 }
496 __ cbz(pre_val_reg, *stub->continuation());
497 ce->store_parameter(stub->pre_val()->as_register(), 0);
498 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
499 __ b(*stub->continuation());
500 }
501
502 void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
503 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
504 __ bind(*stub->entry());
505 assert(stub->addr()->is_register(), "Precondition.");
506 assert(stub->new_val()->is_register(), "Precondition.");
507 Register new_val_reg = stub->new_val()->as_register();
508 __ cbz(new_val_reg, *stub->continuation());
509 ce->store_parameter(stub->addr()->as_pointer_register(), 0);
510 __ far_call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
511 __ b(*stub->continuation());
512 }
513
514 #undef __
515
516 #define __ sasm->
517
518 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
519 __ prologue("g1_pre_barrier", false);
520
521 // arg0 : previous value of memory
522
523 BarrierSet* bs = BarrierSet::barrier_set();
524
525 const Register pre_val = r0;
526 const Register thread = rthread;
527 const Register tmp = rscratch1;
528
529 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
530 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
531 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
532
533 Label done;
534 Label runtime;
535
536 // Is marking still active?
537 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
538 __ ldrw(tmp, in_progress);
539 } else {
540 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
541 __ ldrb(tmp, in_progress);
542 }
543 __ cbzw(tmp, done);
544
545 // Can we store original value in the thread's buffer?
546 __ ldr(tmp, queue_index);
547 __ cbz(tmp, runtime);
548
549 __ sub(tmp, tmp, wordSize);
550 __ str(tmp, queue_index);
551 __ ldr(rscratch2, buffer);
552 __ add(tmp, tmp, rscratch2);
553 __ load_parameter(0, rscratch2);
554 __ str(rscratch2, Address(tmp, 0));
555 __ b(done);
556
557 __ bind(runtime);
558 __ push_call_clobbered_registers();
559 __ load_parameter(0, pre_val);
560 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
561 __ pop_call_clobbered_registers();
562 __ bind(done);
563
564 __ epilogue();
565 }
566
567 void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
568 __ prologue("g1_post_barrier", false);
569
570 // arg0: store_address
571 Address store_addr(rfp, 2*BytesPerWord);
572
573 BarrierSet* bs = BarrierSet::barrier_set();
574 CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
575 CardTable* ct = ctbs->card_table();
576
577 Label done;
578 Label runtime;
579
580 // At this point we know new_value is non-null and the new_value crosses regions.
581 // Must check to see if card is already dirty
582
583 const Register thread = rthread;
584
585 Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
586 Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
587
588 const Register card_offset = rscratch2;
589 // LR is free here, so we can use it to hold the byte_map_base.
590 const Register byte_map_base = lr;
591
592 assert_different_registers(card_offset, byte_map_base, rscratch1);
593
594 __ load_parameter(0, card_offset);
595 __ lsr(card_offset, card_offset, CardTable::card_shift());
596 __ load_byte_map_base(byte_map_base);
597 __ ldrb(rscratch1, Address(byte_map_base, card_offset));
598 __ cmpw(rscratch1, (int)G1CardTable::g1_young_card_val());
599 __ br(Assembler::EQ, done);
600
601 assert((int)CardTable::dirty_card_val() == 0, "must be 0");
602
603 __ membar(Assembler::StoreLoad);
604 __ ldrb(rscratch1, Address(byte_map_base, card_offset));
605 __ cbzw(rscratch1, done);
606
607 // storing region crossing non-null, card is clean.
608 // dirty card and log.
609 __ strb(zr, Address(byte_map_base, card_offset));
610
611 // Convert card offset into an address in card_addr
612 Register card_addr = card_offset;
613 __ add(card_addr, byte_map_base, card_addr);
614
615 __ ldr(rscratch1, queue_index);
616 __ cbz(rscratch1, runtime);
617 __ sub(rscratch1, rscratch1, wordSize);
618 __ str(rscratch1, queue_index);
619
620 // Reuse LR to hold buffer_addr
621 const Register buffer_addr = lr;
622
623 __ ldr(buffer_addr, buffer);
624 __ str(card_addr, Address(buffer_addr, rscratch1));
625 __ b(done);
626
627 __ bind(runtime);
628 __ push_call_clobbered_registers();
629 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
630 __ pop_call_clobbered_registers();
631 __ bind(done);
632 __ epilogue();
633 }
634
635 #undef __
636
637 #endif // COMPILER1