1 /*
2 * Copyright (c) 2018, 2023, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "gc/g1/g1BarrierSet.hpp"
28 #include "gc/g1/g1BarrierSetAssembler.hpp"
29 #include "gc/g1/g1BarrierSetRuntime.hpp"
30 #include "gc/g1/g1CardTable.hpp"
31 #include "gc/g1/g1ThreadLocalData.hpp"
32 #include "gc/g1/heapRegion.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interp_masm.hpp"
35 #include "runtime/javaThread.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_LIRAssembler.hpp"
39 #include "c1/c1_MacroAssembler.hpp"
40 #include "gc/g1/c1/g1BarrierSetC1.hpp"
41 #endif
42
43 #define __ masm->
44
45 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
46 Register addr, Register count, RegSet saved_regs) {
47 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
48 if (!dest_uninitialized) {
49 Label done;
50 Address in_progress(rthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
51
52 // Is marking active?
53 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
54 __ ldrw(rscratch1, in_progress);
55 } else {
56 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
57 __ ldrb(rscratch1, in_progress);
58 }
59 __ cbzw(rscratch1, done);
60
61 __ push(saved_regs, sp);
62 if (count == c_rarg0) {
63 if (addr == c_rarg1) {
64 // exactly backwards!!
65 __ mov(rscratch1, c_rarg0);
66 __ mov(c_rarg0, c_rarg1);
67 __ mov(c_rarg1, rscratch1);
68 } else {
69 __ mov(c_rarg1, count);
70 __ mov(c_rarg0, addr);
71 }
72 } else {
73 __ mov(c_rarg0, addr);
74 __ mov(c_rarg1, count);
75 }
76 if (UseCompressedOops) {
77 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
78 } else {
79 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
80 }
81 __ pop(saved_regs, sp);
82
83 __ bind(done);
84 }
85 }
86
87 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
88 Register start, Register count, Register scratch, RegSet saved_regs) {
89 __ push(saved_regs, sp);
90 assert_different_registers(start, count, scratch);
91 assert_different_registers(c_rarg0, count);
92 __ mov(c_rarg0, start);
93 __ mov(c_rarg1, count);
94 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_post_entry), 2);
95 __ pop(saved_regs, sp);
96 }
97
98 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
99 Register obj,
100 Register pre_val,
101 Register thread,
102 Register tmp1,
103 Register tmp2,
104 bool tosca_live,
105 bool expand_call) {
106 // If expand_call is true then we expand the call_VM_leaf macro
107 // directly to skip generating the check by
108 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
109
110 assert(thread == rthread, "must be");
111
112 Label done;
113 Label runtime;
114
115 assert_different_registers(obj, pre_val, tmp1, tmp2);
116 assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
117
118 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
119 Address index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
120 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
121
122 // Is marking active?
123 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
124 __ ldrw(tmp1, in_progress);
125 } else {
126 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
127 __ ldrb(tmp1, in_progress);
128 }
129 __ cbzw(tmp1, done);
130
131 // Do we need to load the previous value?
132 if (obj != noreg) {
133 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
134 }
135
136 // Is the previous value null?
137 __ cbz(pre_val, done);
138
139 // Can we store original value in the thread's buffer?
140 // Is index == 0?
141 // (The index field is typed as size_t.)
142
143 __ ldr(tmp1, index); // tmp := *index_adr
144 __ cbz(tmp1, runtime); // tmp == 0?
145 // If yes, goto runtime
146
147 __ sub(tmp1, tmp1, wordSize); // tmp := tmp - wordSize
148 __ str(tmp1, index); // *index_adr := tmp
149 __ ldr(tmp2, buffer);
150 __ add(tmp1, tmp1, tmp2); // tmp := tmp + *buffer_adr
151
152 // Record the previous value
153 __ str(pre_val, Address(tmp1, 0));
154 __ b(done);
155
156 __ bind(runtime);
157
158 // save the live input values
159 RegSet saved = RegSet::of(pre_val);
160 FloatRegSet fsaved;
161
162 // Barriers might be emitted when converting between (scalarized) calling
163 // conventions for inline types. Save all argument registers before calling
164 // into the runtime.
165 if (EnableValhalla && InlineTypePassFieldsAsArgs) {
166 if (tosca_live) saved += RegSet::of(r0);
167 if (obj != noreg) saved += RegSet::of(obj);
168 saved += RegSet::of(j_rarg0, j_rarg1, j_rarg2, j_rarg3);
169 saved += RegSet::of(j_rarg4, j_rarg5, j_rarg6, j_rarg7);
170
171 fsaved += FloatRegSet::of(j_farg0, j_farg1, j_farg2, j_farg3);
172 fsaved += FloatRegSet::of(j_farg4, j_farg5, j_farg6, j_farg7);
173
174 __ push(saved, sp);
175 __ push_fp(fsaved, sp);
176 } else {
177 __ push_call_clobbered_registers();
178 }
179
180 // Calling the runtime using the regular call_VM_leaf mechanism generates
181 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
182 // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
183 //
184 // If we care generating the pre-barrier without a frame (e.g. in the
185 // intrinsified Reference.get() routine) then rfp might be pointing to
186 // the caller frame and so this check will most likely fail at runtime.
187 //
188 // Expanding the call directly bypasses the generation of the check.
189 // So when we do not have have a full interpreter frame on the stack
190 // expand_call should be passed true.
191
192 if (expand_call) {
193 assert(pre_val != c_rarg1, "smashed arg");
194 __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
195 } else {
196 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
197 }
198
199 if (EnableValhalla && InlineTypePassFieldsAsArgs) {
200 __ pop_fp(fsaved, sp);
201 __ pop(saved, sp);
202 } else {
203 __ pop_call_clobbered_registers();
204 }
205
206 __ bind(done);
207
208 }
209
210 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
211 Register store_addr,
212 Register new_val,
213 Register thread,
214 Register tmp1,
215 Register tmp2) {
216 assert(thread == rthread, "must be");
217 assert_different_registers(store_addr, new_val, thread, tmp1, tmp2,
218 rscratch1);
219 assert(store_addr != noreg && new_val != noreg && tmp1 != noreg
220 && tmp2 != noreg, "expecting a register");
221
222 Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
223 Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
224
225 BarrierSet* bs = BarrierSet::barrier_set();
226 CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
227 CardTable* ct = ctbs->card_table();
228
229 Label done;
230 Label runtime;
231
232 // Does store cross heap regions?
233
234 __ eor(tmp1, store_addr, new_val);
235 __ lsr(tmp1, tmp1, HeapRegion::LogOfHRGrainBytes);
236 __ cbz(tmp1, done);
237
238 // crosses regions, storing null?
239
240 __ cbz(new_val, done);
241
242 // storing region crossing non-null, is card already dirty?
243
244 assert_different_registers(store_addr, thread, tmp1, tmp2, rscratch1);
245
246 const Register card_addr = tmp1;
247
248 __ lsr(card_addr, store_addr, CardTable::card_shift());
249
250 // get the address of the card
251 __ load_byte_map_base(tmp2);
252 __ add(card_addr, card_addr, tmp2);
253 __ ldrb(tmp2, Address(card_addr));
254 __ cmpw(tmp2, (int)G1CardTable::g1_young_card_val());
255 __ br(Assembler::EQ, done);
256
257 assert((int)CardTable::dirty_card_val() == 0, "must be 0");
258
259 __ membar(Assembler::StoreLoad);
260
261 __ ldrb(tmp2, Address(card_addr));
262 __ cbzw(tmp2, done);
263
264 // storing a region crossing, non-null oop, card is clean.
265 // dirty card and log.
266
267 __ strb(zr, Address(card_addr));
268
269 __ ldr(rscratch1, queue_index);
270 __ cbz(rscratch1, runtime);
271 __ sub(rscratch1, rscratch1, wordSize);
272 __ str(rscratch1, queue_index);
273
274 __ ldr(tmp2, buffer);
275 __ str(card_addr, Address(tmp2, rscratch1));
276 __ b(done);
277
278 __ bind(runtime);
279
280 // save the live input values
281 RegSet saved = RegSet::of(store_addr);
282 FloatRegSet fsaved;
283
284 // Barriers might be emitted when converting between (scalarized) calling
285 // conventions for inline types. Save all argument registers before calling
286 // into the runtime.
287 if (EnableValhalla && InlineTypePassFieldsAsArgs) {
288 saved += RegSet::of(j_rarg0, j_rarg1, j_rarg2, j_rarg3);
289 saved += RegSet::of(j_rarg4, j_rarg5, j_rarg6, j_rarg7);
290
291 fsaved += FloatRegSet::of(j_farg0, j_farg1, j_farg2, j_farg3);
292 fsaved += FloatRegSet::of(j_farg4, j_farg5, j_farg6, j_farg7);
293 }
294
295 __ push(saved, sp);
296 __ push_fp(fsaved, sp);
297 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
298 __ pop_fp(fsaved, sp);
299 __ pop(saved, sp);
300
301 __ bind(done);
302 }
303
304 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
305 Register dst, Address src, Register tmp1, Register tmp2) {
306 bool on_oop = is_reference_type(type);
307 bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
308 bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
309 bool on_reference = on_weak || on_phantom;
310 ModRefBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
311 if (on_oop && on_reference) {
312 // LR is live. It must be saved around calls.
313 __ enter(/*strip_ret_addr*/true); // barrier may call runtime
314 // Generate the G1 pre-barrier code to log the value of
315 // the referent field in an SATB buffer.
316 g1_write_barrier_pre(masm /* masm */,
317 noreg /* obj */,
318 dst /* pre_val */,
319 rthread /* thread */,
320 tmp1 /* tmp1 */,
321 tmp2 /* tmp2 */,
322 true /* tosca_live */,
323 true /* expand_call */);
324 __ leave();
325 }
326 }
327
328 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
329 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
330
331 bool in_heap = (decorators & IN_HEAP) != 0;
332 bool as_normal = (decorators & AS_NORMAL) != 0;
333 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
334
335 bool needs_pre_barrier = as_normal && !dest_uninitialized;
336 bool needs_post_barrier = (val != noreg && in_heap);
337
338 assert_different_registers(val, tmp1, tmp2, tmp3);
339
340 // flatten object address if needed
341 if (dst.index() == noreg && dst.offset() == 0) {
342 if (dst.base() != tmp3) {
343 __ mov(tmp3, dst.base());
344 }
345 } else {
346 __ lea(tmp3, dst);
347 }
348
349 if (needs_pre_barrier) {
350 g1_write_barrier_pre(masm,
351 tmp3 /* obj */,
352 tmp2 /* pre_val */,
353 rthread /* thread */,
354 tmp1 /* tmp1 */,
355 rscratch2 /* tmp2 */,
356 val != noreg /* tosca_live */,
357 false /* expand_call */);
358 }
359
360 if (val == noreg) {
361 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
362 } else {
363 // G1 barrier needs uncompressed oop for region cross check.
364 Register new_val = val;
365 if (needs_post_barrier) {
366 if (UseCompressedOops) {
367 new_val = rscratch2;
368 __ mov(new_val, val);
369 }
370 }
371
372 BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
373 if (needs_post_barrier) {
374 g1_write_barrier_post(masm,
375 tmp3 /* store_adr */,
376 new_val /* new_val */,
377 rthread /* thread */,
378 tmp1 /* tmp1 */,
379 tmp2 /* tmp2 */);
380 }
381 }
382
383 }
384
385 #ifdef COMPILER1
386
387 #undef __
388 #define __ ce->masm()->
389
390 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
391 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
392 // At this point we know that marking is in progress.
393 // If do_load() is true then we have to emit the
394 // load of the previous value; otherwise it has already
395 // been loaded into _pre_val.
396
397 __ bind(*stub->entry());
398
399 assert(stub->pre_val()->is_register(), "Precondition.");
400
401 Register pre_val_reg = stub->pre_val()->as_register();
402
403 if (stub->do_load()) {
404 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
405 }
406 __ cbz(pre_val_reg, *stub->continuation());
407 ce->store_parameter(stub->pre_val()->as_register(), 0);
408 __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
409 __ b(*stub->continuation());
410 }
411
412 void G1BarrierSetAssembler::gen_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub) {
413 G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
414 __ bind(*stub->entry());
415 assert(stub->addr()->is_register(), "Precondition.");
416 assert(stub->new_val()->is_register(), "Precondition.");
417 Register new_val_reg = stub->new_val()->as_register();
418 __ cbz(new_val_reg, *stub->continuation());
419 ce->store_parameter(stub->addr()->as_pointer_register(), 0);
420 __ far_call(RuntimeAddress(bs->post_barrier_c1_runtime_code_blob()->code_begin()));
421 __ b(*stub->continuation());
422 }
423
424 #undef __
425
426 #define __ sasm->
427
428 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
429 __ prologue("g1_pre_barrier", false);
430
431 // arg0 : previous value of memory
432
433 BarrierSet* bs = BarrierSet::barrier_set();
434
435 const Register pre_val = r0;
436 const Register thread = rthread;
437 const Register tmp = rscratch1;
438
439 Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
440 Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
441 Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
442
443 Label done;
444 Label runtime;
445
446 // Is marking still active?
447 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
448 __ ldrw(tmp, in_progress);
449 } else {
450 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
451 __ ldrb(tmp, in_progress);
452 }
453 __ cbzw(tmp, done);
454
455 // Can we store original value in the thread's buffer?
456 __ ldr(tmp, queue_index);
457 __ cbz(tmp, runtime);
458
459 __ sub(tmp, tmp, wordSize);
460 __ str(tmp, queue_index);
461 __ ldr(rscratch2, buffer);
462 __ add(tmp, tmp, rscratch2);
463 __ load_parameter(0, rscratch2);
464 __ str(rscratch2, Address(tmp, 0));
465 __ b(done);
466
467 __ bind(runtime);
468 __ push_call_clobbered_registers();
469 __ load_parameter(0, pre_val);
470 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
471 __ pop_call_clobbered_registers();
472 __ bind(done);
473
474 __ epilogue();
475 }
476
477 void G1BarrierSetAssembler::generate_c1_post_barrier_runtime_stub(StubAssembler* sasm) {
478 __ prologue("g1_post_barrier", false);
479
480 // arg0: store_address
481 Address store_addr(rfp, 2*BytesPerWord);
482
483 BarrierSet* bs = BarrierSet::barrier_set();
484 CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(bs);
485 CardTable* ct = ctbs->card_table();
486
487 Label done;
488 Label runtime;
489
490 // At this point we know new_value is non-null and the new_value crosses regions.
491 // Must check to see if card is already dirty
492
493 const Register thread = rthread;
494
495 Address queue_index(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_index_offset()));
496 Address buffer(thread, in_bytes(G1ThreadLocalData::dirty_card_queue_buffer_offset()));
497
498 const Register card_offset = rscratch2;
499 // LR is free here, so we can use it to hold the byte_map_base.
500 const Register byte_map_base = lr;
501
502 assert_different_registers(card_offset, byte_map_base, rscratch1);
503
504 __ load_parameter(0, card_offset);
505 __ lsr(card_offset, card_offset, CardTable::card_shift());
506 __ load_byte_map_base(byte_map_base);
507 __ ldrb(rscratch1, Address(byte_map_base, card_offset));
508 __ cmpw(rscratch1, (int)G1CardTable::g1_young_card_val());
509 __ br(Assembler::EQ, done);
510
511 assert((int)CardTable::dirty_card_val() == 0, "must be 0");
512
513 __ membar(Assembler::StoreLoad);
514 __ ldrb(rscratch1, Address(byte_map_base, card_offset));
515 __ cbzw(rscratch1, done);
516
517 // storing region crossing non-null, card is clean.
518 // dirty card and log.
519 __ strb(zr, Address(byte_map_base, card_offset));
520
521 // Convert card offset into an address in card_addr
522 Register card_addr = card_offset;
523 __ add(card_addr, byte_map_base, card_addr);
524
525 __ ldr(rscratch1, queue_index);
526 __ cbz(rscratch1, runtime);
527 __ sub(rscratch1, rscratch1, wordSize);
528 __ str(rscratch1, queue_index);
529
530 // Reuse LR to hold buffer_addr
531 const Register buffer_addr = lr;
532
533 __ ldr(buffer_addr, buffer);
534 __ str(card_addr, Address(buffer_addr, rscratch1));
535 __ b(done);
536
537 __ bind(runtime);
538 __ push_call_clobbered_registers();
539 __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
540 __ pop_call_clobbered_registers();
541 __ bind(done);
542 __ epilogue();
543 }
544
545 #undef __
546
547 #endif // COMPILER1