1 /*
  2  * Copyright (c) 2018, 2026, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "asm/macroAssembler.inline.hpp"
 26 #include "code/aotCodeCache.hpp"
 27 #include "gc/g1/g1BarrierSet.hpp"
 28 #include "gc/g1/g1BarrierSetAssembler.hpp"
 29 #include "gc/g1/g1BarrierSetRuntime.hpp"
 30 #include "gc/g1/g1CardTable.hpp"
 31 #include "gc/g1/g1HeapRegion.hpp"
 32 #include "gc/g1/g1ThreadLocalData.hpp"
 33 #include "gc/shared/collectedHeap.hpp"
 34 #include "interpreter/interp_masm.hpp"
 35 #include "runtime/javaThread.hpp"
 36 #include "runtime/sharedRuntime.hpp"
 37 #ifdef COMPILER1
 38 #include "c1/c1_LIRAssembler.hpp"
 39 #include "c1/c1_MacroAssembler.hpp"
 40 #include "gc/g1/c1/g1BarrierSetC1.hpp"
 41 #endif // COMPILER1
 42 #ifdef COMPILER2
 43 #include "gc/g1/c2/g1BarrierSetC2.hpp"
 44 #endif // COMPILER2
 45 
 46 #define __ masm->
 47 
 48 void G1BarrierSetAssembler::gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
 49                                                             Register addr, Register count, RegSet saved_regs) {
 50   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
 51   if (!dest_uninitialized) {
 52     Label done;
 53     Address in_progress(rthread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
 54 
 55     // Is marking active?
 56     if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
 57       __ ldrw(rscratch1, in_progress);
 58     } else {
 59       assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
 60       __ ldrb(rscratch1, in_progress);
 61     }
 62     __ cbzw(rscratch1, done);
 63 
 64     __ push(saved_regs, sp);
 65     if (count == c_rarg0) {
 66       if (addr == c_rarg1) {
 67         // exactly backwards!!
 68         __ mov(rscratch1, c_rarg0);
 69         __ mov(c_rarg0, c_rarg1);
 70         __ mov(c_rarg1, rscratch1);
 71       } else {
 72         __ mov(c_rarg1, count);
 73         __ mov(c_rarg0, addr);
 74       }
 75     } else {
 76       __ mov(c_rarg0, addr);
 77       __ mov(c_rarg1, count);
 78     }
 79     if (UseCompressedOops) {
 80       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 81     } else {
 82       __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_array_pre_oop_entry), 2);
 83     }
 84     __ pop(saved_regs, sp);
 85 
 86     __ bind(done);
 87   }
 88 }
 89 
 90 void G1BarrierSetAssembler::gen_write_ref_array_post_barrier(MacroAssembler* masm,
 91                                                              DecoratorSet decorators,
 92                                                              Register start,
 93                                                              Register count,
 94                                                              Register scratch) {
 95 
 96   Label done;
 97   Label loop;
 98   Label next;
 99 
100   __ cbz(count, done);
101 
102   // Calculate the number of card marks to set. Since the object might start and
103   // end within a card, we need to calculate this via the card table indexes of
104   // the actual start and last addresses covered by the object.
105   // Temporarily use the count register for the last element address.
106   __ lea(count, Address(start, count, Address::lsl(LogBytesPerHeapOop))); // end = start + count << LogBytesPerHeapOop
107   __ sub(count, count, BytesPerHeapOop);                                  // Use last element address for end.
108 
109   __ lsr(start, start, CardTable::card_shift());
110   __ lsr(count, count, CardTable::card_shift());
111   __ sub(count, count, start);                                            // Number of bytes to mark - 1.
112 
113   // Add card table base offset to start.
114   __ ldr(scratch, Address(rthread, in_bytes(G1ThreadLocalData::card_table_base_offset())));
115   __ add(start, start, scratch);
116 
117   __ bind(loop);
118   if (UseCondCardMark) {
119     __ ldrb(scratch, Address(start, count));
120     // Instead of loading clean_card_val and comparing, we exploit the fact that
121     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
122     __ tbz(scratch, 0, next);
123   }
124   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
125   __ strb(zr, Address(start, count));
126   __ bind(next);
127   __ subs(count, count, 1);
128   __ br(Assembler::GE, loop);
129 
130   __ bind(done);
131 }
132 
133 static void generate_queue_test_and_insertion(MacroAssembler* masm, ByteSize index_offset, ByteSize buffer_offset, Label& runtime,
134                                               const Register thread, const Register value, const Register temp1, const Register temp2) {
135   assert_different_registers(value, temp1, temp2);
136   // Can we store a value in the given thread's buffer?
137   // (The index field is typed as size_t.)
138   __ ldr(temp1, Address(thread, in_bytes(index_offset)));   // temp1 := *(index address)
139   __ cbz(temp1, runtime);                                   // jump to runtime if index == 0 (full buffer)
140   // The buffer is not full, store value into it.
141   __ sub(temp1, temp1, wordSize);                           // temp1 := next index
142   __ str(temp1, Address(thread, in_bytes(index_offset)));   // *(index address) := next index
143   __ ldr(temp2, Address(thread, in_bytes(buffer_offset)));  // temp2 := buffer address
144   __ str(value, Address(temp2, temp1));                     // *(buffer address + next index) := value
145 }
146 
147 static void generate_pre_barrier_fast_path(MacroAssembler* masm,
148                                            const Register thread,
149                                            const Register tmp1) {
150   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
151   // Is marking active?
152   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
153     __ ldrw(tmp1, in_progress);
154   } else {
155     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
156     __ ldrb(tmp1, in_progress);
157   }
158 }
159 
160 static void generate_pre_barrier_slow_path(MacroAssembler* masm,
161                                            const Register obj,
162                                            const Register pre_val,
163                                            const Register thread,
164                                            const Register tmp1,
165                                            const Register tmp2,
166                                            Label& done,
167                                            Label& runtime) {
168   // Do we need to load the previous value?
169   if (obj != noreg) {
170     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
171   }
172   // Is the previous value null?
173   __ cbz(pre_val, done);
174   generate_queue_test_and_insertion(masm,
175                                     G1ThreadLocalData::satb_mark_queue_index_offset(),
176                                     G1ThreadLocalData::satb_mark_queue_buffer_offset(),
177                                     runtime,
178                                     thread, pre_val, tmp1, tmp2);
179   __ b(done);
180 }
181 
182 void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
183                                                  Register obj,
184                                                  Register pre_val,
185                                                  Register thread,
186                                                  Register tmp1,
187                                                  Register tmp2,
188                                                  bool tosca_live,
189                                                  bool expand_call) {
190   // If expand_call is true then we expand the call_VM_leaf macro
191   // directly to skip generating the check by
192   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
193 
194   assert(thread == rthread, "must be");
195 
196   Label done;
197   Label runtime;
198 
199   assert_different_registers(obj, pre_val, tmp1, tmp2);
200   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
201 
202   generate_pre_barrier_fast_path(masm, thread, tmp1);
203   // If marking is not active (*(mark queue active address) == 0), jump to done
204   __ cbzw(tmp1, done);
205   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, done, runtime);
206 
207   __ bind(runtime);
208 
209   assert_different_registers(rscratch1, pre_val); // push_call_clobbered_registers trashes rscratch1
210   __ push_call_clobbered_registers();
211 
212   // Calling the runtime using the regular call_VM_leaf mechanism generates
213   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
214   // that checks that the *(rfp+frame::interpreter_frame_last_sp) == nullptr.
215   //
216   // If we care generating the pre-barrier without a frame (e.g. in the
217   // intrinsified Reference.get() routine) then rfp might be pointing to
218   // the caller frame and so this check will most likely fail at runtime.
219   //
220   // Expanding the call directly bypasses the generation of the check.
221   // So when we do not have have a full interpreter frame on the stack
222   // expand_call should be passed true.
223 
224   if (expand_call) {
225     assert(pre_val != c_rarg1, "smashed arg");
226     __ super_call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
227   } else {
228     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
229   }
230 
231   __ pop_call_clobbered_registers();
232 
233   __ bind(done);
234 
235 }
236 
237 static void generate_post_barrier(MacroAssembler* masm,
238                                   const Register store_addr,
239                                   const Register new_val,
240                                   const Register thread,
241                                   const Register tmp1,
242                                   const Register tmp2,
243                                   Label& done,
244                                   bool new_val_may_be_null) {
245   assert(thread == rthread, "must be");
246   assert_different_registers(store_addr, new_val, thread, tmp1, tmp2, noreg, rscratch1);
247 
248   // Does store cross heap regions?
249  #if INCLUDE_CDS
250   // AOT code needs to load the barrier grain shift from the aot
251   // runtime constants area in the code cache otherwise we can compile
252   // it as an immediate operand
253   if (AOTCodeCache::is_on_for_dump()) {
254     address grain_shift_address = (address)AOTRuntimeConstants::grain_shift_address();
255     __ eor(tmp1, store_addr, new_val);
256     __ lea(tmp2, ExternalAddress(grain_shift_address));
257     __ ldrb(tmp2, tmp2);
258     __ lsrv(tmp1, tmp1, tmp2);
259     __ cbz(tmp1, done);
260   } else
261 #endif
262   {
263     __ eor(tmp1, store_addr, new_val);                     // tmp1 := store address ^ new value
264     __ lsr(tmp1, tmp1, G1HeapRegion::LogOfHRGrainBytes);   // tmp1 := ((store address ^ new value) >> LogOfHRGrainBytes)
265     __ cbz(tmp1, done);
266   }
267 
268   // Crosses regions, storing null?
269   if (new_val_may_be_null) {
270     __ cbz(new_val, done);
271   }
272   // Storing region crossing non-null.
273   __ lsr(tmp1, store_addr, CardTable::card_shift());     // tmp1 := card address relative to card table base
274 
275   Address card_table_addr(thread, in_bytes(G1ThreadLocalData::card_table_base_offset()));
276   __ ldr(tmp2, card_table_addr);                         // tmp2 := card table base address
277   if (UseCondCardMark) {
278     __ ldrb(rscratch1, Address(tmp1, tmp2));             // rscratch1 := card
279     // Instead of loading clean_card_val and comparing, we exploit the fact that
280     // the LSB of non-clean cards is always 0, and the LSB of clean cards 1.
281     __ tbz(rscratch1, 0, done);
282   }
283   static_assert(G1CardTable::dirty_card_val() == 0, "must be to use zr");
284   __ strb(zr, Address(tmp1, tmp2));                      // *(card address) := dirty_card_val
285 }
286 
287 void G1BarrierSetAssembler::g1_write_barrier_post(MacroAssembler* masm,
288                                                   Register store_addr,
289                                                   Register new_val,
290                                                   Register thread,
291                                                   Register tmp1,
292                                                   Register tmp2) {
293   Label done;
294   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, false /* new_val_may_be_null */);
295   __ bind(done);
296 }
297 
298 #if defined(COMPILER2)
299 
300 static void generate_c2_barrier_runtime_call(MacroAssembler* masm, G1BarrierStubC2* stub, const Register arg, const address runtime_path) {
301   SaveLiveRegisters save_registers(masm, stub);
302   if (c_rarg0 != arg) {
303     __ mov(c_rarg0, arg);
304   }
305   __ mov(c_rarg1, rthread);
306   __ mov(rscratch1, runtime_path);
307   __ blr(rscratch1);
308 }
309 
310 void G1BarrierSetAssembler::g1_write_barrier_pre_c2(MacroAssembler* masm,
311                                                     Register obj,
312                                                     Register pre_val,
313                                                     Register thread,
314                                                     Register tmp1,
315                                                     Register tmp2,
316                                                     G1PreBarrierStubC2* stub) {
317   assert(thread == rthread, "must be");
318   assert_different_registers(obj, pre_val, tmp1, tmp2);
319   assert(pre_val != noreg && tmp1 != noreg && tmp2 != noreg, "expecting a register");
320 
321   stub->initialize_registers(obj, pre_val, thread, tmp1, tmp2);
322 
323   generate_pre_barrier_fast_path(masm, thread, tmp1);
324   // If marking is active (*(mark queue active address) != 0), jump to stub (slow path)
325   __ cbnzw(tmp1, *stub->entry());
326 
327   __ bind(*stub->continuation());
328 }
329 
330 void G1BarrierSetAssembler::generate_c2_pre_barrier_stub(MacroAssembler* masm,
331                                                          G1PreBarrierStubC2* stub) const {
332   Assembler::InlineSkippedInstructionsCounter skip_counter(masm);
333   Label runtime;
334   Register obj = stub->obj();
335   Register pre_val = stub->pre_val();
336   Register thread = stub->thread();
337   Register tmp1 = stub->tmp1();
338   Register tmp2 = stub->tmp2();
339 
340   __ bind(*stub->entry());
341   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp1, tmp2, *stub->continuation(), runtime);
342 
343   __ bind(runtime);
344   generate_c2_barrier_runtime_call(masm, stub, pre_val, CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry));
345   __ b(*stub->continuation());
346 }
347 
348 void G1BarrierSetAssembler::g1_write_barrier_post_c2(MacroAssembler* masm,
349                                                      Register store_addr,
350                                                      Register new_val,
351                                                      Register thread,
352                                                      Register tmp1,
353                                                      Register tmp2,
354                                                      bool new_val_may_be_null) {
355   Label done;
356   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, new_val_may_be_null);
357   __ bind(done);
358 }
359 
360 #endif // COMPILER2
361 
362 void G1BarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
363                                     Register dst, Address src, Register tmp1, Register tmp2) {
364   bool on_oop = is_reference_type(type);
365   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
366   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
367   bool on_reference = on_weak || on_phantom;
368   CardTableBarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp2);
369   if (on_oop && on_reference) {
370     // LR is live.  It must be saved around calls.
371     __ enter(/*strip_ret_addr*/true); // barrier may call runtime
372     // Generate the G1 pre-barrier code to log the value of
373     // the referent field in an SATB buffer.
374     g1_write_barrier_pre(masm /* masm */,
375                          noreg /* obj */,
376                          dst /* pre_val */,
377                          rthread /* thread */,
378                          tmp1 /* tmp1 */,
379                          tmp2 /* tmp2 */,
380                          true /* tosca_live */,
381                          true /* expand_call */);
382     __ leave();
383   }
384 }
385 
386 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
387                                          Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
388 
389   bool in_heap = (decorators & IN_HEAP) != 0;
390   bool as_normal = (decorators & AS_NORMAL) != 0;
391   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
392 
393   bool needs_pre_barrier = as_normal && !dest_uninitialized;
394   bool needs_post_barrier = (val != noreg && in_heap);
395 
396   assert_different_registers(val, tmp1, tmp2, tmp3);
397 
398   // flatten object address if needed
399   if (dst.index() == noreg && dst.offset() == 0) {
400     if (dst.base() != tmp3) {
401       __ mov(tmp3, dst.base());
402     }
403   } else {
404     __ lea(tmp3, dst);
405   }
406 
407   if (needs_pre_barrier) {
408     g1_write_barrier_pre(masm,
409                          tmp3 /* obj */,
410                          tmp2 /* pre_val */,
411                          rthread /* thread */,
412                          tmp1  /* tmp1 */,
413                          rscratch2  /* tmp2 */,
414                          val != noreg /* tosca_live */,
415                          false /* expand_call */);
416   }
417 
418   if (val == noreg) {
419     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg);
420   } else {
421     // G1 barrier needs uncompressed oop for region cross check.
422     Register new_val = val;
423     if (needs_post_barrier) {
424       if (UseCompressedOops) {
425         new_val = rscratch2;
426         __ mov(new_val, val);
427       }
428     }
429 
430     BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg);
431     if (needs_post_barrier) {
432       g1_write_barrier_post(masm,
433                             tmp3 /* store_adr */,
434                             new_val /* new_val */,
435                             rthread /* thread */,
436                             tmp1 /* tmp1 */,
437                             tmp2 /* tmp2 */);
438     }
439   }
440 
441 }
442 
443 #ifdef COMPILER1
444 
445 #undef __
446 #define __ ce->masm()->
447 
448 void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub) {
449   G1BarrierSetC1* bs = (G1BarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
450   // At this point we know that marking is in progress.
451   // If do_load() is true then we have to emit the
452   // load of the previous value; otherwise it has already
453   // been loaded into _pre_val.
454 
455   __ bind(*stub->entry());
456 
457   assert(stub->pre_val()->is_register(), "Precondition.");
458 
459   Register pre_val_reg = stub->pre_val()->as_register();
460 
461   if (stub->do_load()) {
462     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
463   }
464   __ cbz(pre_val_reg, *stub->continuation());
465   ce->store_parameter(stub->pre_val()->as_register(), 0);
466   __ far_call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
467   __ b(*stub->continuation());
468 }
469 
470 #undef __
471 
472 void G1BarrierSetAssembler::g1_write_barrier_post_c1(MacroAssembler* masm,
473                                                      Register store_addr,
474                                                      Register new_val,
475                                                      Register thread,
476                                                      Register tmp1,
477                                                      Register tmp2) {
478   Label done;
479   generate_post_barrier(masm, store_addr, new_val, thread, tmp1, tmp2, done, true /* new_val_may_be_null */);
480   masm->bind(done);
481 }
482 
483 #define __ sasm->
484 
485 void G1BarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
486   __ prologue("g1_pre_barrier", false);
487 
488   // arg0 : previous value of memory
489 
490   BarrierSet* bs = BarrierSet::barrier_set();
491 
492   const Register pre_val = r0;
493   const Register thread = rthread;
494   const Register tmp = rscratch1;
495 
496   Address in_progress(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()));
497   Address queue_index(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_index_offset()));
498   Address buffer(thread, in_bytes(G1ThreadLocalData::satb_mark_queue_buffer_offset()));
499 
500   Label done;
501   Label runtime;
502 
503   // Is marking still active?
504   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
505     __ ldrw(tmp, in_progress);
506   } else {
507     assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
508     __ ldrb(tmp, in_progress);
509   }
510   __ cbzw(tmp, done);
511 
512   // Can we store original value in the thread's buffer?
513   __ ldr(tmp, queue_index);
514   __ cbz(tmp, runtime);
515 
516   __ sub(tmp, tmp, wordSize);
517   __ str(tmp, queue_index);
518   __ ldr(rscratch2, buffer);
519   __ add(tmp, tmp, rscratch2);
520   __ load_parameter(0, rscratch2);
521   __ str(rscratch2, Address(tmp, 0));
522   __ b(done);
523 
524   __ bind(runtime);
525   __ push_call_clobbered_registers();
526   __ load_parameter(0, pre_val);
527   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
528   __ pop_call_clobbered_registers();
529   __ bind(done);
530 
531   __ epilogue();
532 }
533 
534 #undef __
535 
536 #endif // COMPILER1