1 /*
 2  * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
 3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 4  *
 5  * This code is free software; you can redistribute it and/or modify it
 6  * under the terms of the GNU General Public License version 2 only, as
 7  * published by the Free Software Foundation.
 8  *
 9  * This code is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * version 2 for more details (a copy is included in the LICENSE file that
13  * accompanied this code).
14  *
15  * You should have received a copy of the GNU General Public License version
16  * 2 along with this work; if not, write to the Free Software Foundation,
17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20  * or visit www.oracle.com if you need additional information or have any
21  * questions.
22  *
23  */
24 
25 #ifndef CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP
26 #define CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP
27 
28 #include "asm/macroAssembler.hpp"
29 #include "gc/shared/barrierSetAssembler.hpp"
30 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
31 #ifdef COMPILER1
32 class LIR_Assembler;
33 class ShenandoahPreBarrierStub;
34 class ShenandoahLoadReferenceBarrierStub;
35 class StubAssembler;
36 #endif
37 class StubCodeGenerator;
38 
39 class ShenandoahBarrierSetAssembler: public BarrierSetAssembler {
40 private:
41 
42   void satb_write_barrier_pre(MacroAssembler* masm,
43                               Register obj,
44                               Register pre_val,
45                               Register thread,
46                               Register tmp,
47                               bool tosca_live,
48                               bool expand_call);
49   void shenandoah_write_barrier_pre(MacroAssembler* masm,
50                                     Register obj,
51                                     Register pre_val,
52                                     Register thread,
53                                     Register tmp,
54                                     bool tosca_live,
55                                     bool expand_call);
56 
57   void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg);
58   void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg);
59   void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators);
60 
61 public:
62 
63   void iu_barrier(MacroAssembler* masm, Register dst, Register tmp);
64 
65 #ifdef COMPILER1
66   void gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub);
67   void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub);
68   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
69   void generate_c1_load_reference_barrier_runtime_stub(StubAssembler* sasm, DecoratorSet decorators);
70 #endif
71 
72   virtual void arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, bool is_oop,
73                                   Register src, Register dst, Register count, RegSet saved_regs);
74   virtual void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
75                        Register dst, Address src, Register tmp1, Register tmp_thread);
76   virtual void store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
77                         Address dst, Register val, Register tmp1, Register tmp2);
78   virtual void try_resolve_jobject_in_native(MacroAssembler* masm, Register jni_env,
79                                              Register obj, Register tmp, Label& slowpath);
80   void cmpxchg_oop(MacroAssembler* masm, Register addr, Register expected, Register new_val,
81                    bool acquire, bool release, bool is_cae, Register result);
82 };
83 
84 #endif // CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP