1 /*
2 * Copyright (c) 2003, 2023, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "precompiled.hpp"
28 #include "asm/macroAssembler.hpp"
29 #include "asm/macroAssembler.inline.hpp"
30 #include "code/codeCache.hpp"
31 #include "code/compiledIC.hpp"
32 #include "code/debugInfoRec.hpp"
33 #include "code/icBuffer.hpp"
34 #include "code/vtableStubs.hpp"
35 #include "compiler/oopMap.hpp"
36 #include "gc/shared/barrierSetAssembler.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interp_masm.hpp"
39 #include "logging/log.hpp"
40 #include "memory/resourceArea.hpp"
41 #include "nativeInst_aarch64.hpp"
42 #include "oops/compiledICHolder.hpp"
43 #include "oops/klass.inline.hpp"
44 #include "oops/method.inline.hpp"
45 #include "prims/methodHandles.hpp"
46 #include "runtime/continuation.hpp"
47 #include "runtime/continuationEntry.inline.hpp"
48 #include "runtime/globals.hpp"
49 #include "runtime/jniHandles.hpp"
50 #include "runtime/safepointMechanism.hpp"
51 #include "runtime/sharedRuntime.hpp"
52 #include "runtime/signature.hpp"
53 #include "runtime/stubRoutines.hpp"
54 #include "runtime/vframeArray.hpp"
55 #include "utilities/align.hpp"
56 #include "utilities/formatBuffer.hpp"
57 #include "vmreg_aarch64.inline.hpp"
58 #ifdef COMPILER1
59 #include "c1/c1_Runtime1.hpp"
60 #endif
61 #ifdef COMPILER2
62 #include "adfiles/ad_aarch64.hpp"
63 #include "opto/runtime.hpp"
64 #endif
65 #if INCLUDE_JVMCI
66 #include "jvmci/jvmciJavaClasses.hpp"
67 #endif
68
69 #define __ masm->
70
71 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
72
73 class SimpleRuntimeFrame {
74
75 public:
76
77 // Most of the runtime stubs have this simple frame layout.
78 // This class exists to make the layout shared in one place.
79 // Offsets are for compiler stack slots, which are jints.
80 enum layout {
81 // The frame sender code expects that rbp will be in the "natural" place and
82 // will override any oopMap setting for it. We must therefore force the layout
83 // so that it agrees with the frame sender code.
84 // we don't expect any arg reg save area so aarch64 asserts that
85 // frame::arg_reg_save_area_bytes == 0
86 rfp_off = 0,
87 rfp_off2,
88 return_off, return_off2,
89 framesize
90 };
91 };
92
93 // FIXME -- this is used by C1
94 class RegisterSaver {
95 const bool _save_vectors;
96 public:
97 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
98
99 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
100 void restore_live_registers(MacroAssembler* masm);
101
102 // Offsets into the register save area
103 // Used by deoptimization when it is managing result register
104 // values on its own
105
106 int reg_offset_in_bytes(Register r);
107 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); }
108 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); }
109 int v0_offset_in_bytes();
110
111 // Total stack size in bytes for saving sve predicate registers.
112 int total_sve_predicate_in_bytes();
113
114 // Capture info about frame layout
115 // Note this is only correct when not saving full vectors.
116 enum layout {
117 fpu_state_off = 0,
118 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
119 // The frame sender code expects that rfp will be in
120 // the "natural" place and will override any oopMap
121 // setting for it. We must therefore force the layout
122 // so that it agrees with the frame sender code.
123 r0_off = fpu_state_off + FPUStateSizeInWords,
124 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register,
125 return_off = rfp_off + Register::max_slots_per_register, // slot for return address
126 reg_save_size = return_off + Register::max_slots_per_register};
127
128 };
129
130 int RegisterSaver::reg_offset_in_bytes(Register r) {
131 // The integer registers are located above the floating point
132 // registers in the stack frame pushed by save_live_registers() so the
133 // offset depends on whether we are saving full vectors, and whether
134 // those vectors are NEON or SVE.
135
136 int slots_per_vect = FloatRegister::save_slots_per_register;
137
138 #if COMPILER2_OR_JVMCI
139 if (_save_vectors) {
140 slots_per_vect = FloatRegister::slots_per_neon_register;
141
142 #ifdef COMPILER2
143 if (Matcher::supports_scalable_vector()) {
144 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
145 }
146 #endif
147 }
148 #endif
149
150 int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt;
151 return r0_offset + r->encoding() * wordSize;
152 }
153
154 int RegisterSaver::v0_offset_in_bytes() {
155 // The floating point registers are located above the predicate registers if
156 // they are present in the stack frame pushed by save_live_registers(). So the
157 // offset depends on the saved total predicate vectors in the stack frame.
158 return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt;
159 }
160
161 int RegisterSaver::total_sve_predicate_in_bytes() {
162 #ifdef COMPILER2
163 if (_save_vectors && Matcher::supports_scalable_vector()) {
164 return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) *
165 PRegister::number_of_registers;
166 }
167 #endif
168 return 0;
169 }
170
171 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
172 bool use_sve = false;
173 int sve_vector_size_in_bytes = 0;
174 int sve_vector_size_in_slots = 0;
175 int sve_predicate_size_in_slots = 0;
176 int total_predicate_in_bytes = total_sve_predicate_in_bytes();
177 int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size;
178
179 #ifdef COMPILER2
180 use_sve = Matcher::supports_scalable_vector();
181 if (use_sve) {
182 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
183 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
184 sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots();
185 }
186 #endif
187
188 #if COMPILER2_OR_JVMCI
189 if (_save_vectors) {
190 int extra_save_slots_per_register = 0;
191 // Save upper half of vector registers
192 if (use_sve) {
193 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register;
194 } else {
195 extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register;
196 }
197 int extra_vector_bytes = extra_save_slots_per_register *
198 VMRegImpl::stack_slot_size *
199 FloatRegister::number_of_registers;
200 additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize);
201 }
202 #else
203 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
204 #endif
205
206 int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
207 reg_save_size * BytesPerInt, 16);
208 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
209 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
210 // The caller will allocate additional_frame_words
211 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
212 // CodeBlob frame size is in words.
213 int frame_size_in_words = frame_size_in_bytes / wordSize;
214 *total_frame_words = frame_size_in_words;
215
216 // Save Integer and Float registers.
217 __ enter();
218 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes);
219
220 // Set an oopmap for the call site. This oopmap will map all
221 // oop-registers and debug-info registers as callee-saved. This
222 // will allow deoptimization at this safepoint to find all possible
223 // debug-info recordings, as well as let GC find all oops.
224
225 OopMapSet *oop_maps = new OopMapSet();
226 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
227
228 for (int i = 0; i < Register::number_of_registers; i++) {
229 Register r = as_Register(i);
230 if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) {
231 // SP offsets are in 4-byte words.
232 // Register slots are 8 bytes wide, 32 floating-point registers.
233 int sp_offset = Register::max_slots_per_register * i +
234 FloatRegister::save_slots_per_register * FloatRegister::number_of_registers;
235 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg());
236 }
237 }
238
239 for (int i = 0; i < FloatRegister::number_of_registers; i++) {
240 FloatRegister r = as_FloatRegister(i);
241 int sp_offset = 0;
242 if (_save_vectors) {
243 sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) :
244 (FloatRegister::slots_per_neon_register * i);
245 } else {
246 sp_offset = FloatRegister::save_slots_per_register * i;
247 }
248 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
249 }
250
251 return oop_map;
252 }
253
254 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
255 #ifdef COMPILER2
256 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
257 Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes());
258 #else
259 #if !INCLUDE_JVMCI
260 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
261 #endif
262 __ pop_CPU_state(_save_vectors);
263 #endif
264 __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
265 __ authenticate_return_address();
266 }
267
268 // Is vector's size (in bytes) bigger than a size saved by default?
269 // 8 bytes vector registers are saved by default on AArch64.
270 // The SVE supported min vector size is 8 bytes and we need to save
271 // predicate registers when the vector size is 8 bytes as well.
272 bool SharedRuntime::is_wide_vector(int size) {
273 return size > 8 || (UseSVE > 0 && size >= 8);
274 }
275
276 // ---------------------------------------------------------------------------
277 // Read the array of BasicTypes from a signature, and compute where the
278 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
279 // quantities. Values less than VMRegImpl::stack0 are registers, those above
280 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
281 // as framesizes are fixed.
282 // VMRegImpl::stack0 refers to the first slot 0(sp).
283 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
284 // Register up to Register::number_of_registers are the 64-bit
285 // integer registers.
286
287 // Note: the INPUTS in sig_bt are in units of Java argument words,
288 // which are 64-bit. The OUTPUTS are in 32-bit units.
289
290 // The Java calling convention is a "shifted" version of the C ABI.
291 // By skipping the first C ABI register we can call non-static jni
292 // methods with small numbers of arguments without having to shuffle
293 // the arguments at all. Since we control the java ABI we ought to at
294 // least get some advantage out of it.
295
296 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
297 VMRegPair *regs,
298 int total_args_passed) {
299
300 // Create the mapping between argument positions and
301 // registers.
302 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
303 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
304 };
305 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
306 j_farg0, j_farg1, j_farg2, j_farg3,
307 j_farg4, j_farg5, j_farg6, j_farg7
308 };
309
310
311 uint int_args = 0;
312 uint fp_args = 0;
313 uint stk_args = 0; // inc by 2 each time
314
315 for (int i = 0; i < total_args_passed; i++) {
316 switch (sig_bt[i]) {
317 case T_BOOLEAN:
318 case T_CHAR:
319 case T_BYTE:
320 case T_SHORT:
321 case T_INT:
322 if (int_args < Argument::n_int_register_parameters_j) {
323 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
324 } else {
325 regs[i].set1(VMRegImpl::stack2reg(stk_args));
326 stk_args += 2;
327 }
328 break;
329 case T_VOID:
330 // halves of T_LONG or T_DOUBLE
331 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
332 regs[i].set_bad();
333 break;
334 case T_LONG:
335 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
336 // fall through
337 case T_OBJECT:
338 case T_ARRAY:
339 case T_ADDRESS:
340 if (int_args < Argument::n_int_register_parameters_j) {
341 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
342 } else {
343 regs[i].set2(VMRegImpl::stack2reg(stk_args));
344 stk_args += 2;
345 }
346 break;
347 case T_FLOAT:
348 if (fp_args < Argument::n_float_register_parameters_j) {
349 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
350 } else {
351 regs[i].set1(VMRegImpl::stack2reg(stk_args));
352 stk_args += 2;
353 }
354 break;
355 case T_DOUBLE:
356 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
357 if (fp_args < Argument::n_float_register_parameters_j) {
358 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
359 } else {
360 regs[i].set2(VMRegImpl::stack2reg(stk_args));
361 stk_args += 2;
362 }
363 break;
364 default:
365 ShouldNotReachHere();
366 break;
367 }
368 }
369
370 return align_up(stk_args, 2);
371 }
372
373 // Patch the callers callsite with entry to compiled code if it exists.
374 static void patch_callers_callsite(MacroAssembler *masm) {
375 Label L;
376 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
377 __ cbz(rscratch1, L);
378
379 __ enter();
380 __ push_CPU_state();
381
382 // VM needs caller's callsite
383 // VM needs target method
384 // This needs to be a long call since we will relocate this adapter to
385 // the codeBuffer and it may not reach
386
387 #ifndef PRODUCT
388 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
389 #endif
390
391 __ mov(c_rarg0, rmethod);
392 __ mov(c_rarg1, lr);
393 __ authenticate_return_address(c_rarg1);
394 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
395 __ blr(rscratch1);
396
397 // Explicit isb required because fixup_callers_callsite may change the code
398 // stream.
399 __ safepoint_isb();
400
401 __ pop_CPU_state();
402 // restore sp
403 __ leave();
404 __ bind(L);
405 }
406
407 static void gen_c2i_adapter(MacroAssembler *masm,
408 int total_args_passed,
409 int comp_args_on_stack,
410 const BasicType *sig_bt,
411 const VMRegPair *regs,
412 Label& skip_fixup) {
413 // Before we get into the guts of the C2I adapter, see if we should be here
414 // at all. We've come from compiled code and are attempting to jump to the
415 // interpreter, which means the caller made a static call to get here
416 // (vcalls always get a compiled target if there is one). Check for a
417 // compiled target. If there is one, we need to patch the caller's call.
418 patch_callers_callsite(masm);
419
420 __ bind(skip_fixup);
421
422 int words_pushed = 0;
423
424 // Since all args are passed on the stack, total_args_passed *
425 // Interpreter::stackElementSize is the space we need.
426
427 int extraspace = total_args_passed * Interpreter::stackElementSize;
428
429 __ mov(r19_sender_sp, sp);
430
431 // stack is aligned, keep it that way
432 extraspace = align_up(extraspace, 2*wordSize);
433
434 if (extraspace)
435 __ sub(sp, sp, extraspace);
436
437 // Now write the args into the outgoing interpreter space
438 for (int i = 0; i < total_args_passed; i++) {
439 if (sig_bt[i] == T_VOID) {
440 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
441 continue;
442 }
443
444 // offset to start parameters
445 int st_off = (total_args_passed - i - 1) * Interpreter::stackElementSize;
446 int next_off = st_off - Interpreter::stackElementSize;
447
448 // Say 4 args:
449 // i st_off
450 // 0 32 T_LONG
451 // 1 24 T_VOID
452 // 2 16 T_OBJECT
453 // 3 8 T_BOOL
454 // - 0 return address
455 //
456 // However to make thing extra confusing. Because we can fit a Java long/double in
457 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
458 // leaves one slot empty and only stores to a single slot. In this case the
459 // slot that is occupied is the T_VOID slot. See I said it was confusing.
460
461 VMReg r_1 = regs[i].first();
462 VMReg r_2 = regs[i].second();
463 if (!r_1->is_valid()) {
464 assert(!r_2->is_valid(), "");
465 continue;
466 }
467 if (r_1->is_stack()) {
468 // memory to memory use rscratch1
469 int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size
470 + extraspace
471 + words_pushed * wordSize);
472 if (!r_2->is_valid()) {
473 // sign extend??
474 __ ldrw(rscratch1, Address(sp, ld_off));
475 __ str(rscratch1, Address(sp, st_off));
476
477 } else {
478
479 __ ldr(rscratch1, Address(sp, ld_off));
480
481 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
482 // T_DOUBLE and T_LONG use two slots in the interpreter
483 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
484 // ld_off == LSW, ld_off+wordSize == MSW
485 // st_off == MSW, next_off == LSW
486 __ str(rscratch1, Address(sp, next_off));
487 #ifdef ASSERT
488 // Overwrite the unused slot with known junk
489 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaaaull);
490 __ str(rscratch1, Address(sp, st_off));
491 #endif /* ASSERT */
492 } else {
493 __ str(rscratch1, Address(sp, st_off));
494 }
495 }
496 } else if (r_1->is_Register()) {
497 Register r = r_1->as_Register();
498 if (!r_2->is_valid()) {
499 // must be only an int (or less ) so move only 32bits to slot
500 // why not sign extend??
501 __ str(r, Address(sp, st_off));
502 } else {
503 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
504 // T_DOUBLE and T_LONG use two slots in the interpreter
505 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
506 // jlong/double in gpr
507 #ifdef ASSERT
508 // Overwrite the unused slot with known junk
509 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaabull);
510 __ str(rscratch1, Address(sp, st_off));
511 #endif /* ASSERT */
512 __ str(r, Address(sp, next_off));
513 } else {
514 __ str(r, Address(sp, st_off));
515 }
516 }
517 } else {
518 assert(r_1->is_FloatRegister(), "");
519 if (!r_2->is_valid()) {
520 // only a float use just part of the slot
521 __ strs(r_1->as_FloatRegister(), Address(sp, st_off));
522 } else {
523 #ifdef ASSERT
524 // Overwrite the unused slot with known junk
525 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaacull);
526 __ str(rscratch1, Address(sp, st_off));
527 #endif /* ASSERT */
528 __ strd(r_1->as_FloatRegister(), Address(sp, next_off));
529 }
530 }
531 }
532
533 __ mov(esp, sp); // Interp expects args on caller's expression stack
534
535 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
536 __ br(rscratch1);
537 }
538
539
540 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
541 int total_args_passed,
542 int comp_args_on_stack,
543 const BasicType *sig_bt,
544 const VMRegPair *regs) {
545
546 // Note: r19_sender_sp contains the senderSP on entry. We must
547 // preserve it since we may do a i2c -> c2i transition if we lose a
548 // race where compiled code goes non-entrant while we get args
549 // ready.
550
551 // Adapters are frameless.
552
553 // An i2c adapter is frameless because the *caller* frame, which is
554 // interpreted, routinely repairs its own esp (from
555 // interpreter_frame_last_sp), even if a callee has modified the
556 // stack pointer. It also recalculates and aligns sp.
557
558 // A c2i adapter is frameless because the *callee* frame, which is
559 // interpreted, routinely repairs its caller's sp (from sender_sp,
560 // which is set up via the senderSP register).
561
562 // In other words, if *either* the caller or callee is interpreted, we can
563 // get the stack pointer repaired after a call.
564
565 // This is why c2i and i2c adapters cannot be indefinitely composed.
566 // In particular, if a c2i adapter were to somehow call an i2c adapter,
567 // both caller and callee would be compiled methods, and neither would
568 // clean up the stack pointer changes performed by the two adapters.
569 // If this happens, control eventually transfers back to the compiled
570 // caller, but with an uncorrected stack, causing delayed havoc.
571
572 if (VerifyAdapterCalls &&
573 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) {
574 #if 0
575 // So, let's test for cascading c2i/i2c adapters right now.
576 // assert(Interpreter::contains($return_addr) ||
577 // StubRoutines::contains($return_addr),
578 // "i2c adapter must return to an interpreter frame");
579 __ block_comment("verify_i2c { ");
580 Label L_ok;
581 if (Interpreter::code() != nullptr) {
582 range_check(masm, rax, r11,
583 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
584 L_ok);
585 }
586 if (StubRoutines::initial_stubs_code() != nullptr) {
587 range_check(masm, rax, r11,
588 StubRoutines::initial_stubs_code()->code_begin(),
589 StubRoutines::initial_stubs_code()->code_end(),
590 L_ok);
591 }
592 if (StubRoutines::final_stubs_code() != nullptr) {
593 range_check(masm, rax, r11,
594 StubRoutines::final_stubs_code()->code_begin(),
595 StubRoutines::final_stubs_code()->code_end(),
596 L_ok);
597 }
598 const char* msg = "i2c adapter must return to an interpreter frame";
599 __ block_comment(msg);
600 __ stop(msg);
601 __ bind(L_ok);
602 __ block_comment("} verify_i2ce ");
603 #endif
604 }
605
606 // Cut-out for having no stack args.
607 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
608 if (comp_args_on_stack) {
609 __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
610 __ andr(sp, rscratch1, -16);
611 }
612
613 // Will jump to the compiled code just as if compiled code was doing it.
614 // Pre-load the register-jump target early, to schedule it better.
615 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset())));
616
617 #if INCLUDE_JVMCI
618 if (EnableJVMCI) {
619 // check if this call should be routed towards a specific entry point
620 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
621 Label no_alternative_target;
622 __ cbz(rscratch2, no_alternative_target);
623 __ mov(rscratch1, rscratch2);
624 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
625 __ bind(no_alternative_target);
626 }
627 #endif // INCLUDE_JVMCI
628
629 // Now generate the shuffle code.
630 for (int i = 0; i < total_args_passed; i++) {
631 if (sig_bt[i] == T_VOID) {
632 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
633 continue;
634 }
635
636 // Pick up 0, 1 or 2 words from SP+offset.
637
638 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
639 "scrambled load targets?");
640 // Load in argument order going down.
641 int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize;
642 // Point to interpreter value (vs. tag)
643 int next_off = ld_off - Interpreter::stackElementSize;
644 //
645 //
646 //
647 VMReg r_1 = regs[i].first();
648 VMReg r_2 = regs[i].second();
649 if (!r_1->is_valid()) {
650 assert(!r_2->is_valid(), "");
651 continue;
652 }
653 if (r_1->is_stack()) {
654 // Convert stack slot to an SP offset (+ wordSize to account for return address )
655 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size;
656 if (!r_2->is_valid()) {
657 // sign extend???
658 __ ldrsw(rscratch2, Address(esp, ld_off));
659 __ str(rscratch2, Address(sp, st_off));
660 } else {
661 //
662 // We are using two optoregs. This can be either T_OBJECT,
663 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
664 // two slots but only uses one for thr T_LONG or T_DOUBLE case
665 // So we must adjust where to pick up the data to match the
666 // interpreter.
667 //
668 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
669 // are accessed as negative so LSW is at LOW address
670
671 // ld_off is MSW so get LSW
672 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
673 next_off : ld_off;
674 __ ldr(rscratch2, Address(esp, offset));
675 // st_off is LSW (i.e. reg.first())
676 __ str(rscratch2, Address(sp, st_off));
677 }
678 } else if (r_1->is_Register()) { // Register argument
679 Register r = r_1->as_Register();
680 if (r_2->is_valid()) {
681 //
682 // We are using two VMRegs. This can be either T_OBJECT,
683 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
684 // two slots but only uses one for thr T_LONG or T_DOUBLE case
685 // So we must adjust where to pick up the data to match the
686 // interpreter.
687
688 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
689 next_off : ld_off;
690
691 // this can be a misaligned move
692 __ ldr(r, Address(esp, offset));
693 } else {
694 // sign extend and use a full word?
695 __ ldrw(r, Address(esp, ld_off));
696 }
697 } else {
698 if (!r_2->is_valid()) {
699 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
700 } else {
701 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
702 }
703 }
704 }
705
706 __ mov(rscratch2, rscratch1);
707 __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
708 __ mov(rscratch1, rscratch2);
709
710 // 6243940 We might end up in handle_wrong_method if
711 // the callee is deoptimized as we race thru here. If that
712 // happens we don't want to take a safepoint because the
713 // caller frame will look interpreted and arguments are now
714 // "compiled" so it is much better to make this transition
715 // invisible to the stack walking code. Unfortunately if
716 // we try and find the callee by normal means a safepoint
717 // is possible. So we stash the desired callee in the thread
718 // and the vm will find there should this case occur.
719
720 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
721
722 __ br(rscratch1);
723 }
724
725 // ---------------------------------------------------------------
726 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
727 int total_args_passed,
728 int comp_args_on_stack,
729 const BasicType *sig_bt,
730 const VMRegPair *regs,
731 AdapterFingerPrint* fingerprint) {
732 address i2c_entry = __ pc();
733
734 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
735
736 address c2i_unverified_entry = __ pc();
737 Label skip_fixup;
738
739 Label ok;
740
741 Register holder = rscratch2;
742 Register receiver = j_rarg0;
743 Register tmp = r10; // A call-clobbered register not used for arg passing
744
745 // -------------------------------------------------------------------------
746 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls
747 // to the interpreter. The args start out packed in the compiled layout. They
748 // need to be unpacked into the interpreter layout. This will almost always
749 // require some stack space. We grow the current (compiled) stack, then repack
750 // the args. We finally end in a jump to the generic interpreter entry point.
751 // On exit from the interpreter, the interpreter will restore our SP (lest the
752 // compiled code, which relies solely on SP and not FP, get sick).
753
754 {
755 __ block_comment("c2i_unverified_entry {");
756 __ load_klass(rscratch1, receiver);
757 __ ldr(tmp, Address(holder, CompiledICHolder::holder_klass_offset()));
758 __ cmp(rscratch1, tmp);
759 __ ldr(rmethod, Address(holder, CompiledICHolder::holder_metadata_offset()));
760 __ br(Assembler::EQ, ok);
761 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
762
763 __ bind(ok);
764 // Method might have been compiled since the call site was patched to
765 // interpreted; if that is the case treat it as a miss so we can get
766 // the call site corrected.
767 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
768 __ cbz(rscratch1, skip_fixup);
769 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
770 __ block_comment("} c2i_unverified_entry");
771 }
772
773 address c2i_entry = __ pc();
774
775 // Class initialization barrier for static methods
776 address c2i_no_clinit_check_entry = nullptr;
777 if (VM_Version::supports_fast_class_init_checks()) {
778 Label L_skip_barrier;
779
780 { // Bypass the barrier for non-static methods
781 __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset()));
782 __ andsw(zr, rscratch1, JVM_ACC_STATIC);
783 __ br(Assembler::EQ, L_skip_barrier); // non-static
784 }
785
786 __ load_method_holder(rscratch2, rmethod);
787 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
788 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
789
790 __ bind(L_skip_barrier);
791 c2i_no_clinit_check_entry = __ pc();
792 }
793
794 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
795 bs->c2i_entry_barrier(masm);
796
797 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
798
799 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
800 }
801
802 static int c_calling_convention_priv(const BasicType *sig_bt,
803 VMRegPair *regs,
804 int total_args_passed) {
805
806 // We return the amount of VMRegImpl stack slots we need to reserve for all
807 // the arguments NOT counting out_preserve_stack_slots.
808
809 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
810 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7
811 };
812 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
813 c_farg0, c_farg1, c_farg2, c_farg3,
814 c_farg4, c_farg5, c_farg6, c_farg7
815 };
816
817 uint int_args = 0;
818 uint fp_args = 0;
819 uint stk_args = 0; // inc by 2 each time
820
821 for (int i = 0; i < total_args_passed; i++) {
822 switch (sig_bt[i]) {
823 case T_BOOLEAN:
824 case T_CHAR:
825 case T_BYTE:
826 case T_SHORT:
827 case T_INT:
828 if (int_args < Argument::n_int_register_parameters_c) {
829 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
830 } else {
831 #ifdef __APPLE__
832 // Less-than word types are stored one after another.
833 // The code is unable to handle this so bailout.
834 return -1;
835 #endif
836 regs[i].set1(VMRegImpl::stack2reg(stk_args));
837 stk_args += 2;
838 }
839 break;
840 case T_LONG:
841 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
842 // fall through
843 case T_OBJECT:
844 case T_ARRAY:
845 case T_ADDRESS:
846 case T_METADATA:
847 if (int_args < Argument::n_int_register_parameters_c) {
848 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
849 } else {
850 regs[i].set2(VMRegImpl::stack2reg(stk_args));
851 stk_args += 2;
852 }
853 break;
854 case T_FLOAT:
855 if (fp_args < Argument::n_float_register_parameters_c) {
856 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
857 } else {
858 #ifdef __APPLE__
859 // Less-than word types are stored one after another.
860 // The code is unable to handle this so bailout.
861 return -1;
862 #endif
863 regs[i].set1(VMRegImpl::stack2reg(stk_args));
864 stk_args += 2;
865 }
866 break;
867 case T_DOUBLE:
868 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
869 if (fp_args < Argument::n_float_register_parameters_c) {
870 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
871 } else {
872 regs[i].set2(VMRegImpl::stack2reg(stk_args));
873 stk_args += 2;
874 }
875 break;
876 case T_VOID: // Halves of longs and doubles
877 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
878 regs[i].set_bad();
879 break;
880 default:
881 ShouldNotReachHere();
882 break;
883 }
884 }
885
886 return stk_args;
887 }
888
889 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
890 uint num_bits,
891 uint total_args_passed) {
892 Unimplemented();
893 return 0;
894 }
895
896 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
897 VMRegPair *regs,
898 int total_args_passed)
899 {
900 int result = c_calling_convention_priv(sig_bt, regs, total_args_passed);
901 guarantee(result >= 0, "Unsupported arguments configuration");
902 return result;
903 }
904
905
906 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
907 // We always ignore the frame_slots arg and just use the space just below frame pointer
908 // which by this time is free to use
909 switch (ret_type) {
910 case T_FLOAT:
911 __ strs(v0, Address(rfp, -wordSize));
912 break;
913 case T_DOUBLE:
914 __ strd(v0, Address(rfp, -wordSize));
915 break;
916 case T_VOID: break;
917 default: {
918 __ str(r0, Address(rfp, -wordSize));
919 }
920 }
921 }
922
923 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
924 // We always ignore the frame_slots arg and just use the space just below frame pointer
925 // which by this time is free to use
926 switch (ret_type) {
927 case T_FLOAT:
928 __ ldrs(v0, Address(rfp, -wordSize));
929 break;
930 case T_DOUBLE:
931 __ ldrd(v0, Address(rfp, -wordSize));
932 break;
933 case T_VOID: break;
934 default: {
935 __ ldr(r0, Address(rfp, -wordSize));
936 }
937 }
938 }
939 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
940 RegSet x;
941 for ( int i = first_arg ; i < arg_count ; i++ ) {
942 if (args[i].first()->is_Register()) {
943 x = x + args[i].first()->as_Register();
944 } else if (args[i].first()->is_FloatRegister()) {
945 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
946 }
947 }
948 __ push(x, sp);
949 }
950
951 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
952 RegSet x;
953 for ( int i = first_arg ; i < arg_count ; i++ ) {
954 if (args[i].first()->is_Register()) {
955 x = x + args[i].first()->as_Register();
956 } else {
957 ;
958 }
959 }
960 __ pop(x, sp);
961 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
962 if (args[i].first()->is_Register()) {
963 ;
964 } else if (args[i].first()->is_FloatRegister()) {
965 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
966 }
967 }
968 }
969
970 static void verify_oop_args(MacroAssembler* masm,
971 const methodHandle& method,
972 const BasicType* sig_bt,
973 const VMRegPair* regs) {
974 Register temp_reg = r19; // not part of any compiled calling seq
975 if (VerifyOops) {
976 for (int i = 0; i < method->size_of_parameters(); i++) {
977 if (sig_bt[i] == T_OBJECT ||
978 sig_bt[i] == T_ARRAY) {
979 VMReg r = regs[i].first();
980 assert(r->is_valid(), "bad oop arg");
981 if (r->is_stack()) {
982 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
983 __ verify_oop(temp_reg);
984 } else {
985 __ verify_oop(r->as_Register());
986 }
987 }
988 }
989 }
990 }
991
992 // on exit, sp points to the ContinuationEntry
993 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) {
994 assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, "");
995 assert(in_bytes(ContinuationEntry::cont_offset()) % VMRegImpl::stack_slot_size == 0, "");
996 assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, "");
997
998 stack_slots += (int)ContinuationEntry::size()/wordSize;
999 __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata
1000
1001 OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/);
1002
1003 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1004 __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset()));
1005 __ mov(rscratch1, sp); // we can't use sp as the source in str
1006 __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1007
1008 return map;
1009 }
1010
1011 // on entry c_rarg1 points to the continuation
1012 // sp points to ContinuationEntry
1013 // c_rarg3 -- isVirtualThread
1014 static void fill_continuation_entry(MacroAssembler* masm) {
1015 #ifdef ASSERT
1016 __ movw(rscratch1, ContinuationEntry::cookie_value());
1017 __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset()));
1018 #endif
1019
1020 __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset()));
1021 __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset()));
1022 __ str (zr, Address(sp, ContinuationEntry::chunk_offset()));
1023 __ strw(zr, Address(sp, ContinuationEntry::argsize_offset()));
1024 __ strw(zr, Address(sp, ContinuationEntry::pin_count_offset()));
1025
1026 __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1027 __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1028 __ ldr(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1029 __ str(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1030
1031 __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset()));
1032 __ str(zr, Address(rthread, JavaThread::held_monitor_count_offset()));
1033 }
1034
1035 // on entry, sp points to the ContinuationEntry
1036 // on exit, rfp points to the spilled rfp in the entry frame
1037 static void continuation_enter_cleanup(MacroAssembler* masm) {
1038 #ifndef PRODUCT
1039 Label OK;
1040 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1041 __ cmp(sp, rscratch1);
1042 __ br(Assembler::EQ, OK);
1043 __ stop("incorrect sp1");
1044 __ bind(OK);
1045 #endif
1046
1047 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1048 __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1049 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1050 __ str(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1051
1052 __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset()));
1053 __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset()));
1054 __ add(rfp, sp, (int)ContinuationEntry::size());
1055 }
1056
1057 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
1058 // On entry: c_rarg1 -- the continuation object
1059 // c_rarg2 -- isContinue
1060 // c_rarg3 -- isVirtualThread
1061 static void gen_continuation_enter(MacroAssembler* masm,
1062 const methodHandle& method,
1063 const BasicType* sig_bt,
1064 const VMRegPair* regs,
1065 int& exception_offset,
1066 OopMapSet*oop_maps,
1067 int& frame_complete,
1068 int& stack_slots,
1069 int& interpreted_entry_offset,
1070 int& compiled_entry_offset) {
1071 //verify_oop_args(masm, method, sig_bt, regs);
1072 Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
1073
1074 address start = __ pc();
1075
1076 Label call_thaw, exit;
1077
1078 // i2i entry used at interp_only_mode only
1079 interpreted_entry_offset = __ pc() - start;
1080 {
1081
1082 #ifdef ASSERT
1083 Label is_interp_only;
1084 __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
1085 __ cbnzw(rscratch1, is_interp_only);
1086 __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
1087 __ bind(is_interp_only);
1088 #endif
1089
1090 // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
1091 __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2));
1092 __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1));
1093 __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0));
1094 __ push_cont_fastpath(rthread);
1095
1096 __ enter();
1097 stack_slots = 2; // will be adjusted in setup
1098 OopMap* map = continuation_enter_setup(masm, stack_slots);
1099 // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
1100 // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
1101
1102 fill_continuation_entry(masm);
1103
1104 __ cbnz(c_rarg2, call_thaw);
1105
1106 const address tr_call = __ trampoline_call(resolve);
1107 if (tr_call == nullptr) {
1108 fatal("CodeCache is full at gen_continuation_enter");
1109 }
1110
1111 oop_maps->add_gc_map(__ pc() - start, map);
1112 __ post_call_nop();
1113
1114 __ b(exit);
1115
1116 CodeBuffer* cbuf = masm->code_section()->outer();
1117 address stub = CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
1118 if (stub == nullptr) {
1119 fatal("CodeCache is full at gen_continuation_enter");
1120 }
1121 }
1122
1123 // compiled entry
1124 __ align(CodeEntryAlignment);
1125 compiled_entry_offset = __ pc() - start;
1126
1127 __ enter();
1128 stack_slots = 2; // will be adjusted in setup
1129 OopMap* map = continuation_enter_setup(masm, stack_slots);
1130 frame_complete = __ pc() - start;
1131
1132 fill_continuation_entry(masm);
1133
1134 __ cbnz(c_rarg2, call_thaw);
1135
1136 const address tr_call = __ trampoline_call(resolve);
1137 if (tr_call == nullptr) {
1138 fatal("CodeCache is full at gen_continuation_enter");
1139 }
1140
1141 oop_maps->add_gc_map(__ pc() - start, map);
1142 __ post_call_nop();
1143
1144 __ b(exit);
1145
1146 __ bind(call_thaw);
1147
1148 __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1149 oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1150 ContinuationEntry::_return_pc_offset = __ pc() - start;
1151 __ post_call_nop();
1152
1153 __ bind(exit);
1154 continuation_enter_cleanup(masm);
1155 __ leave();
1156 __ ret(lr);
1157
1158 /// exception handling
1159
1160 exception_offset = __ pc() - start;
1161 {
1162 __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1163
1164 continuation_enter_cleanup(masm);
1165
1166 __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1167 __ authenticate_return_address(c_rarg1);
1168 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1169
1170 // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1171
1172 __ mov(r1, r0); // the exception handler
1173 __ mov(r0, r19); // restore return value contaning the exception oop
1174 __ verify_oop(r0);
1175
1176 __ leave();
1177 __ mov(r3, lr);
1178 __ br(r1); // the exception handler
1179 }
1180
1181 CodeBuffer* cbuf = masm->code_section()->outer();
1182 address stub = CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
1183 if (stub == nullptr) {
1184 fatal("CodeCache is full at gen_continuation_enter");
1185 }
1186 }
1187
1188 static void gen_continuation_yield(MacroAssembler* masm,
1189 const methodHandle& method,
1190 const BasicType* sig_bt,
1191 const VMRegPair* regs,
1192 OopMapSet* oop_maps,
1193 int& frame_complete,
1194 int& stack_slots,
1195 int& compiled_entry_offset) {
1196 enum layout {
1197 rfp_off1,
1198 rfp_off2,
1199 lr_off,
1200 lr_off2,
1201 framesize // inclusive of return address
1202 };
1203 // assert(is_even(framesize/2), "sp not 16-byte aligned");
1204 stack_slots = framesize / VMRegImpl::slots_per_word;
1205 assert(stack_slots == 2, "recheck layout");
1206
1207 address start = __ pc();
1208
1209 compiled_entry_offset = __ pc() - start;
1210 __ enter();
1211
1212 __ mov(c_rarg1, sp);
1213
1214 frame_complete = __ pc() - start;
1215 address the_pc = __ pc();
1216
1217 __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1218
1219 __ mov(c_rarg0, rthread);
1220 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
1221 __ call_VM_leaf(Continuation::freeze_entry(), 2);
1222 __ reset_last_Java_frame(true);
1223
1224 Label pinned;
1225
1226 __ cbnz(r0, pinned);
1227
1228 // We've succeeded, set sp to the ContinuationEntry
1229 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1230 __ mov(sp, rscratch1);
1231 continuation_enter_cleanup(masm);
1232
1233 __ bind(pinned); // pinned -- return to caller
1234
1235 // handle pending exception thrown by freeze
1236 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1237 Label ok;
1238 __ cbz(rscratch1, ok);
1239 __ leave();
1240 __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry()));
1241 __ br(rscratch1);
1242 __ bind(ok);
1243
1244 __ leave();
1245 __ ret(lr);
1246
1247 OopMap* map = new OopMap(framesize, 1);
1248 oop_maps->add_gc_map(the_pc - start, map);
1249 }
1250
1251 static void gen_special_dispatch(MacroAssembler* masm,
1252 const methodHandle& method,
1253 const BasicType* sig_bt,
1254 const VMRegPair* regs) {
1255 verify_oop_args(masm, method, sig_bt, regs);
1256 vmIntrinsics::ID iid = method->intrinsic_id();
1257
1258 // Now write the args into the outgoing interpreter space
1259 bool has_receiver = false;
1260 Register receiver_reg = noreg;
1261 int member_arg_pos = -1;
1262 Register member_reg = noreg;
1263 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1264 if (ref_kind != 0) {
1265 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1266 member_reg = r19; // known to be free at this point
1267 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1268 } else if (iid == vmIntrinsics::_invokeBasic) {
1269 has_receiver = true;
1270 } else if (iid == vmIntrinsics::_linkToNative) {
1271 member_arg_pos = method->size_of_parameters() - 1; // trailing NativeEntryPoint argument
1272 member_reg = r19; // known to be free at this point
1273 } else {
1274 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1275 }
1276
1277 if (member_reg != noreg) {
1278 // Load the member_arg into register, if necessary.
1279 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1280 VMReg r = regs[member_arg_pos].first();
1281 if (r->is_stack()) {
1282 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1283 } else {
1284 // no data motion is needed
1285 member_reg = r->as_Register();
1286 }
1287 }
1288
1289 if (has_receiver) {
1290 // Make sure the receiver is loaded into a register.
1291 assert(method->size_of_parameters() > 0, "oob");
1292 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1293 VMReg r = regs[0].first();
1294 assert(r->is_valid(), "bad receiver arg");
1295 if (r->is_stack()) {
1296 // Porting note: This assumes that compiled calling conventions always
1297 // pass the receiver oop in a register. If this is not true on some
1298 // platform, pick a temp and load the receiver from stack.
1299 fatal("receiver always in a register");
1300 receiver_reg = r2; // known to be free at this point
1301 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1302 } else {
1303 // no data motion is needed
1304 receiver_reg = r->as_Register();
1305 }
1306 }
1307
1308 // Figure out which address we are really jumping to:
1309 MethodHandles::generate_method_handle_dispatch(masm, iid,
1310 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1311 }
1312
1313 // ---------------------------------------------------------------------------
1314 // Generate a native wrapper for a given method. The method takes arguments
1315 // in the Java compiled code convention, marshals them to the native
1316 // convention (handlizes oops, etc), transitions to native, makes the call,
1317 // returns to java state (possibly blocking), unhandlizes any result and
1318 // returns.
1319 //
1320 // Critical native functions are a shorthand for the use of
1321 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1322 // functions. The wrapper is expected to unpack the arguments before
1323 // passing them to the callee. Critical native functions leave the state _in_Java,
1324 // since they block out GC.
1325 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1326 // block and the check for pending exceptions it's impossible for them
1327 // to be thrown.
1328 //
1329 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1330 const methodHandle& method,
1331 int compile_id,
1332 BasicType* in_sig_bt,
1333 VMRegPair* in_regs,
1334 BasicType ret_type) {
1335 if (method->is_continuation_native_intrinsic()) {
1336 int exception_offset = -1;
1337 OopMapSet* oop_maps = new OopMapSet();
1338 int frame_complete = -1;
1339 int stack_slots = -1;
1340 int interpreted_entry_offset = -1;
1341 int vep_offset = -1;
1342 if (method->is_continuation_enter_intrinsic()) {
1343 gen_continuation_enter(masm,
1344 method,
1345 in_sig_bt,
1346 in_regs,
1347 exception_offset,
1348 oop_maps,
1349 frame_complete,
1350 stack_slots,
1351 interpreted_entry_offset,
1352 vep_offset);
1353 } else if (method->is_continuation_yield_intrinsic()) {
1354 gen_continuation_yield(masm,
1355 method,
1356 in_sig_bt,
1357 in_regs,
1358 oop_maps,
1359 frame_complete,
1360 stack_slots,
1361 vep_offset);
1362 } else {
1363 guarantee(false, "Unknown Continuation native intrinsic");
1364 }
1365
1366 #ifdef ASSERT
1367 if (method->is_continuation_enter_intrinsic()) {
1368 assert(interpreted_entry_offset != -1, "Must be set");
1369 assert(exception_offset != -1, "Must be set");
1370 } else {
1371 assert(interpreted_entry_offset == -1, "Must be unset");
1372 assert(exception_offset == -1, "Must be unset");
1373 }
1374 assert(frame_complete != -1, "Must be set");
1375 assert(stack_slots != -1, "Must be set");
1376 assert(vep_offset != -1, "Must be set");
1377 #endif
1378
1379 __ flush();
1380 nmethod* nm = nmethod::new_native_nmethod(method,
1381 compile_id,
1382 masm->code(),
1383 vep_offset,
1384 frame_complete,
1385 stack_slots,
1386 in_ByteSize(-1),
1387 in_ByteSize(-1),
1388 oop_maps,
1389 exception_offset);
1390 if (method->is_continuation_enter_intrinsic()) {
1391 ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1392 } else if (method->is_continuation_yield_intrinsic()) {
1393 _cont_doYield_stub = nm;
1394 } else {
1395 guarantee(false, "Unknown Continuation native intrinsic");
1396 }
1397 return nm;
1398 }
1399
1400 if (method->is_method_handle_intrinsic()) {
1401 vmIntrinsics::ID iid = method->intrinsic_id();
1402 intptr_t start = (intptr_t)__ pc();
1403 int vep_offset = ((intptr_t)__ pc()) - start;
1404
1405 // First instruction must be a nop as it may need to be patched on deoptimisation
1406 __ nop();
1407 gen_special_dispatch(masm,
1408 method,
1409 in_sig_bt,
1410 in_regs);
1411 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1412 __ flush();
1413 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1414 return nmethod::new_native_nmethod(method,
1415 compile_id,
1416 masm->code(),
1417 vep_offset,
1418 frame_complete,
1419 stack_slots / VMRegImpl::slots_per_word,
1420 in_ByteSize(-1),
1421 in_ByteSize(-1),
1422 nullptr);
1423 }
1424 address native_func = method->native_function();
1425 assert(native_func != nullptr, "must have function");
1426
1427 // An OopMap for lock (and class if static)
1428 OopMapSet *oop_maps = new OopMapSet();
1429 intptr_t start = (intptr_t)__ pc();
1430
1431 // We have received a description of where all the java arg are located
1432 // on entry to the wrapper. We need to convert these args to where
1433 // the jni function will expect them. To figure out where they go
1434 // we convert the java signature to a C signature by inserting
1435 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1436
1437 const int total_in_args = method->size_of_parameters();
1438 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1439
1440 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1441 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1442 BasicType* in_elem_bt = nullptr;
1443
1444 int argc = 0;
1445 out_sig_bt[argc++] = T_ADDRESS;
1446 if (method->is_static()) {
1447 out_sig_bt[argc++] = T_OBJECT;
1448 }
1449
1450 for (int i = 0; i < total_in_args ; i++ ) {
1451 out_sig_bt[argc++] = in_sig_bt[i];
1452 }
1453
1454 // Now figure out where the args must be stored and how much stack space
1455 // they require.
1456 int out_arg_slots;
1457 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args);
1458
1459 if (out_arg_slots < 0) {
1460 return nullptr;
1461 }
1462
1463 // Compute framesize for the wrapper. We need to handlize all oops in
1464 // incoming registers
1465
1466 // Calculate the total number of stack slots we will need.
1467
1468 // First count the abi requirement plus all of the outgoing args
1469 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1470
1471 // Now the space for the inbound oop handle area
1472 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers
1473
1474 int oop_handle_offset = stack_slots;
1475 stack_slots += total_save_slots;
1476
1477 // Now any space we need for handlizing a klass if static method
1478
1479 int klass_slot_offset = 0;
1480 int klass_offset = -1;
1481 int lock_slot_offset = 0;
1482 bool is_static = false;
1483
1484 if (method->is_static()) {
1485 klass_slot_offset = stack_slots;
1486 stack_slots += VMRegImpl::slots_per_word;
1487 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1488 is_static = true;
1489 }
1490
1491 // Plus a lock if needed
1492
1493 if (method->is_synchronized()) {
1494 lock_slot_offset = stack_slots;
1495 stack_slots += VMRegImpl::slots_per_word;
1496 }
1497
1498 // Now a place (+2) to save return values or temp during shuffling
1499 // + 4 for return address (which we own) and saved rfp
1500 stack_slots += 6;
1501
1502 // Ok The space we have allocated will look like:
1503 //
1504 //
1505 // FP-> | |
1506 // |---------------------|
1507 // | 2 slots for moves |
1508 // |---------------------|
1509 // | lock box (if sync) |
1510 // |---------------------| <- lock_slot_offset
1511 // | klass (if static) |
1512 // |---------------------| <- klass_slot_offset
1513 // | oopHandle area |
1514 // |---------------------| <- oop_handle_offset (8 java arg registers)
1515 // | outbound memory |
1516 // | based arguments |
1517 // | |
1518 // |---------------------|
1519 // | |
1520 // SP-> | out_preserved_slots |
1521 //
1522 //
1523
1524
1525 // Now compute actual number of stack words we need rounding to make
1526 // stack properly aligned.
1527 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1528
1529 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1530
1531 // First thing make an ic check to see if we should even be here
1532
1533 // We are free to use all registers as temps without saving them and
1534 // restoring them except rfp. rfp is the only callee save register
1535 // as far as the interpreter and the compiler(s) are concerned.
1536
1537
1538 const Register ic_reg = rscratch2;
1539 const Register receiver = j_rarg0;
1540
1541 Label hit;
1542 Label exception_pending;
1543
1544 assert_different_registers(ic_reg, receiver, rscratch1);
1545 __ verify_oop(receiver);
1546 __ cmp_klass(receiver, ic_reg, rscratch1);
1547 __ br(Assembler::EQ, hit);
1548
1549 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1550
1551 // Verified entry point must be aligned
1552 __ align(8);
1553
1554 __ bind(hit);
1555
1556 int vep_offset = ((intptr_t)__ pc()) - start;
1557
1558 // If we have to make this method not-entrant we'll overwrite its
1559 // first instruction with a jump. For this action to be legal we
1560 // must ensure that this first instruction is a B, BL, NOP, BKPT,
1561 // SVC, HVC, or SMC. Make it a NOP.
1562 __ nop();
1563
1564 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1565 Label L_skip_barrier;
1566 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1567 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1568 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1569
1570 __ bind(L_skip_barrier);
1571 }
1572
1573 // Generate stack overflow check
1574 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1575
1576 // Generate a new frame for the wrapper.
1577 __ enter();
1578 // -2 because return address is already present and so is saved rfp
1579 __ sub(sp, sp, stack_size - 2*wordSize);
1580
1581 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1582 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
1583
1584 // Frame is now completed as far as size and linkage.
1585 int frame_complete = ((intptr_t)__ pc()) - start;
1586
1587 // We use r20 as the oop handle for the receiver/klass
1588 // It is callee save so it survives the call to native
1589
1590 const Register oop_handle_reg = r20;
1591
1592 //
1593 // We immediately shuffle the arguments so that any vm call we have to
1594 // make from here on out (sync slow path, jvmti, etc.) we will have
1595 // captured the oops from our caller and have a valid oopMap for
1596 // them.
1597
1598 // -----------------
1599 // The Grand Shuffle
1600
1601 // The Java calling convention is either equal (linux) or denser (win64) than the
1602 // c calling convention. However the because of the jni_env argument the c calling
1603 // convention always has at least one more (and two for static) arguments than Java.
1604 // Therefore if we move the args from java -> c backwards then we will never have
1605 // a register->register conflict and we don't have to build a dependency graph
1606 // and figure out how to break any cycles.
1607 //
1608
1609 // Record esp-based slot for receiver on stack for non-static methods
1610 int receiver_offset = -1;
1611
1612 // This is a trick. We double the stack slots so we can claim
1613 // the oops in the caller's frame. Since we are sure to have
1614 // more args than the caller doubling is enough to make
1615 // sure we can capture all the incoming oop args from the
1616 // caller.
1617 //
1618 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1619
1620 // Mark location of rfp (someday)
1621 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1622
1623
1624 int float_args = 0;
1625 int int_args = 0;
1626
1627 #ifdef ASSERT
1628 bool reg_destroyed[Register::number_of_registers];
1629 bool freg_destroyed[FloatRegister::number_of_registers];
1630 for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1631 reg_destroyed[r] = false;
1632 }
1633 for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1634 freg_destroyed[f] = false;
1635 }
1636
1637 #endif /* ASSERT */
1638
1639 // For JNI natives the incoming and outgoing registers are offset upwards.
1640 GrowableArray<int> arg_order(2 * total_in_args);
1641 VMRegPair tmp_vmreg;
1642 tmp_vmreg.set2(r19->as_VMReg());
1643
1644 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1645 arg_order.push(i);
1646 arg_order.push(c_arg);
1647 }
1648
1649 int temploc = -1;
1650 for (int ai = 0; ai < arg_order.length(); ai += 2) {
1651 int i = arg_order.at(ai);
1652 int c_arg = arg_order.at(ai + 1);
1653 __ block_comment(err_msg("move %d -> %d", i, c_arg));
1654 assert(c_arg != -1 && i != -1, "wrong order");
1655 #ifdef ASSERT
1656 if (in_regs[i].first()->is_Register()) {
1657 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1658 } else if (in_regs[i].first()->is_FloatRegister()) {
1659 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1660 }
1661 if (out_regs[c_arg].first()->is_Register()) {
1662 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1663 } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1664 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1665 }
1666 #endif /* ASSERT */
1667 switch (in_sig_bt[i]) {
1668 case T_ARRAY:
1669 case T_OBJECT:
1670 __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1671 ((i == 0) && (!is_static)),
1672 &receiver_offset);
1673 int_args++;
1674 break;
1675 case T_VOID:
1676 break;
1677
1678 case T_FLOAT:
1679 __ float_move(in_regs[i], out_regs[c_arg]);
1680 float_args++;
1681 break;
1682
1683 case T_DOUBLE:
1684 assert( i + 1 < total_in_args &&
1685 in_sig_bt[i + 1] == T_VOID &&
1686 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1687 __ double_move(in_regs[i], out_regs[c_arg]);
1688 float_args++;
1689 break;
1690
1691 case T_LONG :
1692 __ long_move(in_regs[i], out_regs[c_arg]);
1693 int_args++;
1694 break;
1695
1696 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1697
1698 default:
1699 __ move32_64(in_regs[i], out_regs[c_arg]);
1700 int_args++;
1701 }
1702 }
1703
1704 // point c_arg at the first arg that is already loaded in case we
1705 // need to spill before we call out
1706 int c_arg = total_c_args - total_in_args;
1707
1708 // Pre-load a static method's oop into c_rarg1.
1709 if (method->is_static()) {
1710
1711 // load oop into a register
1712 __ movoop(c_rarg1,
1713 JNIHandles::make_local(method->method_holder()->java_mirror()));
1714
1715 // Now handlize the static class mirror it's known not-null.
1716 __ str(c_rarg1, Address(sp, klass_offset));
1717 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1718
1719 // Now get the handle
1720 __ lea(c_rarg1, Address(sp, klass_offset));
1721 // and protect the arg if we must spill
1722 c_arg--;
1723 }
1724
1725 // Change state to native (we save the return address in the thread, since it might not
1726 // be pushed on the stack when we do a stack traversal).
1727 // We use the same pc/oopMap repeatedly when we call out
1728
1729 Label native_return;
1730 __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1731
1732 Label dtrace_method_entry, dtrace_method_entry_done;
1733 {
1734 uint64_t offset;
1735 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1736 __ ldrb(rscratch1, Address(rscratch1, offset));
1737 __ cbnzw(rscratch1, dtrace_method_entry);
1738 __ bind(dtrace_method_entry_done);
1739 }
1740
1741 // RedefineClasses() tracing support for obsolete method entry
1742 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1743 // protect the args we've loaded
1744 save_args(masm, total_c_args, c_arg, out_regs);
1745 __ mov_metadata(c_rarg1, method());
1746 __ call_VM_leaf(
1747 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1748 rthread, c_rarg1);
1749 restore_args(masm, total_c_args, c_arg, out_regs);
1750 }
1751
1752 // Lock a synchronized method
1753
1754 // Register definitions used by locking and unlocking
1755
1756 const Register swap_reg = r0;
1757 const Register obj_reg = r19; // Will contain the oop
1758 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
1759 const Register old_hdr = r13; // value of old header at unlock time
1760 const Register lock_tmp = r14; // Temporary used by lightweight_lock/unlock
1761 const Register tmp = lr;
1762
1763 Label slow_path_lock;
1764 Label lock_done;
1765
1766 if (method->is_synchronized()) {
1767 Label count;
1768 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1769
1770 // Get the handle (the 2nd argument)
1771 __ mov(oop_handle_reg, c_rarg1);
1772
1773 // Get address of the box
1774
1775 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1776
1777 // Load the oop from the handle
1778 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1779
1780 if (LockingMode == LM_MONITOR) {
1781 __ b(slow_path_lock);
1782 } else if (LockingMode == LM_LEGACY) {
1783 // Load (object->mark() | 1) into swap_reg %r0
1784 __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1785 __ orr(swap_reg, rscratch1, 1);
1786
1787 // Save (object->mark() | 1) into BasicLock's displaced header
1788 __ str(swap_reg, Address(lock_reg, mark_word_offset));
1789
1790 // src -> dest iff dest == r0 else r0 <- dest
1791 __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, count, /*fallthrough*/nullptr);
1792
1793 // Hmm should this move to the slow path code area???
1794
1795 // Test if the oopMark is an obvious stack pointer, i.e.,
1796 // 1) (mark & 3) == 0, and
1797 // 2) sp <= mark < mark + os::pagesize()
1798 // These 3 tests can be done by evaluating the following
1799 // expression: ((mark - sp) & (3 - os::vm_page_size())),
1800 // assuming both stack pointer and pagesize have their
1801 // least significant 2 bits clear.
1802 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg
1803
1804 __ sub(swap_reg, sp, swap_reg);
1805 __ neg(swap_reg, swap_reg);
1806 __ ands(swap_reg, swap_reg, 3 - (int)os::vm_page_size());
1807
1808 // Save the test result, for recursive case, the result is zero
1809 __ str(swap_reg, Address(lock_reg, mark_word_offset));
1810 __ br(Assembler::NE, slow_path_lock);
1811 } else {
1812 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
1813 __ ldr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1814 __ lightweight_lock(obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
1815 }
1816 __ bind(count);
1817 __ increment(Address(rthread, JavaThread::held_monitor_count_offset()));
1818
1819 // Slow path will re-enter here
1820 __ bind(lock_done);
1821 }
1822
1823
1824 // Finally just about ready to make the JNI call
1825
1826 // get JNIEnv* which is first argument to native
1827 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
1828
1829 // Now set thread in native
1830 __ mov(rscratch1, _thread_in_native);
1831 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1832 __ stlrw(rscratch1, rscratch2);
1833
1834 __ rt_call(native_func);
1835
1836 __ bind(native_return);
1837
1838 intptr_t return_pc = (intptr_t) __ pc();
1839 oop_maps->add_gc_map(return_pc - start, map);
1840
1841 // Unpack native results.
1842 switch (ret_type) {
1843 case T_BOOLEAN: __ c2bool(r0); break;
1844 case T_CHAR : __ ubfx(r0, r0, 0, 16); break;
1845 case T_BYTE : __ sbfx(r0, r0, 0, 8); break;
1846 case T_SHORT : __ sbfx(r0, r0, 0, 16); break;
1847 case T_INT : __ sbfx(r0, r0, 0, 32); break;
1848 case T_DOUBLE :
1849 case T_FLOAT :
1850 // Result is in v0 we'll save as needed
1851 break;
1852 case T_ARRAY: // Really a handle
1853 case T_OBJECT: // Really a handle
1854 break; // can't de-handlize until after safepoint check
1855 case T_VOID: break;
1856 case T_LONG: break;
1857 default : ShouldNotReachHere();
1858 }
1859
1860 Label safepoint_in_progress, safepoint_in_progress_done;
1861 Label after_transition;
1862
1863 // Switch thread to "native transition" state before reading the synchronization state.
1864 // This additional state is necessary because reading and testing the synchronization
1865 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1866 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1867 // VM thread changes sync state to synchronizing and suspends threads for GC.
1868 // Thread A is resumed to finish this native method, but doesn't block here since it
1869 // didn't see any synchronization is progress, and escapes.
1870 __ mov(rscratch1, _thread_in_native_trans);
1871
1872 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
1873
1874 // Force this write out before the read below
1875 if (!UseSystemMemoryBarrier) {
1876 __ dmb(Assembler::ISH);
1877 }
1878
1879 __ verify_sve_vector_length();
1880
1881 // Check for safepoint operation in progress and/or pending suspend requests.
1882 {
1883 // We need an acquire here to ensure that any subsequent load of the
1884 // global SafepointSynchronize::_state flag is ordered after this load
1885 // of the thread-local polling word. We don't want this poll to
1886 // return false (i.e. not safepointing) and a later poll of the global
1887 // SafepointSynchronize::_state spuriously to return true.
1888 //
1889 // This is to avoid a race when we're in a native->Java transition
1890 // racing the code which wakes up from a safepoint.
1891
1892 __ safepoint_poll(safepoint_in_progress, true /* at_return */, true /* acquire */, false /* in_nmethod */);
1893 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
1894 __ cbnzw(rscratch1, safepoint_in_progress);
1895 __ bind(safepoint_in_progress_done);
1896 }
1897
1898 // change thread state
1899 __ mov(rscratch1, _thread_in_Java);
1900 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1901 __ stlrw(rscratch1, rscratch2);
1902 __ bind(after_transition);
1903
1904 Label reguard;
1905 Label reguard_done;
1906 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
1907 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
1908 __ br(Assembler::EQ, reguard);
1909 __ bind(reguard_done);
1910
1911 // native result if any is live
1912
1913 // Unlock
1914 Label unlock_done;
1915 Label slow_path_unlock;
1916 if (method->is_synchronized()) {
1917
1918 // Get locked oop from the handle we passed to jni
1919 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1920
1921 Label done, not_recursive;
1922
1923 if (LockingMode == LM_LEGACY) {
1924 // Simple recursive lock?
1925 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1926 __ cbnz(rscratch1, not_recursive);
1927 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
1928 __ b(done);
1929 }
1930
1931 __ bind(not_recursive);
1932
1933 // Must save r0 if if it is live now because cmpxchg must use it
1934 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1935 save_native_result(masm, ret_type, stack_slots);
1936 }
1937
1938 if (LockingMode == LM_MONITOR) {
1939 __ b(slow_path_unlock);
1940 } else if (LockingMode == LM_LEGACY) {
1941 // get address of the stack lock
1942 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1943 // get old displaced header
1944 __ ldr(old_hdr, Address(r0, 0));
1945
1946 // Atomic swap old header if oop still contains the stack lock
1947 Label count;
1948 __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, count, &slow_path_unlock);
1949 __ bind(count);
1950 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
1951 } else {
1952 assert(LockingMode == LM_LIGHTWEIGHT, "");
1953 __ ldr(old_hdr, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1954 __ tbnz(old_hdr, exact_log2(markWord::monitor_value), slow_path_unlock);
1955 __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
1956 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
1957 }
1958
1959 // slow path re-enters here
1960 __ bind(unlock_done);
1961 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1962 restore_native_result(masm, ret_type, stack_slots);
1963 }
1964
1965 __ bind(done);
1966 }
1967
1968 Label dtrace_method_exit, dtrace_method_exit_done;
1969 {
1970 uint64_t offset;
1971 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1972 __ ldrb(rscratch1, Address(rscratch1, offset));
1973 __ cbnzw(rscratch1, dtrace_method_exit);
1974 __ bind(dtrace_method_exit_done);
1975 }
1976
1977 __ reset_last_Java_frame(false);
1978
1979 // Unbox oop result, e.g. JNIHandles::resolve result.
1980 if (is_reference_type(ret_type)) {
1981 __ resolve_jobject(r0, r1, r2);
1982 }
1983
1984 if (CheckJNICalls) {
1985 // clear_pending_jni_exception_check
1986 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
1987 }
1988
1989 // reset handle block
1990 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
1991 __ str(zr, Address(r2, JNIHandleBlock::top_offset()));
1992
1993 __ leave();
1994
1995 // Any exception pending?
1996 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1997 __ cbnz(rscratch1, exception_pending);
1998
1999 // We're done
2000 __ ret(lr);
2001
2002 // Unexpected paths are out of line and go here
2003
2004 // forward the exception
2005 __ bind(exception_pending);
2006
2007 // and forward the exception
2008 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2009
2010 // Slow path locking & unlocking
2011 if (method->is_synchronized()) {
2012
2013 __ block_comment("Slow path lock {");
2014 __ bind(slow_path_lock);
2015
2016 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2017 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2018
2019 // protect the args we've loaded
2020 save_args(masm, total_c_args, c_arg, out_regs);
2021
2022 __ mov(c_rarg0, obj_reg);
2023 __ mov(c_rarg1, lock_reg);
2024 __ mov(c_rarg2, rthread);
2025
2026 // Not a leaf but we have last_Java_frame setup as we want
2027 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2028 restore_args(masm, total_c_args, c_arg, out_regs);
2029
2030 #ifdef ASSERT
2031 { Label L;
2032 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2033 __ cbz(rscratch1, L);
2034 __ stop("no pending exception allowed on exit from monitorenter");
2035 __ bind(L);
2036 }
2037 #endif
2038 __ b(lock_done);
2039
2040 __ block_comment("} Slow path lock");
2041
2042 __ block_comment("Slow path unlock {");
2043 __ bind(slow_path_unlock);
2044
2045 // If we haven't already saved the native result we must save it now as xmm registers
2046 // are still exposed.
2047
2048 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2049 save_native_result(masm, ret_type, stack_slots);
2050 }
2051
2052 __ mov(c_rarg2, rthread);
2053 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2054 __ mov(c_rarg0, obj_reg);
2055
2056 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2057 // NOTE that obj_reg == r19 currently
2058 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2059 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2060
2061 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2062
2063 #ifdef ASSERT
2064 {
2065 Label L;
2066 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2067 __ cbz(rscratch1, L);
2068 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2069 __ bind(L);
2070 }
2071 #endif /* ASSERT */
2072
2073 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2074
2075 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2076 restore_native_result(masm, ret_type, stack_slots);
2077 }
2078 __ b(unlock_done);
2079
2080 __ block_comment("} Slow path unlock");
2081
2082 } // synchronized
2083
2084 // SLOW PATH Reguard the stack if needed
2085
2086 __ bind(reguard);
2087 save_native_result(masm, ret_type, stack_slots);
2088 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2089 restore_native_result(masm, ret_type, stack_slots);
2090 // and continue
2091 __ b(reguard_done);
2092
2093 // SLOW PATH safepoint
2094 {
2095 __ block_comment("safepoint {");
2096 __ bind(safepoint_in_progress);
2097
2098 // Don't use call_VM as it will see a possible pending exception and forward it
2099 // and never return here preventing us from clearing _last_native_pc down below.
2100 //
2101 save_native_result(masm, ret_type, stack_slots);
2102 __ mov(c_rarg0, rthread);
2103 #ifndef PRODUCT
2104 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2105 #endif
2106 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2107 __ blr(rscratch1);
2108
2109 // Restore any method result value
2110 restore_native_result(masm, ret_type, stack_slots);
2111
2112 __ b(safepoint_in_progress_done);
2113 __ block_comment("} safepoint");
2114 }
2115
2116 // SLOW PATH dtrace support
2117 {
2118 __ block_comment("dtrace entry {");
2119 __ bind(dtrace_method_entry);
2120
2121 // We have all of the arguments setup at this point. We must not touch any register
2122 // argument registers at this point (what if we save/restore them there are no oop?
2123
2124 save_args(masm, total_c_args, c_arg, out_regs);
2125 __ mov_metadata(c_rarg1, method());
2126 __ call_VM_leaf(
2127 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2128 rthread, c_rarg1);
2129 restore_args(masm, total_c_args, c_arg, out_regs);
2130 __ b(dtrace_method_entry_done);
2131 __ block_comment("} dtrace entry");
2132 }
2133
2134 {
2135 __ block_comment("dtrace exit {");
2136 __ bind(dtrace_method_exit);
2137 save_native_result(masm, ret_type, stack_slots);
2138 __ mov_metadata(c_rarg1, method());
2139 __ call_VM_leaf(
2140 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2141 rthread, c_rarg1);
2142 restore_native_result(masm, ret_type, stack_slots);
2143 __ b(dtrace_method_exit_done);
2144 __ block_comment("} dtrace exit");
2145 }
2146
2147
2148 __ flush();
2149
2150 nmethod *nm = nmethod::new_native_nmethod(method,
2151 compile_id,
2152 masm->code(),
2153 vep_offset,
2154 frame_complete,
2155 stack_slots / VMRegImpl::slots_per_word,
2156 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2157 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2158 oop_maps);
2159
2160 return nm;
2161 }
2162
2163 // this function returns the adjust size (in number of words) to a c2i adapter
2164 // activation for use during deoptimization
2165 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2166 assert(callee_locals >= callee_parameters,
2167 "test and remove; got more parms than locals");
2168 if (callee_locals < callee_parameters)
2169 return 0; // No adjustment for negative locals
2170 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2171 // diff is counted in stack words
2172 return align_up(diff, 2);
2173 }
2174
2175
2176 //------------------------------generate_deopt_blob----------------------------
2177 void SharedRuntime::generate_deopt_blob() {
2178 // Allocate space for the code
2179 ResourceMark rm;
2180 // Setup code generation tools
2181 int pad = 0;
2182 #if INCLUDE_JVMCI
2183 if (EnableJVMCI) {
2184 pad += 512; // Increase the buffer size when compiling for JVMCI
2185 }
2186 #endif
2187 CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2188 MacroAssembler* masm = new MacroAssembler(&buffer);
2189 int frame_size_in_words;
2190 OopMap* map = nullptr;
2191 OopMapSet *oop_maps = new OopMapSet();
2192 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2193
2194 // -------------
2195 // This code enters when returning to a de-optimized nmethod. A return
2196 // address has been pushed on the stack, and return values are in
2197 // registers.
2198 // If we are doing a normal deopt then we were called from the patched
2199 // nmethod from the point we returned to the nmethod. So the return
2200 // address on the stack is wrong by NativeCall::instruction_size
2201 // We will adjust the value so it looks like we have the original return
2202 // address on the stack (like when we eagerly deoptimized).
2203 // In the case of an exception pending when deoptimizing, we enter
2204 // with a return address on the stack that points after the call we patched
2205 // into the exception handler. We have the following register state from,
2206 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2207 // r0: exception oop
2208 // r19: exception handler
2209 // r3: throwing pc
2210 // So in this case we simply jam r3 into the useless return address and
2211 // the stack looks just like we want.
2212 //
2213 // At this point we need to de-opt. We save the argument return
2214 // registers. We call the first C routine, fetch_unroll_info(). This
2215 // routine captures the return values and returns a structure which
2216 // describes the current frame size and the sizes of all replacement frames.
2217 // The current frame is compiled code and may contain many inlined
2218 // functions, each with their own JVM state. We pop the current frame, then
2219 // push all the new frames. Then we call the C routine unpack_frames() to
2220 // populate these frames. Finally unpack_frames() returns us the new target
2221 // address. Notice that callee-save registers are BLOWN here; they have
2222 // already been captured in the vframeArray at the time the return PC was
2223 // patched.
2224 address start = __ pc();
2225 Label cont;
2226
2227 // Prolog for non exception case!
2228
2229 // Save everything in sight.
2230 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2231
2232 // Normal deoptimization. Save exec mode for unpack_frames.
2233 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2234 __ b(cont);
2235
2236 int reexecute_offset = __ pc() - start;
2237 #if INCLUDE_JVMCI && !defined(COMPILER1)
2238 if (EnableJVMCI && UseJVMCICompiler) {
2239 // JVMCI does not use this kind of deoptimization
2240 __ should_not_reach_here();
2241 }
2242 #endif
2243
2244 // Reexecute case
2245 // return address is the pc describes what bci to do re-execute at
2246
2247 // No need to update map as each call to save_live_registers will produce identical oopmap
2248 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2249
2250 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2251 __ b(cont);
2252
2253 #if INCLUDE_JVMCI
2254 Label after_fetch_unroll_info_call;
2255 int implicit_exception_uncommon_trap_offset = 0;
2256 int uncommon_trap_offset = 0;
2257
2258 if (EnableJVMCI) {
2259 implicit_exception_uncommon_trap_offset = __ pc() - start;
2260
2261 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2262 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2263
2264 uncommon_trap_offset = __ pc() - start;
2265
2266 // Save everything in sight.
2267 reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2268 // fetch_unroll_info needs to call last_java_frame()
2269 Label retaddr;
2270 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2271
2272 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2273 __ movw(rscratch1, -1);
2274 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2275
2276 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2277 __ mov(c_rarg0, rthread);
2278 __ movw(c_rarg2, rcpool); // exec mode
2279 __ lea(rscratch1,
2280 RuntimeAddress(CAST_FROM_FN_PTR(address,
2281 Deoptimization::uncommon_trap)));
2282 __ blr(rscratch1);
2283 __ bind(retaddr);
2284 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2285
2286 __ reset_last_Java_frame(false);
2287
2288 __ b(after_fetch_unroll_info_call);
2289 } // EnableJVMCI
2290 #endif // INCLUDE_JVMCI
2291
2292 int exception_offset = __ pc() - start;
2293
2294 // Prolog for exception case
2295
2296 // all registers are dead at this entry point, except for r0, and
2297 // r3 which contain the exception oop and exception pc
2298 // respectively. Set them in TLS and fall thru to the
2299 // unpack_with_exception_in_tls entry point.
2300
2301 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2302 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2303
2304 int exception_in_tls_offset = __ pc() - start;
2305
2306 // new implementation because exception oop is now passed in JavaThread
2307
2308 // Prolog for exception case
2309 // All registers must be preserved because they might be used by LinearScan
2310 // Exceptiop oop and throwing PC are passed in JavaThread
2311 // tos: stack at point of call to method that threw the exception (i.e. only
2312 // args are on the stack, no return address)
2313
2314 // The return address pushed by save_live_registers will be patched
2315 // later with the throwing pc. The correct value is not available
2316 // now because loading it from memory would destroy registers.
2317
2318 // NB: The SP at this point must be the SP of the method that is
2319 // being deoptimized. Deoptimization assumes that the frame created
2320 // here by save_live_registers is immediately below the method's SP.
2321 // This is a somewhat fragile mechanism.
2322
2323 // Save everything in sight.
2324 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2325
2326 // Now it is safe to overwrite any register
2327
2328 // Deopt during an exception. Save exec mode for unpack_frames.
2329 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2330
2331 // load throwing pc from JavaThread and patch it as the return address
2332 // of the current frame. Then clear the field in JavaThread
2333 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2334 __ protect_return_address(r3);
2335 __ str(r3, Address(rfp, wordSize));
2336 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2337
2338 #ifdef ASSERT
2339 // verify that there is really an exception oop in JavaThread
2340 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2341 __ verify_oop(r0);
2342
2343 // verify that there is no pending exception
2344 Label no_pending_exception;
2345 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2346 __ cbz(rscratch1, no_pending_exception);
2347 __ stop("must not have pending exception here");
2348 __ bind(no_pending_exception);
2349 #endif
2350
2351 __ bind(cont);
2352
2353 // Call C code. Need thread and this frame, but NOT official VM entry
2354 // crud. We cannot block on this call, no GC can happen.
2355 //
2356 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2357
2358 // fetch_unroll_info needs to call last_java_frame().
2359
2360 Label retaddr;
2361 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2362 #ifdef ASSERT
2363 { Label L;
2364 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset()));
2365 __ cbz(rscratch1, L);
2366 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2367 __ bind(L);
2368 }
2369 #endif // ASSERT
2370 __ mov(c_rarg0, rthread);
2371 __ mov(c_rarg1, rcpool);
2372 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2373 __ blr(rscratch1);
2374 __ bind(retaddr);
2375
2376 // Need to have an oopmap that tells fetch_unroll_info where to
2377 // find any register it might need.
2378 oop_maps->add_gc_map(__ pc() - start, map);
2379
2380 __ reset_last_Java_frame(false);
2381
2382 #if INCLUDE_JVMCI
2383 if (EnableJVMCI) {
2384 __ bind(after_fetch_unroll_info_call);
2385 }
2386 #endif
2387
2388 // Load UnrollBlock* into r5
2389 __ mov(r5, r0);
2390
2391 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset()));
2392 Label noException;
2393 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending?
2394 __ br(Assembler::NE, noException);
2395 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2396 // QQQ this is useless it was null above
2397 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2398 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2399 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2400
2401 __ verify_oop(r0);
2402
2403 // Overwrite the result registers with the exception results.
2404 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2405 // I think this is useless
2406 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2407
2408 __ bind(noException);
2409
2410 // Only register save data is on the stack.
2411 // Now restore the result registers. Everything else is either dead
2412 // or captured in the vframeArray.
2413
2414 // Restore fp result register
2415 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2416 // Restore integer result register
2417 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2418
2419 // Pop all of the register save area off the stack
2420 __ add(sp, sp, frame_size_in_words * wordSize);
2421
2422 // All of the register save area has been popped of the stack. Only the
2423 // return address remains.
2424
2425 // Pop all the frames we must move/replace.
2426 //
2427 // Frame picture (youngest to oldest)
2428 // 1: self-frame (no frame link)
2429 // 2: deopting frame (no frame link)
2430 // 3: caller of deopting frame (could be compiled/interpreted).
2431 //
2432 // Note: by leaving the return address of self-frame on the stack
2433 // and using the size of frame 2 to adjust the stack
2434 // when we are done the return to frame 3 will still be on the stack.
2435
2436 // Pop deoptimized frame
2437 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2438 __ sub(r2, r2, 2 * wordSize);
2439 __ add(sp, sp, r2);
2440 __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2441
2442 #ifdef ASSERT
2443 // Compilers generate code that bang the stack by as much as the
2444 // interpreter would need. So this stack banging should never
2445 // trigger a fault. Verify that it does not on non product builds.
2446 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2447 __ bang_stack_size(r19, r2);
2448 #endif
2449 // Load address of array of frame pcs into r2
2450 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset()));
2451
2452 // Trash the old pc
2453 // __ addptr(sp, wordSize); FIXME ????
2454
2455 // Load address of array of frame sizes into r4
2456 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset()));
2457
2458 // Load counter into r3
2459 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset()));
2460
2461 // Now adjust the caller's stack to make up for the extra locals
2462 // but record the original sp so that we can save it in the skeletal interpreter
2463 // frame and the stack walking of interpreter_sender will get the unextended sp
2464 // value and not the "real" sp value.
2465
2466 const Register sender_sp = r6;
2467
2468 __ mov(sender_sp, sp);
2469 __ ldrw(r19, Address(r5,
2470 Deoptimization::UnrollBlock::
2471 caller_adjustment_offset()));
2472 __ sub(sp, sp, r19);
2473
2474 // Push interpreter frames in a loop
2475 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern
2476 __ mov(rscratch2, rscratch1);
2477 Label loop;
2478 __ bind(loop);
2479 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size
2480 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand
2481 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc
2482 __ enter(); // Save old & set new fp
2483 __ sub(sp, sp, r19); // Prolog
2484 // This value is corrected by layout_activation_impl
2485 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2486 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2487 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2488 __ sub(r3, r3, 1); // Decrement counter
2489 __ cbnz(r3, loop);
2490
2491 // Re-push self-frame
2492 __ ldr(lr, Address(r2));
2493 __ enter();
2494
2495 // Allocate a full sized register save area. We subtract 2 because
2496 // enter() just pushed 2 words
2497 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2498
2499 // Restore frame locals after moving the frame
2500 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2501 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2502
2503 // Call C code. Need thread but NOT official VM entry
2504 // crud. We cannot block on this call, no GC can happen. Call should
2505 // restore return values to their stack-slots with the new SP.
2506 //
2507 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2508
2509 // Use rfp because the frames look interpreted now
2510 // Don't need the precise return PC here, just precise enough to point into this code blob.
2511 address the_pc = __ pc();
2512 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2513
2514 __ mov(c_rarg0, rthread);
2515 __ movw(c_rarg1, rcpool); // second arg: exec_mode
2516 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2517 __ blr(rscratch1);
2518
2519 // Set an oopmap for the call site
2520 // Use the same PC we used for the last java frame
2521 oop_maps->add_gc_map(the_pc - start,
2522 new OopMap( frame_size_in_words, 0 ));
2523
2524 // Clear fp AND pc
2525 __ reset_last_Java_frame(true);
2526
2527 // Collect return values
2528 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2529 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2530 // I think this is useless (throwing pc?)
2531 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2532
2533 // Pop self-frame.
2534 __ leave(); // Epilog
2535
2536 // Jump to interpreter
2537 __ ret(lr);
2538
2539 // Make sure all code is generated
2540 masm->flush();
2541
2542 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2543 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2544 #if INCLUDE_JVMCI
2545 if (EnableJVMCI) {
2546 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2547 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2548 }
2549 #endif
2550 }
2551
2552 // Number of stack slots between incoming argument block and the start of
2553 // a new frame. The PROLOG must add this many slots to the stack. The
2554 // EPILOG must remove this many slots. aarch64 needs two slots for
2555 // return address and fp.
2556 // TODO think this is correct but check
2557 uint SharedRuntime::in_preserve_stack_slots() {
2558 return 4;
2559 }
2560
2561 uint SharedRuntime::out_preserve_stack_slots() {
2562 return 0;
2563 }
2564
2565 #ifdef COMPILER2
2566 //------------------------------generate_uncommon_trap_blob--------------------
2567 void SharedRuntime::generate_uncommon_trap_blob() {
2568 // Allocate space for the code
2569 ResourceMark rm;
2570 // Setup code generation tools
2571 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2572 MacroAssembler* masm = new MacroAssembler(&buffer);
2573
2574 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2575
2576 address start = __ pc();
2577
2578 // Push self-frame. We get here with a return address in LR
2579 // and sp should be 16 byte aligned
2580 // push rfp and retaddr by hand
2581 __ protect_return_address();
2582 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
2583 // we don't expect an arg reg save area
2584 #ifndef PRODUCT
2585 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2586 #endif
2587 // compiler left unloaded_class_index in j_rarg0 move to where the
2588 // runtime expects it.
2589 if (c_rarg1 != j_rarg0) {
2590 __ movw(c_rarg1, j_rarg0);
2591 }
2592
2593 // we need to set the past SP to the stack pointer of the stub frame
2594 // and the pc to the address where this runtime call will return
2595 // although actually any pc in this code blob will do).
2596 Label retaddr;
2597 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2598
2599 // Call C code. Need thread but NOT official VM entry
2600 // crud. We cannot block on this call, no GC can happen. Call should
2601 // capture callee-saved registers as well as return values.
2602 // Thread is in rdi already.
2603 //
2604 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2605 //
2606 // n.b. 2 gp args, 0 fp args, integral return type
2607
2608 __ mov(c_rarg0, rthread);
2609 __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap);
2610 __ lea(rscratch1,
2611 RuntimeAddress(CAST_FROM_FN_PTR(address,
2612 Deoptimization::uncommon_trap)));
2613 __ blr(rscratch1);
2614 __ bind(retaddr);
2615
2616 // Set an oopmap for the call site
2617 OopMapSet* oop_maps = new OopMapSet();
2618 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2619
2620 // location of rfp is known implicitly by the frame sender code
2621
2622 oop_maps->add_gc_map(__ pc() - start, map);
2623
2624 __ reset_last_Java_frame(false);
2625
2626 // move UnrollBlock* into r4
2627 __ mov(r4, r0);
2628
2629 #ifdef ASSERT
2630 { Label L;
2631 __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset()));
2632 __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2633 __ br(Assembler::EQ, L);
2634 __ stop("SharedRuntime::generate_uncommon_trap_blob: expected Unpack_uncommon_trap");
2635 __ bind(L);
2636 }
2637 #endif
2638
2639 // Pop all the frames we must move/replace.
2640 //
2641 // Frame picture (youngest to oldest)
2642 // 1: self-frame (no frame link)
2643 // 2: deopting frame (no frame link)
2644 // 3: caller of deopting frame (could be compiled/interpreted).
2645
2646 // Pop self-frame. We have no frame, and must rely only on r0 and sp.
2647 __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog!
2648
2649 // Pop deoptimized frame (int)
2650 __ ldrw(r2, Address(r4,
2651 Deoptimization::UnrollBlock::
2652 size_of_deoptimized_frame_offset()));
2653 __ sub(r2, r2, 2 * wordSize);
2654 __ add(sp, sp, r2);
2655 __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2656
2657 #ifdef ASSERT
2658 // Compilers generate code that bang the stack by as much as the
2659 // interpreter would need. So this stack banging should never
2660 // trigger a fault. Verify that it does not on non product builds.
2661 __ ldrw(r1, Address(r4,
2662 Deoptimization::UnrollBlock::
2663 total_frame_sizes_offset()));
2664 __ bang_stack_size(r1, r2);
2665 #endif
2666
2667 // Load address of array of frame pcs into r2 (address*)
2668 __ ldr(r2, Address(r4,
2669 Deoptimization::UnrollBlock::frame_pcs_offset()));
2670
2671 // Load address of array of frame sizes into r5 (intptr_t*)
2672 __ ldr(r5, Address(r4,
2673 Deoptimization::UnrollBlock::
2674 frame_sizes_offset()));
2675
2676 // Counter
2677 __ ldrw(r3, Address(r4,
2678 Deoptimization::UnrollBlock::
2679 number_of_frames_offset())); // (int)
2680
2681 // Now adjust the caller's stack to make up for the extra locals but
2682 // record the original sp so that we can save it in the skeletal
2683 // interpreter frame and the stack walking of interpreter_sender
2684 // will get the unextended sp value and not the "real" sp value.
2685
2686 const Register sender_sp = r8;
2687
2688 __ mov(sender_sp, sp);
2689 __ ldrw(r1, Address(r4,
2690 Deoptimization::UnrollBlock::
2691 caller_adjustment_offset())); // (int)
2692 __ sub(sp, sp, r1);
2693
2694 // Push interpreter frames in a loop
2695 Label loop;
2696 __ bind(loop);
2697 __ ldr(r1, Address(r5, 0)); // Load frame size
2698 __ sub(r1, r1, 2 * wordSize); // We'll push pc and rfp by hand
2699 __ ldr(lr, Address(r2, 0)); // Save return address
2700 __ enter(); // and old rfp & set new rfp
2701 __ sub(sp, sp, r1); // Prolog
2702 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2703 // This value is corrected by layout_activation_impl
2704 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2705 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2706 __ add(r5, r5, wordSize); // Bump array pointer (sizes)
2707 __ add(r2, r2, wordSize); // Bump array pointer (pcs)
2708 __ subsw(r3, r3, 1); // Decrement counter
2709 __ br(Assembler::GT, loop);
2710 __ ldr(lr, Address(r2, 0)); // save final return address
2711 // Re-push self-frame
2712 __ enter(); // & old rfp & set new rfp
2713
2714 // Use rfp because the frames look interpreted now
2715 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
2716 // Don't need the precise return PC here, just precise enough to point into this code blob.
2717 address the_pc = __ pc();
2718 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2719
2720 // Call C code. Need thread but NOT official VM entry
2721 // crud. We cannot block on this call, no GC can happen. Call should
2722 // restore return values to their stack-slots with the new SP.
2723 // Thread is in rdi already.
2724 //
2725 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2726 //
2727 // n.b. 2 gp args, 0 fp args, integral return type
2728
2729 // sp should already be aligned
2730 __ mov(c_rarg0, rthread);
2731 __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2732 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2733 __ blr(rscratch1);
2734
2735 // Set an oopmap for the call site
2736 // Use the same PC we used for the last java frame
2737 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2738
2739 // Clear fp AND pc
2740 __ reset_last_Java_frame(true);
2741
2742 // Pop self-frame.
2743 __ leave(); // Epilog
2744
2745 // Jump to interpreter
2746 __ ret(lr);
2747
2748 // Make sure all code is generated
2749 masm->flush();
2750
2751 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
2752 SimpleRuntimeFrame::framesize >> 1);
2753 }
2754 #endif // COMPILER2
2755
2756
2757 //------------------------------generate_handler_blob------
2758 //
2759 // Generate a special Compile2Runtime blob that saves all registers,
2760 // and setup oopmap.
2761 //
2762 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2763 ResourceMark rm;
2764 OopMapSet *oop_maps = new OopMapSet();
2765 OopMap* map;
2766
2767 // Allocate space for the code. Setup code generation tools.
2768 CodeBuffer buffer("handler_blob", 2048, 1024);
2769 MacroAssembler* masm = new MacroAssembler(&buffer);
2770
2771 address start = __ pc();
2772 address call_pc = nullptr;
2773 int frame_size_in_words;
2774 bool cause_return = (poll_type == POLL_AT_RETURN);
2775 RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */);
2776
2777 // When the signal occurred, the LR was either signed and stored on the stack (in which
2778 // case it will be restored from the stack before being used) or unsigned and not stored
2779 // on the stack. Stipping ensures we get the right value.
2780 __ strip_return_address();
2781
2782 // Save Integer and Float registers.
2783 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2784
2785 // The following is basically a call_VM. However, we need the precise
2786 // address of the call in order to generate an oopmap. Hence, we do all the
2787 // work ourselves.
2788
2789 Label retaddr;
2790 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2791
2792 // The return address must always be correct so that frame constructor never
2793 // sees an invalid pc.
2794
2795 if (!cause_return) {
2796 // overwrite the return address pushed by save_live_registers
2797 // Additionally, r20 is a callee-saved register so we can look at
2798 // it later to determine if someone changed the return address for
2799 // us!
2800 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2801 __ protect_return_address(r20);
2802 __ str(r20, Address(rfp, wordSize));
2803 }
2804
2805 // Do the call
2806 __ mov(c_rarg0, rthread);
2807 __ lea(rscratch1, RuntimeAddress(call_ptr));
2808 __ blr(rscratch1);
2809 __ bind(retaddr);
2810
2811 // Set an oopmap for the call site. This oopmap will map all
2812 // oop-registers and debug-info registers as callee-saved. This
2813 // will allow deoptimization at this safepoint to find all possible
2814 // debug-info recordings, as well as let GC find all oops.
2815
2816 oop_maps->add_gc_map( __ pc() - start, map);
2817
2818 Label noException;
2819
2820 __ reset_last_Java_frame(false);
2821
2822 __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2823
2824 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2825 __ cbz(rscratch1, noException);
2826
2827 // Exception pending
2828
2829 reg_save.restore_live_registers(masm);
2830
2831 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2832
2833 // No exception case
2834 __ bind(noException);
2835
2836 Label no_adjust, bail;
2837 if (!cause_return) {
2838 // If our stashed return pc was modified by the runtime we avoid touching it
2839 __ ldr(rscratch1, Address(rfp, wordSize));
2840 __ cmp(r20, rscratch1);
2841 __ br(Assembler::NE, no_adjust);
2842 __ authenticate_return_address(r20);
2843
2844 #ifdef ASSERT
2845 // Verify the correct encoding of the poll we're about to skip.
2846 // See NativeInstruction::is_ldrw_to_zr()
2847 __ ldrw(rscratch1, Address(r20));
2848 __ ubfx(rscratch2, rscratch1, 22, 10);
2849 __ cmpw(rscratch2, 0b1011100101);
2850 __ br(Assembler::NE, bail);
2851 __ ubfx(rscratch2, rscratch1, 0, 5);
2852 __ cmpw(rscratch2, 0b11111);
2853 __ br(Assembler::NE, bail);
2854 #endif
2855 // Adjust return pc forward to step over the safepoint poll instruction
2856 __ add(r20, r20, NativeInstruction::instruction_size);
2857 __ protect_return_address(r20);
2858 __ str(r20, Address(rfp, wordSize));
2859 }
2860
2861 __ bind(no_adjust);
2862 // Normal exit, restore registers and exit.
2863 reg_save.restore_live_registers(masm);
2864
2865 __ ret(lr);
2866
2867 #ifdef ASSERT
2868 __ bind(bail);
2869 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2870 #endif
2871
2872 // Make sure all code is generated
2873 masm->flush();
2874
2875 // Fill-out other meta info
2876 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2877 }
2878
2879 //
2880 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2881 //
2882 // Generate a stub that calls into vm to find out the proper destination
2883 // of a java call. All the argument registers are live at this point
2884 // but since this is generic code we don't know what they are and the caller
2885 // must do any gc of the args.
2886 //
2887 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
2888 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2889
2890 // allocate space for the code
2891 ResourceMark rm;
2892
2893 CodeBuffer buffer(name, 1000, 512);
2894 MacroAssembler* masm = new MacroAssembler(&buffer);
2895
2896 int frame_size_in_words;
2897 RegisterSaver reg_save(false /* save_vectors */);
2898
2899 OopMapSet *oop_maps = new OopMapSet();
2900 OopMap* map = nullptr;
2901
2902 int start = __ offset();
2903
2904 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2905
2906 int frame_complete = __ offset();
2907
2908 {
2909 Label retaddr;
2910 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2911
2912 __ mov(c_rarg0, rthread);
2913 __ lea(rscratch1, RuntimeAddress(destination));
2914
2915 __ blr(rscratch1);
2916 __ bind(retaddr);
2917 }
2918
2919 // Set an oopmap for the call site.
2920 // We need this not only for callee-saved registers, but also for volatile
2921 // registers that the compiler might be keeping live across a safepoint.
2922
2923 oop_maps->add_gc_map( __ offset() - start, map);
2924
2925 // r0 contains the address we are going to jump to assuming no exception got installed
2926
2927 // clear last_Java_sp
2928 __ reset_last_Java_frame(false);
2929 // check for pending exceptions
2930 Label pending;
2931 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2932 __ cbnz(rscratch1, pending);
2933
2934 // get the returned Method*
2935 __ get_vm_result_2(rmethod, rthread);
2936 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
2937
2938 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
2939 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
2940 reg_save.restore_live_registers(masm);
2941
2942 // We are back to the original state on entry and ready to go.
2943
2944 __ br(rscratch1);
2945
2946 // Pending exception after the safepoint
2947
2948 __ bind(pending);
2949
2950 reg_save.restore_live_registers(masm);
2951
2952 // exception pending => remove activation and forward to exception handler
2953
2954 __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
2955
2956 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
2957 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2958
2959 // -------------
2960 // make sure all code is generated
2961 masm->flush();
2962
2963 // return the blob
2964 // frame_size_words or bytes??
2965 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
2966 }
2967
2968 #ifdef COMPILER2
2969 // This is here instead of runtime_aarch64_64.cpp because it uses SimpleRuntimeFrame
2970 //
2971 //------------------------------generate_exception_blob---------------------------
2972 // creates exception blob at the end
2973 // Using exception blob, this code is jumped from a compiled method.
2974 // (see emit_exception_handler in x86_64.ad file)
2975 //
2976 // Given an exception pc at a call we call into the runtime for the
2977 // handler in this method. This handler might merely restore state
2978 // (i.e. callee save registers) unwind the frame and jump to the
2979 // exception handler for the nmethod if there is no Java level handler
2980 // for the nmethod.
2981 //
2982 // This code is entered with a jmp.
2983 //
2984 // Arguments:
2985 // r0: exception oop
2986 // r3: exception pc
2987 //
2988 // Results:
2989 // r0: exception oop
2990 // r3: exception pc in caller or ???
2991 // destination: exception handler of caller
2992 //
2993 // Note: the exception pc MUST be at a call (precise debug information)
2994 // Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved.
2995 //
2996
2997 void OptoRuntime::generate_exception_blob() {
2998 assert(!OptoRuntime::is_callee_saved_register(R3_num), "");
2999 assert(!OptoRuntime::is_callee_saved_register(R0_num), "");
3000 assert(!OptoRuntime::is_callee_saved_register(R2_num), "");
3001
3002 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3003
3004 // Allocate space for the code
3005 ResourceMark rm;
3006 // Setup code generation tools
3007 CodeBuffer buffer("exception_blob", 2048, 1024);
3008 MacroAssembler* masm = new MacroAssembler(&buffer);
3009
3010 // TODO check various assumptions made here
3011 //
3012 // make sure we do so before running this
3013
3014 address start = __ pc();
3015
3016 // push rfp and retaddr by hand
3017 // Exception pc is 'return address' for stack walker
3018 __ protect_return_address();
3019 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
3020 // there are no callee save registers and we don't expect an
3021 // arg reg save area
3022 #ifndef PRODUCT
3023 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3024 #endif
3025 // Store exception in Thread object. We cannot pass any arguments to the
3026 // handle_exception call, since we do not want to make any assumption
3027 // about the size of the frame where the exception happened in.
3028 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
3029 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
3030
3031 // This call does all the hard work. It checks if an exception handler
3032 // exists in the method.
3033 // If so, it returns the handler address.
3034 // If not, it prepares for stack-unwinding, restoring the callee-save
3035 // registers of the frame being removed.
3036 //
3037 // address OptoRuntime::handle_exception_C(JavaThread* thread)
3038 //
3039 // n.b. 1 gp arg, 0 fp args, integral return type
3040
3041 // the stack should always be aligned
3042 address the_pc = __ pc();
3043 __ set_last_Java_frame(sp, noreg, the_pc, rscratch1);
3044 __ mov(c_rarg0, rthread);
3045 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3046 __ blr(rscratch1);
3047 // handle_exception_C is a special VM call which does not require an explicit
3048 // instruction sync afterwards.
3049
3050 // May jump to SVE compiled code
3051 __ reinitialize_ptrue();
3052
3053 // Set an oopmap for the call site. This oopmap will only be used if we
3054 // are unwinding the stack. Hence, all locations will be dead.
3055 // Callee-saved registers will be the same as the frame above (i.e.,
3056 // handle_exception_stub), since they were restored when we got the
3057 // exception.
3058
3059 OopMapSet* oop_maps = new OopMapSet();
3060
3061 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3062
3063 __ reset_last_Java_frame(false);
3064
3065 // Restore callee-saved registers
3066
3067 // rfp is an implicitly saved callee saved register (i.e. the calling
3068 // convention will save restore it in prolog/epilog) Other than that
3069 // there are no callee save registers now that adapter frames are gone.
3070 // and we dont' expect an arg reg save area
3071 __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize)));
3072 __ authenticate_return_address(r3);
3073
3074 // r0: exception handler
3075
3076 // We have a handler in r0 (could be deopt blob).
3077 __ mov(r8, r0);
3078
3079 // Get the exception oop
3080 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
3081 // Get the exception pc in case we are deoptimized
3082 __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset()));
3083 #ifdef ASSERT
3084 __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset()));
3085 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
3086 #endif
3087 // Clear the exception oop so GC no longer processes it as a root.
3088 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
3089
3090 // r0: exception oop
3091 // r8: exception handler
3092 // r4: exception pc
3093 // Jump to handler
3094
3095 __ br(r8);
3096
3097 // Make sure all code is generated
3098 masm->flush();
3099
3100 // Set exception blob
3101 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3102 }
3103
3104 #endif // COMPILER2