1 /*
2 * Copyright (c) 2003, 2026, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "asm/macroAssembler.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "classfile/symbolTable.hpp"
30 #include "code/aotCodeCache.hpp"
31 #include "code/codeCache.hpp"
32 #include "code/compiledIC.hpp"
33 #include "code/debugInfoRec.hpp"
34 #include "code/vtableStubs.hpp"
35 #include "compiler/oopMap.hpp"
36 #include "gc/shared/barrierSetAssembler.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interp_masm.hpp"
39 #include "logging/log.hpp"
40 #include "memory/resourceArea.hpp"
41 #include "nativeInst_aarch64.hpp"
42 #include "oops/klass.inline.hpp"
43 #include "oops/method.inline.hpp"
44 #include "prims/methodHandles.hpp"
45 #include "runtime/continuation.hpp"
46 #include "runtime/continuationEntry.inline.hpp"
47 #include "runtime/globals.hpp"
48 #include "runtime/jniHandles.hpp"
49 #include "runtime/safepointMechanism.hpp"
50 #include "runtime/sharedRuntime.hpp"
51 #include "runtime/signature.hpp"
52 #include "runtime/stubRoutines.hpp"
53 #include "runtime/timerTrace.hpp"
54 #include "runtime/vframeArray.hpp"
55 #include "utilities/align.hpp"
56 #include "utilities/formatBuffer.hpp"
57 #include "vmreg_aarch64.inline.hpp"
58 #ifdef COMPILER1
59 #include "c1/c1_Runtime1.hpp"
60 #endif
61 #ifdef COMPILER2
62 #include "adfiles/ad_aarch64.hpp"
63 #include "opto/runtime.hpp"
64 #endif
65 #if INCLUDE_JVMCI
66 #include "jvmci/jvmciJavaClasses.hpp"
67 #endif
68
69 #define __ masm->
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) __ block_comment(str)
75 #endif
76
77 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
78
79 // FIXME -- this is used by C1
80 class RegisterSaver {
81 const bool _save_vectors;
82 public:
83 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
84
85 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
86 void restore_live_registers(MacroAssembler* masm);
87
88 // Offsets into the register save area
89 // Used by deoptimization when it is managing result register
90 // values on its own
91
92 int reg_offset_in_bytes(Register r);
93 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); }
94 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); }
95 int v0_offset_in_bytes();
96
97 // Total stack size in bytes for saving sve predicate registers.
98 int total_sve_predicate_in_bytes();
99
100 // Capture info about frame layout
101 // Note this is only correct when not saving full vectors.
102 enum layout {
103 fpu_state_off = 0,
104 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
105 // The frame sender code expects that rfp will be in
106 // the "natural" place and will override any oopMap
107 // setting for it. We must therefore force the layout
108 // so that it agrees with the frame sender code.
109 r0_off = fpu_state_off + FPUStateSizeInWords,
110 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register,
111 return_off = rfp_off + Register::max_slots_per_register, // slot for return address
112 reg_save_size = return_off + Register::max_slots_per_register};
113
114 };
115
116 int RegisterSaver::reg_offset_in_bytes(Register r) {
117 // The integer registers are located above the floating point
118 // registers in the stack frame pushed by save_live_registers() so the
119 // offset depends on whether we are saving full vectors, and whether
120 // those vectors are NEON or SVE.
121
122 int slots_per_vect = FloatRegister::save_slots_per_register;
123
124 #if COMPILER2_OR_JVMCI
125 if (_save_vectors) {
126 slots_per_vect = FloatRegister::slots_per_neon_register;
127
128 #ifdef COMPILER2
129 if (Matcher::supports_scalable_vector()) {
130 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
131 }
132 #endif
133 }
134 #endif
135
136 int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt;
137 return r0_offset + r->encoding() * wordSize;
138 }
139
140 int RegisterSaver::v0_offset_in_bytes() {
141 // The floating point registers are located above the predicate registers if
142 // they are present in the stack frame pushed by save_live_registers(). So the
143 // offset depends on the saved total predicate vectors in the stack frame.
144 return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt;
145 }
146
147 int RegisterSaver::total_sve_predicate_in_bytes() {
148 #ifdef COMPILER2
149 if (_save_vectors && Matcher::supports_scalable_vector()) {
150 return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) *
151 PRegister::number_of_registers;
152 }
153 #endif
154 return 0;
155 }
156
157 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
158 bool use_sve = false;
159 int sve_vector_size_in_bytes = 0;
160 int sve_vector_size_in_slots = 0;
161 int sve_predicate_size_in_slots = 0;
162 int total_predicate_in_bytes = total_sve_predicate_in_bytes();
163 int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size;
164
165 #ifdef COMPILER2
166 use_sve = Matcher::supports_scalable_vector();
167 if (use_sve) {
168 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
169 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
170 sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots();
171 }
172 #endif
173
174 #if COMPILER2_OR_JVMCI
175 if (_save_vectors) {
176 int extra_save_slots_per_register = 0;
177 // Save upper half of vector registers
178 if (use_sve) {
179 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register;
180 } else {
181 extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register;
182 }
183 int extra_vector_bytes = extra_save_slots_per_register *
184 VMRegImpl::stack_slot_size *
185 FloatRegister::number_of_registers;
186 additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize);
187 }
188 #else
189 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
190 #endif
191
192 int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
193 reg_save_size * BytesPerInt, 16);
194 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
195 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
196 // The caller will allocate additional_frame_words
197 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
198 // CodeBlob frame size is in words.
199 int frame_size_in_words = frame_size_in_bytes / wordSize;
200 *total_frame_words = frame_size_in_words;
201
202 // Save Integer and Float registers.
203 __ enter();
204 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes);
205
206 // Set an oopmap for the call site. This oopmap will map all
207 // oop-registers and debug-info registers as callee-saved. This
208 // will allow deoptimization at this safepoint to find all possible
209 // debug-info recordings, as well as let GC find all oops.
210
211 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
212
213 for (int i = 0; i < Register::number_of_registers; i++) {
214 Register r = as_Register(i);
215 if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) {
216 // SP offsets are in 4-byte words.
217 // Register slots are 8 bytes wide, 32 floating-point registers.
218 int sp_offset = Register::max_slots_per_register * i +
219 FloatRegister::save_slots_per_register * FloatRegister::number_of_registers;
220 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg());
221 }
222 }
223
224 for (int i = 0; i < FloatRegister::number_of_registers; i++) {
225 FloatRegister r = as_FloatRegister(i);
226 int sp_offset = 0;
227 if (_save_vectors) {
228 sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) :
229 (FloatRegister::slots_per_neon_register * i);
230 } else {
231 sp_offset = FloatRegister::save_slots_per_register * i;
232 }
233 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
234 }
235
236 return oop_map;
237 }
238
239 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
240 #ifdef COMPILER2
241 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
242 Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes());
243 #else
244 #if !INCLUDE_JVMCI
245 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
246 #endif
247 __ pop_CPU_state(_save_vectors);
248 #endif
249 __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
250 __ authenticate_return_address();
251 }
252
253 // Is vector's size (in bytes) bigger than a size saved by default?
254 // 8 bytes vector registers are saved by default on AArch64.
255 // The SVE supported min vector size is 8 bytes and we need to save
256 // predicate registers when the vector size is 8 bytes as well.
257 bool SharedRuntime::is_wide_vector(int size) {
258 return size > 8 || (UseSVE > 0 && size >= 8);
259 }
260
261 // ---------------------------------------------------------------------------
262 // Read the array of BasicTypes from a signature, and compute where the
263 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
264 // quantities. Values less than VMRegImpl::stack0 are registers, those above
265 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
266 // as framesizes are fixed.
267 // VMRegImpl::stack0 refers to the first slot 0(sp).
268 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
269 // Register up to Register::number_of_registers are the 64-bit
270 // integer registers.
271
272 // Note: the INPUTS in sig_bt are in units of Java argument words,
273 // which are 64-bit. The OUTPUTS are in 32-bit units.
274
275 // The Java calling convention is a "shifted" version of the C ABI.
276 // By skipping the first C ABI register we can call non-static jni
277 // methods with small numbers of arguments without having to shuffle
278 // the arguments at all. Since we control the java ABI we ought to at
279 // least get some advantage out of it.
280
281 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
282 VMRegPair *regs,
283 int total_args_passed) {
284
285 // Create the mapping between argument positions and
286 // registers.
287 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
288 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
289 };
290 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
291 j_farg0, j_farg1, j_farg2, j_farg3,
292 j_farg4, j_farg5, j_farg6, j_farg7
293 };
294
295
296 uint int_args = 0;
297 uint fp_args = 0;
298 uint stk_args = 0;
299
300 for (int i = 0; i < total_args_passed; i++) {
301 switch (sig_bt[i]) {
302 case T_BOOLEAN:
303 case T_CHAR:
304 case T_BYTE:
305 case T_SHORT:
306 case T_INT:
307 if (int_args < Argument::n_int_register_parameters_j) {
308 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
309 } else {
310 stk_args = align_up(stk_args, 2);
311 regs[i].set1(VMRegImpl::stack2reg(stk_args));
312 stk_args += 1;
313 }
314 break;
315 case T_VOID:
316 // halves of T_LONG or T_DOUBLE
317 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
318 regs[i].set_bad();
319 break;
320 case T_LONG:
321 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
322 // fall through
323 case T_OBJECT:
324 case T_ARRAY:
325 case T_ADDRESS:
326 if (int_args < Argument::n_int_register_parameters_j) {
327 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
328 } else {
329 stk_args = align_up(stk_args, 2);
330 regs[i].set2(VMRegImpl::stack2reg(stk_args));
331 stk_args += 2;
332 }
333 break;
334 case T_FLOAT:
335 if (fp_args < Argument::n_float_register_parameters_j) {
336 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
337 } else {
338 stk_args = align_up(stk_args, 2);
339 regs[i].set1(VMRegImpl::stack2reg(stk_args));
340 stk_args += 1;
341 }
342 break;
343 case T_DOUBLE:
344 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
345 if (fp_args < Argument::n_float_register_parameters_j) {
346 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
347 } else {
348 stk_args = align_up(stk_args, 2);
349 regs[i].set2(VMRegImpl::stack2reg(stk_args));
350 stk_args += 2;
351 }
352 break;
353 default:
354 ShouldNotReachHere();
355 break;
356 }
357 }
358
359 return stk_args;
360 }
361
362
363 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j;
364 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j;
365
366 int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) {
367
368 // Create the mapping between argument positions and registers.
369
370 static const Register INT_ArgReg[java_return_convention_max_int] = {
371 r0 /* j_rarg7 */, j_rarg6, j_rarg5, j_rarg4, j_rarg3, j_rarg2, j_rarg1, j_rarg0
372 };
373
374 static const FloatRegister FP_ArgReg[java_return_convention_max_float] = {
375 j_farg0, j_farg1, j_farg2, j_farg3, j_farg4, j_farg5, j_farg6, j_farg7
376 };
377
378 uint int_args = 0;
379 uint fp_args = 0;
380
381 for (int i = 0; i < total_args_passed; i++) {
382 switch (sig_bt[i]) {
383 case T_BOOLEAN:
384 case T_CHAR:
385 case T_BYTE:
386 case T_SHORT:
387 case T_INT:
388 if (int_args < SharedRuntime::java_return_convention_max_int) {
389 regs[i].set1(INT_ArgReg[int_args]->as_VMReg());
390 int_args ++;
391 } else {
392 return -1;
393 }
394 break;
395 case T_VOID:
396 // halves of T_LONG or T_DOUBLE
397 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
398 regs[i].set_bad();
399 break;
400 case T_LONG:
401 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
402 // fall through
403 case T_OBJECT:
404 case T_ARRAY:
405 case T_ADDRESS:
406 // Should T_METADATA be added to java_calling_convention as well ?
407 case T_METADATA:
408 if (int_args < SharedRuntime::java_return_convention_max_int) {
409 regs[i].set2(INT_ArgReg[int_args]->as_VMReg());
410 int_args ++;
411 } else {
412 return -1;
413 }
414 break;
415 case T_FLOAT:
416 if (fp_args < SharedRuntime::java_return_convention_max_float) {
417 regs[i].set1(FP_ArgReg[fp_args]->as_VMReg());
418 fp_args ++;
419 } else {
420 return -1;
421 }
422 break;
423 case T_DOUBLE:
424 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
425 if (fp_args < SharedRuntime::java_return_convention_max_float) {
426 regs[i].set2(FP_ArgReg[fp_args]->as_VMReg());
427 fp_args ++;
428 } else {
429 return -1;
430 }
431 break;
432 default:
433 ShouldNotReachHere();
434 break;
435 }
436 }
437
438 return int_args + fp_args;
439 }
440
441 // Patch the callers callsite with entry to compiled code if it exists.
442 static void patch_callers_callsite(MacroAssembler *masm) {
443 Label L;
444 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
445 __ cbz(rscratch1, L);
446
447 __ enter();
448 __ push_CPU_state();
449
450 // VM needs caller's callsite
451 // VM needs target method
452 // This needs to be a long call since we will relocate this adapter to
453 // the codeBuffer and it may not reach
454
455 #ifndef PRODUCT
456 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
457 #endif
458
459 __ mov(c_rarg0, rmethod);
460 __ mov(c_rarg1, lr);
461 __ authenticate_return_address(c_rarg1);
462 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
463 __ blr(rscratch1);
464
465 // Explicit isb required because fixup_callers_callsite may change the code
466 // stream.
467 __ safepoint_isb();
468
469 __ pop_CPU_state();
470 // restore sp
471 __ leave();
472 __ bind(L);
473 }
474
475 // For each inline type argument, sig includes the list of fields of
476 // the inline type. This utility function computes the number of
477 // arguments for the call if inline types are passed by reference (the
478 // calling convention the interpreter expects).
479 static int compute_total_args_passed_int(const GrowableArray<SigEntry>* sig_extended) {
480 int total_args_passed = 0;
481 if (InlineTypePassFieldsAsArgs) {
482 for (int i = 0; i < sig_extended->length(); i++) {
483 BasicType bt = sig_extended->at(i)._bt;
484 if (bt == T_METADATA) {
485 // In sig_extended, an inline type argument starts with:
486 // T_METADATA, followed by the types of the fields of the
487 // inline type and T_VOID to mark the end of the value
488 // type. Inline types are flattened so, for instance, in the
489 // case of an inline type with an int field and an inline type
490 // field that itself has 2 fields, an int and a long:
491 // T_METADATA T_INT T_METADATA T_INT T_LONG T_VOID (second
492 // slot for the T_LONG) T_VOID (inner inline type) T_VOID
493 // (outer inline type)
494 total_args_passed++;
495 int vt = 1;
496 do {
497 i++;
498 BasicType bt = sig_extended->at(i)._bt;
499 BasicType prev_bt = sig_extended->at(i-1)._bt;
500 if (bt == T_METADATA) {
501 vt++;
502 } else if (bt == T_VOID &&
503 prev_bt != T_LONG &&
504 prev_bt != T_DOUBLE) {
505 vt--;
506 }
507 } while (vt != 0);
508 } else {
509 total_args_passed++;
510 }
511 }
512 } else {
513 total_args_passed = sig_extended->length();
514 }
515 return total_args_passed;
516 }
517
518
519 static void gen_c2i_adapter_helper(MacroAssembler* masm,
520 BasicType bt,
521 BasicType prev_bt,
522 size_t size_in_bytes,
523 const VMRegPair& reg_pair,
524 const Address& to,
525 Register tmp1,
526 Register tmp2,
527 Register tmp3,
528 int extraspace,
529 bool is_oop) {
530 if (bt == T_VOID) {
531 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half");
532 return;
533 }
534
535 // Say 4 args:
536 // i st_off
537 // 0 32 T_LONG
538 // 1 24 T_VOID
539 // 2 16 T_OBJECT
540 // 3 8 T_BOOL
541 // - 0 return address
542 //
543 // However to make thing extra confusing. Because we can fit a Java long/double in
544 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
545 // leaves one slot empty and only stores to a single slot. In this case the
546 // slot that is occupied is the T_VOID slot. See I said it was confusing.
547
548 bool wide = (size_in_bytes == wordSize);
549 VMReg r_1 = reg_pair.first();
550 VMReg r_2 = reg_pair.second();
551 assert(r_2->is_valid() == wide, "invalid size");
552 if (!r_1->is_valid()) {
553 assert(!r_2->is_valid(), "");
554 return;
555 }
556
557 if (!r_1->is_FloatRegister()) {
558 Register val = r25;
559 if (r_1->is_stack()) {
560 // memory to memory use r25 (scratch registers is used by store_heap_oop)
561 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
562 __ load_sized_value(val, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
563 } else {
564 val = r_1->as_Register();
565 }
566 assert_different_registers(to.base(), val, tmp1, tmp2, tmp3);
567 if (is_oop) {
568 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep it valid.
569 __ push(to.base(), sp);
570 __ store_heap_oop(to, val, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
571 __ pop(to.base(), sp);
572 } else {
573 __ store_sized_value(to, val, size_in_bytes);
574 }
575 } else {
576 if (wide) {
577 __ strd(r_1->as_FloatRegister(), to);
578 } else {
579 // only a float use just part of the slot
580 __ strs(r_1->as_FloatRegister(), to);
581 }
582 }
583 }
584
585 static void gen_c2i_adapter(MacroAssembler *masm,
586 const GrowableArray<SigEntry>* sig_extended,
587 const VMRegPair *regs,
588 bool requires_clinit_barrier,
589 address& c2i_no_clinit_check_entry,
590 Label& skip_fixup,
591 address start,
592 OopMapSet* oop_maps,
593 int& frame_complete,
594 int& frame_size_in_words,
595 bool alloc_inline_receiver) {
596 if (requires_clinit_barrier) {
597 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
598 Label L_skip_barrier;
599
600 { // Bypass the barrier for non-static methods
601 __ ldrh(rscratch1, Address(rmethod, Method::access_flags_offset()));
602 __ andsw(zr, rscratch1, JVM_ACC_STATIC);
603 __ br(Assembler::EQ, L_skip_barrier); // non-static
604 }
605
606 __ load_method_holder(rscratch2, rmethod);
607 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
608 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
609
610 __ bind(L_skip_barrier);
611 c2i_no_clinit_check_entry = __ pc();
612 }
613
614 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
615 bs->c2i_entry_barrier(masm);
616
617 // Before we get into the guts of the C2I adapter, see if we should be here
618 // at all. We've come from compiled code and are attempting to jump to the
619 // interpreter, which means the caller made a static call to get here
620 // (vcalls always get a compiled target if there is one). Check for a
621 // compiled target. If there is one, we need to patch the caller's call.
622 patch_callers_callsite(masm);
623
624 __ bind(skip_fixup);
625
626 // Name some registers to be used in the following code. We can use
627 // anything except r0-r7 which are arguments in the Java calling
628 // convention, rmethod (r12), and r19 which holds the outgoing sender
629 // SP for the interpreter.
630 Register buf_array = r10; // Array of buffered inline types
631 Register buf_oop = r11; // Buffered inline type oop
632 Register tmp1 = r15;
633 Register tmp2 = r16;
634 Register tmp3 = r17;
635
636 #ifndef ASSERT
637 RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
638 assert(clobbered_gp_regs.contains(buf_array), "buf_array must be saved explicitly if it's not a clobber");
639 assert(clobbered_gp_regs.contains(buf_oop), "buf_oop must be saved explicitly if it's not a clobber");
640 assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
641 assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
642 assert(clobbered_gp_regs.contains(tmp3), "tmp3 must be saved explicitly if it's not a clobber");
643 #endif
644
645 if (InlineTypePassFieldsAsArgs) {
646 // Is there an inline type argument?
647 bool has_inline_argument = false;
648 for (int i = 0; i < sig_extended->length() && !has_inline_argument; i++) {
649 has_inline_argument = (sig_extended->at(i)._bt == T_METADATA);
650 }
651 if (has_inline_argument) {
652 // There is at least an inline type argument: we're coming from
653 // compiled code so we have no buffers to back the inline types
654 // Allocate the buffers here with a runtime call.
655 RegisterSaver reg_save(true /* save_vectors */);
656 OopMap* map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
657
658 frame_complete = __ offset();
659 address the_pc = __ pc();
660
661 Label retaddr;
662 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
663
664 __ mov(c_rarg0, rthread);
665 __ mov(c_rarg1, rmethod);
666 __ mov(c_rarg2, (int64_t)alloc_inline_receiver);
667
668 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::allocate_inline_types)));
669 __ blr(rscratch1);
670 __ bind(retaddr);
671
672 oop_maps->add_gc_map(__ pc() - start, map);
673 __ reset_last_Java_frame(false);
674
675 reg_save.restore_live_registers(masm);
676
677 Label no_exception;
678 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
679 __ cbz(rscratch1, no_exception);
680
681 __ str(zr, Address(rthread, JavaThread::vm_result_oop_offset()));
682 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
683 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
684
685 __ bind(no_exception);
686
687 // We get an array of objects from the runtime call
688 __ get_vm_result_oop(buf_array, rthread);
689 __ get_vm_result_metadata(rmethod, rthread); // TODO: required to keep the callee Method live?
690 }
691 }
692
693 // Since all args are passed on the stack, total_args_passed *
694 // Interpreter::stackElementSize is the space we need.
695
696 int total_args_passed = compute_total_args_passed_int(sig_extended);
697 int extraspace = total_args_passed * Interpreter::stackElementSize;
698
699 // stack is aligned, keep it that way
700 extraspace = align_up(extraspace, StackAlignmentInBytes);
701
702 // set senderSP value
703 __ mov(r19_sender_sp, sp);
704
705 __ sub(sp, sp, extraspace);
706
707 // Now write the args into the outgoing interpreter space
708
709 // next_arg_comp is the next argument from the compiler point of
710 // view (inline type fields are passed in registers/on the stack). In
711 // sig_extended, an inline type argument starts with: T_METADATA,
712 // followed by the types of the fields of the inline type and T_VOID
713 // to mark the end of the inline type. ignored counts the number of
714 // T_METADATA/T_VOID. next_vt_arg is the next inline type argument:
715 // used to get the buffer for that argument from the pool of buffers
716 // we allocated above and want to pass to the
717 // interpreter. next_arg_int is the next argument from the
718 // interpreter point of view (inline types are passed by reference).
719 for (int next_arg_comp = 0, ignored = 0, next_vt_arg = 0, next_arg_int = 0;
720 next_arg_comp < sig_extended->length(); next_arg_comp++) {
721 assert(ignored <= next_arg_comp, "shouldn't skip over more slots than there are arguments");
722 assert(next_arg_int <= total_args_passed, "more arguments for the interpreter than expected?");
723 BasicType bt = sig_extended->at(next_arg_comp)._bt;
724 int st_off = (total_args_passed - next_arg_int - 1) * Interpreter::stackElementSize;
725 if (!InlineTypePassFieldsAsArgs || bt != T_METADATA) {
726 int next_off = st_off - Interpreter::stackElementSize;
727 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : st_off;
728 const VMRegPair reg_pair = regs[next_arg_comp-ignored];
729 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4;
730 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL,
731 size_in_bytes, reg_pair, Address(sp, offset), tmp1, tmp2, tmp3, extraspace, false);
732 next_arg_int++;
733 #ifdef ASSERT
734 if (bt == T_LONG || bt == T_DOUBLE) {
735 // Overwrite the unused slot with known junk
736 __ mov(rscratch1, CONST64(0xdeadffffdeadaaaa));
737 __ str(rscratch1, Address(sp, st_off));
738 }
739 #endif /* ASSERT */
740 } else {
741 ignored++;
742 next_arg_int++;
743 int vt = 1;
744 // write fields we get from compiled code in registers/stack
745 // slots to the buffer: we know we are done with that inline type
746 // argument when we hit the T_VOID that acts as an end of inline
747 // type delimiter for this inline type. Inline types are flattened
748 // so we might encounter embedded inline types. Each entry in
749 // sig_extended contains a field offset in the buffer.
750 Label L_null;
751 Label not_null_buffer;
752 do {
753 next_arg_comp++;
754 BasicType bt = sig_extended->at(next_arg_comp)._bt;
755 BasicType prev_bt = sig_extended->at(next_arg_comp - 1)._bt;
756 if (bt == T_METADATA) {
757 vt++;
758 ignored++;
759 } else if (bt == T_VOID && prev_bt != T_LONG && prev_bt != T_DOUBLE) {
760 vt--;
761 ignored++;
762 } else if (sig_extended->at(next_arg_comp)._vt_oop) {
763 VMReg buffer = regs[next_arg_comp-ignored].first();
764 if (buffer->is_stack()) {
765 int ld_off = buffer->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
766 __ ldr(buf_oop, Address(sp, ld_off));
767 } else {
768 __ mov(buf_oop, buffer->as_Register());
769 }
770 __ cbnz(buf_oop, not_null_buffer);
771 // get the buffer from the just allocated pool of buffers
772 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + next_vt_arg * type2aelembytes(T_OBJECT);
773 __ load_heap_oop(buf_oop, Address(buf_array, index), rscratch1, tmp2);
774 next_vt_arg++;
775 } else {
776 int off = sig_extended->at(next_arg_comp)._offset;
777 if (off == -1) {
778 // Nullable inline type argument, emit null check
779 VMReg reg = regs[next_arg_comp-ignored].first();
780 Label L_notNull;
781 if (reg->is_stack()) {
782 int ld_off = reg->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
783 __ ldrb(tmp1, Address(sp, ld_off));
784 __ cbnz(tmp1, L_notNull);
785 } else {
786 __ cbnz(reg->as_Register(), L_notNull);
787 }
788 __ str(zr, Address(sp, st_off));
789 __ b(L_null);
790 __ bind(L_notNull);
791 continue;
792 }
793 assert(off > 0, "offset in object should be positive");
794 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
795 bool is_oop = is_reference_type(bt);
796 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL,
797 size_in_bytes, regs[next_arg_comp-ignored], Address(buf_oop, off), tmp1, tmp2, tmp3, extraspace, is_oop);
798 }
799 } while (vt != 0);
800 // pass the buffer to the interpreter
801 __ bind(not_null_buffer);
802 __ str(buf_oop, Address(sp, st_off));
803 __ bind(L_null);
804 }
805 }
806
807 __ mov(esp, sp); // Interp expects args on caller's expression stack
808
809 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
810 __ br(rscratch1);
811 }
812
813 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, int comp_args_on_stack, const GrowableArray<SigEntry>* sig, const VMRegPair *regs) {
814
815
816 // Note: r19_sender_sp contains the senderSP on entry. We must
817 // preserve it since we may do a i2c -> c2i transition if we lose a
818 // race where compiled code goes non-entrant while we get args
819 // ready.
820
821 // Adapters are frameless.
822
823 // An i2c adapter is frameless because the *caller* frame, which is
824 // interpreted, routinely repairs its own esp (from
825 // interpreter_frame_last_sp), even if a callee has modified the
826 // stack pointer. It also recalculates and aligns sp.
827
828 // A c2i adapter is frameless because the *callee* frame, which is
829 // interpreted, routinely repairs its caller's sp (from sender_sp,
830 // which is set up via the senderSP register).
831
832 // In other words, if *either* the caller or callee is interpreted, we can
833 // get the stack pointer repaired after a call.
834
835 // This is why c2i and i2c adapters cannot be indefinitely composed.
836 // In particular, if a c2i adapter were to somehow call an i2c adapter,
837 // both caller and callee would be compiled methods, and neither would
838 // clean up the stack pointer changes performed by the two adapters.
839 // If this happens, control eventually transfers back to the compiled
840 // caller, but with an uncorrected stack, causing delayed havoc.
841
842 // Cut-out for having no stack args.
843 int comp_words_on_stack = 0;
844 if (comp_args_on_stack) {
845 comp_words_on_stack = align_up(comp_args_on_stack * VMRegImpl::stack_slot_size, wordSize) >> LogBytesPerWord;
846 __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
847 __ andr(sp, rscratch1, -16);
848 }
849
850 // Will jump to the compiled code just as if compiled code was doing it.
851 // Pre-load the register-jump target early, to schedule it better.
852 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_inline_offset())));
853
854 #if INCLUDE_JVMCI
855 if (EnableJVMCI) {
856 // check if this call should be routed towards a specific entry point
857 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
858 Label no_alternative_target;
859 __ cbz(rscratch2, no_alternative_target);
860 __ mov(rscratch1, rscratch2);
861 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
862 __ bind(no_alternative_target);
863 }
864 #endif // INCLUDE_JVMCI
865
866 int total_args_passed = sig->length();
867
868 // Now generate the shuffle code.
869 for (int i = 0; i < total_args_passed; i++) {
870 BasicType bt = sig->at(i)._bt;
871 if (bt == T_VOID) {
872 assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half");
873 continue;
874 }
875
876 // Pick up 0, 1 or 2 words from SP+offset.
877 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), "scrambled load targets?");
878
879 // Load in argument order going down.
880 int ld_off = (total_args_passed - i - 1) * Interpreter::stackElementSize;
881 // Point to interpreter value (vs. tag)
882 int next_off = ld_off - Interpreter::stackElementSize;
883 //
884 //
885 //
886 VMReg r_1 = regs[i].first();
887 VMReg r_2 = regs[i].second();
888 if (!r_1->is_valid()) {
889 assert(!r_2->is_valid(), "");
890 continue;
891 }
892 if (r_1->is_stack()) {
893 // Convert stack slot to an SP offset (+ wordSize to account for return address )
894 int st_off = regs[i].first()->reg2stack() * VMRegImpl::stack_slot_size;
895 if (!r_2->is_valid()) {
896 // sign extend???
897 __ ldrsw(rscratch2, Address(esp, ld_off));
898 __ str(rscratch2, Address(sp, st_off));
899 } else {
900 //
901 // We are using two optoregs. This can be either T_OBJECT,
902 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
903 // two slots but only uses one for thr T_LONG or T_DOUBLE case
904 // So we must adjust where to pick up the data to match the
905 // interpreter.
906 //
907 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
908 // are accessed as negative so LSW is at LOW address
909
910 // ld_off is MSW so get LSW
911 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
912 __ ldr(rscratch2, Address(esp, offset));
913 // st_off is LSW (i.e. reg.first())
914 __ str(rscratch2, Address(sp, st_off));
915 }
916 } else if (r_1->is_Register()) { // Register argument
917 Register r = r_1->as_Register();
918 if (r_2->is_valid()) {
919 //
920 // We are using two VMRegs. This can be either T_OBJECT,
921 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
922 // two slots but only uses one for thr T_LONG or T_DOUBLE case
923 // So we must adjust where to pick up the data to match the
924 // interpreter.
925
926 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
927
928 // this can be a misaligned move
929 __ ldr(r, Address(esp, offset));
930 } else {
931 // sign extend and use a full word?
932 __ ldrw(r, Address(esp, ld_off));
933 }
934 } else {
935 if (!r_2->is_valid()) {
936 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
937 } else {
938 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
939 }
940 }
941 }
942
943
944 __ mov(rscratch2, rscratch1);
945 __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
946 __ mov(rscratch1, rscratch2);
947
948 // 6243940 We might end up in handle_wrong_method if
949 // the callee is deoptimized as we race thru here. If that
950 // happens we don't want to take a safepoint because the
951 // caller frame will look interpreted and arguments are now
952 // "compiled" so it is much better to make this transition
953 // invisible to the stack walking code. Unfortunately if
954 // we try and find the callee by normal means a safepoint
955 // is possible. So we stash the desired callee in the thread
956 // and the vm will find there should this case occur.
957
958 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
959 __ br(rscratch1);
960 }
961
962 static void gen_inline_cache_check(MacroAssembler *masm, Label& skip_fixup) {
963 Register data = rscratch2;
964 __ ic_check(1 /* end_alignment */);
965 __ ldr(rmethod, Address(data, CompiledICData::speculated_method_offset()));
966
967 // Method might have been compiled since the call site was patched to
968 // interpreted; if that is the case treat it as a miss so we can get
969 // the call site corrected.
970 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
971 __ cbz(rscratch1, skip_fixup);
972 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
973 }
974
975 // ---------------------------------------------------------------
976 void SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm,
977 int comp_args_on_stack,
978 const GrowableArray<SigEntry>* sig,
979 const VMRegPair* regs,
980 const GrowableArray<SigEntry>* sig_cc,
981 const VMRegPair* regs_cc,
982 const GrowableArray<SigEntry>* sig_cc_ro,
983 const VMRegPair* regs_cc_ro,
984 address entry_address[AdapterBlob::ENTRY_COUNT],
985 AdapterBlob*& new_adapter,
986 bool allocate_code_blob) {
987
988 entry_address[AdapterBlob::I2C] = __ pc();
989 gen_i2c_adapter(masm, comp_args_on_stack, sig, regs);
990
991 // -------------------------------------------------------------------------
992 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls
993 // to the interpreter. The args start out packed in the compiled layout. They
994 // need to be unpacked into the interpreter layout. This will almost always
995 // require some stack space. We grow the current (compiled) stack, then repack
996 // the args. We finally end in a jump to the generic interpreter entry point.
997 // On exit from the interpreter, the interpreter will restore our SP (lest the
998 // compiled code, which relies solely on SP and not FP, get sick).
999
1000 entry_address[AdapterBlob::C2I_Unverified] = __ pc();
1001 entry_address[AdapterBlob::C2I_Unverified_Inline] = __ pc();
1002 Label skip_fixup;
1003
1004 gen_inline_cache_check(masm, skip_fixup);
1005
1006 OopMapSet* oop_maps = new OopMapSet();
1007 int frame_complete = CodeOffsets::frame_never_safe;
1008 int frame_size_in_words = 0;
1009
1010 // Scalarized c2i adapter with non-scalarized receiver (i.e., don't pack receiver)
1011 entry_address[AdapterBlob::C2I_No_Clinit_Check] = nullptr;
1012 entry_address[AdapterBlob::C2I_Inline_RO] = __ pc();
1013 if (regs_cc != regs_cc_ro) {
1014 // No class init barrier needed because method is guaranteed to be non-static
1015 gen_c2i_adapter(masm, sig_cc_ro, regs_cc_ro, /* requires_clinit_barrier = */ false, entry_address[AdapterBlob::C2I_No_Clinit_Check],
1016 skip_fixup, entry_address[AdapterBlob::I2C], oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false);
1017 skip_fixup.reset();
1018 }
1019
1020 // Scalarized c2i adapter
1021 entry_address[AdapterBlob::C2I] = __ pc();
1022 entry_address[AdapterBlob::C2I_Inline] = __ pc();
1023 gen_c2i_adapter(masm, sig_cc, regs_cc, /* requires_clinit_barrier = */ true, entry_address[AdapterBlob::C2I_No_Clinit_Check],
1024 skip_fixup, entry_address[AdapterBlob::I2C], oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ true);
1025
1026 // Non-scalarized c2i adapter
1027 if (regs != regs_cc) {
1028 entry_address[AdapterBlob::C2I_Unverified_Inline] = __ pc();
1029 Label inline_entry_skip_fixup;
1030 gen_inline_cache_check(masm, inline_entry_skip_fixup);
1031
1032 entry_address[AdapterBlob::C2I_Inline] = __ pc();
1033 gen_c2i_adapter(masm, sig, regs, /* requires_clinit_barrier = */ true, entry_address[AdapterBlob::C2I_No_Clinit_Check],
1034 inline_entry_skip_fixup, entry_address[AdapterBlob::I2C], oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false);
1035 }
1036
1037 // The c2i adapters might safepoint and trigger a GC. The caller must make sure that
1038 // the GC knows about the location of oop argument locations passed to the c2i adapter.
1039 if (allocate_code_blob) {
1040 bool caller_must_gc_arguments = (regs != regs_cc);
1041 int entry_offset[AdapterHandlerEntry::ENTRIES_COUNT];
1042 assert(AdapterHandlerEntry::ENTRIES_COUNT == 7, "sanity");
1043 AdapterHandlerLibrary::address_to_offset(entry_address, entry_offset);
1044 new_adapter = AdapterBlob::create(masm->code(), entry_offset, frame_complete, frame_size_in_words, oop_maps, caller_must_gc_arguments);
1045 }
1046 }
1047
1048 static int c_calling_convention_priv(const BasicType *sig_bt,
1049 VMRegPair *regs,
1050 int total_args_passed) {
1051
1052 // We return the amount of VMRegImpl stack slots we need to reserve for all
1053 // the arguments NOT counting out_preserve_stack_slots.
1054
1055 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
1056 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7
1057 };
1058 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1059 c_farg0, c_farg1, c_farg2, c_farg3,
1060 c_farg4, c_farg5, c_farg6, c_farg7
1061 };
1062
1063 uint int_args = 0;
1064 uint fp_args = 0;
1065 uint stk_args = 0; // inc by 2 each time
1066
1067 for (int i = 0; i < total_args_passed; i++) {
1068 switch (sig_bt[i]) {
1069 case T_BOOLEAN:
1070 case T_CHAR:
1071 case T_BYTE:
1072 case T_SHORT:
1073 case T_INT:
1074 if (int_args < Argument::n_int_register_parameters_c) {
1075 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1076 } else {
1077 #ifdef __APPLE__
1078 // Less-than word types are stored one after another.
1079 // The code is unable to handle this so bailout.
1080 return -1;
1081 #endif
1082 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1083 stk_args += 2;
1084 }
1085 break;
1086 case T_LONG:
1087 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1088 // fall through
1089 case T_OBJECT:
1090 case T_ARRAY:
1091 case T_ADDRESS:
1092 case T_METADATA:
1093 if (int_args < Argument::n_int_register_parameters_c) {
1094 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1095 } else {
1096 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1097 stk_args += 2;
1098 }
1099 break;
1100 case T_FLOAT:
1101 if (fp_args < Argument::n_float_register_parameters_c) {
1102 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1103 } else {
1104 #ifdef __APPLE__
1105 // Less-than word types are stored one after another.
1106 // The code is unable to handle this so bailout.
1107 return -1;
1108 #endif
1109 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1110 stk_args += 2;
1111 }
1112 break;
1113 case T_DOUBLE:
1114 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1115 if (fp_args < Argument::n_float_register_parameters_c) {
1116 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1117 } else {
1118 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1119 stk_args += 2;
1120 }
1121 break;
1122 case T_VOID: // Halves of longs and doubles
1123 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1124 regs[i].set_bad();
1125 break;
1126 default:
1127 ShouldNotReachHere();
1128 break;
1129 }
1130 }
1131
1132 return stk_args;
1133 }
1134
1135 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1136 uint num_bits,
1137 uint total_args_passed) {
1138 // More than 8 argument inputs are not supported now.
1139 assert(total_args_passed <= Argument::n_float_register_parameters_c, "unsupported");
1140 assert(num_bits >= 64 && num_bits <= 2048 && is_power_of_2(num_bits), "unsupported");
1141
1142 static const FloatRegister VEC_ArgReg[Argument::n_float_register_parameters_c] = {
1143 v0, v1, v2, v3, v4, v5, v6, v7
1144 };
1145
1146 // On SVE, we use the same vector registers with 128-bit vector registers on NEON.
1147 int next_reg_val = num_bits == 64 ? 1 : 3;
1148 for (uint i = 0; i < total_args_passed; i++) {
1149 VMReg vmreg = VEC_ArgReg[i]->as_VMReg();
1150 regs[i].set_pair(vmreg->next(next_reg_val), vmreg);
1151 }
1152 return 0;
1153 }
1154
1155 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1156 VMRegPair *regs,
1157 int total_args_passed)
1158 {
1159 int result = c_calling_convention_priv(sig_bt, regs, total_args_passed);
1160 guarantee(result >= 0, "Unsupported arguments configuration");
1161 return result;
1162 }
1163
1164
1165 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1166 // We always ignore the frame_slots arg and just use the space just below frame pointer
1167 // which by this time is free to use
1168 switch (ret_type) {
1169 case T_FLOAT:
1170 __ strs(v0, Address(rfp, -wordSize));
1171 break;
1172 case T_DOUBLE:
1173 __ strd(v0, Address(rfp, -wordSize));
1174 break;
1175 case T_VOID: break;
1176 default: {
1177 __ str(r0, Address(rfp, -wordSize));
1178 }
1179 }
1180 }
1181
1182 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1183 // We always ignore the frame_slots arg and just use the space just below frame pointer
1184 // which by this time is free to use
1185 switch (ret_type) {
1186 case T_FLOAT:
1187 __ ldrs(v0, Address(rfp, -wordSize));
1188 break;
1189 case T_DOUBLE:
1190 __ ldrd(v0, Address(rfp, -wordSize));
1191 break;
1192 case T_VOID: break;
1193 default: {
1194 __ ldr(r0, Address(rfp, -wordSize));
1195 }
1196 }
1197 }
1198 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1199 RegSet x;
1200 for ( int i = first_arg ; i < arg_count ; i++ ) {
1201 if (args[i].first()->is_Register()) {
1202 x = x + args[i].first()->as_Register();
1203 } else if (args[i].first()->is_FloatRegister()) {
1204 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
1205 }
1206 }
1207 __ push(x, sp);
1208 }
1209
1210 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1211 RegSet x;
1212 for ( int i = first_arg ; i < arg_count ; i++ ) {
1213 if (args[i].first()->is_Register()) {
1214 x = x + args[i].first()->as_Register();
1215 } else {
1216 ;
1217 }
1218 }
1219 __ pop(x, sp);
1220 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1221 if (args[i].first()->is_Register()) {
1222 ;
1223 } else if (args[i].first()->is_FloatRegister()) {
1224 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
1225 }
1226 }
1227 }
1228
1229 static void verify_oop_args(MacroAssembler* masm,
1230 const methodHandle& method,
1231 const BasicType* sig_bt,
1232 const VMRegPair* regs) {
1233 Register temp_reg = r19; // not part of any compiled calling seq
1234 if (VerifyOops) {
1235 for (int i = 0; i < method->size_of_parameters(); i++) {
1236 if (sig_bt[i] == T_OBJECT ||
1237 sig_bt[i] == T_ARRAY) {
1238 VMReg r = regs[i].first();
1239 assert(r->is_valid(), "bad oop arg");
1240 if (r->is_stack()) {
1241 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1242 __ verify_oop(temp_reg);
1243 } else {
1244 __ verify_oop(r->as_Register());
1245 }
1246 }
1247 }
1248 }
1249 }
1250
1251 // on exit, sp points to the ContinuationEntry
1252 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) {
1253 assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, "");
1254 assert(in_bytes(ContinuationEntry::cont_offset()) % VMRegImpl::stack_slot_size == 0, "");
1255 assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, "");
1256
1257 stack_slots += (int)ContinuationEntry::size()/wordSize;
1258 __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata
1259
1260 OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/);
1261
1262 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1263 __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset()));
1264 __ mov(rscratch1, sp); // we can't use sp as the source in str
1265 __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1266
1267 return map;
1268 }
1269
1270 // on entry c_rarg1 points to the continuation
1271 // sp points to ContinuationEntry
1272 // c_rarg3 -- isVirtualThread
1273 static void fill_continuation_entry(MacroAssembler* masm) {
1274 #ifdef ASSERT
1275 __ movw(rscratch1, ContinuationEntry::cookie_value());
1276 __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset()));
1277 #endif
1278
1279 __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset()));
1280 __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset()));
1281 __ str (zr, Address(sp, ContinuationEntry::chunk_offset()));
1282 __ strw(zr, Address(sp, ContinuationEntry::argsize_offset()));
1283 __ strw(zr, Address(sp, ContinuationEntry::pin_count_offset()));
1284
1285 __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1286 __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1287
1288 __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset()));
1289 }
1290
1291 // on entry, sp points to the ContinuationEntry
1292 // on exit, rfp points to the spilled rfp in the entry frame
1293 static void continuation_enter_cleanup(MacroAssembler* masm) {
1294 #ifndef PRODUCT
1295 Label OK;
1296 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1297 __ cmp(sp, rscratch1);
1298 __ br(Assembler::EQ, OK);
1299 __ stop("incorrect sp1");
1300 __ bind(OK);
1301 #endif
1302 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1303 __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1304 __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset()));
1305 __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset()));
1306 __ add(rfp, sp, (int)ContinuationEntry::size());
1307 }
1308
1309 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
1310 // On entry: c_rarg1 -- the continuation object
1311 // c_rarg2 -- isContinue
1312 // c_rarg3 -- isVirtualThread
1313 static void gen_continuation_enter(MacroAssembler* masm,
1314 const methodHandle& method,
1315 const BasicType* sig_bt,
1316 const VMRegPair* regs,
1317 int& exception_offset,
1318 OopMapSet*oop_maps,
1319 int& frame_complete,
1320 int& stack_slots,
1321 int& interpreted_entry_offset,
1322 int& compiled_entry_offset) {
1323 //verify_oop_args(masm, method, sig_bt, regs);
1324 Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
1325
1326 address start = __ pc();
1327
1328 Label call_thaw, exit;
1329
1330 // i2i entry used at interp_only_mode only
1331 interpreted_entry_offset = __ pc() - start;
1332 {
1333
1334 #ifdef ASSERT
1335 Label is_interp_only;
1336 __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
1337 __ cbnzw(rscratch1, is_interp_only);
1338 __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
1339 __ bind(is_interp_only);
1340 #endif
1341
1342 // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
1343 __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2));
1344 __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1));
1345 __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0));
1346 __ push_cont_fastpath(rthread);
1347
1348 __ enter();
1349 stack_slots = 2; // will be adjusted in setup
1350 OopMap* map = continuation_enter_setup(masm, stack_slots);
1351 // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
1352 // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
1353
1354 fill_continuation_entry(masm);
1355
1356 __ cbnz(c_rarg2, call_thaw);
1357
1358 const address tr_call = __ trampoline_call(resolve);
1359 if (tr_call == nullptr) {
1360 fatal("CodeCache is full at gen_continuation_enter");
1361 }
1362
1363 oop_maps->add_gc_map(__ pc() - start, map);
1364 __ post_call_nop();
1365
1366 __ b(exit);
1367
1368 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1369 if (stub == nullptr) {
1370 fatal("CodeCache is full at gen_continuation_enter");
1371 }
1372 }
1373
1374 // compiled entry
1375 __ align(CodeEntryAlignment);
1376 compiled_entry_offset = __ pc() - start;
1377
1378 __ enter();
1379 stack_slots = 2; // will be adjusted in setup
1380 OopMap* map = continuation_enter_setup(masm, stack_slots);
1381 frame_complete = __ pc() - start;
1382
1383 fill_continuation_entry(masm);
1384
1385 __ cbnz(c_rarg2, call_thaw);
1386
1387 const address tr_call = __ trampoline_call(resolve);
1388 if (tr_call == nullptr) {
1389 fatal("CodeCache is full at gen_continuation_enter");
1390 }
1391
1392 oop_maps->add_gc_map(__ pc() - start, map);
1393 __ post_call_nop();
1394
1395 __ b(exit);
1396
1397 __ bind(call_thaw);
1398
1399 ContinuationEntry::_thaw_call_pc_offset = __ pc() - start;
1400 __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1401 oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1402 ContinuationEntry::_return_pc_offset = __ pc() - start;
1403 __ post_call_nop();
1404
1405 __ bind(exit);
1406 ContinuationEntry::_cleanup_offset = __ pc() - start;
1407 continuation_enter_cleanup(masm);
1408 __ leave();
1409 __ ret(lr);
1410
1411 /// exception handling
1412
1413 exception_offset = __ pc() - start;
1414 {
1415 __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1416
1417 continuation_enter_cleanup(masm);
1418
1419 __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1420 __ authenticate_return_address(c_rarg1);
1421 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1422
1423 // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1424
1425 __ mov(r1, r0); // the exception handler
1426 __ mov(r0, r19); // restore return value contaning the exception oop
1427 __ verify_oop(r0);
1428
1429 __ leave();
1430 __ mov(r3, lr);
1431 __ br(r1); // the exception handler
1432 }
1433
1434 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1435 if (stub == nullptr) {
1436 fatal("CodeCache is full at gen_continuation_enter");
1437 }
1438 }
1439
1440 static void gen_continuation_yield(MacroAssembler* masm,
1441 const methodHandle& method,
1442 const BasicType* sig_bt,
1443 const VMRegPair* regs,
1444 OopMapSet* oop_maps,
1445 int& frame_complete,
1446 int& stack_slots,
1447 int& compiled_entry_offset) {
1448 enum layout {
1449 rfp_off1,
1450 rfp_off2,
1451 lr_off,
1452 lr_off2,
1453 framesize // inclusive of return address
1454 };
1455 // assert(is_even(framesize/2), "sp not 16-byte aligned");
1456 stack_slots = framesize / VMRegImpl::slots_per_word;
1457 assert(stack_slots == 2, "recheck layout");
1458
1459 address start = __ pc();
1460
1461 compiled_entry_offset = __ pc() - start;
1462 __ enter();
1463
1464 __ mov(c_rarg1, sp);
1465
1466 frame_complete = __ pc() - start;
1467 address the_pc = __ pc();
1468
1469 __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1470
1471 __ mov(c_rarg0, rthread);
1472 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
1473 __ call_VM_leaf(Continuation::freeze_entry(), 2);
1474 __ reset_last_Java_frame(true);
1475
1476 Label pinned;
1477
1478 __ cbnz(r0, pinned);
1479
1480 // We've succeeded, set sp to the ContinuationEntry
1481 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1482 __ mov(sp, rscratch1);
1483 continuation_enter_cleanup(masm);
1484
1485 __ bind(pinned); // pinned -- return to caller
1486
1487 // handle pending exception thrown by freeze
1488 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1489 Label ok;
1490 __ cbz(rscratch1, ok);
1491 __ leave();
1492 __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry()));
1493 __ br(rscratch1);
1494 __ bind(ok);
1495
1496 __ leave();
1497 __ ret(lr);
1498
1499 OopMap* map = new OopMap(framesize, 1);
1500 oop_maps->add_gc_map(the_pc - start, map);
1501 }
1502
1503 void SharedRuntime::continuation_enter_cleanup(MacroAssembler* masm) {
1504 ::continuation_enter_cleanup(masm);
1505 }
1506
1507 static void gen_special_dispatch(MacroAssembler* masm,
1508 const methodHandle& method,
1509 const BasicType* sig_bt,
1510 const VMRegPair* regs) {
1511 verify_oop_args(masm, method, sig_bt, regs);
1512 vmIntrinsics::ID iid = method->intrinsic_id();
1513
1514 // Now write the args into the outgoing interpreter space
1515 bool has_receiver = false;
1516 Register receiver_reg = noreg;
1517 int member_arg_pos = -1;
1518 Register member_reg = noreg;
1519 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1520 if (ref_kind != 0) {
1521 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1522 member_reg = r19; // known to be free at this point
1523 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1524 } else if (iid == vmIntrinsics::_invokeBasic) {
1525 has_receiver = true;
1526 } else if (iid == vmIntrinsics::_linkToNative) {
1527 member_arg_pos = method->size_of_parameters() - 1; // trailing NativeEntryPoint argument
1528 member_reg = r19; // known to be free at this point
1529 } else {
1530 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1531 }
1532
1533 if (member_reg != noreg) {
1534 // Load the member_arg into register, if necessary.
1535 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1536 VMReg r = regs[member_arg_pos].first();
1537 if (r->is_stack()) {
1538 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1539 } else {
1540 // no data motion is needed
1541 member_reg = r->as_Register();
1542 }
1543 }
1544
1545 if (has_receiver) {
1546 // Make sure the receiver is loaded into a register.
1547 assert(method->size_of_parameters() > 0, "oob");
1548 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1549 VMReg r = regs[0].first();
1550 assert(r->is_valid(), "bad receiver arg");
1551 if (r->is_stack()) {
1552 // Porting note: This assumes that compiled calling conventions always
1553 // pass the receiver oop in a register. If this is not true on some
1554 // platform, pick a temp and load the receiver from stack.
1555 fatal("receiver always in a register");
1556 receiver_reg = r2; // known to be free at this point
1557 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1558 } else {
1559 // no data motion is needed
1560 receiver_reg = r->as_Register();
1561 }
1562 }
1563
1564 // Figure out which address we are really jumping to:
1565 MethodHandles::generate_method_handle_dispatch(masm, iid,
1566 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1567 }
1568
1569 // ---------------------------------------------------------------------------
1570 // Generate a native wrapper for a given method. The method takes arguments
1571 // in the Java compiled code convention, marshals them to the native
1572 // convention (handlizes oops, etc), transitions to native, makes the call,
1573 // returns to java state (possibly blocking), unhandlizes any result and
1574 // returns.
1575 //
1576 // Critical native functions are a shorthand for the use of
1577 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1578 // functions. The wrapper is expected to unpack the arguments before
1579 // passing them to the callee. Critical native functions leave the state _in_Java,
1580 // since they block out GC.
1581 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1582 // block and the check for pending exceptions it's impossible for them
1583 // to be thrown.
1584 //
1585 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1586 const methodHandle& method,
1587 int compile_id,
1588 BasicType* in_sig_bt,
1589 VMRegPair* in_regs,
1590 BasicType ret_type) {
1591 if (method->is_continuation_native_intrinsic()) {
1592 int exception_offset = -1;
1593 OopMapSet* oop_maps = new OopMapSet();
1594 int frame_complete = -1;
1595 int stack_slots = -1;
1596 int interpreted_entry_offset = -1;
1597 int vep_offset = -1;
1598 if (method->is_continuation_enter_intrinsic()) {
1599 gen_continuation_enter(masm,
1600 method,
1601 in_sig_bt,
1602 in_regs,
1603 exception_offset,
1604 oop_maps,
1605 frame_complete,
1606 stack_slots,
1607 interpreted_entry_offset,
1608 vep_offset);
1609 } else if (method->is_continuation_yield_intrinsic()) {
1610 gen_continuation_yield(masm,
1611 method,
1612 in_sig_bt,
1613 in_regs,
1614 oop_maps,
1615 frame_complete,
1616 stack_slots,
1617 vep_offset);
1618 } else {
1619 guarantee(false, "Unknown Continuation native intrinsic");
1620 }
1621
1622 #ifdef ASSERT
1623 if (method->is_continuation_enter_intrinsic()) {
1624 assert(interpreted_entry_offset != -1, "Must be set");
1625 assert(exception_offset != -1, "Must be set");
1626 } else {
1627 assert(interpreted_entry_offset == -1, "Must be unset");
1628 assert(exception_offset == -1, "Must be unset");
1629 }
1630 assert(frame_complete != -1, "Must be set");
1631 assert(stack_slots != -1, "Must be set");
1632 assert(vep_offset != -1, "Must be set");
1633 #endif
1634
1635 __ flush();
1636 nmethod* nm = nmethod::new_native_nmethod(method,
1637 compile_id,
1638 masm->code(),
1639 vep_offset,
1640 frame_complete,
1641 stack_slots,
1642 in_ByteSize(-1),
1643 in_ByteSize(-1),
1644 oop_maps,
1645 exception_offset);
1646 if (nm == nullptr) return nm;
1647 if (method->is_continuation_enter_intrinsic()) {
1648 ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1649 } else if (method->is_continuation_yield_intrinsic()) {
1650 _cont_doYield_stub = nm;
1651 } else {
1652 guarantee(false, "Unknown Continuation native intrinsic");
1653 }
1654 return nm;
1655 }
1656
1657 if (method->is_method_handle_intrinsic()) {
1658 vmIntrinsics::ID iid = method->intrinsic_id();
1659 intptr_t start = (intptr_t)__ pc();
1660 int vep_offset = ((intptr_t)__ pc()) - start;
1661
1662 // First instruction must be a nop as it may need to be patched on deoptimisation
1663 __ nop();
1664 gen_special_dispatch(masm,
1665 method,
1666 in_sig_bt,
1667 in_regs);
1668 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1669 __ flush();
1670 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1671 return nmethod::new_native_nmethod(method,
1672 compile_id,
1673 masm->code(),
1674 vep_offset,
1675 frame_complete,
1676 stack_slots / VMRegImpl::slots_per_word,
1677 in_ByteSize(-1),
1678 in_ByteSize(-1),
1679 nullptr);
1680 }
1681 address native_func = method->native_function();
1682 assert(native_func != nullptr, "must have function");
1683
1684 // An OopMap for lock (and class if static)
1685 OopMapSet *oop_maps = new OopMapSet();
1686 intptr_t start = (intptr_t)__ pc();
1687
1688 // We have received a description of where all the java arg are located
1689 // on entry to the wrapper. We need to convert these args to where
1690 // the jni function will expect them. To figure out where they go
1691 // we convert the java signature to a C signature by inserting
1692 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1693
1694 const int total_in_args = method->size_of_parameters();
1695 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1696
1697 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1698 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1699
1700 int argc = 0;
1701 out_sig_bt[argc++] = T_ADDRESS;
1702 if (method->is_static()) {
1703 out_sig_bt[argc++] = T_OBJECT;
1704 }
1705
1706 for (int i = 0; i < total_in_args ; i++ ) {
1707 out_sig_bt[argc++] = in_sig_bt[i];
1708 }
1709
1710 // Now figure out where the args must be stored and how much stack space
1711 // they require.
1712 int out_arg_slots;
1713 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args);
1714
1715 if (out_arg_slots < 0) {
1716 return nullptr;
1717 }
1718
1719 // Compute framesize for the wrapper. We need to handlize all oops in
1720 // incoming registers
1721
1722 // Calculate the total number of stack slots we will need.
1723
1724 // First count the abi requirement plus all of the outgoing args
1725 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1726
1727 // Now the space for the inbound oop handle area
1728 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers
1729
1730 int oop_handle_offset = stack_slots;
1731 stack_slots += total_save_slots;
1732
1733 // Now any space we need for handlizing a klass if static method
1734
1735 int klass_slot_offset = 0;
1736 int klass_offset = -1;
1737 int lock_slot_offset = 0;
1738 bool is_static = false;
1739
1740 if (method->is_static()) {
1741 klass_slot_offset = stack_slots;
1742 stack_slots += VMRegImpl::slots_per_word;
1743 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1744 is_static = true;
1745 }
1746
1747 // Plus a lock if needed
1748
1749 if (method->is_synchronized()) {
1750 lock_slot_offset = stack_slots;
1751 stack_slots += VMRegImpl::slots_per_word;
1752 }
1753
1754 // Now a place (+2) to save return values or temp during shuffling
1755 // + 4 for return address (which we own) and saved rfp
1756 stack_slots += 6;
1757
1758 // Ok The space we have allocated will look like:
1759 //
1760 //
1761 // FP-> | |
1762 // |---------------------|
1763 // | 2 slots for moves |
1764 // |---------------------|
1765 // | lock box (if sync) |
1766 // |---------------------| <- lock_slot_offset
1767 // | klass (if static) |
1768 // |---------------------| <- klass_slot_offset
1769 // | oopHandle area |
1770 // |---------------------| <- oop_handle_offset (8 java arg registers)
1771 // | outbound memory |
1772 // | based arguments |
1773 // | |
1774 // |---------------------|
1775 // | |
1776 // SP-> | out_preserved_slots |
1777 //
1778 //
1779
1780
1781 // Now compute actual number of stack words we need rounding to make
1782 // stack properly aligned.
1783 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1784
1785 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1786
1787 // First thing make an ic check to see if we should even be here
1788
1789 // We are free to use all registers as temps without saving them and
1790 // restoring them except rfp. rfp is the only callee save register
1791 // as far as the interpreter and the compiler(s) are concerned.
1792
1793 const Register receiver = j_rarg0;
1794
1795 Label exception_pending;
1796
1797 assert_different_registers(receiver, rscratch1);
1798 __ verify_oop(receiver);
1799 __ ic_check(8 /* end_alignment */);
1800
1801 // Verified entry point must be aligned
1802 int vep_offset = ((intptr_t)__ pc()) - start;
1803
1804 // If we have to make this method not-entrant we'll overwrite its
1805 // first instruction with a jump. For this action to be legal we
1806 // must ensure that this first instruction is a B, BL, NOP, BKPT,
1807 // SVC, HVC, or SMC. Make it a NOP.
1808 __ nop();
1809
1810 if (method->needs_clinit_barrier()) {
1811 assert(VM_Version::supports_fast_class_init_checks(), "sanity");
1812 Label L_skip_barrier;
1813 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1814 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1815 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1816
1817 __ bind(L_skip_barrier);
1818 }
1819
1820 // Generate stack overflow check
1821 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1822
1823 // Generate a new frame for the wrapper.
1824 __ enter();
1825 // -2 because return address is already present and so is saved rfp
1826 __ sub(sp, sp, stack_size - 2*wordSize);
1827
1828 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1829 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
1830
1831 // Frame is now completed as far as size and linkage.
1832 int frame_complete = ((intptr_t)__ pc()) - start;
1833
1834 // We use r20 as the oop handle for the receiver/klass
1835 // It is callee save so it survives the call to native
1836
1837 const Register oop_handle_reg = r20;
1838
1839 //
1840 // We immediately shuffle the arguments so that any vm call we have to
1841 // make from here on out (sync slow path, jvmti, etc.) we will have
1842 // captured the oops from our caller and have a valid oopMap for
1843 // them.
1844
1845 // -----------------
1846 // The Grand Shuffle
1847
1848 // The Java calling convention is either equal (linux) or denser (win64) than the
1849 // c calling convention. However the because of the jni_env argument the c calling
1850 // convention always has at least one more (and two for static) arguments than Java.
1851 // Therefore if we move the args from java -> c backwards then we will never have
1852 // a register->register conflict and we don't have to build a dependency graph
1853 // and figure out how to break any cycles.
1854 //
1855
1856 // Record esp-based slot for receiver on stack for non-static methods
1857 int receiver_offset = -1;
1858
1859 // This is a trick. We double the stack slots so we can claim
1860 // the oops in the caller's frame. Since we are sure to have
1861 // more args than the caller doubling is enough to make
1862 // sure we can capture all the incoming oop args from the
1863 // caller.
1864 //
1865 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1866
1867 // Mark location of rfp (someday)
1868 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1869
1870
1871 int float_args = 0;
1872 int int_args = 0;
1873
1874 #ifdef ASSERT
1875 bool reg_destroyed[Register::number_of_registers];
1876 bool freg_destroyed[FloatRegister::number_of_registers];
1877 for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1878 reg_destroyed[r] = false;
1879 }
1880 for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1881 freg_destroyed[f] = false;
1882 }
1883
1884 #endif /* ASSERT */
1885
1886 // For JNI natives the incoming and outgoing registers are offset upwards.
1887 GrowableArray<int> arg_order(2 * total_in_args);
1888
1889 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1890 arg_order.push(i);
1891 arg_order.push(c_arg);
1892 }
1893
1894 for (int ai = 0; ai < arg_order.length(); ai += 2) {
1895 int i = arg_order.at(ai);
1896 int c_arg = arg_order.at(ai + 1);
1897 __ block_comment(err_msg("move %d -> %d", i, c_arg));
1898 assert(c_arg != -1 && i != -1, "wrong order");
1899 #ifdef ASSERT
1900 if (in_regs[i].first()->is_Register()) {
1901 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1902 } else if (in_regs[i].first()->is_FloatRegister()) {
1903 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1904 }
1905 if (out_regs[c_arg].first()->is_Register()) {
1906 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1907 } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1908 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1909 }
1910 #endif /* ASSERT */
1911 switch (in_sig_bt[i]) {
1912 case T_ARRAY:
1913 case T_OBJECT:
1914 __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1915 ((i == 0) && (!is_static)),
1916 &receiver_offset);
1917 int_args++;
1918 break;
1919 case T_VOID:
1920 break;
1921
1922 case T_FLOAT:
1923 __ float_move(in_regs[i], out_regs[c_arg]);
1924 float_args++;
1925 break;
1926
1927 case T_DOUBLE:
1928 assert( i + 1 < total_in_args &&
1929 in_sig_bt[i + 1] == T_VOID &&
1930 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1931 __ double_move(in_regs[i], out_regs[c_arg]);
1932 float_args++;
1933 break;
1934
1935 case T_LONG :
1936 __ long_move(in_regs[i], out_regs[c_arg]);
1937 int_args++;
1938 break;
1939
1940 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1941
1942 default:
1943 __ move32_64(in_regs[i], out_regs[c_arg]);
1944 int_args++;
1945 }
1946 }
1947
1948 // point c_arg at the first arg that is already loaded in case we
1949 // need to spill before we call out
1950 int c_arg = total_c_args - total_in_args;
1951
1952 // Pre-load a static method's oop into c_rarg1.
1953 if (method->is_static()) {
1954
1955 // load oop into a register
1956 __ movoop(c_rarg1,
1957 JNIHandles::make_local(method->method_holder()->java_mirror()));
1958
1959 // Now handlize the static class mirror it's known not-null.
1960 __ str(c_rarg1, Address(sp, klass_offset));
1961 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1962
1963 // Now get the handle
1964 __ lea(c_rarg1, Address(sp, klass_offset));
1965 // and protect the arg if we must spill
1966 c_arg--;
1967 }
1968
1969 // Change state to native (we save the return address in the thread, since it might not
1970 // be pushed on the stack when we do a stack traversal). It is enough that the pc()
1971 // points into the right code segment. It does not have to be the correct return pc.
1972 // We use the same pc/oopMap repeatedly when we call out.
1973
1974 Label native_return;
1975 if (method->is_object_wait0()) {
1976 // For convenience we use the pc we want to resume to in case of preemption on Object.wait.
1977 __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1978 } else {
1979 intptr_t the_pc = (intptr_t) __ pc();
1980 oop_maps->add_gc_map(the_pc - start, map);
1981
1982 __ set_last_Java_frame(sp, noreg, __ pc(), rscratch1);
1983 }
1984
1985 Label dtrace_method_entry, dtrace_method_entry_done;
1986 if (DTraceMethodProbes) {
1987 __ b(dtrace_method_entry);
1988 __ bind(dtrace_method_entry_done);
1989 }
1990
1991 // RedefineClasses() tracing support for obsolete method entry
1992 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1993 // protect the args we've loaded
1994 save_args(masm, total_c_args, c_arg, out_regs);
1995 __ mov_metadata(c_rarg1, method());
1996 __ call_VM_leaf(
1997 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1998 rthread, c_rarg1);
1999 restore_args(masm, total_c_args, c_arg, out_regs);
2000 }
2001
2002 // Lock a synchronized method
2003
2004 // Register definitions used by locking and unlocking
2005
2006 const Register swap_reg = r0;
2007 const Register obj_reg = r19; // Will contain the oop
2008 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
2009 const Register old_hdr = r13; // value of old header at unlock time
2010 const Register lock_tmp = r14; // Temporary used by fast_lock/unlock
2011 const Register tmp = lr;
2012
2013 Label slow_path_lock;
2014 Label lock_done;
2015
2016 if (method->is_synchronized()) {
2017 // Get the handle (the 2nd argument)
2018 __ mov(oop_handle_reg, c_rarg1);
2019
2020 // Get address of the box
2021
2022 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2023
2024 // Load the oop from the handle
2025 __ ldr(obj_reg, Address(oop_handle_reg, 0));
2026
2027 __ fast_lock(lock_reg, obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
2028
2029 // Slow path will re-enter here
2030 __ bind(lock_done);
2031 }
2032
2033
2034 // Finally just about ready to make the JNI call
2035
2036 // get JNIEnv* which is first argument to native
2037 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
2038
2039 // Now set thread in native
2040 __ mov(rscratch1, _thread_in_native);
2041 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
2042 __ stlrw(rscratch1, rscratch2);
2043
2044 __ rt_call(native_func);
2045
2046 // Verify or restore cpu control state after JNI call
2047 __ restore_cpu_control_state_after_jni(rscratch1, rscratch2);
2048
2049 // Unpack native results.
2050 switch (ret_type) {
2051 case T_BOOLEAN: __ c2bool(r0); break;
2052 case T_CHAR : __ ubfx(r0, r0, 0, 16); break;
2053 case T_BYTE : __ sbfx(r0, r0, 0, 8); break;
2054 case T_SHORT : __ sbfx(r0, r0, 0, 16); break;
2055 case T_INT : __ sbfx(r0, r0, 0, 32); break;
2056 case T_DOUBLE :
2057 case T_FLOAT :
2058 // Result is in v0 we'll save as needed
2059 break;
2060 case T_ARRAY: // Really a handle
2061 case T_OBJECT: // Really a handle
2062 break; // can't de-handlize until after safepoint check
2063 case T_VOID: break;
2064 case T_LONG: break;
2065 default : ShouldNotReachHere();
2066 }
2067
2068 Label safepoint_in_progress, safepoint_in_progress_done;
2069
2070 // Switch thread to "native transition" state before reading the synchronization state.
2071 // This additional state is necessary because reading and testing the synchronization
2072 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2073 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2074 // VM thread changes sync state to synchronizing and suspends threads for GC.
2075 // Thread A is resumed to finish this native method, but doesn't block here since it
2076 // didn't see any synchronization is progress, and escapes.
2077 __ mov(rscratch1, _thread_in_native_trans);
2078
2079 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
2080
2081 // Force this write out before the read below
2082 if (!UseSystemMemoryBarrier) {
2083 __ dmb(Assembler::ISH);
2084 }
2085
2086 __ verify_sve_vector_length();
2087
2088 // Check for safepoint operation in progress and/or pending suspend requests.
2089 {
2090 // No need for acquire as Java threads always disarm themselves.
2091 __ safepoint_poll(safepoint_in_progress, true /* at_return */, false /* in_nmethod */);
2092 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
2093 __ cbnzw(rscratch1, safepoint_in_progress);
2094 __ bind(safepoint_in_progress_done);
2095 }
2096
2097 // change thread state
2098 __ mov(rscratch1, _thread_in_Java);
2099 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
2100 __ stlrw(rscratch1, rscratch2);
2101
2102 if (method->is_object_wait0()) {
2103 // Check preemption for Object.wait()
2104 __ ldr(rscratch1, Address(rthread, JavaThread::preempt_alternate_return_offset()));
2105 __ cbz(rscratch1, native_return);
2106 __ str(zr, Address(rthread, JavaThread::preempt_alternate_return_offset()));
2107 __ br(rscratch1);
2108 __ bind(native_return);
2109
2110 intptr_t the_pc = (intptr_t) __ pc();
2111 oop_maps->add_gc_map(the_pc - start, map);
2112 }
2113
2114 Label reguard;
2115 Label reguard_done;
2116 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
2117 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
2118 __ br(Assembler::EQ, reguard);
2119 __ bind(reguard_done);
2120
2121 // native result if any is live
2122
2123 // Unlock
2124 Label unlock_done;
2125 Label slow_path_unlock;
2126 if (method->is_synchronized()) {
2127
2128 // Get locked oop from the handle we passed to jni
2129 __ ldr(obj_reg, Address(oop_handle_reg, 0));
2130
2131 // Must save r0 if if it is live now because cmpxchg must use it
2132 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2133 save_native_result(masm, ret_type, stack_slots);
2134 }
2135
2136 __ fast_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
2137
2138 // slow path re-enters here
2139 __ bind(unlock_done);
2140 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2141 restore_native_result(masm, ret_type, stack_slots);
2142 }
2143 }
2144
2145 Label dtrace_method_exit, dtrace_method_exit_done;
2146 if (DTraceMethodProbes) {
2147 __ b(dtrace_method_exit);
2148 __ bind(dtrace_method_exit_done);
2149 }
2150
2151 __ reset_last_Java_frame(false);
2152
2153 // Unbox oop result, e.g. JNIHandles::resolve result.
2154 if (is_reference_type(ret_type)) {
2155 __ resolve_jobject(r0, r1, r2);
2156 }
2157
2158 if (CheckJNICalls) {
2159 // clear_pending_jni_exception_check
2160 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
2161 }
2162
2163 // reset handle block
2164 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
2165 __ str(zr, Address(r2, JNIHandleBlock::top_offset()));
2166
2167 __ leave();
2168
2169 #if INCLUDE_JFR
2170 // We need to do a poll test after unwind in case the sampler
2171 // managed to sample the native frame after returning to Java.
2172 Label L_return;
2173 __ ldr(rscratch1, Address(rthread, JavaThread::polling_word_offset()));
2174 address poll_test_pc = __ pc();
2175 __ relocate(relocInfo::poll_return_type);
2176 __ tbz(rscratch1, log2i_exact(SafepointMechanism::poll_bit()), L_return);
2177 assert(SharedRuntime::polling_page_return_handler_blob() != nullptr,
2178 "polling page return stub not created yet");
2179 address stub = SharedRuntime::polling_page_return_handler_blob()->entry_point();
2180 __ adr(rscratch1, InternalAddress(poll_test_pc));
2181 __ str(rscratch1, Address(rthread, JavaThread::saved_exception_pc_offset()));
2182 __ far_jump(RuntimeAddress(stub));
2183 __ bind(L_return);
2184 #endif // INCLUDE_JFR
2185
2186 // Any exception pending?
2187 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2188 __ cbnz(rscratch1, exception_pending);
2189
2190 // We're done
2191 __ ret(lr);
2192
2193 // Unexpected paths are out of line and go here
2194
2195 // forward the exception
2196 __ bind(exception_pending);
2197
2198 // and forward the exception
2199 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2200
2201 // Slow path locking & unlocking
2202 if (method->is_synchronized()) {
2203
2204 __ block_comment("Slow path lock {");
2205 __ bind(slow_path_lock);
2206
2207 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2208 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2209
2210 // protect the args we've loaded
2211 save_args(masm, total_c_args, c_arg, out_regs);
2212
2213 __ mov(c_rarg0, obj_reg);
2214 __ mov(c_rarg1, lock_reg);
2215 __ mov(c_rarg2, rthread);
2216
2217 // Not a leaf but we have last_Java_frame setup as we want.
2218 // We don't want to unmount in case of contention since that would complicate preserving
2219 // the arguments that had already been marshalled into the native convention. So we force
2220 // the freeze slow path to find this native wrapper frame (see recurse_freeze_native_frame())
2221 // and pin the vthread. Otherwise the fast path won't find it since we don't walk the stack.
2222 __ push_cont_fastpath();
2223 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2224 __ pop_cont_fastpath();
2225 restore_args(masm, total_c_args, c_arg, out_regs);
2226
2227 #ifdef ASSERT
2228 { Label L;
2229 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2230 __ cbz(rscratch1, L);
2231 __ stop("no pending exception allowed on exit from monitorenter");
2232 __ bind(L);
2233 }
2234 #endif
2235 __ b(lock_done);
2236
2237 __ block_comment("} Slow path lock");
2238
2239 __ block_comment("Slow path unlock {");
2240 __ bind(slow_path_unlock);
2241
2242 // If we haven't already saved the native result we must save it now as xmm registers
2243 // are still exposed.
2244
2245 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2246 save_native_result(masm, ret_type, stack_slots);
2247 }
2248
2249 __ mov(c_rarg2, rthread);
2250 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2251 __ mov(c_rarg0, obj_reg);
2252
2253 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2254 // NOTE that obj_reg == r19 currently
2255 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2256 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2257
2258 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2259
2260 #ifdef ASSERT
2261 {
2262 Label L;
2263 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2264 __ cbz(rscratch1, L);
2265 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2266 __ bind(L);
2267 }
2268 #endif /* ASSERT */
2269
2270 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2271
2272 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2273 restore_native_result(masm, ret_type, stack_slots);
2274 }
2275 __ b(unlock_done);
2276
2277 __ block_comment("} Slow path unlock");
2278
2279 } // synchronized
2280
2281 // SLOW PATH Reguard the stack if needed
2282
2283 __ bind(reguard);
2284 save_native_result(masm, ret_type, stack_slots);
2285 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2286 restore_native_result(masm, ret_type, stack_slots);
2287 // and continue
2288 __ b(reguard_done);
2289
2290 // SLOW PATH safepoint
2291 {
2292 __ block_comment("safepoint {");
2293 __ bind(safepoint_in_progress);
2294
2295 // Don't use call_VM as it will see a possible pending exception and forward it
2296 // and never return here preventing us from clearing _last_native_pc down below.
2297 //
2298 save_native_result(masm, ret_type, stack_slots);
2299 __ mov(c_rarg0, rthread);
2300 #ifndef PRODUCT
2301 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2302 #endif
2303 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2304 __ blr(rscratch1);
2305
2306 // Restore any method result value
2307 restore_native_result(masm, ret_type, stack_slots);
2308
2309 __ b(safepoint_in_progress_done);
2310 __ block_comment("} safepoint");
2311 }
2312
2313 // SLOW PATH dtrace support
2314 if (DTraceMethodProbes) {
2315 {
2316 __ block_comment("dtrace entry {");
2317 __ bind(dtrace_method_entry);
2318
2319 // We have all of the arguments setup at this point. We must not touch any register
2320 // argument registers at this point (what if we save/restore them there are no oop?
2321
2322 save_args(masm, total_c_args, c_arg, out_regs);
2323 __ mov_metadata(c_rarg1, method());
2324 __ call_VM_leaf(
2325 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2326 rthread, c_rarg1);
2327 restore_args(masm, total_c_args, c_arg, out_regs);
2328 __ b(dtrace_method_entry_done);
2329 __ block_comment("} dtrace entry");
2330 }
2331
2332 {
2333 __ block_comment("dtrace exit {");
2334 __ bind(dtrace_method_exit);
2335 save_native_result(masm, ret_type, stack_slots);
2336 __ mov_metadata(c_rarg1, method());
2337 __ call_VM_leaf(
2338 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2339 rthread, c_rarg1);
2340 restore_native_result(masm, ret_type, stack_slots);
2341 __ b(dtrace_method_exit_done);
2342 __ block_comment("} dtrace exit");
2343 }
2344 }
2345
2346 __ flush();
2347
2348 nmethod *nm = nmethod::new_native_nmethod(method,
2349 compile_id,
2350 masm->code(),
2351 vep_offset,
2352 frame_complete,
2353 stack_slots / VMRegImpl::slots_per_word,
2354 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2355 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2356 oop_maps);
2357
2358 return nm;
2359 }
2360
2361 // this function returns the adjust size (in number of words) to a c2i adapter
2362 // activation for use during deoptimization
2363 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2364 assert(callee_locals >= callee_parameters,
2365 "test and remove; got more parms than locals");
2366 if (callee_locals < callee_parameters)
2367 return 0; // No adjustment for negative locals
2368 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2369 // diff is counted in stack words
2370 return align_up(diff, 2);
2371 }
2372
2373
2374 //------------------------------generate_deopt_blob----------------------------
2375 void SharedRuntime::generate_deopt_blob() {
2376 // Allocate space for the code
2377 ResourceMark rm;
2378 // Setup code generation tools
2379 int pad = 0;
2380 #if INCLUDE_JVMCI
2381 if (EnableJVMCI) {
2382 pad += 512; // Increase the buffer size when compiling for JVMCI
2383 }
2384 #endif
2385 const char* name = SharedRuntime::stub_name(StubId::shared_deopt_id);
2386 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, BlobId::shared_deopt_id);
2387 if (blob != nullptr) {
2388 _deopt_blob = blob->as_deoptimization_blob();
2389 return;
2390 }
2391
2392 CodeBuffer buffer(name, 2048+pad, 1024);
2393 MacroAssembler* masm = new MacroAssembler(&buffer);
2394 int frame_size_in_words;
2395 OopMap* map = nullptr;
2396 OopMapSet *oop_maps = new OopMapSet();
2397 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2398
2399 // -------------
2400 // This code enters when returning to a de-optimized nmethod. A return
2401 // address has been pushed on the stack, and return values are in
2402 // registers.
2403 // If we are doing a normal deopt then we were called from the patched
2404 // nmethod from the point we returned to the nmethod. So the return
2405 // address on the stack is wrong by NativeCall::instruction_size
2406 // We will adjust the value so it looks like we have the original return
2407 // address on the stack (like when we eagerly deoptimized).
2408 // In the case of an exception pending when deoptimizing, we enter
2409 // with a return address on the stack that points after the call we patched
2410 // into the exception handler. We have the following register state from,
2411 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2412 // r0: exception oop
2413 // r19: exception handler
2414 // r3: throwing pc
2415 // So in this case we simply jam r3 into the useless return address and
2416 // the stack looks just like we want.
2417 //
2418 // At this point we need to de-opt. We save the argument return
2419 // registers. We call the first C routine, fetch_unroll_info(). This
2420 // routine captures the return values and returns a structure which
2421 // describes the current frame size and the sizes of all replacement frames.
2422 // The current frame is compiled code and may contain many inlined
2423 // functions, each with their own JVM state. We pop the current frame, then
2424 // push all the new frames. Then we call the C routine unpack_frames() to
2425 // populate these frames. Finally unpack_frames() returns us the new target
2426 // address. Notice that callee-save registers are BLOWN here; they have
2427 // already been captured in the vframeArray at the time the return PC was
2428 // patched.
2429 address start = __ pc();
2430 Label cont;
2431
2432 // Prolog for non exception case!
2433
2434 // Save everything in sight.
2435 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2436
2437 // Normal deoptimization. Save exec mode for unpack_frames.
2438 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2439 __ b(cont);
2440
2441 int reexecute_offset = __ pc() - start;
2442 #if INCLUDE_JVMCI && !defined(COMPILER1)
2443 if (UseJVMCICompiler) {
2444 // JVMCI does not use this kind of deoptimization
2445 __ should_not_reach_here();
2446 }
2447 #endif
2448
2449 // Reexecute case
2450 // return address is the pc describes what bci to do re-execute at
2451
2452 // No need to update map as each call to save_live_registers will produce identical oopmap
2453 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2454
2455 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2456 __ b(cont);
2457
2458 #if INCLUDE_JVMCI
2459 Label after_fetch_unroll_info_call;
2460 int implicit_exception_uncommon_trap_offset = 0;
2461 int uncommon_trap_offset = 0;
2462
2463 if (EnableJVMCI) {
2464 implicit_exception_uncommon_trap_offset = __ pc() - start;
2465
2466 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2467 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2468
2469 uncommon_trap_offset = __ pc() - start;
2470
2471 // Save everything in sight.
2472 reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2473 // fetch_unroll_info needs to call last_java_frame()
2474 Label retaddr;
2475 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2476
2477 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2478 __ movw(rscratch1, -1);
2479 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2480
2481 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2482 __ mov(c_rarg0, rthread);
2483 __ movw(c_rarg2, rcpool); // exec mode
2484 __ lea(rscratch1,
2485 RuntimeAddress(CAST_FROM_FN_PTR(address,
2486 Deoptimization::uncommon_trap)));
2487 __ blr(rscratch1);
2488 __ bind(retaddr);
2489 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2490
2491 __ reset_last_Java_frame(false);
2492
2493 __ b(after_fetch_unroll_info_call);
2494 } // EnableJVMCI
2495 #endif // INCLUDE_JVMCI
2496
2497 int exception_offset = __ pc() - start;
2498
2499 // Prolog for exception case
2500
2501 // all registers are dead at this entry point, except for r0, and
2502 // r3 which contain the exception oop and exception pc
2503 // respectively. Set them in TLS and fall thru to the
2504 // unpack_with_exception_in_tls entry point.
2505
2506 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2507 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2508
2509 int exception_in_tls_offset = __ pc() - start;
2510
2511 // new implementation because exception oop is now passed in JavaThread
2512
2513 // Prolog for exception case
2514 // All registers must be preserved because they might be used by LinearScan
2515 // Exceptiop oop and throwing PC are passed in JavaThread
2516 // tos: stack at point of call to method that threw the exception (i.e. only
2517 // args are on the stack, no return address)
2518
2519 // The return address pushed by save_live_registers will be patched
2520 // later with the throwing pc. The correct value is not available
2521 // now because loading it from memory would destroy registers.
2522
2523 // NB: The SP at this point must be the SP of the method that is
2524 // being deoptimized. Deoptimization assumes that the frame created
2525 // here by save_live_registers is immediately below the method's SP.
2526 // This is a somewhat fragile mechanism.
2527
2528 // Save everything in sight.
2529 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2530
2531 // Now it is safe to overwrite any register
2532
2533 // Deopt during an exception. Save exec mode for unpack_frames.
2534 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2535
2536 // load throwing pc from JavaThread and patch it as the return address
2537 // of the current frame. Then clear the field in JavaThread
2538 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2539 __ protect_return_address(r3);
2540 __ str(r3, Address(rfp, wordSize));
2541 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2542
2543 #ifdef ASSERT
2544 // verify that there is really an exception oop in JavaThread
2545 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2546 __ verify_oop(r0);
2547
2548 // verify that there is no pending exception
2549 Label no_pending_exception;
2550 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2551 __ cbz(rscratch1, no_pending_exception);
2552 __ stop("must not have pending exception here");
2553 __ bind(no_pending_exception);
2554 #endif
2555
2556 __ bind(cont);
2557
2558 // Call C code. Need thread and this frame, but NOT official VM entry
2559 // crud. We cannot block on this call, no GC can happen.
2560 //
2561 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2562
2563 // fetch_unroll_info needs to call last_java_frame().
2564
2565 Label retaddr;
2566 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2567 #ifdef ASSERT
2568 { Label L;
2569 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset()));
2570 __ cbz(rscratch1, L);
2571 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2572 __ bind(L);
2573 }
2574 #endif // ASSERT
2575 __ mov(c_rarg0, rthread);
2576 __ mov(c_rarg1, rcpool);
2577 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2578 __ blr(rscratch1);
2579 __ bind(retaddr);
2580
2581 // Need to have an oopmap that tells fetch_unroll_info where to
2582 // find any register it might need.
2583 oop_maps->add_gc_map(__ pc() - start, map);
2584
2585 __ reset_last_Java_frame(false);
2586
2587 #if INCLUDE_JVMCI
2588 if (EnableJVMCI) {
2589 __ bind(after_fetch_unroll_info_call);
2590 }
2591 #endif
2592
2593 // Load UnrollBlock* into r5
2594 __ mov(r5, r0);
2595
2596 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset()));
2597 Label noException;
2598 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending?
2599 __ br(Assembler::NE, noException);
2600 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2601 // QQQ this is useless it was null above
2602 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2603 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2604 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2605
2606 __ verify_oop(r0);
2607
2608 // Overwrite the result registers with the exception results.
2609 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2610 // I think this is useless
2611 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2612
2613 __ bind(noException);
2614
2615 // Only register save data is on the stack.
2616 // Now restore the result registers. Everything else is either dead
2617 // or captured in the vframeArray.
2618
2619 // Restore fp result register
2620 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2621 // Restore integer result register
2622 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2623
2624 // Pop all of the register save area off the stack
2625 __ add(sp, sp, frame_size_in_words * wordSize);
2626
2627 // All of the register save area has been popped of the stack. Only the
2628 // return address remains.
2629
2630 // Pop all the frames we must move/replace.
2631 //
2632 // Frame picture (youngest to oldest)
2633 // 1: self-frame (no frame link)
2634 // 2: deopting frame (no frame link)
2635 // 3: caller of deopting frame (could be compiled/interpreted).
2636 //
2637 // Note: by leaving the return address of self-frame on the stack
2638 // and using the size of frame 2 to adjust the stack
2639 // when we are done the return to frame 3 will still be on the stack.
2640
2641 // Pop deoptimized frame
2642 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2643 __ sub(r2, r2, 2 * wordSize);
2644 __ add(sp, sp, r2);
2645 __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2646
2647 #ifdef ASSERT
2648 // Compilers generate code that bang the stack by as much as the
2649 // interpreter would need. So this stack banging should never
2650 // trigger a fault. Verify that it does not on non product builds.
2651 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2652 __ bang_stack_size(r19, r2);
2653 #endif
2654 // Load address of array of frame pcs into r2
2655 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset()));
2656
2657 // Trash the old pc
2658 // __ addptr(sp, wordSize); FIXME ????
2659
2660 // Load address of array of frame sizes into r4
2661 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset()));
2662
2663 // Load counter into r3
2664 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset()));
2665
2666 // Now adjust the caller's stack to make up for the extra locals
2667 // but record the original sp so that we can save it in the skeletal interpreter
2668 // frame and the stack walking of interpreter_sender will get the unextended sp
2669 // value and not the "real" sp value.
2670
2671 const Register sender_sp = r6;
2672
2673 __ mov(sender_sp, sp);
2674 __ ldrw(r19, Address(r5,
2675 Deoptimization::UnrollBlock::
2676 caller_adjustment_offset()));
2677 __ sub(sp, sp, r19);
2678
2679 // Push interpreter frames in a loop
2680 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern
2681 __ mov(rscratch2, rscratch1);
2682 Label loop;
2683 __ bind(loop);
2684 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size
2685 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand
2686 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc
2687 __ enter(); // Save old & set new fp
2688 __ sub(sp, sp, r19); // Prolog
2689 // This value is corrected by layout_activation_impl
2690 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2691 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2692 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2693 __ sub(r3, r3, 1); // Decrement counter
2694 __ cbnz(r3, loop);
2695
2696 // Re-push self-frame
2697 __ ldr(lr, Address(r2));
2698 __ enter();
2699
2700 // Allocate a full sized register save area. We subtract 2 because
2701 // enter() just pushed 2 words
2702 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2703
2704 // Restore frame locals after moving the frame
2705 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2706 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2707
2708 // Call C code. Need thread but NOT official VM entry
2709 // crud. We cannot block on this call, no GC can happen. Call should
2710 // restore return values to their stack-slots with the new SP.
2711 //
2712 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2713
2714 // Use rfp because the frames look interpreted now
2715 // Don't need the precise return PC here, just precise enough to point into this code blob.
2716 address the_pc = __ pc();
2717 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2718
2719 __ mov(c_rarg0, rthread);
2720 __ movw(c_rarg1, rcpool); // second arg: exec_mode
2721 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2722 __ blr(rscratch1);
2723
2724 // Set an oopmap for the call site
2725 // Use the same PC we used for the last java frame
2726 oop_maps->add_gc_map(the_pc - start,
2727 new OopMap( frame_size_in_words, 0 ));
2728
2729 // Clear fp AND pc
2730 __ reset_last_Java_frame(true);
2731
2732 // Collect return values
2733 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2734 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2735 // I think this is useless (throwing pc?)
2736 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2737
2738 // Pop self-frame.
2739 __ leave(); // Epilog
2740
2741 // Jump to interpreter
2742 __ ret(lr);
2743
2744 // Make sure all code is generated
2745 masm->flush();
2746
2747 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2748 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2749 #if INCLUDE_JVMCI
2750 if (EnableJVMCI) {
2751 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2752 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2753 }
2754 #endif
2755
2756 AOTCodeCache::store_code_blob(*_deopt_blob, AOTCodeEntry::SharedBlob, BlobId::shared_deopt_id);
2757 }
2758
2759 // Number of stack slots between incoming argument block and the start of
2760 // a new frame. The PROLOG must add this many slots to the stack. The
2761 // EPILOG must remove this many slots. aarch64 needs two slots for
2762 // return address and fp.
2763 // TODO think this is correct but check
2764 uint SharedRuntime::in_preserve_stack_slots() {
2765 return 4;
2766 }
2767
2768 uint SharedRuntime::out_preserve_stack_slots() {
2769 return 0;
2770 }
2771
2772
2773 VMReg SharedRuntime::thread_register() {
2774 return rthread->as_VMReg();
2775 }
2776
2777 //------------------------------generate_handler_blob------
2778 //
2779 // Generate a special Compile2Runtime blob that saves all registers,
2780 // and setup oopmap.
2781 //
2782 SafepointBlob* SharedRuntime::generate_handler_blob(StubId id, address call_ptr) {
2783 assert(is_polling_page_id(id), "expected a polling page stub id");
2784
2785 // Allocate space for the code. Setup code generation tools.
2786 const char* name = SharedRuntime::stub_name(id);
2787 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2788 if (blob != nullptr) {
2789 return blob->as_safepoint_blob();
2790 }
2791
2792 ResourceMark rm;
2793 OopMapSet *oop_maps = new OopMapSet();
2794 OopMap* map;
2795 CodeBuffer buffer(name, 2048, 1024);
2796 MacroAssembler* masm = new MacroAssembler(&buffer);
2797
2798 address start = __ pc();
2799 address call_pc = nullptr;
2800 int frame_size_in_words;
2801 bool cause_return = (id == StubId::shared_polling_page_return_handler_id);
2802 RegisterSaver reg_save(id == StubId::shared_polling_page_vectors_safepoint_handler_id /* save_vectors */);
2803
2804 // When the signal occurred, the LR was either signed and stored on the stack (in which
2805 // case it will be restored from the stack before being used) or unsigned and not stored
2806 // on the stack. Stipping ensures we get the right value.
2807 __ strip_return_address();
2808
2809 // Save Integer and Float registers.
2810 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2811
2812 // The following is basically a call_VM. However, we need the precise
2813 // address of the call in order to generate an oopmap. Hence, we do all the
2814 // work ourselves.
2815
2816 Label retaddr;
2817 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2818
2819 // The return address must always be correct so that frame constructor never
2820 // sees an invalid pc.
2821
2822 if (!cause_return) {
2823 // overwrite the return address pushed by save_live_registers
2824 // Additionally, r20 is a callee-saved register so we can look at
2825 // it later to determine if someone changed the return address for
2826 // us!
2827 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2828 __ protect_return_address(r20);
2829 __ str(r20, Address(rfp, wordSize));
2830 }
2831
2832 // Do the call
2833 __ mov(c_rarg0, rthread);
2834 __ lea(rscratch1, RuntimeAddress(call_ptr));
2835 __ blr(rscratch1);
2836 __ bind(retaddr);
2837
2838 // Set an oopmap for the call site. This oopmap will map all
2839 // oop-registers and debug-info registers as callee-saved. This
2840 // will allow deoptimization at this safepoint to find all possible
2841 // debug-info recordings, as well as let GC find all oops.
2842
2843 oop_maps->add_gc_map( __ pc() - start, map);
2844
2845 Label noException;
2846
2847 __ reset_last_Java_frame(false);
2848
2849 __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2850
2851 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2852 __ cbz(rscratch1, noException);
2853
2854 // Exception pending
2855
2856 reg_save.restore_live_registers(masm);
2857
2858 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2859
2860 // No exception case
2861 __ bind(noException);
2862
2863 Label no_adjust, bail;
2864 if (!cause_return) {
2865 // If our stashed return pc was modified by the runtime we avoid touching it
2866 __ ldr(rscratch1, Address(rfp, wordSize));
2867 __ cmp(r20, rscratch1);
2868 __ br(Assembler::NE, no_adjust);
2869 __ authenticate_return_address(r20);
2870
2871 #ifdef ASSERT
2872 // Verify the correct encoding of the poll we're about to skip.
2873 // See NativeInstruction::is_ldrw_to_zr()
2874 __ ldrw(rscratch1, Address(r20));
2875 __ ubfx(rscratch2, rscratch1, 22, 10);
2876 __ cmpw(rscratch2, 0b1011100101);
2877 __ br(Assembler::NE, bail);
2878 __ ubfx(rscratch2, rscratch1, 0, 5);
2879 __ cmpw(rscratch2, 0b11111);
2880 __ br(Assembler::NE, bail);
2881 #endif
2882 // Adjust return pc forward to step over the safepoint poll instruction
2883 __ add(r20, r20, NativeInstruction::instruction_size);
2884 __ protect_return_address(r20);
2885 __ str(r20, Address(rfp, wordSize));
2886 }
2887
2888 __ bind(no_adjust);
2889 // Normal exit, restore registers and exit.
2890 reg_save.restore_live_registers(masm);
2891
2892 __ ret(lr);
2893
2894 #ifdef ASSERT
2895 __ bind(bail);
2896 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2897 #endif
2898
2899 // Make sure all code is generated
2900 masm->flush();
2901
2902 // Fill-out other meta info
2903 SafepointBlob* sp_blob = SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2904
2905 AOTCodeCache::store_code_blob(*sp_blob, AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2906 return sp_blob;
2907 }
2908
2909 //
2910 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2911 //
2912 // Generate a stub that calls into vm to find out the proper destination
2913 // of a java call. All the argument registers are live at this point
2914 // but since this is generic code we don't know what they are and the caller
2915 // must do any gc of the args.
2916 //
2917 RuntimeStub* SharedRuntime::generate_resolve_blob(StubId id, address destination) {
2918 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2919 assert(is_resolve_id(id), "expected a resolve stub id");
2920
2921 const char* name = SharedRuntime::stub_name(id);
2922 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2923 if (blob != nullptr) {
2924 return blob->as_runtime_stub();
2925 }
2926
2927 // allocate space for the code
2928 ResourceMark rm;
2929 CodeBuffer buffer(name, 1000, 512);
2930 MacroAssembler* masm = new MacroAssembler(&buffer);
2931
2932 int frame_size_in_words;
2933 RegisterSaver reg_save(false /* save_vectors */);
2934
2935 OopMapSet *oop_maps = new OopMapSet();
2936 OopMap* map = nullptr;
2937
2938 int start = __ offset();
2939
2940 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2941
2942 int frame_complete = __ offset();
2943
2944 {
2945 Label retaddr;
2946 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2947
2948 __ mov(c_rarg0, rthread);
2949 __ lea(rscratch1, RuntimeAddress(destination));
2950
2951 __ blr(rscratch1);
2952 __ bind(retaddr);
2953 }
2954
2955 // Set an oopmap for the call site.
2956 // We need this not only for callee-saved registers, but also for volatile
2957 // registers that the compiler might be keeping live across a safepoint.
2958
2959 oop_maps->add_gc_map( __ offset() - start, map);
2960
2961 // r0 contains the address we are going to jump to assuming no exception got installed
2962
2963 // clear last_Java_sp
2964 __ reset_last_Java_frame(false);
2965 // check for pending exceptions
2966 Label pending;
2967 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2968 __ cbnz(rscratch1, pending);
2969
2970 // get the returned Method*
2971 __ get_vm_result_metadata(rmethod, rthread);
2972 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
2973
2974 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
2975 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
2976 reg_save.restore_live_registers(masm);
2977
2978 // We are back to the original state on entry and ready to go.
2979
2980 __ br(rscratch1);
2981
2982 // Pending exception after the safepoint
2983
2984 __ bind(pending);
2985
2986 reg_save.restore_live_registers(masm);
2987
2988 // exception pending => remove activation and forward to exception handler
2989
2990 __ str(zr, Address(rthread, JavaThread::vm_result_oop_offset()));
2991
2992 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
2993 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2994
2995 // -------------
2996 // make sure all code is generated
2997 masm->flush();
2998
2999 // return the blob
3000 // frame_size_words or bytes??
3001 RuntimeStub* rs_blob = RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3002
3003 AOTCodeCache::store_code_blob(*rs_blob, AOTCodeEntry::SharedBlob, StubInfo::blob(id));
3004 return rs_blob;
3005 }
3006
3007 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) {
3008 BufferBlob* buf = BufferBlob::create("inline types pack/unpack", 16 * K);
3009 if (buf == nullptr) {
3010 return nullptr;
3011 }
3012 CodeBuffer buffer(buf);
3013 short buffer_locs[20];
3014 buffer.insts()->initialize_shared_locs((relocInfo*)buffer_locs,
3015 sizeof(buffer_locs)/sizeof(relocInfo));
3016
3017 MacroAssembler _masm(&buffer);
3018 MacroAssembler* masm = &_masm;
3019
3020 const Array<SigEntry>* sig_vk = vk->extended_sig();
3021 const Array<VMRegPair>* regs = vk->return_regs();
3022
3023 int pack_fields_jobject_off = __ offset();
3024 // Resolve pre-allocated buffer from JNI handle.
3025 // We cannot do this in generate_call_stub() because it requires GC code to be initialized.
3026 Register Rresult = r14; // See StubGenerator::generate_call_stub().
3027 __ ldr(r0, Address(Rresult));
3028 __ resolve_jobject(r0 /* value */,
3029 rthread /* thread */,
3030 r12 /* tmp */);
3031 __ str(r0, Address(Rresult));
3032
3033 int pack_fields_off = __ offset();
3034
3035 int j = 1;
3036 for (int i = 0; i < sig_vk->length(); i++) {
3037 BasicType bt = sig_vk->at(i)._bt;
3038 if (bt == T_METADATA) {
3039 continue;
3040 }
3041 if (bt == T_VOID) {
3042 if (sig_vk->at(i-1)._bt == T_LONG ||
3043 sig_vk->at(i-1)._bt == T_DOUBLE) {
3044 j++;
3045 }
3046 continue;
3047 }
3048 int off = sig_vk->at(i)._offset;
3049 VMRegPair pair = regs->at(j);
3050 VMReg r_1 = pair.first();
3051 VMReg r_2 = pair.second();
3052 Address to(r0, off);
3053 if (bt == T_FLOAT) {
3054 __ strs(r_1->as_FloatRegister(), to);
3055 } else if (bt == T_DOUBLE) {
3056 __ strd(r_1->as_FloatRegister(), to);
3057 } else {
3058 Register val = r_1->as_Register();
3059 assert_different_registers(to.base(), val, r15, r16, r17);
3060 if (is_reference_type(bt)) {
3061 // store_heap_oop transitively calls oop_store_at which corrupts to.base(). We need to keep r0 valid.
3062 __ mov(r17, r0);
3063 Address to_with_r17(r17, off);
3064 __ store_heap_oop(to_with_r17, val, r15, r16, r17, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
3065 } else {
3066 __ store_sized_value(to, r_1->as_Register(), type2aelembytes(bt));
3067 }
3068 }
3069 j++;
3070 }
3071 assert(j == regs->length(), "missed a field?");
3072 if (vk->supports_nullable_layouts()) {
3073 // Zero the null marker (setting it to 1 would be better but would require an additional register)
3074 __ strb(zr, Address(r0, vk->null_marker_offset()));
3075 }
3076 __ ret(lr);
3077
3078 int unpack_fields_off = __ offset();
3079
3080 Label skip;
3081 Label not_null;
3082 __ cbnz(r0, not_null);
3083
3084 // Return value is null. Zero all registers because the runtime requires a canonical
3085 // representation of a flat null.
3086 j = 1;
3087 for (int i = 0; i < sig_vk->length(); i++) {
3088 BasicType bt = sig_vk->at(i)._bt;
3089 if (bt == T_METADATA) {
3090 continue;
3091 }
3092 if (bt == T_VOID) {
3093 if (sig_vk->at(i-1)._bt == T_LONG ||
3094 sig_vk->at(i-1)._bt == T_DOUBLE) {
3095 j++;
3096 }
3097 continue;
3098 }
3099
3100 VMRegPair pair = regs->at(j);
3101 VMReg r_1 = pair.first();
3102 if (r_1->is_FloatRegister()) {
3103 __ mov(r_1->as_FloatRegister(), Assembler::T2S, 0);
3104 } else {
3105 __ mov(r_1->as_Register(), zr);
3106 }
3107 j++;
3108 }
3109 __ b(skip);
3110 __ bind(not_null);
3111
3112 j = 1;
3113 for (int i = 0; i < sig_vk->length(); i++) {
3114 BasicType bt = sig_vk->at(i)._bt;
3115 if (bt == T_METADATA) {
3116 continue;
3117 }
3118 if (bt == T_VOID) {
3119 if (sig_vk->at(i-1)._bt == T_LONG ||
3120 sig_vk->at(i-1)._bt == T_DOUBLE) {
3121 j++;
3122 }
3123 continue;
3124 }
3125 int off = sig_vk->at(i)._offset;
3126 assert(off > 0, "offset in object should be positive");
3127 VMRegPair pair = regs->at(j);
3128 VMReg r_1 = pair.first();
3129 VMReg r_2 = pair.second();
3130 Address from(r0, off);
3131 if (bt == T_FLOAT) {
3132 __ ldrs(r_1->as_FloatRegister(), from);
3133 } else if (bt == T_DOUBLE) {
3134 __ ldrd(r_1->as_FloatRegister(), from);
3135 } else if (bt == T_OBJECT || bt == T_ARRAY) {
3136 assert_different_registers(r0, r_1->as_Register());
3137 __ load_heap_oop(r_1->as_Register(), from, rscratch1, rscratch2);
3138 } else {
3139 assert(is_java_primitive(bt), "unexpected basic type");
3140 assert_different_registers(r0, r_1->as_Register());
3141 size_t size_in_bytes = type2aelembytes(bt);
3142 __ load_sized_value(r_1->as_Register(), from, size_in_bytes, bt != T_CHAR && bt != T_BOOLEAN);
3143 }
3144 j++;
3145 }
3146 assert(j == regs->length(), "missed a field?");
3147
3148 __ bind(skip);
3149
3150 __ ret(lr);
3151
3152 __ flush();
3153
3154 return BufferedInlineTypeBlob::create(&buffer, pack_fields_off, pack_fields_jobject_off, unpack_fields_off);
3155 }
3156
3157 // Continuation point for throwing of implicit exceptions that are
3158 // not handled in the current activation. Fabricates an exception
3159 // oop and initiates normal exception dispatching in this
3160 // frame. Since we need to preserve callee-saved values (currently
3161 // only for C2, but done for C1 as well) we need a callee-saved oop
3162 // map and therefore have to make these stubs into RuntimeStubs
3163 // rather than BufferBlobs. If the compiler needs all registers to
3164 // be preserved between the fault point and the exception handler
3165 // then it must assume responsibility for that in
3166 // AbstractCompiler::continuation_for_implicit_null_exception or
3167 // continuation_for_implicit_division_by_zero_exception. All other
3168 // implicit exceptions (e.g., NullPointerException or
3169 // AbstractMethodError on entry) are either at call sites or
3170 // otherwise assume that stack unwinding will be initiated, so
3171 // caller saved registers were assumed volatile in the compiler.
3172
3173 RuntimeStub* SharedRuntime::generate_throw_exception(StubId id, address runtime_entry) {
3174 assert(is_throw_id(id), "expected a throw stub id");
3175
3176 const char* name = SharedRuntime::stub_name(id);
3177
3178 // Information about frame layout at time of blocking runtime call.
3179 // Note that we only have to preserve callee-saved registers since
3180 // the compilers are responsible for supplying a continuation point
3181 // if they expect all registers to be preserved.
3182 // n.b. aarch64 asserts that frame::arg_reg_save_area_bytes == 0
3183 enum layout {
3184 rfp_off = 0,
3185 rfp_off2,
3186 return_off,
3187 return_off2,
3188 framesize // inclusive of return address
3189 };
3190
3191 int insts_size = 512;
3192 int locs_size = 64;
3193
3194 const char* timer_msg = "SharedRuntime generate_throw_exception";
3195 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime));
3196
3197 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, StubInfo::blob(id));
3198 if (blob != nullptr) {
3199 return blob->as_runtime_stub();
3200 }
3201
3202 ResourceMark rm;
3203 CodeBuffer code(name, insts_size, locs_size);
3204 OopMapSet* oop_maps = new OopMapSet();
3205 MacroAssembler* masm = new MacroAssembler(&code);
3206
3207 address start = __ pc();
3208
3209 // This is an inlined and slightly modified version of call_VM
3210 // which has the ability to fetch the return PC out of
3211 // thread-local storage and also sets up last_Java_sp slightly
3212 // differently than the real call_VM
3213
3214 __ enter(); // Save FP and LR before call
3215
3216 assert(is_even(framesize/2), "sp not 16-byte aligned");
3217
3218 // lr and fp are already in place
3219 __ sub(sp, rfp, ((uint64_t)framesize-4) << LogBytesPerInt); // prolog
3220
3221 int frame_complete = __ pc() - start;
3222
3223 // Set up last_Java_sp and last_Java_fp
3224 address the_pc = __ pc();
3225 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
3226
3227 __ mov(c_rarg0, rthread);
3228 BLOCK_COMMENT("call runtime_entry");
3229 __ lea(rscratch1, RuntimeAddress(runtime_entry));
3230 __ blr(rscratch1);
3231
3232 // Generate oop map
3233 OopMap* map = new OopMap(framesize, 0);
3234
3235 oop_maps->add_gc_map(the_pc - start, map);
3236
3237 __ reset_last_Java_frame(true);
3238
3239 // Reinitialize the ptrue predicate register, in case the external runtime
3240 // call clobbers ptrue reg, as we may return to SVE compiled code.
3241 __ reinitialize_ptrue();
3242
3243 __ leave();
3244
3245 // check for pending exceptions
3246 #ifdef ASSERT
3247 Label L;
3248 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
3249 __ cbnz(rscratch1, L);
3250 __ should_not_reach_here();
3251 __ bind(L);
3252 #endif // ASSERT
3253 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3254
3255 // codeBlob framesize is in words (not VMRegImpl::slot_size)
3256 RuntimeStub* stub =
3257 RuntimeStub::new_runtime_stub(name,
3258 &code,
3259 frame_complete,
3260 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
3261 oop_maps, false);
3262 AOTCodeCache::store_code_blob(*stub, AOTCodeEntry::SharedBlob, StubInfo::blob(id));
3263
3264 return stub;
3265 }
3266
3267 #if INCLUDE_JFR
3268
3269 static void jfr_prologue(address the_pc, MacroAssembler* masm, Register thread) {
3270 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
3271 __ mov(c_rarg0, thread);
3272 }
3273
3274 // The handle is dereferenced through a load barrier.
3275 static void jfr_epilogue(MacroAssembler* masm) {
3276 __ reset_last_Java_frame(true);
3277 }
3278
3279 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint.
3280 // It returns a jobject handle to the event writer.
3281 // The handle is dereferenced and the return value is the event writer oop.
3282 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() {
3283 enum layout {
3284 rbp_off,
3285 rbpH_off,
3286 return_off,
3287 return_off2,
3288 framesize // inclusive of return address
3289 };
3290
3291 int insts_size = 1024;
3292 int locs_size = 64;
3293 const char* name = SharedRuntime::stub_name(StubId::shared_jfr_write_checkpoint_id);
3294 CodeBuffer code(name, insts_size, locs_size);
3295 OopMapSet* oop_maps = new OopMapSet();
3296 MacroAssembler* masm = new MacroAssembler(&code);
3297
3298 address start = __ pc();
3299 __ enter();
3300 int frame_complete = __ pc() - start;
3301 address the_pc = __ pc();
3302 jfr_prologue(the_pc, masm, rthread);
3303 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1);
3304 jfr_epilogue(masm);
3305 __ resolve_global_jobject(r0, rscratch1, rscratch2);
3306 __ leave();
3307 __ ret(lr);
3308
3309 OopMap* map = new OopMap(framesize, 1); // rfp
3310 oop_maps->add_gc_map(the_pc - start, map);
3311
3312 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
3313 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
3314 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
3315 oop_maps, false);
3316 return stub;
3317 }
3318
3319 // For c2: call to return a leased buffer.
3320 RuntimeStub* SharedRuntime::generate_jfr_return_lease() {
3321 enum layout {
3322 rbp_off,
3323 rbpH_off,
3324 return_off,
3325 return_off2,
3326 framesize // inclusive of return address
3327 };
3328
3329 int insts_size = 1024;
3330 int locs_size = 64;
3331
3332 const char* name = SharedRuntime::stub_name(StubId::shared_jfr_return_lease_id);
3333 CodeBuffer code(name, insts_size, locs_size);
3334 OopMapSet* oop_maps = new OopMapSet();
3335 MacroAssembler* masm = new MacroAssembler(&code);
3336
3337 address start = __ pc();
3338 __ enter();
3339 int frame_complete = __ pc() - start;
3340 address the_pc = __ pc();
3341 jfr_prologue(the_pc, masm, rthread);
3342 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1);
3343 jfr_epilogue(masm);
3344
3345 __ leave();
3346 __ ret(lr);
3347
3348 OopMap* map = new OopMap(framesize, 1); // rfp
3349 oop_maps->add_gc_map(the_pc - start, map);
3350
3351 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
3352 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
3353 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
3354 oop_maps, false);
3355 return stub;
3356 }
3357
3358 #endif // INCLUDE_JFR