1 /*
2 * Copyright (c) 2003, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "asm/macroAssembler.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "classfile/symbolTable.hpp"
30 #include "code/aotCodeCache.hpp"
31 #include "code/codeCache.hpp"
32 #include "code/compiledIC.hpp"
33 #include "code/debugInfoRec.hpp"
34 #include "code/vtableStubs.hpp"
35 #include "compiler/oopMap.hpp"
36 #include "gc/shared/barrierSetAssembler.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "interpreter/interp_masm.hpp"
39 #include "logging/log.hpp"
40 #include "memory/resourceArea.hpp"
41 #include "nativeInst_aarch64.hpp"
42 #include "oops/klass.inline.hpp"
43 #include "oops/method.inline.hpp"
44 #include "prims/methodHandles.hpp"
45 #include "runtime/continuation.hpp"
46 #include "runtime/continuationEntry.inline.hpp"
47 #include "runtime/globals.hpp"
48 #include "runtime/jniHandles.hpp"
49 #include "runtime/safepointMechanism.hpp"
50 #include "runtime/sharedRuntime.hpp"
51 #include "runtime/signature.hpp"
52 #include "runtime/stubRoutines.hpp"
53 #include "runtime/timerTrace.hpp"
54 #include "runtime/vframeArray.hpp"
55 #include "utilities/align.hpp"
56 #include "utilities/formatBuffer.hpp"
57 #include "vmreg_aarch64.inline.hpp"
58 #ifdef COMPILER1
59 #include "c1/c1_Runtime1.hpp"
60 #endif
61 #ifdef COMPILER2
62 #include "adfiles/ad_aarch64.hpp"
63 #include "opto/runtime.hpp"
64 #endif
65 #if INCLUDE_JVMCI
66 #include "jvmci/jvmciJavaClasses.hpp"
67 #endif
68
69 #define __ masm->
70
71 #ifdef PRODUCT
72 #define BLOCK_COMMENT(str) /* nothing */
73 #else
74 #define BLOCK_COMMENT(str) __ block_comment(str)
75 #endif
76
77 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
78
79 // FIXME -- this is used by C1
80 class RegisterSaver {
81 const bool _save_vectors;
82 public:
83 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
84
85 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
86 void restore_live_registers(MacroAssembler* masm);
87
88 // Offsets into the register save area
89 // Used by deoptimization when it is managing result register
90 // values on its own
91
92 int reg_offset_in_bytes(Register r);
93 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); }
94 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); }
95 int v0_offset_in_bytes();
96
97 // Total stack size in bytes for saving sve predicate registers.
98 int total_sve_predicate_in_bytes();
99
100 // Capture info about frame layout
101 // Note this is only correct when not saving full vectors.
102 enum layout {
103 fpu_state_off = 0,
104 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
105 // The frame sender code expects that rfp will be in
106 // the "natural" place and will override any oopMap
107 // setting for it. We must therefore force the layout
108 // so that it agrees with the frame sender code.
109 r0_off = fpu_state_off + FPUStateSizeInWords,
110 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register,
111 return_off = rfp_off + Register::max_slots_per_register, // slot for return address
112 reg_save_size = return_off + Register::max_slots_per_register};
113
114 };
115
116 int RegisterSaver::reg_offset_in_bytes(Register r) {
117 // The integer registers are located above the floating point
118 // registers in the stack frame pushed by save_live_registers() so the
119 // offset depends on whether we are saving full vectors, and whether
120 // those vectors are NEON or SVE.
121
122 int slots_per_vect = FloatRegister::save_slots_per_register;
123
124 #if COMPILER2_OR_JVMCI
125 if (_save_vectors) {
126 slots_per_vect = FloatRegister::slots_per_neon_register;
127
128 #ifdef COMPILER2
129 if (Matcher::supports_scalable_vector()) {
130 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
131 }
132 #endif
133 }
134 #endif
135
136 int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt;
137 return r0_offset + r->encoding() * wordSize;
138 }
139
140 int RegisterSaver::v0_offset_in_bytes() {
141 // The floating point registers are located above the predicate registers if
142 // they are present in the stack frame pushed by save_live_registers(). So the
143 // offset depends on the saved total predicate vectors in the stack frame.
144 return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt;
145 }
146
147 int RegisterSaver::total_sve_predicate_in_bytes() {
148 #ifdef COMPILER2
149 if (_save_vectors && Matcher::supports_scalable_vector()) {
150 return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) *
151 PRegister::number_of_registers;
152 }
153 #endif
154 return 0;
155 }
156
157 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
158 bool use_sve = false;
159 int sve_vector_size_in_bytes = 0;
160 int sve_vector_size_in_slots = 0;
161 int sve_predicate_size_in_slots = 0;
162 int total_predicate_in_bytes = total_sve_predicate_in_bytes();
163 int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size;
164
165 #ifdef COMPILER2
166 use_sve = Matcher::supports_scalable_vector();
167 if (use_sve) {
168 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
169 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
170 sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots();
171 }
172 #endif
173
174 #if COMPILER2_OR_JVMCI
175 if (_save_vectors) {
176 int extra_save_slots_per_register = 0;
177 // Save upper half of vector registers
178 if (use_sve) {
179 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register;
180 } else {
181 extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register;
182 }
183 int extra_vector_bytes = extra_save_slots_per_register *
184 VMRegImpl::stack_slot_size *
185 FloatRegister::number_of_registers;
186 additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize);
187 }
188 #else
189 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
190 #endif
191
192 int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
193 reg_save_size * BytesPerInt, 16);
194 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
195 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
196 // The caller will allocate additional_frame_words
197 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
198 // CodeBlob frame size is in words.
199 int frame_size_in_words = frame_size_in_bytes / wordSize;
200 *total_frame_words = frame_size_in_words;
201
202 // Save Integer and Float registers.
203 __ enter();
204 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes);
205
206 // Set an oopmap for the call site. This oopmap will map all
207 // oop-registers and debug-info registers as callee-saved. This
208 // will allow deoptimization at this safepoint to find all possible
209 // debug-info recordings, as well as let GC find all oops.
210
211 OopMapSet *oop_maps = new OopMapSet();
212 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
213
214 for (int i = 0; i < Register::number_of_registers; i++) {
215 Register r = as_Register(i);
216 if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) {
217 // SP offsets are in 4-byte words.
218 // Register slots are 8 bytes wide, 32 floating-point registers.
219 int sp_offset = Register::max_slots_per_register * i +
220 FloatRegister::save_slots_per_register * FloatRegister::number_of_registers;
221 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg());
222 }
223 }
224
225 for (int i = 0; i < FloatRegister::number_of_registers; i++) {
226 FloatRegister r = as_FloatRegister(i);
227 int sp_offset = 0;
228 if (_save_vectors) {
229 sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) :
230 (FloatRegister::slots_per_neon_register * i);
231 } else {
232 sp_offset = FloatRegister::save_slots_per_register * i;
233 }
234 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
235 }
236
237 return oop_map;
238 }
239
240 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
241 #ifdef COMPILER2
242 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
243 Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes());
244 #else
245 #if !INCLUDE_JVMCI
246 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
247 #endif
248 __ pop_CPU_state(_save_vectors);
249 #endif
250 __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
251 __ authenticate_return_address();
252 }
253
254 // Is vector's size (in bytes) bigger than a size saved by default?
255 // 8 bytes vector registers are saved by default on AArch64.
256 // The SVE supported min vector size is 8 bytes and we need to save
257 // predicate registers when the vector size is 8 bytes as well.
258 bool SharedRuntime::is_wide_vector(int size) {
259 return size > 8 || (UseSVE > 0 && size >= 8);
260 }
261
262 // ---------------------------------------------------------------------------
263 // Read the array of BasicTypes from a signature, and compute where the
264 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
265 // quantities. Values less than VMRegImpl::stack0 are registers, those above
266 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
267 // as framesizes are fixed.
268 // VMRegImpl::stack0 refers to the first slot 0(sp).
269 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
270 // Register up to Register::number_of_registers are the 64-bit
271 // integer registers.
272
273 // Note: the INPUTS in sig_bt are in units of Java argument words,
274 // which are 64-bit. The OUTPUTS are in 32-bit units.
275
276 // The Java calling convention is a "shifted" version of the C ABI.
277 // By skipping the first C ABI register we can call non-static jni
278 // methods with small numbers of arguments without having to shuffle
279 // the arguments at all. Since we control the java ABI we ought to at
280 // least get some advantage out of it.
281
282 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
283 VMRegPair *regs,
284 int total_args_passed) {
285
286 // Create the mapping between argument positions and
287 // registers.
288 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
289 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
290 };
291 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
292 j_farg0, j_farg1, j_farg2, j_farg3,
293 j_farg4, j_farg5, j_farg6, j_farg7
294 };
295
296
297 uint int_args = 0;
298 uint fp_args = 0;
299 uint stk_args = 0;
300
301 for (int i = 0; i < total_args_passed; i++) {
302 switch (sig_bt[i]) {
303 case T_BOOLEAN:
304 case T_CHAR:
305 case T_BYTE:
306 case T_SHORT:
307 case T_INT:
308 if (int_args < Argument::n_int_register_parameters_j) {
309 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
310 } else {
311 stk_args = align_up(stk_args, 2);
312 regs[i].set1(VMRegImpl::stack2reg(stk_args));
313 stk_args += 1;
314 }
315 break;
316 case T_VOID:
317 // halves of T_LONG or T_DOUBLE
318 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
319 regs[i].set_bad();
320 break;
321 case T_LONG:
322 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
323 // fall through
324 case T_OBJECT:
325 case T_ARRAY:
326 case T_ADDRESS:
327 if (int_args < Argument::n_int_register_parameters_j) {
328 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
329 } else {
330 stk_args = align_up(stk_args, 2);
331 regs[i].set2(VMRegImpl::stack2reg(stk_args));
332 stk_args += 2;
333 }
334 break;
335 case T_FLOAT:
336 if (fp_args < Argument::n_float_register_parameters_j) {
337 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
338 } else {
339 stk_args = align_up(stk_args, 2);
340 regs[i].set1(VMRegImpl::stack2reg(stk_args));
341 stk_args += 1;
342 }
343 break;
344 case T_DOUBLE:
345 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
346 if (fp_args < Argument::n_float_register_parameters_j) {
347 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
348 } else {
349 stk_args = align_up(stk_args, 2);
350 regs[i].set2(VMRegImpl::stack2reg(stk_args));
351 stk_args += 2;
352 }
353 break;
354 default:
355 ShouldNotReachHere();
356 break;
357 }
358 }
359
360 return stk_args;
361 }
362
363
364 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j;
365 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j;
366
367 int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) {
368
369 // Create the mapping between argument positions and registers.
370
371 static const Register INT_ArgReg[java_return_convention_max_int] = {
372 r0 /* j_rarg7 */, j_rarg6, j_rarg5, j_rarg4, j_rarg3, j_rarg2, j_rarg1, j_rarg0
373 };
374
375 static const FloatRegister FP_ArgReg[java_return_convention_max_float] = {
376 j_farg0, j_farg1, j_farg2, j_farg3, j_farg4, j_farg5, j_farg6, j_farg7
377 };
378
379 uint int_args = 0;
380 uint fp_args = 0;
381
382 for (int i = 0; i < total_args_passed; i++) {
383 switch (sig_bt[i]) {
384 case T_BOOLEAN:
385 case T_CHAR:
386 case T_BYTE:
387 case T_SHORT:
388 case T_INT:
389 if (int_args < SharedRuntime::java_return_convention_max_int) {
390 regs[i].set1(INT_ArgReg[int_args]->as_VMReg());
391 int_args ++;
392 } else {
393 return -1;
394 }
395 break;
396 case T_VOID:
397 // halves of T_LONG or T_DOUBLE
398 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
399 regs[i].set_bad();
400 break;
401 case T_LONG:
402 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
403 // fall through
404 case T_OBJECT:
405 case T_ARRAY:
406 case T_ADDRESS:
407 // Should T_METADATA be added to java_calling_convention as well ?
408 case T_METADATA:
409 if (int_args < SharedRuntime::java_return_convention_max_int) {
410 regs[i].set2(INT_ArgReg[int_args]->as_VMReg());
411 int_args ++;
412 } else {
413 return -1;
414 }
415 break;
416 case T_FLOAT:
417 if (fp_args < SharedRuntime::java_return_convention_max_float) {
418 regs[i].set1(FP_ArgReg[fp_args]->as_VMReg());
419 fp_args ++;
420 } else {
421 return -1;
422 }
423 break;
424 case T_DOUBLE:
425 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
426 if (fp_args < SharedRuntime::java_return_convention_max_float) {
427 regs[i].set2(FP_ArgReg[fp_args]->as_VMReg());
428 fp_args ++;
429 } else {
430 return -1;
431 }
432 break;
433 default:
434 ShouldNotReachHere();
435 break;
436 }
437 }
438
439 return int_args + fp_args;
440 }
441
442 // Patch the callers callsite with entry to compiled code if it exists.
443 static void patch_callers_callsite(MacroAssembler *masm) {
444 Label L;
445 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
446 __ cbz(rscratch1, L);
447
448 __ enter();
449 __ push_CPU_state();
450
451 // VM needs caller's callsite
452 // VM needs target method
453 // This needs to be a long call since we will relocate this adapter to
454 // the codeBuffer and it may not reach
455
456 #ifndef PRODUCT
457 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
458 #endif
459
460 __ mov(c_rarg0, rmethod);
461 __ mov(c_rarg1, lr);
462 __ authenticate_return_address(c_rarg1);
463 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
464 __ blr(rscratch1);
465
466 // Explicit isb required because fixup_callers_callsite may change the code
467 // stream.
468 __ safepoint_isb();
469
470 __ pop_CPU_state();
471 // restore sp
472 __ leave();
473 __ bind(L);
474 }
475
476 // For each inline type argument, sig includes the list of fields of
477 // the inline type. This utility function computes the number of
478 // arguments for the call if inline types are passed by reference (the
479 // calling convention the interpreter expects).
480 static int compute_total_args_passed_int(const GrowableArray<SigEntry>* sig_extended) {
481 int total_args_passed = 0;
482 if (InlineTypePassFieldsAsArgs) {
483 for (int i = 0; i < sig_extended->length(); i++) {
484 BasicType bt = sig_extended->at(i)._bt;
485 if (bt == T_METADATA) {
486 // In sig_extended, an inline type argument starts with:
487 // T_METADATA, followed by the types of the fields of the
488 // inline type and T_VOID to mark the end of the value
489 // type. Inline types are flattened so, for instance, in the
490 // case of an inline type with an int field and an inline type
491 // field that itself has 2 fields, an int and a long:
492 // T_METADATA T_INT T_METADATA T_INT T_LONG T_VOID (second
493 // slot for the T_LONG) T_VOID (inner inline type) T_VOID
494 // (outer inline type)
495 total_args_passed++;
496 int vt = 1;
497 do {
498 i++;
499 BasicType bt = sig_extended->at(i)._bt;
500 BasicType prev_bt = sig_extended->at(i-1)._bt;
501 if (bt == T_METADATA) {
502 vt++;
503 } else if (bt == T_VOID &&
504 prev_bt != T_LONG &&
505 prev_bt != T_DOUBLE) {
506 vt--;
507 }
508 } while (vt != 0);
509 } else {
510 total_args_passed++;
511 }
512 }
513 } else {
514 total_args_passed = sig_extended->length();
515 }
516
517 return total_args_passed;
518 }
519
520
521 static void gen_c2i_adapter_helper(MacroAssembler* masm,
522 BasicType bt,
523 BasicType prev_bt,
524 size_t size_in_bytes,
525 const VMRegPair& reg_pair,
526 const Address& to,
527 Register tmp1,
528 Register tmp2,
529 Register tmp3,
530 int extraspace,
531 bool is_oop) {
532 if (bt == T_VOID) {
533 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half");
534 return;
535 }
536
537 // Say 4 args:
538 // i st_off
539 // 0 32 T_LONG
540 // 1 24 T_VOID
541 // 2 16 T_OBJECT
542 // 3 8 T_BOOL
543 // - 0 return address
544 //
545 // However to make thing extra confusing. Because we can fit a Java long/double in
546 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
547 // leaves one slot empty and only stores to a single slot. In this case the
548 // slot that is occupied is the T_VOID slot. See I said it was confusing.
549
550 bool wide = (size_in_bytes == wordSize);
551 VMReg r_1 = reg_pair.first();
552 VMReg r_2 = reg_pair.second();
553 assert(r_2->is_valid() == wide, "invalid size");
554 if (!r_1->is_valid()) {
555 assert(!r_2->is_valid(), "");
556 return;
557 }
558
559 if (!r_1->is_FloatRegister()) {
560 Register val = r25;
561 if (r_1->is_stack()) {
562 // memory to memory use r25 (scratch registers is used by store_heap_oop)
563 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
564 __ load_sized_value(val, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
565 } else {
566 val = r_1->as_Register();
567 }
568 assert_different_registers(to.base(), val, tmp1, tmp2, tmp3);
569 if (is_oop) {
570 __ store_heap_oop(to, val, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
571 } else {
572 __ store_sized_value(to, val, size_in_bytes);
573 }
574 } else {
575 if (wide) {
576 __ strd(r_1->as_FloatRegister(), to);
577 } else {
578 // only a float use just part of the slot
579 __ strs(r_1->as_FloatRegister(), to);
580 }
581 }
582 }
583
584 static void gen_c2i_adapter(MacroAssembler *masm,
585 const GrowableArray<SigEntry>* sig_extended,
586 const VMRegPair *regs,
587 bool requires_clinit_barrier,
588 address& c2i_no_clinit_check_entry,
589 Label& skip_fixup,
590 address start,
591 OopMapSet* oop_maps,
592 int& frame_complete,
593 int& frame_size_in_words,
594 bool alloc_inline_receiver) {
595 if (requires_clinit_barrier && VM_Version::supports_fast_class_init_checks()) {
596 Label L_skip_barrier;
597
598 { // Bypass the barrier for non-static methods
599 __ ldrh(rscratch1, Address(rmethod, Method::access_flags_offset()));
600 __ andsw(zr, rscratch1, JVM_ACC_STATIC);
601 __ br(Assembler::EQ, L_skip_barrier); // non-static
602 }
603
604 __ load_method_holder(rscratch2, rmethod);
605 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
606 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
607
608 __ bind(L_skip_barrier);
609 c2i_no_clinit_check_entry = __ pc();
610 }
611
612 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
613 bs->c2i_entry_barrier(masm);
614
615 // Before we get into the guts of the C2I adapter, see if we should be here
616 // at all. We've come from compiled code and are attempting to jump to the
617 // interpreter, which means the caller made a static call to get here
618 // (vcalls always get a compiled target if there is one). Check for a
619 // compiled target. If there is one, we need to patch the caller's call.
620 patch_callers_callsite(masm);
621
622 __ bind(skip_fixup);
623
624 // Name some registers to be used in the following code. We can use
625 // anything except r0-r7 which are arguments in the Java calling
626 // convention, rmethod (r12), and r13 which holds the outgoing sender
627 // SP for the interpreter.
628 Register buf_array = r10; // Array of buffered inline types
629 Register buf_oop = r11; // Buffered inline type oop
630 Register tmp1 = r15;
631 Register tmp2 = r16;
632 Register tmp3 = r17;
633
634 if (InlineTypePassFieldsAsArgs) {
635 // Is there an inline type argument?
636 bool has_inline_argument = false;
637 for (int i = 0; i < sig_extended->length() && !has_inline_argument; i++) {
638 has_inline_argument = (sig_extended->at(i)._bt == T_METADATA);
639 }
640 if (has_inline_argument) {
641 // There is at least an inline type argument: we're coming from
642 // compiled code so we have no buffers to back the inline types
643 // Allocate the buffers here with a runtime call.
644 RegisterSaver reg_save(false /* save_vectors */);
645 OopMap* map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
646
647 frame_complete = __ offset();
648 address the_pc = __ pc();
649
650 Label retaddr;
651 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
652
653 __ mov(c_rarg0, rthread);
654 __ mov(c_rarg1, rmethod);
655 __ mov(c_rarg2, (int64_t)alloc_inline_receiver);
656
657 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::allocate_inline_types)));
658 __ blr(rscratch1);
659 __ bind(retaddr);
660
661 oop_maps->add_gc_map(__ pc() - start, map);
662 __ reset_last_Java_frame(false);
663
664 reg_save.restore_live_registers(masm);
665
666 Label no_exception;
667 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
668 __ cbz(rscratch1, no_exception);
669
670 __ str(zr, Address(rthread, JavaThread::vm_result_oop_offset()));
671 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
672 __ b(RuntimeAddress(StubRoutines::forward_exception_entry()));
673
674 __ bind(no_exception);
675
676 // We get an array of objects from the runtime call
677 __ get_vm_result_oop(buf_array, rthread);
678 __ get_vm_result_metadata(rmethod, rthread); // TODO: required to keep the callee Method live?
679 }
680 }
681
682 // Since all args are passed on the stack, total_args_passed *
683 // Interpreter::stackElementSize is the space we need.
684
685 int total_args_passed = compute_total_args_passed_int(sig_extended);
686 int extraspace = total_args_passed * Interpreter::stackElementSize;
687
688 // stack is aligned, keep it that way
689 extraspace = align_up(extraspace, StackAlignmentInBytes);
690
691 // set senderSP value
692 __ mov(r19_sender_sp, sp);
693
694 __ sub(sp, sp, extraspace);
695
696 // Now write the args into the outgoing interpreter space
697
698 // next_arg_comp is the next argument from the compiler point of
699 // view (inline type fields are passed in registers/on the stack). In
700 // sig_extended, an inline type argument starts with: T_METADATA,
701 // followed by the types of the fields of the inline type and T_VOID
702 // to mark the end of the inline type. ignored counts the number of
703 // T_METADATA/T_VOID. next_vt_arg is the next inline type argument:
704 // used to get the buffer for that argument from the pool of buffers
705 // we allocated above and want to pass to the
706 // interpreter. next_arg_int is the next argument from the
707 // interpreter point of view (inline types are passed by reference).
708 for (int next_arg_comp = 0, ignored = 0, next_vt_arg = 0, next_arg_int = 0;
709 next_arg_comp < sig_extended->length(); next_arg_comp++) {
710 assert(ignored <= next_arg_comp, "shouldn't skip over more slots than there are arguments");
711 assert(next_arg_int <= total_args_passed, "more arguments for the interpreter than expected?");
712 BasicType bt = sig_extended->at(next_arg_comp)._bt;
713 int st_off = (total_args_passed - next_arg_int - 1) * Interpreter::stackElementSize;
714 if (!InlineTypePassFieldsAsArgs || bt != T_METADATA) {
715 int next_off = st_off - Interpreter::stackElementSize;
716 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : st_off;
717 const VMRegPair reg_pair = regs[next_arg_comp-ignored];
718 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4;
719 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL,
720 size_in_bytes, reg_pair, Address(sp, offset), tmp1, tmp2, tmp3, extraspace, false);
721 next_arg_int++;
722 #ifdef ASSERT
723 if (bt == T_LONG || bt == T_DOUBLE) {
724 // Overwrite the unused slot with known junk
725 __ mov(rscratch1, CONST64(0xdeadffffdeadaaaa));
726 __ str(rscratch1, Address(sp, st_off));
727 }
728 #endif /* ASSERT */
729 } else {
730 ignored++;
731 // get the buffer from the just allocated pool of buffers
732 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + next_vt_arg * type2aelembytes(T_OBJECT);
733 __ load_heap_oop(buf_oop, Address(buf_array, index), tmp1, tmp2);
734 next_vt_arg++; next_arg_int++;
735 int vt = 1;
736 // write fields we get from compiled code in registers/stack
737 // slots to the buffer: we know we are done with that inline type
738 // argument when we hit the T_VOID that acts as an end of inline
739 // type delimiter for this inline type. Inline types are flattened
740 // so we might encounter embedded inline types. Each entry in
741 // sig_extended contains a field offset in the buffer.
742 Label L_null;
743 do {
744 next_arg_comp++;
745 BasicType bt = sig_extended->at(next_arg_comp)._bt;
746 BasicType prev_bt = sig_extended->at(next_arg_comp - 1)._bt;
747 if (bt == T_METADATA) {
748 vt++;
749 ignored++;
750 } else if (bt == T_VOID && prev_bt != T_LONG && prev_bt != T_DOUBLE) {
751 vt--;
752 ignored++;
753 } else {
754 int off = sig_extended->at(next_arg_comp)._offset;
755 if (off == -1) {
756 // Nullable inline type argument, emit null check
757 VMReg reg = regs[next_arg_comp-ignored].first();
758 Label L_notNull;
759 if (reg->is_stack()) {
760 int ld_off = reg->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
761 __ ldrb(tmp1, Address(sp, ld_off));
762 __ cbnz(tmp1, L_notNull);
763 } else {
764 __ cbnz(reg->as_Register(), L_notNull);
765 }
766 __ str(zr, Address(sp, st_off));
767 __ b(L_null);
768 __ bind(L_notNull);
769 continue;
770 }
771 assert(off > 0, "offset in object should be positive");
772 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
773 bool is_oop = is_reference_type(bt);
774 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL,
775 size_in_bytes, regs[next_arg_comp-ignored], Address(buf_oop, off), tmp1, tmp2, tmp3, extraspace, is_oop);
776 }
777 } while (vt != 0);
778 // pass the buffer to the interpreter
779 __ str(buf_oop, Address(sp, st_off));
780 __ bind(L_null);
781 }
782 }
783
784 __ mov(esp, sp); // Interp expects args on caller's expression stack
785
786 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
787 __ br(rscratch1);
788 }
789
790 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, int comp_args_on_stack, const GrowableArray<SigEntry>* sig, const VMRegPair *regs) {
791
792
793 // Note: r19_sender_sp contains the senderSP on entry. We must
794 // preserve it since we may do a i2c -> c2i transition if we lose a
795 // race where compiled code goes non-entrant while we get args
796 // ready.
797
798 // Adapters are frameless.
799
800 // An i2c adapter is frameless because the *caller* frame, which is
801 // interpreted, routinely repairs its own esp (from
802 // interpreter_frame_last_sp), even if a callee has modified the
803 // stack pointer. It also recalculates and aligns sp.
804
805 // A c2i adapter is frameless because the *callee* frame, which is
806 // interpreted, routinely repairs its caller's sp (from sender_sp,
807 // which is set up via the senderSP register).
808
809 // In other words, if *either* the caller or callee is interpreted, we can
810 // get the stack pointer repaired after a call.
811
812 // This is why c2i and i2c adapters cannot be indefinitely composed.
813 // In particular, if a c2i adapter were to somehow call an i2c adapter,
814 // both caller and callee would be compiled methods, and neither would
815 // clean up the stack pointer changes performed by the two adapters.
816 // If this happens, control eventually transfers back to the compiled
817 // caller, but with an uncorrected stack, causing delayed havoc.
818
819 // Cut-out for having no stack args.
820 int comp_words_on_stack = 0;
821 if (comp_args_on_stack) {
822 comp_words_on_stack = align_up(comp_args_on_stack * VMRegImpl::stack_slot_size, wordSize) >> LogBytesPerWord;
823 __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
824 __ andr(sp, rscratch1, -16);
825 }
826
827 // Will jump to the compiled code just as if compiled code was doing it.
828 // Pre-load the register-jump target early, to schedule it better.
829 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_inline_offset())));
830
831 #if INCLUDE_JVMCI
832 if (EnableJVMCI) {
833 // check if this call should be routed towards a specific entry point
834 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
835 Label no_alternative_target;
836 __ cbz(rscratch2, no_alternative_target);
837 __ mov(rscratch1, rscratch2);
838 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
839 __ bind(no_alternative_target);
840 }
841 #endif // INCLUDE_JVMCI
842
843 int total_args_passed = sig->length();
844
845 // Now generate the shuffle code.
846 for (int i = 0; i < total_args_passed; i++) {
847 BasicType bt = sig->at(i)._bt;
848 if (bt == T_VOID) {
849 assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half");
850 continue;
851 }
852
853 // Pick up 0, 1 or 2 words from SP+offset.
854 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), "scrambled load targets?");
855
856 // Load in argument order going down.
857 int ld_off = (total_args_passed - i - 1) * Interpreter::stackElementSize;
858 // Point to interpreter value (vs. tag)
859 int next_off = ld_off - Interpreter::stackElementSize;
860 //
861 //
862 //
863 VMReg r_1 = regs[i].first();
864 VMReg r_2 = regs[i].second();
865 if (!r_1->is_valid()) {
866 assert(!r_2->is_valid(), "");
867 continue;
868 }
869 if (r_1->is_stack()) {
870 // Convert stack slot to an SP offset (+ wordSize to account for return address )
871 int st_off = regs[i].first()->reg2stack() * VMRegImpl::stack_slot_size;
872 if (!r_2->is_valid()) {
873 // sign extend???
874 __ ldrsw(rscratch2, Address(esp, ld_off));
875 __ str(rscratch2, Address(sp, st_off));
876 } else {
877 //
878 // We are using two optoregs. This can be either T_OBJECT,
879 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
880 // two slots but only uses one for thr T_LONG or T_DOUBLE case
881 // So we must adjust where to pick up the data to match the
882 // interpreter.
883 //
884 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
885 // are accessed as negative so LSW is at LOW address
886
887 // ld_off is MSW so get LSW
888 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
889 __ ldr(rscratch2, Address(esp, offset));
890 // st_off is LSW (i.e. reg.first())
891 __ str(rscratch2, Address(sp, st_off));
892 }
893 } else if (r_1->is_Register()) { // Register argument
894 Register r = r_1->as_Register();
895 if (r_2->is_valid()) {
896 //
897 // We are using two VMRegs. This can be either T_OBJECT,
898 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
899 // two slots but only uses one for thr T_LONG or T_DOUBLE case
900 // So we must adjust where to pick up the data to match the
901 // interpreter.
902
903 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
904
905 // this can be a misaligned move
906 __ ldr(r, Address(esp, offset));
907 } else {
908 // sign extend and use a full word?
909 __ ldrw(r, Address(esp, ld_off));
910 }
911 } else {
912 if (!r_2->is_valid()) {
913 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
914 } else {
915 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
916 }
917 }
918 }
919
920
921 __ mov(rscratch2, rscratch1);
922 __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
923 __ mov(rscratch1, rscratch2);
924
925 // 6243940 We might end up in handle_wrong_method if
926 // the callee is deoptimized as we race thru here. If that
927 // happens we don't want to take a safepoint because the
928 // caller frame will look interpreted and arguments are now
929 // "compiled" so it is much better to make this transition
930 // invisible to the stack walking code. Unfortunately if
931 // we try and find the callee by normal means a safepoint
932 // is possible. So we stash the desired callee in the thread
933 // and the vm will find there should this case occur.
934
935 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
936 __ br(rscratch1);
937 }
938
939 static void gen_inline_cache_check(MacroAssembler *masm, Label& skip_fixup) {
940 Register data = rscratch2;
941 __ ic_check(1 /* end_alignment */);
942 __ ldr(rmethod, Address(data, CompiledICData::speculated_method_offset()));
943
944 // Method might have been compiled since the call site was patched to
945 // interpreted; if that is the case treat it as a miss so we can get
946 // the call site corrected.
947 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
948 __ cbz(rscratch1, skip_fixup);
949 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
950 }
951
952 // ---------------------------------------------------------------
953 void SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm,
954 int comp_args_on_stack,
955 const GrowableArray<SigEntry>* sig,
956 const VMRegPair* regs,
957 const GrowableArray<SigEntry>* sig_cc,
958 const VMRegPair* regs_cc,
959 const GrowableArray<SigEntry>* sig_cc_ro,
960 const VMRegPair* regs_cc_ro,
961 AdapterHandlerEntry* handler,
962 AdapterBlob*& new_adapter,
963 bool allocate_code_blob) {
964
965 address i2c_entry = __ pc();
966 gen_i2c_adapter(masm, comp_args_on_stack, sig, regs);
967
968 // -------------------------------------------------------------------------
969 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls
970 // to the interpreter. The args start out packed in the compiled layout. They
971 // need to be unpacked into the interpreter layout. This will almost always
972 // require some stack space. We grow the current (compiled) stack, then repack
973 // the args. We finally end in a jump to the generic interpreter entry point.
974 // On exit from the interpreter, the interpreter will restore our SP (lest the
975 // compiled code, which relies solely on SP and not FP, get sick).
976
977 address c2i_unverified_entry = __ pc();
978 address c2i_unverified_inline_entry = __ pc();
979 Label skip_fixup;
980
981 gen_inline_cache_check(masm, skip_fixup);
982
983 OopMapSet* oop_maps = new OopMapSet();
984 int frame_complete = CodeOffsets::frame_never_safe;
985 int frame_size_in_words = 0;
986
987 // Scalarized c2i adapter with non-scalarized receiver (i.e., don't pack receiver)
988 address c2i_no_clinit_check_entry = nullptr;
989 address c2i_inline_ro_entry = __ pc();
990 if (regs_cc != regs_cc_ro) {
991 // No class init barrier needed because method is guaranteed to be non-static
992 gen_c2i_adapter(masm, sig_cc_ro, regs_cc_ro, /* requires_clinit_barrier = */ false, c2i_no_clinit_check_entry,
993 skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false);
994 skip_fixup.reset();
995 }
996
997 // Scalarized c2i adapter
998 address c2i_entry = __ pc();
999 address c2i_inline_entry = __ pc();
1000 gen_c2i_adapter(masm, sig_cc, regs_cc, /* requires_clinit_barrier = */ true, c2i_no_clinit_check_entry,
1001 skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ true);
1002
1003 // Non-scalarized c2i adapter
1004 if (regs != regs_cc) {
1005 c2i_unverified_inline_entry = __ pc();
1006 Label inline_entry_skip_fixup;
1007 gen_inline_cache_check(masm, inline_entry_skip_fixup);
1008
1009 c2i_inline_entry = __ pc();
1010 gen_c2i_adapter(masm, sig, regs, /* requires_clinit_barrier = */ true, c2i_no_clinit_check_entry,
1011 inline_entry_skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false);
1012 }
1013
1014
1015 // The c2i adapter might safepoint and trigger a GC. The caller must make sure that
1016 // the GC knows about the location of oop argument locations passed to the c2i adapter.
1017 if (allocate_code_blob) {
1018 bool caller_must_gc_arguments = (regs != regs_cc);
1019 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps, caller_must_gc_arguments);
1020 }
1021
1022 handler->set_entry_points(i2c_entry, c2i_entry, c2i_inline_entry, c2i_inline_ro_entry, c2i_unverified_entry,
1023 c2i_unverified_inline_entry, c2i_no_clinit_check_entry);
1024 }
1025
1026 static int c_calling_convention_priv(const BasicType *sig_bt,
1027 VMRegPair *regs,
1028 int total_args_passed) {
1029
1030 // We return the amount of VMRegImpl stack slots we need to reserve for all
1031 // the arguments NOT counting out_preserve_stack_slots.
1032
1033 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
1034 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7
1035 };
1036 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1037 c_farg0, c_farg1, c_farg2, c_farg3,
1038 c_farg4, c_farg5, c_farg6, c_farg7
1039 };
1040
1041 uint int_args = 0;
1042 uint fp_args = 0;
1043 uint stk_args = 0; // inc by 2 each time
1044
1045 for (int i = 0; i < total_args_passed; i++) {
1046 switch (sig_bt[i]) {
1047 case T_BOOLEAN:
1048 case T_CHAR:
1049 case T_BYTE:
1050 case T_SHORT:
1051 case T_INT:
1052 if (int_args < Argument::n_int_register_parameters_c) {
1053 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1054 } else {
1055 #ifdef __APPLE__
1056 // Less-than word types are stored one after another.
1057 // The code is unable to handle this so bailout.
1058 return -1;
1059 #endif
1060 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1061 stk_args += 2;
1062 }
1063 break;
1064 case T_LONG:
1065 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1066 // fall through
1067 case T_OBJECT:
1068 case T_ARRAY:
1069 case T_ADDRESS:
1070 case T_METADATA:
1071 if (int_args < Argument::n_int_register_parameters_c) {
1072 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1073 } else {
1074 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1075 stk_args += 2;
1076 }
1077 break;
1078 case T_FLOAT:
1079 if (fp_args < Argument::n_float_register_parameters_c) {
1080 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1081 } else {
1082 #ifdef __APPLE__
1083 // Less-than word types are stored one after another.
1084 // The code is unable to handle this so bailout.
1085 return -1;
1086 #endif
1087 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1088 stk_args += 2;
1089 }
1090 break;
1091 case T_DOUBLE:
1092 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1093 if (fp_args < Argument::n_float_register_parameters_c) {
1094 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1095 } else {
1096 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1097 stk_args += 2;
1098 }
1099 break;
1100 case T_VOID: // Halves of longs and doubles
1101 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1102 regs[i].set_bad();
1103 break;
1104 default:
1105 ShouldNotReachHere();
1106 break;
1107 }
1108 }
1109
1110 return stk_args;
1111 }
1112
1113 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1114 uint num_bits,
1115 uint total_args_passed) {
1116 // More than 8 argument inputs are not supported now.
1117 assert(total_args_passed <= Argument::n_float_register_parameters_c, "unsupported");
1118 assert(num_bits >= 64 && num_bits <= 2048 && is_power_of_2(num_bits), "unsupported");
1119
1120 static const FloatRegister VEC_ArgReg[Argument::n_float_register_parameters_c] = {
1121 v0, v1, v2, v3, v4, v5, v6, v7
1122 };
1123
1124 // On SVE, we use the same vector registers with 128-bit vector registers on NEON.
1125 int next_reg_val = num_bits == 64 ? 1 : 3;
1126 for (uint i = 0; i < total_args_passed; i++) {
1127 VMReg vmreg = VEC_ArgReg[i]->as_VMReg();
1128 regs[i].set_pair(vmreg->next(next_reg_val), vmreg);
1129 }
1130 return 0;
1131 }
1132
1133 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1134 VMRegPair *regs,
1135 int total_args_passed)
1136 {
1137 int result = c_calling_convention_priv(sig_bt, regs, total_args_passed);
1138 guarantee(result >= 0, "Unsupported arguments configuration");
1139 return result;
1140 }
1141
1142
1143 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1144 // We always ignore the frame_slots arg and just use the space just below frame pointer
1145 // which by this time is free to use
1146 switch (ret_type) {
1147 case T_FLOAT:
1148 __ strs(v0, Address(rfp, -wordSize));
1149 break;
1150 case T_DOUBLE:
1151 __ strd(v0, Address(rfp, -wordSize));
1152 break;
1153 case T_VOID: break;
1154 default: {
1155 __ str(r0, Address(rfp, -wordSize));
1156 }
1157 }
1158 }
1159
1160 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1161 // We always ignore the frame_slots arg and just use the space just below frame pointer
1162 // which by this time is free to use
1163 switch (ret_type) {
1164 case T_FLOAT:
1165 __ ldrs(v0, Address(rfp, -wordSize));
1166 break;
1167 case T_DOUBLE:
1168 __ ldrd(v0, Address(rfp, -wordSize));
1169 break;
1170 case T_VOID: break;
1171 default: {
1172 __ ldr(r0, Address(rfp, -wordSize));
1173 }
1174 }
1175 }
1176 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1177 RegSet x;
1178 for ( int i = first_arg ; i < arg_count ; i++ ) {
1179 if (args[i].first()->is_Register()) {
1180 x = x + args[i].first()->as_Register();
1181 } else if (args[i].first()->is_FloatRegister()) {
1182 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
1183 }
1184 }
1185 __ push(x, sp);
1186 }
1187
1188 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1189 RegSet x;
1190 for ( int i = first_arg ; i < arg_count ; i++ ) {
1191 if (args[i].first()->is_Register()) {
1192 x = x + args[i].first()->as_Register();
1193 } else {
1194 ;
1195 }
1196 }
1197 __ pop(x, sp);
1198 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1199 if (args[i].first()->is_Register()) {
1200 ;
1201 } else if (args[i].first()->is_FloatRegister()) {
1202 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
1203 }
1204 }
1205 }
1206
1207 static void verify_oop_args(MacroAssembler* masm,
1208 const methodHandle& method,
1209 const BasicType* sig_bt,
1210 const VMRegPair* regs) {
1211 Register temp_reg = r19; // not part of any compiled calling seq
1212 if (VerifyOops) {
1213 for (int i = 0; i < method->size_of_parameters(); i++) {
1214 if (sig_bt[i] == T_OBJECT ||
1215 sig_bt[i] == T_ARRAY) {
1216 VMReg r = regs[i].first();
1217 assert(r->is_valid(), "bad oop arg");
1218 if (r->is_stack()) {
1219 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1220 __ verify_oop(temp_reg);
1221 } else {
1222 __ verify_oop(r->as_Register());
1223 }
1224 }
1225 }
1226 }
1227 }
1228
1229 // on exit, sp points to the ContinuationEntry
1230 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) {
1231 assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, "");
1232 assert(in_bytes(ContinuationEntry::cont_offset()) % VMRegImpl::stack_slot_size == 0, "");
1233 assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, "");
1234
1235 stack_slots += (int)ContinuationEntry::size()/wordSize;
1236 __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata
1237
1238 OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/);
1239
1240 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1241 __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset()));
1242 __ mov(rscratch1, sp); // we can't use sp as the source in str
1243 __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1244
1245 return map;
1246 }
1247
1248 // on entry c_rarg1 points to the continuation
1249 // sp points to ContinuationEntry
1250 // c_rarg3 -- isVirtualThread
1251 static void fill_continuation_entry(MacroAssembler* masm) {
1252 #ifdef ASSERT
1253 __ movw(rscratch1, ContinuationEntry::cookie_value());
1254 __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset()));
1255 #endif
1256
1257 __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset()));
1258 __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset()));
1259 __ str (zr, Address(sp, ContinuationEntry::chunk_offset()));
1260 __ strw(zr, Address(sp, ContinuationEntry::argsize_offset()));
1261 __ strw(zr, Address(sp, ContinuationEntry::pin_count_offset()));
1262
1263 __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1264 __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1265 __ ldr(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1266 __ str(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1267
1268 __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset()));
1269 __ str(zr, Address(rthread, JavaThread::held_monitor_count_offset()));
1270 }
1271
1272 // on entry, sp points to the ContinuationEntry
1273 // on exit, rfp points to the spilled rfp in the entry frame
1274 static void continuation_enter_cleanup(MacroAssembler* masm) {
1275 #ifndef PRODUCT
1276 Label OK;
1277 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1278 __ cmp(sp, rscratch1);
1279 __ br(Assembler::EQ, OK);
1280 __ stop("incorrect sp1");
1281 __ bind(OK);
1282 #endif
1283 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1284 __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1285
1286 if (CheckJNICalls) {
1287 // Check if this is a virtual thread continuation
1288 Label L_skip_vthread_code;
1289 __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset()));
1290 __ cbzw(rscratch1, L_skip_vthread_code);
1291
1292 // If the held monitor count is > 0 and this vthread is terminating then
1293 // it failed to release a JNI monitor. So we issue the same log message
1294 // that JavaThread::exit does.
1295 __ ldr(rscratch1, Address(rthread, JavaThread::jni_monitor_count_offset()));
1296 __ cbz(rscratch1, L_skip_vthread_code);
1297
1298 // Save return value potentially containing the exception oop in callee-saved R19.
1299 __ mov(r19, r0);
1300 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::log_jni_monitor_still_held));
1301 // Restore potential return value.
1302 __ mov(r0, r19);
1303
1304 // For vthreads we have to explicitly zero the JNI monitor count of the carrier
1305 // on termination. The held count is implicitly zeroed below when we restore from
1306 // the parent held count (which has to be zero).
1307 __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset()));
1308
1309 __ bind(L_skip_vthread_code);
1310 }
1311 #ifdef ASSERT
1312 else {
1313 // Check if this is a virtual thread continuation
1314 Label L_skip_vthread_code;
1315 __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset()));
1316 __ cbzw(rscratch1, L_skip_vthread_code);
1317
1318 // See comment just above. If not checking JNI calls the JNI count is only
1319 // needed for assertion checking.
1320 __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset()));
1321
1322 __ bind(L_skip_vthread_code);
1323 }
1324 #endif
1325
1326 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset()));
1327 __ str(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset()));
1328
1329 __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset()));
1330 __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset()));
1331 __ add(rfp, sp, (int)ContinuationEntry::size());
1332 }
1333
1334 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
1335 // On entry: c_rarg1 -- the continuation object
1336 // c_rarg2 -- isContinue
1337 // c_rarg3 -- isVirtualThread
1338 static void gen_continuation_enter(MacroAssembler* masm,
1339 const methodHandle& method,
1340 const BasicType* sig_bt,
1341 const VMRegPair* regs,
1342 int& exception_offset,
1343 OopMapSet*oop_maps,
1344 int& frame_complete,
1345 int& stack_slots,
1346 int& interpreted_entry_offset,
1347 int& compiled_entry_offset) {
1348 //verify_oop_args(masm, method, sig_bt, regs);
1349 Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
1350
1351 address start = __ pc();
1352
1353 Label call_thaw, exit;
1354
1355 // i2i entry used at interp_only_mode only
1356 interpreted_entry_offset = __ pc() - start;
1357 {
1358
1359 #ifdef ASSERT
1360 Label is_interp_only;
1361 __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
1362 __ cbnzw(rscratch1, is_interp_only);
1363 __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
1364 __ bind(is_interp_only);
1365 #endif
1366
1367 // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
1368 __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2));
1369 __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1));
1370 __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0));
1371 __ push_cont_fastpath(rthread);
1372
1373 __ enter();
1374 stack_slots = 2; // will be adjusted in setup
1375 OopMap* map = continuation_enter_setup(masm, stack_slots);
1376 // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
1377 // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
1378
1379 fill_continuation_entry(masm);
1380
1381 __ cbnz(c_rarg2, call_thaw);
1382
1383 const address tr_call = __ trampoline_call(resolve);
1384 if (tr_call == nullptr) {
1385 fatal("CodeCache is full at gen_continuation_enter");
1386 }
1387
1388 oop_maps->add_gc_map(__ pc() - start, map);
1389 __ post_call_nop();
1390
1391 __ b(exit);
1392
1393 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1394 if (stub == nullptr) {
1395 fatal("CodeCache is full at gen_continuation_enter");
1396 }
1397 }
1398
1399 // compiled entry
1400 __ align(CodeEntryAlignment);
1401 compiled_entry_offset = __ pc() - start;
1402
1403 __ enter();
1404 stack_slots = 2; // will be adjusted in setup
1405 OopMap* map = continuation_enter_setup(masm, stack_slots);
1406 frame_complete = __ pc() - start;
1407
1408 fill_continuation_entry(masm);
1409
1410 __ cbnz(c_rarg2, call_thaw);
1411
1412 const address tr_call = __ trampoline_call(resolve);
1413 if (tr_call == nullptr) {
1414 fatal("CodeCache is full at gen_continuation_enter");
1415 }
1416
1417 oop_maps->add_gc_map(__ pc() - start, map);
1418 __ post_call_nop();
1419
1420 __ b(exit);
1421
1422 __ bind(call_thaw);
1423
1424 ContinuationEntry::_thaw_call_pc_offset = __ pc() - start;
1425 __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1426 oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1427 ContinuationEntry::_return_pc_offset = __ pc() - start;
1428 __ post_call_nop();
1429
1430 __ bind(exit);
1431 ContinuationEntry::_cleanup_offset = __ pc() - start;
1432 continuation_enter_cleanup(masm);
1433 __ leave();
1434 __ ret(lr);
1435
1436 /// exception handling
1437
1438 exception_offset = __ pc() - start;
1439 {
1440 __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1441
1442 continuation_enter_cleanup(masm);
1443
1444 __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1445 __ authenticate_return_address(c_rarg1);
1446 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1447
1448 // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1449
1450 __ mov(r1, r0); // the exception handler
1451 __ mov(r0, r19); // restore return value contaning the exception oop
1452 __ verify_oop(r0);
1453
1454 __ leave();
1455 __ mov(r3, lr);
1456 __ br(r1); // the exception handler
1457 }
1458
1459 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1460 if (stub == nullptr) {
1461 fatal("CodeCache is full at gen_continuation_enter");
1462 }
1463 }
1464
1465 static void gen_continuation_yield(MacroAssembler* masm,
1466 const methodHandle& method,
1467 const BasicType* sig_bt,
1468 const VMRegPair* regs,
1469 OopMapSet* oop_maps,
1470 int& frame_complete,
1471 int& stack_slots,
1472 int& compiled_entry_offset) {
1473 enum layout {
1474 rfp_off1,
1475 rfp_off2,
1476 lr_off,
1477 lr_off2,
1478 framesize // inclusive of return address
1479 };
1480 // assert(is_even(framesize/2), "sp not 16-byte aligned");
1481 stack_slots = framesize / VMRegImpl::slots_per_word;
1482 assert(stack_slots == 2, "recheck layout");
1483
1484 address start = __ pc();
1485
1486 compiled_entry_offset = __ pc() - start;
1487 __ enter();
1488
1489 __ mov(c_rarg1, sp);
1490
1491 frame_complete = __ pc() - start;
1492 address the_pc = __ pc();
1493
1494 __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1495
1496 __ mov(c_rarg0, rthread);
1497 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
1498 __ call_VM_leaf(Continuation::freeze_entry(), 2);
1499 __ reset_last_Java_frame(true);
1500
1501 Label pinned;
1502
1503 __ cbnz(r0, pinned);
1504
1505 // We've succeeded, set sp to the ContinuationEntry
1506 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1507 __ mov(sp, rscratch1);
1508 continuation_enter_cleanup(masm);
1509
1510 __ bind(pinned); // pinned -- return to caller
1511
1512 // handle pending exception thrown by freeze
1513 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1514 Label ok;
1515 __ cbz(rscratch1, ok);
1516 __ leave();
1517 __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry()));
1518 __ br(rscratch1);
1519 __ bind(ok);
1520
1521 __ leave();
1522 __ ret(lr);
1523
1524 OopMap* map = new OopMap(framesize, 1);
1525 oop_maps->add_gc_map(the_pc - start, map);
1526 }
1527
1528 void SharedRuntime::continuation_enter_cleanup(MacroAssembler* masm) {
1529 ::continuation_enter_cleanup(masm);
1530 }
1531
1532 static void gen_special_dispatch(MacroAssembler* masm,
1533 const methodHandle& method,
1534 const BasicType* sig_bt,
1535 const VMRegPair* regs) {
1536 verify_oop_args(masm, method, sig_bt, regs);
1537 vmIntrinsics::ID iid = method->intrinsic_id();
1538
1539 // Now write the args into the outgoing interpreter space
1540 bool has_receiver = false;
1541 Register receiver_reg = noreg;
1542 int member_arg_pos = -1;
1543 Register member_reg = noreg;
1544 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1545 if (ref_kind != 0) {
1546 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1547 member_reg = r19; // known to be free at this point
1548 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1549 } else if (iid == vmIntrinsics::_invokeBasic) {
1550 has_receiver = true;
1551 } else if (iid == vmIntrinsics::_linkToNative) {
1552 member_arg_pos = method->size_of_parameters() - 1; // trailing NativeEntryPoint argument
1553 member_reg = r19; // known to be free at this point
1554 } else {
1555 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1556 }
1557
1558 if (member_reg != noreg) {
1559 // Load the member_arg into register, if necessary.
1560 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1561 VMReg r = regs[member_arg_pos].first();
1562 if (r->is_stack()) {
1563 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1564 } else {
1565 // no data motion is needed
1566 member_reg = r->as_Register();
1567 }
1568 }
1569
1570 if (has_receiver) {
1571 // Make sure the receiver is loaded into a register.
1572 assert(method->size_of_parameters() > 0, "oob");
1573 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1574 VMReg r = regs[0].first();
1575 assert(r->is_valid(), "bad receiver arg");
1576 if (r->is_stack()) {
1577 // Porting note: This assumes that compiled calling conventions always
1578 // pass the receiver oop in a register. If this is not true on some
1579 // platform, pick a temp and load the receiver from stack.
1580 fatal("receiver always in a register");
1581 receiver_reg = r2; // known to be free at this point
1582 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1583 } else {
1584 // no data motion is needed
1585 receiver_reg = r->as_Register();
1586 }
1587 }
1588
1589 // Figure out which address we are really jumping to:
1590 MethodHandles::generate_method_handle_dispatch(masm, iid,
1591 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1592 }
1593
1594 // ---------------------------------------------------------------------------
1595 // Generate a native wrapper for a given method. The method takes arguments
1596 // in the Java compiled code convention, marshals them to the native
1597 // convention (handlizes oops, etc), transitions to native, makes the call,
1598 // returns to java state (possibly blocking), unhandlizes any result and
1599 // returns.
1600 //
1601 // Critical native functions are a shorthand for the use of
1602 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1603 // functions. The wrapper is expected to unpack the arguments before
1604 // passing them to the callee. Critical native functions leave the state _in_Java,
1605 // since they block out GC.
1606 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1607 // block and the check for pending exceptions it's impossible for them
1608 // to be thrown.
1609 //
1610 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1611 const methodHandle& method,
1612 int compile_id,
1613 BasicType* in_sig_bt,
1614 VMRegPair* in_regs,
1615 BasicType ret_type) {
1616 if (method->is_continuation_native_intrinsic()) {
1617 int exception_offset = -1;
1618 OopMapSet* oop_maps = new OopMapSet();
1619 int frame_complete = -1;
1620 int stack_slots = -1;
1621 int interpreted_entry_offset = -1;
1622 int vep_offset = -1;
1623 if (method->is_continuation_enter_intrinsic()) {
1624 gen_continuation_enter(masm,
1625 method,
1626 in_sig_bt,
1627 in_regs,
1628 exception_offset,
1629 oop_maps,
1630 frame_complete,
1631 stack_slots,
1632 interpreted_entry_offset,
1633 vep_offset);
1634 } else if (method->is_continuation_yield_intrinsic()) {
1635 gen_continuation_yield(masm,
1636 method,
1637 in_sig_bt,
1638 in_regs,
1639 oop_maps,
1640 frame_complete,
1641 stack_slots,
1642 vep_offset);
1643 } else {
1644 guarantee(false, "Unknown Continuation native intrinsic");
1645 }
1646
1647 #ifdef ASSERT
1648 if (method->is_continuation_enter_intrinsic()) {
1649 assert(interpreted_entry_offset != -1, "Must be set");
1650 assert(exception_offset != -1, "Must be set");
1651 } else {
1652 assert(interpreted_entry_offset == -1, "Must be unset");
1653 assert(exception_offset == -1, "Must be unset");
1654 }
1655 assert(frame_complete != -1, "Must be set");
1656 assert(stack_slots != -1, "Must be set");
1657 assert(vep_offset != -1, "Must be set");
1658 #endif
1659
1660 __ flush();
1661 nmethod* nm = nmethod::new_native_nmethod(method,
1662 compile_id,
1663 masm->code(),
1664 vep_offset,
1665 frame_complete,
1666 stack_slots,
1667 in_ByteSize(-1),
1668 in_ByteSize(-1),
1669 oop_maps,
1670 exception_offset);
1671 if (nm == nullptr) return nm;
1672 if (method->is_continuation_enter_intrinsic()) {
1673 ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1674 } else if (method->is_continuation_yield_intrinsic()) {
1675 _cont_doYield_stub = nm;
1676 } else {
1677 guarantee(false, "Unknown Continuation native intrinsic");
1678 }
1679 return nm;
1680 }
1681
1682 if (method->is_method_handle_intrinsic()) {
1683 vmIntrinsics::ID iid = method->intrinsic_id();
1684 intptr_t start = (intptr_t)__ pc();
1685 int vep_offset = ((intptr_t)__ pc()) - start;
1686
1687 // First instruction must be a nop as it may need to be patched on deoptimisation
1688 __ nop();
1689 gen_special_dispatch(masm,
1690 method,
1691 in_sig_bt,
1692 in_regs);
1693 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1694 __ flush();
1695 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1696 return nmethod::new_native_nmethod(method,
1697 compile_id,
1698 masm->code(),
1699 vep_offset,
1700 frame_complete,
1701 stack_slots / VMRegImpl::slots_per_word,
1702 in_ByteSize(-1),
1703 in_ByteSize(-1),
1704 nullptr);
1705 }
1706 address native_func = method->native_function();
1707 assert(native_func != nullptr, "must have function");
1708
1709 // An OopMap for lock (and class if static)
1710 OopMapSet *oop_maps = new OopMapSet();
1711 intptr_t start = (intptr_t)__ pc();
1712
1713 // We have received a description of where all the java arg are located
1714 // on entry to the wrapper. We need to convert these args to where
1715 // the jni function will expect them. To figure out where they go
1716 // we convert the java signature to a C signature by inserting
1717 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1718
1719 const int total_in_args = method->size_of_parameters();
1720 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1721
1722 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1723 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1724
1725 int argc = 0;
1726 out_sig_bt[argc++] = T_ADDRESS;
1727 if (method->is_static()) {
1728 out_sig_bt[argc++] = T_OBJECT;
1729 }
1730
1731 for (int i = 0; i < total_in_args ; i++ ) {
1732 out_sig_bt[argc++] = in_sig_bt[i];
1733 }
1734
1735 // Now figure out where the args must be stored and how much stack space
1736 // they require.
1737 int out_arg_slots;
1738 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args);
1739
1740 if (out_arg_slots < 0) {
1741 return nullptr;
1742 }
1743
1744 // Compute framesize for the wrapper. We need to handlize all oops in
1745 // incoming registers
1746
1747 // Calculate the total number of stack slots we will need.
1748
1749 // First count the abi requirement plus all of the outgoing args
1750 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1751
1752 // Now the space for the inbound oop handle area
1753 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers
1754
1755 int oop_handle_offset = stack_slots;
1756 stack_slots += total_save_slots;
1757
1758 // Now any space we need for handlizing a klass if static method
1759
1760 int klass_slot_offset = 0;
1761 int klass_offset = -1;
1762 int lock_slot_offset = 0;
1763 bool is_static = false;
1764
1765 if (method->is_static()) {
1766 klass_slot_offset = stack_slots;
1767 stack_slots += VMRegImpl::slots_per_word;
1768 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1769 is_static = true;
1770 }
1771
1772 // Plus a lock if needed
1773
1774 if (method->is_synchronized()) {
1775 lock_slot_offset = stack_slots;
1776 stack_slots += VMRegImpl::slots_per_word;
1777 }
1778
1779 // Now a place (+2) to save return values or temp during shuffling
1780 // + 4 for return address (which we own) and saved rfp
1781 stack_slots += 6;
1782
1783 // Ok The space we have allocated will look like:
1784 //
1785 //
1786 // FP-> | |
1787 // |---------------------|
1788 // | 2 slots for moves |
1789 // |---------------------|
1790 // | lock box (if sync) |
1791 // |---------------------| <- lock_slot_offset
1792 // | klass (if static) |
1793 // |---------------------| <- klass_slot_offset
1794 // | oopHandle area |
1795 // |---------------------| <- oop_handle_offset (8 java arg registers)
1796 // | outbound memory |
1797 // | based arguments |
1798 // | |
1799 // |---------------------|
1800 // | |
1801 // SP-> | out_preserved_slots |
1802 //
1803 //
1804
1805
1806 // Now compute actual number of stack words we need rounding to make
1807 // stack properly aligned.
1808 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1809
1810 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1811
1812 // First thing make an ic check to see if we should even be here
1813
1814 // We are free to use all registers as temps without saving them and
1815 // restoring them except rfp. rfp is the only callee save register
1816 // as far as the interpreter and the compiler(s) are concerned.
1817
1818 const Register receiver = j_rarg0;
1819
1820 Label exception_pending;
1821
1822 assert_different_registers(receiver, rscratch1);
1823 __ verify_oop(receiver);
1824 __ ic_check(8 /* end_alignment */);
1825
1826 // Verified entry point must be aligned
1827 int vep_offset = ((intptr_t)__ pc()) - start;
1828
1829 // If we have to make this method not-entrant we'll overwrite its
1830 // first instruction with a jump. For this action to be legal we
1831 // must ensure that this first instruction is a B, BL, NOP, BKPT,
1832 // SVC, HVC, or SMC. Make it a NOP.
1833 __ nop();
1834
1835 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1836 Label L_skip_barrier;
1837 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1838 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1839 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1840
1841 __ bind(L_skip_barrier);
1842 }
1843
1844 // Generate stack overflow check
1845 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1846
1847 // Generate a new frame for the wrapper.
1848 __ enter();
1849 // -2 because return address is already present and so is saved rfp
1850 __ sub(sp, sp, stack_size - 2*wordSize);
1851
1852 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1853 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
1854
1855 // Frame is now completed as far as size and linkage.
1856 int frame_complete = ((intptr_t)__ pc()) - start;
1857
1858 // We use r20 as the oop handle for the receiver/klass
1859 // It is callee save so it survives the call to native
1860
1861 const Register oop_handle_reg = r20;
1862
1863 //
1864 // We immediately shuffle the arguments so that any vm call we have to
1865 // make from here on out (sync slow path, jvmti, etc.) we will have
1866 // captured the oops from our caller and have a valid oopMap for
1867 // them.
1868
1869 // -----------------
1870 // The Grand Shuffle
1871
1872 // The Java calling convention is either equal (linux) or denser (win64) than the
1873 // c calling convention. However the because of the jni_env argument the c calling
1874 // convention always has at least one more (and two for static) arguments than Java.
1875 // Therefore if we move the args from java -> c backwards then we will never have
1876 // a register->register conflict and we don't have to build a dependency graph
1877 // and figure out how to break any cycles.
1878 //
1879
1880 // Record esp-based slot for receiver on stack for non-static methods
1881 int receiver_offset = -1;
1882
1883 // This is a trick. We double the stack slots so we can claim
1884 // the oops in the caller's frame. Since we are sure to have
1885 // more args than the caller doubling is enough to make
1886 // sure we can capture all the incoming oop args from the
1887 // caller.
1888 //
1889 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1890
1891 // Mark location of rfp (someday)
1892 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1893
1894
1895 int float_args = 0;
1896 int int_args = 0;
1897
1898 #ifdef ASSERT
1899 bool reg_destroyed[Register::number_of_registers];
1900 bool freg_destroyed[FloatRegister::number_of_registers];
1901 for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1902 reg_destroyed[r] = false;
1903 }
1904 for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1905 freg_destroyed[f] = false;
1906 }
1907
1908 #endif /* ASSERT */
1909
1910 // For JNI natives the incoming and outgoing registers are offset upwards.
1911 GrowableArray<int> arg_order(2 * total_in_args);
1912
1913 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1914 arg_order.push(i);
1915 arg_order.push(c_arg);
1916 }
1917
1918 for (int ai = 0; ai < arg_order.length(); ai += 2) {
1919 int i = arg_order.at(ai);
1920 int c_arg = arg_order.at(ai + 1);
1921 __ block_comment(err_msg("move %d -> %d", i, c_arg));
1922 assert(c_arg != -1 && i != -1, "wrong order");
1923 #ifdef ASSERT
1924 if (in_regs[i].first()->is_Register()) {
1925 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1926 } else if (in_regs[i].first()->is_FloatRegister()) {
1927 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1928 }
1929 if (out_regs[c_arg].first()->is_Register()) {
1930 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1931 } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1932 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1933 }
1934 #endif /* ASSERT */
1935 switch (in_sig_bt[i]) {
1936 case T_ARRAY:
1937 case T_OBJECT:
1938 __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1939 ((i == 0) && (!is_static)),
1940 &receiver_offset);
1941 int_args++;
1942 break;
1943 case T_VOID:
1944 break;
1945
1946 case T_FLOAT:
1947 __ float_move(in_regs[i], out_regs[c_arg]);
1948 float_args++;
1949 break;
1950
1951 case T_DOUBLE:
1952 assert( i + 1 < total_in_args &&
1953 in_sig_bt[i + 1] == T_VOID &&
1954 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1955 __ double_move(in_regs[i], out_regs[c_arg]);
1956 float_args++;
1957 break;
1958
1959 case T_LONG :
1960 __ long_move(in_regs[i], out_regs[c_arg]);
1961 int_args++;
1962 break;
1963
1964 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1965
1966 default:
1967 __ move32_64(in_regs[i], out_regs[c_arg]);
1968 int_args++;
1969 }
1970 }
1971
1972 // point c_arg at the first arg that is already loaded in case we
1973 // need to spill before we call out
1974 int c_arg = total_c_args - total_in_args;
1975
1976 // Pre-load a static method's oop into c_rarg1.
1977 if (method->is_static()) {
1978
1979 // load oop into a register
1980 __ movoop(c_rarg1,
1981 JNIHandles::make_local(method->method_holder()->java_mirror()));
1982
1983 // Now handlize the static class mirror it's known not-null.
1984 __ str(c_rarg1, Address(sp, klass_offset));
1985 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1986
1987 // Now get the handle
1988 __ lea(c_rarg1, Address(sp, klass_offset));
1989 // and protect the arg if we must spill
1990 c_arg--;
1991 }
1992
1993 // Change state to native (we save the return address in the thread, since it might not
1994 // be pushed on the stack when we do a stack traversal). It is enough that the pc()
1995 // points into the right code segment. It does not have to be the correct return pc.
1996 // We use the same pc/oopMap repeatedly when we call out.
1997
1998 Label native_return;
1999 if (LockingMode != LM_LEGACY && method->is_object_wait0()) {
2000 // For convenience we use the pc we want to resume to in case of preemption on Object.wait.
2001 __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
2002 } else {
2003 intptr_t the_pc = (intptr_t) __ pc();
2004 oop_maps->add_gc_map(the_pc - start, map);
2005
2006 __ set_last_Java_frame(sp, noreg, __ pc(), rscratch1);
2007 }
2008
2009 Label dtrace_method_entry, dtrace_method_entry_done;
2010 if (DTraceMethodProbes) {
2011 __ b(dtrace_method_entry);
2012 __ bind(dtrace_method_entry_done);
2013 }
2014
2015 // RedefineClasses() tracing support for obsolete method entry
2016 if (log_is_enabled(Trace, redefine, class, obsolete)) {
2017 // protect the args we've loaded
2018 save_args(masm, total_c_args, c_arg, out_regs);
2019 __ mov_metadata(c_rarg1, method());
2020 __ call_VM_leaf(
2021 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2022 rthread, c_rarg1);
2023 restore_args(masm, total_c_args, c_arg, out_regs);
2024 }
2025
2026 // Lock a synchronized method
2027
2028 // Register definitions used by locking and unlocking
2029
2030 const Register swap_reg = r0;
2031 const Register obj_reg = r19; // Will contain the oop
2032 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
2033 const Register old_hdr = r13; // value of old header at unlock time
2034 const Register lock_tmp = r14; // Temporary used by lightweight_lock/unlock
2035 const Register tmp = lr;
2036
2037 Label slow_path_lock;
2038 Label lock_done;
2039
2040 if (method->is_synchronized()) {
2041 Label count;
2042 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2043
2044 // Get the handle (the 2nd argument)
2045 __ mov(oop_handle_reg, c_rarg1);
2046
2047 // Get address of the box
2048
2049 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2050
2051 // Load the oop from the handle
2052 __ ldr(obj_reg, Address(oop_handle_reg, 0));
2053
2054 if (LockingMode == LM_MONITOR) {
2055 __ b(slow_path_lock);
2056 } else if (LockingMode == LM_LEGACY) {
2057 // Load (object->mark() | 1) into swap_reg %r0
2058 __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2059 __ orr(swap_reg, rscratch1, 1);
2060 if (EnableValhalla) {
2061 // Mask inline_type bit such that we go to the slow path if object is an inline type
2062 __ andr(swap_reg, swap_reg, ~((int) markWord::inline_type_bit_in_place));
2063 }
2064
2065 // Save (object->mark() | 1) into BasicLock's displaced header
2066 __ str(swap_reg, Address(lock_reg, mark_word_offset));
2067
2068 // src -> dest iff dest == r0 else r0 <- dest
2069 __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, count, /*fallthrough*/nullptr);
2070
2071 // Hmm should this move to the slow path code area???
2072
2073 // Test if the oopMark is an obvious stack pointer, i.e.,
2074 // 1) (mark & 3) == 0, and
2075 // 2) sp <= mark < mark + os::pagesize()
2076 // These 3 tests can be done by evaluating the following
2077 // expression: ((mark - sp) & (3 - os::vm_page_size())),
2078 // assuming both stack pointer and pagesize have their
2079 // least significant 2 bits clear.
2080 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg
2081
2082 __ sub(swap_reg, sp, swap_reg);
2083 __ neg(swap_reg, swap_reg);
2084 __ ands(swap_reg, swap_reg, 3 - (int)os::vm_page_size());
2085
2086 // Save the test result, for recursive case, the result is zero
2087 __ str(swap_reg, Address(lock_reg, mark_word_offset));
2088 __ br(Assembler::NE, slow_path_lock);
2089
2090 __ bind(count);
2091 __ inc_held_monitor_count(rscratch1);
2092 } else {
2093 assert(LockingMode == LM_LIGHTWEIGHT, "must be");
2094 __ lightweight_lock(lock_reg, obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
2095 }
2096
2097 // Slow path will re-enter here
2098 __ bind(lock_done);
2099 }
2100
2101
2102 // Finally just about ready to make the JNI call
2103
2104 // get JNIEnv* which is first argument to native
2105 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
2106
2107 // Now set thread in native
2108 __ mov(rscratch1, _thread_in_native);
2109 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
2110 __ stlrw(rscratch1, rscratch2);
2111
2112 __ rt_call(native_func);
2113
2114 // Verify or restore cpu control state after JNI call
2115 __ restore_cpu_control_state_after_jni(rscratch1, rscratch2);
2116
2117 // Unpack native results.
2118 switch (ret_type) {
2119 case T_BOOLEAN: __ c2bool(r0); break;
2120 case T_CHAR : __ ubfx(r0, r0, 0, 16); break;
2121 case T_BYTE : __ sbfx(r0, r0, 0, 8); break;
2122 case T_SHORT : __ sbfx(r0, r0, 0, 16); break;
2123 case T_INT : __ sbfx(r0, r0, 0, 32); break;
2124 case T_DOUBLE :
2125 case T_FLOAT :
2126 // Result is in v0 we'll save as needed
2127 break;
2128 case T_ARRAY: // Really a handle
2129 case T_OBJECT: // Really a handle
2130 break; // can't de-handlize until after safepoint check
2131 case T_VOID: break;
2132 case T_LONG: break;
2133 default : ShouldNotReachHere();
2134 }
2135
2136 Label safepoint_in_progress, safepoint_in_progress_done;
2137
2138 // Switch thread to "native transition" state before reading the synchronization state.
2139 // This additional state is necessary because reading and testing the synchronization
2140 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2141 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2142 // VM thread changes sync state to synchronizing and suspends threads for GC.
2143 // Thread A is resumed to finish this native method, but doesn't block here since it
2144 // didn't see any synchronization is progress, and escapes.
2145 __ mov(rscratch1, _thread_in_native_trans);
2146
2147 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
2148
2149 // Force this write out before the read below
2150 if (!UseSystemMemoryBarrier) {
2151 __ dmb(Assembler::ISH);
2152 }
2153
2154 __ verify_sve_vector_length();
2155
2156 // Check for safepoint operation in progress and/or pending suspend requests.
2157 {
2158 // No need for acquire as Java threads always disarm themselves.
2159 __ safepoint_poll(safepoint_in_progress, true /* at_return */, false /* acquire */, false /* in_nmethod */);
2160 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
2161 __ cbnzw(rscratch1, safepoint_in_progress);
2162 __ bind(safepoint_in_progress_done);
2163 }
2164
2165 // change thread state
2166 __ mov(rscratch1, _thread_in_Java);
2167 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
2168 __ stlrw(rscratch1, rscratch2);
2169
2170 if (LockingMode != LM_LEGACY && method->is_object_wait0()) {
2171 // Check preemption for Object.wait()
2172 __ ldr(rscratch1, Address(rthread, JavaThread::preempt_alternate_return_offset()));
2173 __ cbz(rscratch1, native_return);
2174 __ str(zr, Address(rthread, JavaThread::preempt_alternate_return_offset()));
2175 __ br(rscratch1);
2176 __ bind(native_return);
2177
2178 intptr_t the_pc = (intptr_t) __ pc();
2179 oop_maps->add_gc_map(the_pc - start, map);
2180 }
2181
2182 Label reguard;
2183 Label reguard_done;
2184 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
2185 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
2186 __ br(Assembler::EQ, reguard);
2187 __ bind(reguard_done);
2188
2189 // native result if any is live
2190
2191 // Unlock
2192 Label unlock_done;
2193 Label slow_path_unlock;
2194 if (method->is_synchronized()) {
2195
2196 // Get locked oop from the handle we passed to jni
2197 __ ldr(obj_reg, Address(oop_handle_reg, 0));
2198
2199 Label done, not_recursive;
2200
2201 if (LockingMode == LM_LEGACY) {
2202 // Simple recursive lock?
2203 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2204 __ cbnz(rscratch1, not_recursive);
2205 __ dec_held_monitor_count(rscratch1);
2206 __ b(done);
2207 }
2208
2209 __ bind(not_recursive);
2210
2211 // Must save r0 if if it is live now because cmpxchg must use it
2212 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2213 save_native_result(masm, ret_type, stack_slots);
2214 }
2215
2216 if (LockingMode == LM_MONITOR) {
2217 __ b(slow_path_unlock);
2218 } else if (LockingMode == LM_LEGACY) {
2219 // get address of the stack lock
2220 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2221 // get old displaced header
2222 __ ldr(old_hdr, Address(r0, 0));
2223
2224 // Atomic swap old header if oop still contains the stack lock
2225 Label count;
2226 __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, count, &slow_path_unlock);
2227 __ bind(count);
2228 __ dec_held_monitor_count(rscratch1);
2229 } else {
2230 assert(LockingMode == LM_LIGHTWEIGHT, "");
2231 __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
2232 }
2233
2234 // slow path re-enters here
2235 __ bind(unlock_done);
2236 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2237 restore_native_result(masm, ret_type, stack_slots);
2238 }
2239
2240 __ bind(done);
2241 }
2242
2243 Label dtrace_method_exit, dtrace_method_exit_done;
2244 if (DTraceMethodProbes) {
2245 __ b(dtrace_method_exit);
2246 __ bind(dtrace_method_exit_done);
2247 }
2248
2249 __ reset_last_Java_frame(false);
2250
2251 // Unbox oop result, e.g. JNIHandles::resolve result.
2252 if (is_reference_type(ret_type)) {
2253 __ resolve_jobject(r0, r1, r2);
2254 }
2255
2256 if (CheckJNICalls) {
2257 // clear_pending_jni_exception_check
2258 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
2259 }
2260
2261 // reset handle block
2262 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
2263 __ str(zr, Address(r2, JNIHandleBlock::top_offset()));
2264
2265 __ leave();
2266
2267 #if INCLUDE_JFR
2268 // We need to do a poll test after unwind in case the sampler
2269 // managed to sample the native frame after returning to Java.
2270 Label L_return;
2271 __ ldr(rscratch1, Address(rthread, JavaThread::polling_word_offset()));
2272 address poll_test_pc = __ pc();
2273 __ relocate(relocInfo::poll_return_type);
2274 __ tbz(rscratch1, log2i_exact(SafepointMechanism::poll_bit()), L_return);
2275 assert(SharedRuntime::polling_page_return_handler_blob() != nullptr,
2276 "polling page return stub not created yet");
2277 address stub = SharedRuntime::polling_page_return_handler_blob()->entry_point();
2278 __ adr(rscratch1, InternalAddress(poll_test_pc));
2279 __ str(rscratch1, Address(rthread, JavaThread::saved_exception_pc_offset()));
2280 __ far_jump(RuntimeAddress(stub));
2281 __ bind(L_return);
2282 #endif // INCLUDE_JFR
2283
2284 // Any exception pending?
2285 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2286 __ cbnz(rscratch1, exception_pending);
2287
2288 // We're done
2289 __ ret(lr);
2290
2291 // Unexpected paths are out of line and go here
2292
2293 // forward the exception
2294 __ bind(exception_pending);
2295
2296 // and forward the exception
2297 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2298
2299 // Slow path locking & unlocking
2300 if (method->is_synchronized()) {
2301
2302 __ block_comment("Slow path lock {");
2303 __ bind(slow_path_lock);
2304
2305 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2306 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2307
2308 // protect the args we've loaded
2309 save_args(masm, total_c_args, c_arg, out_regs);
2310
2311 __ mov(c_rarg0, obj_reg);
2312 __ mov(c_rarg1, lock_reg);
2313 __ mov(c_rarg2, rthread);
2314
2315 // Not a leaf but we have last_Java_frame setup as we want.
2316 // We don't want to unmount in case of contention since that would complicate preserving
2317 // the arguments that had already been marshalled into the native convention. So we force
2318 // the freeze slow path to find this native wrapper frame (see recurse_freeze_native_frame())
2319 // and pin the vthread. Otherwise the fast path won't find it since we don't walk the stack.
2320 __ push_cont_fastpath();
2321 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2322 __ pop_cont_fastpath();
2323 restore_args(masm, total_c_args, c_arg, out_regs);
2324
2325 #ifdef ASSERT
2326 { Label L;
2327 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2328 __ cbz(rscratch1, L);
2329 __ stop("no pending exception allowed on exit from monitorenter");
2330 __ bind(L);
2331 }
2332 #endif
2333 __ b(lock_done);
2334
2335 __ block_comment("} Slow path lock");
2336
2337 __ block_comment("Slow path unlock {");
2338 __ bind(slow_path_unlock);
2339
2340 // If we haven't already saved the native result we must save it now as xmm registers
2341 // are still exposed.
2342
2343 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2344 save_native_result(masm, ret_type, stack_slots);
2345 }
2346
2347 __ mov(c_rarg2, rthread);
2348 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2349 __ mov(c_rarg0, obj_reg);
2350
2351 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2352 // NOTE that obj_reg == r19 currently
2353 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2354 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2355
2356 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2357
2358 #ifdef ASSERT
2359 {
2360 Label L;
2361 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2362 __ cbz(rscratch1, L);
2363 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2364 __ bind(L);
2365 }
2366 #endif /* ASSERT */
2367
2368 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2369
2370 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2371 restore_native_result(masm, ret_type, stack_slots);
2372 }
2373 __ b(unlock_done);
2374
2375 __ block_comment("} Slow path unlock");
2376
2377 } // synchronized
2378
2379 // SLOW PATH Reguard the stack if needed
2380
2381 __ bind(reguard);
2382 save_native_result(masm, ret_type, stack_slots);
2383 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2384 restore_native_result(masm, ret_type, stack_slots);
2385 // and continue
2386 __ b(reguard_done);
2387
2388 // SLOW PATH safepoint
2389 {
2390 __ block_comment("safepoint {");
2391 __ bind(safepoint_in_progress);
2392
2393 // Don't use call_VM as it will see a possible pending exception and forward it
2394 // and never return here preventing us from clearing _last_native_pc down below.
2395 //
2396 save_native_result(masm, ret_type, stack_slots);
2397 __ mov(c_rarg0, rthread);
2398 #ifndef PRODUCT
2399 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2400 #endif
2401 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2402 __ blr(rscratch1);
2403
2404 // Restore any method result value
2405 restore_native_result(masm, ret_type, stack_slots);
2406
2407 __ b(safepoint_in_progress_done);
2408 __ block_comment("} safepoint");
2409 }
2410
2411 // SLOW PATH dtrace support
2412 if (DTraceMethodProbes) {
2413 {
2414 __ block_comment("dtrace entry {");
2415 __ bind(dtrace_method_entry);
2416
2417 // We have all of the arguments setup at this point. We must not touch any register
2418 // argument registers at this point (what if we save/restore them there are no oop?
2419
2420 save_args(masm, total_c_args, c_arg, out_regs);
2421 __ mov_metadata(c_rarg1, method());
2422 __ call_VM_leaf(
2423 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2424 rthread, c_rarg1);
2425 restore_args(masm, total_c_args, c_arg, out_regs);
2426 __ b(dtrace_method_entry_done);
2427 __ block_comment("} dtrace entry");
2428 }
2429
2430 {
2431 __ block_comment("dtrace exit {");
2432 __ bind(dtrace_method_exit);
2433 save_native_result(masm, ret_type, stack_slots);
2434 __ mov_metadata(c_rarg1, method());
2435 __ call_VM_leaf(
2436 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2437 rthread, c_rarg1);
2438 restore_native_result(masm, ret_type, stack_slots);
2439 __ b(dtrace_method_exit_done);
2440 __ block_comment("} dtrace exit");
2441 }
2442 }
2443
2444 __ flush();
2445
2446 nmethod *nm = nmethod::new_native_nmethod(method,
2447 compile_id,
2448 masm->code(),
2449 vep_offset,
2450 frame_complete,
2451 stack_slots / VMRegImpl::slots_per_word,
2452 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2453 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2454 oop_maps);
2455
2456 return nm;
2457 }
2458
2459 // this function returns the adjust size (in number of words) to a c2i adapter
2460 // activation for use during deoptimization
2461 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2462 assert(callee_locals >= callee_parameters,
2463 "test and remove; got more parms than locals");
2464 if (callee_locals < callee_parameters)
2465 return 0; // No adjustment for negative locals
2466 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2467 // diff is counted in stack words
2468 return align_up(diff, 2);
2469 }
2470
2471
2472 //------------------------------generate_deopt_blob----------------------------
2473 void SharedRuntime::generate_deopt_blob() {
2474 // Allocate space for the code
2475 ResourceMark rm;
2476 // Setup code generation tools
2477 int pad = 0;
2478 #if INCLUDE_JVMCI
2479 if (EnableJVMCI) {
2480 pad += 512; // Increase the buffer size when compiling for JVMCI
2481 }
2482 #endif
2483 const char* name = SharedRuntime::stub_name(SharedStubId::deopt_id);
2484 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, (uint)SharedStubId::deopt_id, name);
2485 if (blob != nullptr) {
2486 _deopt_blob = blob->as_deoptimization_blob();
2487 return;
2488 }
2489
2490 CodeBuffer buffer(name, 2048+pad, 1024);
2491 MacroAssembler* masm = new MacroAssembler(&buffer);
2492 int frame_size_in_words;
2493 OopMap* map = nullptr;
2494 OopMapSet *oop_maps = new OopMapSet();
2495 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2496
2497 // -------------
2498 // This code enters when returning to a de-optimized nmethod. A return
2499 // address has been pushed on the stack, and return values are in
2500 // registers.
2501 // If we are doing a normal deopt then we were called from the patched
2502 // nmethod from the point we returned to the nmethod. So the return
2503 // address on the stack is wrong by NativeCall::instruction_size
2504 // We will adjust the value so it looks like we have the original return
2505 // address on the stack (like when we eagerly deoptimized).
2506 // In the case of an exception pending when deoptimizing, we enter
2507 // with a return address on the stack that points after the call we patched
2508 // into the exception handler. We have the following register state from,
2509 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2510 // r0: exception oop
2511 // r19: exception handler
2512 // r3: throwing pc
2513 // So in this case we simply jam r3 into the useless return address and
2514 // the stack looks just like we want.
2515 //
2516 // At this point we need to de-opt. We save the argument return
2517 // registers. We call the first C routine, fetch_unroll_info(). This
2518 // routine captures the return values and returns a structure which
2519 // describes the current frame size and the sizes of all replacement frames.
2520 // The current frame is compiled code and may contain many inlined
2521 // functions, each with their own JVM state. We pop the current frame, then
2522 // push all the new frames. Then we call the C routine unpack_frames() to
2523 // populate these frames. Finally unpack_frames() returns us the new target
2524 // address. Notice that callee-save registers are BLOWN here; they have
2525 // already been captured in the vframeArray at the time the return PC was
2526 // patched.
2527 address start = __ pc();
2528 Label cont;
2529
2530 // Prolog for non exception case!
2531
2532 // Save everything in sight.
2533 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2534
2535 // Normal deoptimization. Save exec mode for unpack_frames.
2536 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2537 __ b(cont);
2538
2539 int reexecute_offset = __ pc() - start;
2540 #if INCLUDE_JVMCI && !defined(COMPILER1)
2541 if (UseJVMCICompiler) {
2542 // JVMCI does not use this kind of deoptimization
2543 __ should_not_reach_here();
2544 }
2545 #endif
2546
2547 // Reexecute case
2548 // return address is the pc describes what bci to do re-execute at
2549
2550 // No need to update map as each call to save_live_registers will produce identical oopmap
2551 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2552
2553 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2554 __ b(cont);
2555
2556 #if INCLUDE_JVMCI
2557 Label after_fetch_unroll_info_call;
2558 int implicit_exception_uncommon_trap_offset = 0;
2559 int uncommon_trap_offset = 0;
2560
2561 if (EnableJVMCI) {
2562 implicit_exception_uncommon_trap_offset = __ pc() - start;
2563
2564 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2565 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2566
2567 uncommon_trap_offset = __ pc() - start;
2568
2569 // Save everything in sight.
2570 reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2571 // fetch_unroll_info needs to call last_java_frame()
2572 Label retaddr;
2573 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2574
2575 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2576 __ movw(rscratch1, -1);
2577 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2578
2579 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2580 __ mov(c_rarg0, rthread);
2581 __ movw(c_rarg2, rcpool); // exec mode
2582 __ lea(rscratch1,
2583 RuntimeAddress(CAST_FROM_FN_PTR(address,
2584 Deoptimization::uncommon_trap)));
2585 __ blr(rscratch1);
2586 __ bind(retaddr);
2587 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2588
2589 __ reset_last_Java_frame(false);
2590
2591 __ b(after_fetch_unroll_info_call);
2592 } // EnableJVMCI
2593 #endif // INCLUDE_JVMCI
2594
2595 int exception_offset = __ pc() - start;
2596
2597 // Prolog for exception case
2598
2599 // all registers are dead at this entry point, except for r0, and
2600 // r3 which contain the exception oop and exception pc
2601 // respectively. Set them in TLS and fall thru to the
2602 // unpack_with_exception_in_tls entry point.
2603
2604 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2605 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2606
2607 int exception_in_tls_offset = __ pc() - start;
2608
2609 // new implementation because exception oop is now passed in JavaThread
2610
2611 // Prolog for exception case
2612 // All registers must be preserved because they might be used by LinearScan
2613 // Exceptiop oop and throwing PC are passed in JavaThread
2614 // tos: stack at point of call to method that threw the exception (i.e. only
2615 // args are on the stack, no return address)
2616
2617 // The return address pushed by save_live_registers will be patched
2618 // later with the throwing pc. The correct value is not available
2619 // now because loading it from memory would destroy registers.
2620
2621 // NB: The SP at this point must be the SP of the method that is
2622 // being deoptimized. Deoptimization assumes that the frame created
2623 // here by save_live_registers is immediately below the method's SP.
2624 // This is a somewhat fragile mechanism.
2625
2626 // Save everything in sight.
2627 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2628
2629 // Now it is safe to overwrite any register
2630
2631 // Deopt during an exception. Save exec mode for unpack_frames.
2632 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2633
2634 // load throwing pc from JavaThread and patch it as the return address
2635 // of the current frame. Then clear the field in JavaThread
2636 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2637 __ protect_return_address(r3);
2638 __ str(r3, Address(rfp, wordSize));
2639 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2640
2641 #ifdef ASSERT
2642 // verify that there is really an exception oop in JavaThread
2643 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2644 __ verify_oop(r0);
2645
2646 // verify that there is no pending exception
2647 Label no_pending_exception;
2648 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2649 __ cbz(rscratch1, no_pending_exception);
2650 __ stop("must not have pending exception here");
2651 __ bind(no_pending_exception);
2652 #endif
2653
2654 __ bind(cont);
2655
2656 // Call C code. Need thread and this frame, but NOT official VM entry
2657 // crud. We cannot block on this call, no GC can happen.
2658 //
2659 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2660
2661 // fetch_unroll_info needs to call last_java_frame().
2662
2663 Label retaddr;
2664 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2665 #ifdef ASSERT
2666 { Label L;
2667 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset()));
2668 __ cbz(rscratch1, L);
2669 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2670 __ bind(L);
2671 }
2672 #endif // ASSERT
2673 __ mov(c_rarg0, rthread);
2674 __ mov(c_rarg1, rcpool);
2675 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2676 __ blr(rscratch1);
2677 __ bind(retaddr);
2678
2679 // Need to have an oopmap that tells fetch_unroll_info where to
2680 // find any register it might need.
2681 oop_maps->add_gc_map(__ pc() - start, map);
2682
2683 __ reset_last_Java_frame(false);
2684
2685 #if INCLUDE_JVMCI
2686 if (EnableJVMCI) {
2687 __ bind(after_fetch_unroll_info_call);
2688 }
2689 #endif
2690
2691 // Load UnrollBlock* into r5
2692 __ mov(r5, r0);
2693
2694 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset()));
2695 Label noException;
2696 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending?
2697 __ br(Assembler::NE, noException);
2698 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2699 // QQQ this is useless it was null above
2700 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2701 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2702 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2703
2704 __ verify_oop(r0);
2705
2706 // Overwrite the result registers with the exception results.
2707 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2708 // I think this is useless
2709 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2710
2711 __ bind(noException);
2712
2713 // Only register save data is on the stack.
2714 // Now restore the result registers. Everything else is either dead
2715 // or captured in the vframeArray.
2716
2717 // Restore fp result register
2718 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2719 // Restore integer result register
2720 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2721
2722 // Pop all of the register save area off the stack
2723 __ add(sp, sp, frame_size_in_words * wordSize);
2724
2725 // All of the register save area has been popped of the stack. Only the
2726 // return address remains.
2727
2728 // Pop all the frames we must move/replace.
2729 //
2730 // Frame picture (youngest to oldest)
2731 // 1: self-frame (no frame link)
2732 // 2: deopting frame (no frame link)
2733 // 3: caller of deopting frame (could be compiled/interpreted).
2734 //
2735 // Note: by leaving the return address of self-frame on the stack
2736 // and using the size of frame 2 to adjust the stack
2737 // when we are done the return to frame 3 will still be on the stack.
2738
2739 // Pop deoptimized frame
2740 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2741 __ sub(r2, r2, 2 * wordSize);
2742 __ add(sp, sp, r2);
2743 __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2744
2745 #ifdef ASSERT
2746 // Compilers generate code that bang the stack by as much as the
2747 // interpreter would need. So this stack banging should never
2748 // trigger a fault. Verify that it does not on non product builds.
2749 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2750 __ bang_stack_size(r19, r2);
2751 #endif
2752 // Load address of array of frame pcs into r2
2753 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset()));
2754
2755 // Trash the old pc
2756 // __ addptr(sp, wordSize); FIXME ????
2757
2758 // Load address of array of frame sizes into r4
2759 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset()));
2760
2761 // Load counter into r3
2762 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset()));
2763
2764 // Now adjust the caller's stack to make up for the extra locals
2765 // but record the original sp so that we can save it in the skeletal interpreter
2766 // frame and the stack walking of interpreter_sender will get the unextended sp
2767 // value and not the "real" sp value.
2768
2769 const Register sender_sp = r6;
2770
2771 __ mov(sender_sp, sp);
2772 __ ldrw(r19, Address(r5,
2773 Deoptimization::UnrollBlock::
2774 caller_adjustment_offset()));
2775 __ sub(sp, sp, r19);
2776
2777 // Push interpreter frames in a loop
2778 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern
2779 __ mov(rscratch2, rscratch1);
2780 Label loop;
2781 __ bind(loop);
2782 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size
2783 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand
2784 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc
2785 __ enter(); // Save old & set new fp
2786 __ sub(sp, sp, r19); // Prolog
2787 // This value is corrected by layout_activation_impl
2788 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2789 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2790 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2791 __ sub(r3, r3, 1); // Decrement counter
2792 __ cbnz(r3, loop);
2793
2794 // Re-push self-frame
2795 __ ldr(lr, Address(r2));
2796 __ enter();
2797
2798 // Allocate a full sized register save area. We subtract 2 because
2799 // enter() just pushed 2 words
2800 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2801
2802 // Restore frame locals after moving the frame
2803 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2804 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2805
2806 // Call C code. Need thread but NOT official VM entry
2807 // crud. We cannot block on this call, no GC can happen. Call should
2808 // restore return values to their stack-slots with the new SP.
2809 //
2810 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2811
2812 // Use rfp because the frames look interpreted now
2813 // Don't need the precise return PC here, just precise enough to point into this code blob.
2814 address the_pc = __ pc();
2815 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2816
2817 __ mov(c_rarg0, rthread);
2818 __ movw(c_rarg1, rcpool); // second arg: exec_mode
2819 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2820 __ blr(rscratch1);
2821
2822 // Set an oopmap for the call site
2823 // Use the same PC we used for the last java frame
2824 oop_maps->add_gc_map(the_pc - start,
2825 new OopMap( frame_size_in_words, 0 ));
2826
2827 // Clear fp AND pc
2828 __ reset_last_Java_frame(true);
2829
2830 // Collect return values
2831 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2832 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2833 // I think this is useless (throwing pc?)
2834 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2835
2836 // Pop self-frame.
2837 __ leave(); // Epilog
2838
2839 // Jump to interpreter
2840 __ ret(lr);
2841
2842 // Make sure all code is generated
2843 masm->flush();
2844
2845 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2846 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2847 #if INCLUDE_JVMCI
2848 if (EnableJVMCI) {
2849 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2850 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2851 }
2852 #endif
2853
2854 AOTCodeCache::store_code_blob(*_deopt_blob, AOTCodeEntry::SharedBlob, (uint)SharedStubId::deopt_id, name);
2855 }
2856
2857 // Number of stack slots between incoming argument block and the start of
2858 // a new frame. The PROLOG must add this many slots to the stack. The
2859 // EPILOG must remove this many slots. aarch64 needs two slots for
2860 // return address and fp.
2861 // TODO think this is correct but check
2862 uint SharedRuntime::in_preserve_stack_slots() {
2863 return 4;
2864 }
2865
2866 uint SharedRuntime::out_preserve_stack_slots() {
2867 return 0;
2868 }
2869
2870
2871 VMReg SharedRuntime::thread_register() {
2872 return rthread->as_VMReg();
2873 }
2874
2875 //------------------------------generate_handler_blob------
2876 //
2877 // Generate a special Compile2Runtime blob that saves all registers,
2878 // and setup oopmap.
2879 //
2880 SafepointBlob* SharedRuntime::generate_handler_blob(SharedStubId id, address call_ptr) {
2881 assert(is_polling_page_id(id), "expected a polling page stub id");
2882
2883 // Allocate space for the code. Setup code generation tools.
2884 const char* name = SharedRuntime::stub_name(id);
2885 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, (uint)id, name);
2886 if (blob != nullptr) {
2887 return blob->as_safepoint_blob();
2888 }
2889
2890 ResourceMark rm;
2891 OopMapSet *oop_maps = new OopMapSet();
2892 OopMap* map;
2893 CodeBuffer buffer(name, 2048, 1024);
2894 MacroAssembler* masm = new MacroAssembler(&buffer);
2895
2896 address start = __ pc();
2897 address call_pc = nullptr;
2898 int frame_size_in_words;
2899 bool cause_return = (id == SharedStubId::polling_page_return_handler_id);
2900 RegisterSaver reg_save(id == SharedStubId::polling_page_vectors_safepoint_handler_id /* save_vectors */);
2901
2902 // When the signal occurred, the LR was either signed and stored on the stack (in which
2903 // case it will be restored from the stack before being used) or unsigned and not stored
2904 // on the stack. Stipping ensures we get the right value.
2905 __ strip_return_address();
2906
2907 // Save Integer and Float registers.
2908 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2909
2910 // The following is basically a call_VM. However, we need the precise
2911 // address of the call in order to generate an oopmap. Hence, we do all the
2912 // work ourselves.
2913
2914 Label retaddr;
2915 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2916
2917 // The return address must always be correct so that frame constructor never
2918 // sees an invalid pc.
2919
2920 if (!cause_return) {
2921 // overwrite the return address pushed by save_live_registers
2922 // Additionally, r20 is a callee-saved register so we can look at
2923 // it later to determine if someone changed the return address for
2924 // us!
2925 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2926 __ protect_return_address(r20);
2927 __ str(r20, Address(rfp, wordSize));
2928 }
2929
2930 // Do the call
2931 __ mov(c_rarg0, rthread);
2932 __ lea(rscratch1, RuntimeAddress(call_ptr));
2933 __ blr(rscratch1);
2934 __ bind(retaddr);
2935
2936 // Set an oopmap for the call site. This oopmap will map all
2937 // oop-registers and debug-info registers as callee-saved. This
2938 // will allow deoptimization at this safepoint to find all possible
2939 // debug-info recordings, as well as let GC find all oops.
2940
2941 oop_maps->add_gc_map( __ pc() - start, map);
2942
2943 Label noException;
2944
2945 __ reset_last_Java_frame(false);
2946
2947 __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2948
2949 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2950 __ cbz(rscratch1, noException);
2951
2952 // Exception pending
2953
2954 reg_save.restore_live_registers(masm);
2955
2956 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2957
2958 // No exception case
2959 __ bind(noException);
2960
2961 Label no_adjust, bail;
2962 if (!cause_return) {
2963 // If our stashed return pc was modified by the runtime we avoid touching it
2964 __ ldr(rscratch1, Address(rfp, wordSize));
2965 __ cmp(r20, rscratch1);
2966 __ br(Assembler::NE, no_adjust);
2967 __ authenticate_return_address(r20);
2968
2969 #ifdef ASSERT
2970 // Verify the correct encoding of the poll we're about to skip.
2971 // See NativeInstruction::is_ldrw_to_zr()
2972 __ ldrw(rscratch1, Address(r20));
2973 __ ubfx(rscratch2, rscratch1, 22, 10);
2974 __ cmpw(rscratch2, 0b1011100101);
2975 __ br(Assembler::NE, bail);
2976 __ ubfx(rscratch2, rscratch1, 0, 5);
2977 __ cmpw(rscratch2, 0b11111);
2978 __ br(Assembler::NE, bail);
2979 #endif
2980 // Adjust return pc forward to step over the safepoint poll instruction
2981 __ add(r20, r20, NativeInstruction::instruction_size);
2982 __ protect_return_address(r20);
2983 __ str(r20, Address(rfp, wordSize));
2984 }
2985
2986 __ bind(no_adjust);
2987 // Normal exit, restore registers and exit.
2988 reg_save.restore_live_registers(masm);
2989
2990 __ ret(lr);
2991
2992 #ifdef ASSERT
2993 __ bind(bail);
2994 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2995 #endif
2996
2997 // Make sure all code is generated
2998 masm->flush();
2999
3000 // Fill-out other meta info
3001 SafepointBlob* sp_blob = SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3002
3003 AOTCodeCache::store_code_blob(*sp_blob, AOTCodeEntry::SharedBlob, (uint)id, name);
3004 return sp_blob;
3005 }
3006
3007 //
3008 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3009 //
3010 // Generate a stub that calls into vm to find out the proper destination
3011 // of a java call. All the argument registers are live at this point
3012 // but since this is generic code we don't know what they are and the caller
3013 // must do any gc of the args.
3014 //
3015 RuntimeStub* SharedRuntime::generate_resolve_blob(SharedStubId id, address destination) {
3016 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
3017 assert(is_resolve_id(id), "expected a resolve stub id");
3018
3019 const char* name = SharedRuntime::stub_name(id);
3020 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, (uint)id, name);
3021 if (blob != nullptr) {
3022 return blob->as_runtime_stub();
3023 }
3024
3025 // allocate space for the code
3026 ResourceMark rm;
3027 CodeBuffer buffer(name, 1000, 512);
3028 MacroAssembler* masm = new MacroAssembler(&buffer);
3029
3030 int frame_size_in_words;
3031 RegisterSaver reg_save(false /* save_vectors */);
3032
3033 OopMapSet *oop_maps = new OopMapSet();
3034 OopMap* map = nullptr;
3035
3036 int start = __ offset();
3037
3038 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
3039
3040 int frame_complete = __ offset();
3041
3042 {
3043 Label retaddr;
3044 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
3045
3046 __ mov(c_rarg0, rthread);
3047 __ lea(rscratch1, RuntimeAddress(destination));
3048
3049 __ blr(rscratch1);
3050 __ bind(retaddr);
3051 }
3052
3053 // Set an oopmap for the call site.
3054 // We need this not only for callee-saved registers, but also for volatile
3055 // registers that the compiler might be keeping live across a safepoint.
3056
3057 oop_maps->add_gc_map( __ offset() - start, map);
3058
3059 // r0 contains the address we are going to jump to assuming no exception got installed
3060
3061 // clear last_Java_sp
3062 __ reset_last_Java_frame(false);
3063 // check for pending exceptions
3064 Label pending;
3065 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
3066 __ cbnz(rscratch1, pending);
3067
3068 // get the returned Method*
3069 __ get_vm_result_metadata(rmethod, rthread);
3070 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
3071
3072 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
3073 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
3074 reg_save.restore_live_registers(masm);
3075
3076 // We are back to the original state on entry and ready to go.
3077
3078 __ br(rscratch1);
3079
3080 // Pending exception after the safepoint
3081
3082 __ bind(pending);
3083
3084 reg_save.restore_live_registers(masm);
3085
3086 // exception pending => remove activation and forward to exception handler
3087
3088 __ str(zr, Address(rthread, JavaThread::vm_result_oop_offset()));
3089
3090 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
3091 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3092
3093 // -------------
3094 // make sure all code is generated
3095 masm->flush();
3096
3097 // return the blob
3098 // frame_size_words or bytes??
3099 RuntimeStub* rs_blob = RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3100
3101 AOTCodeCache::store_code_blob(*rs_blob, AOTCodeEntry::SharedBlob, (uint)id, name);
3102 return rs_blob;
3103 }
3104
3105 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) {
3106 BufferBlob* buf = BufferBlob::create("inline types pack/unpack", 16 * K);
3107 CodeBuffer buffer(buf);
3108 short buffer_locs[20];
3109 buffer.insts()->initialize_shared_locs((relocInfo*)buffer_locs,
3110 sizeof(buffer_locs)/sizeof(relocInfo));
3111
3112 MacroAssembler _masm(&buffer);
3113 MacroAssembler* masm = &_masm;
3114
3115 const Array<SigEntry>* sig_vk = vk->extended_sig();
3116 const Array<VMRegPair>* regs = vk->return_regs();
3117
3118 int pack_fields_jobject_off = __ offset();
3119 // Resolve pre-allocated buffer from JNI handle.
3120 // We cannot do this in generate_call_stub() because it requires GC code to be initialized.
3121 Register Rresult = r14; // See StubGenerator::generate_call_stub().
3122 __ ldr(r0, Address(Rresult));
3123 __ resolve_jobject(r0 /* value */,
3124 rthread /* thread */,
3125 r12 /* tmp */);
3126 __ str(r0, Address(Rresult));
3127
3128 int pack_fields_off = __ offset();
3129
3130 int j = 1;
3131 for (int i = 0; i < sig_vk->length(); i++) {
3132 BasicType bt = sig_vk->at(i)._bt;
3133 if (bt == T_METADATA) {
3134 continue;
3135 }
3136 if (bt == T_VOID) {
3137 if (sig_vk->at(i-1)._bt == T_LONG ||
3138 sig_vk->at(i-1)._bt == T_DOUBLE) {
3139 j++;
3140 }
3141 continue;
3142 }
3143 int off = sig_vk->at(i)._offset;
3144 VMRegPair pair = regs->at(j);
3145 VMReg r_1 = pair.first();
3146 VMReg r_2 = pair.second();
3147 Address to(r0, off);
3148 if (bt == T_FLOAT) {
3149 __ strs(r_1->as_FloatRegister(), to);
3150 } else if (bt == T_DOUBLE) {
3151 __ strd(r_1->as_FloatRegister(), to);
3152 } else {
3153 Register val = r_1->as_Register();
3154 assert_different_registers(to.base(), val, r15, r16, r17);
3155 if (is_reference_type(bt)) {
3156 __ store_heap_oop(to, val, r15, r16, r17, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
3157 } else {
3158 __ store_sized_value(to, r_1->as_Register(), type2aelembytes(bt));
3159 }
3160 }
3161 j++;
3162 }
3163 assert(j == regs->length(), "missed a field?");
3164 if (vk->has_nullable_atomic_layout()) {
3165 // Zero the null marker (setting it to 1 would be better but would require an additional register)
3166 __ strb(zr, Address(r0, vk->null_marker_offset()));
3167 }
3168 __ ret(lr);
3169
3170 int unpack_fields_off = __ offset();
3171
3172 Label skip;
3173 Label not_null;
3174 __ cbnz(r0, not_null);
3175
3176 // Return value is null. Zero oop registers to make the GC happy.
3177 j = 1;
3178 for (int i = 0; i < sig_vk->length(); i++) {
3179 BasicType bt = sig_vk->at(i)._bt;
3180 if (bt == T_METADATA) {
3181 continue;
3182 }
3183 if (bt == T_VOID) {
3184 if (sig_vk->at(i-1)._bt == T_LONG ||
3185 sig_vk->at(i-1)._bt == T_DOUBLE) {
3186 j++;
3187 }
3188 continue;
3189 }
3190 if (bt == T_OBJECT || bt == T_ARRAY) {
3191 VMRegPair pair = regs->at(j);
3192 VMReg r_1 = pair.first();
3193 __ mov(r_1->as_Register(), zr);
3194 }
3195 j++;
3196 }
3197 __ b(skip);
3198 __ bind(not_null);
3199
3200 j = 1;
3201 for (int i = 0; i < sig_vk->length(); i++) {
3202 BasicType bt = sig_vk->at(i)._bt;
3203 if (bt == T_METADATA) {
3204 continue;
3205 }
3206 if (bt == T_VOID) {
3207 if (sig_vk->at(i-1)._bt == T_LONG ||
3208 sig_vk->at(i-1)._bt == T_DOUBLE) {
3209 j++;
3210 }
3211 continue;
3212 }
3213 int off = sig_vk->at(i)._offset;
3214 assert(off > 0, "offset in object should be positive");
3215 VMRegPair pair = regs->at(j);
3216 VMReg r_1 = pair.first();
3217 VMReg r_2 = pair.second();
3218 Address from(r0, off);
3219 if (bt == T_FLOAT) {
3220 __ ldrs(r_1->as_FloatRegister(), from);
3221 } else if (bt == T_DOUBLE) {
3222 __ ldrd(r_1->as_FloatRegister(), from);
3223 } else if (bt == T_OBJECT || bt == T_ARRAY) {
3224 assert_different_registers(r0, r_1->as_Register());
3225 __ load_heap_oop(r_1->as_Register(), from, rscratch1, rscratch2);
3226 } else {
3227 assert(is_java_primitive(bt), "unexpected basic type");
3228 assert_different_registers(r0, r_1->as_Register());
3229
3230 size_t size_in_bytes = type2aelembytes(bt);
3231 __ load_sized_value(r_1->as_Register(), from, size_in_bytes, bt != T_CHAR && bt != T_BOOLEAN);
3232 }
3233 j++;
3234 }
3235 assert(j == regs->length(), "missed a field?");
3236
3237 __ bind(skip);
3238
3239 __ ret(lr);
3240
3241 __ flush();
3242
3243 return BufferedInlineTypeBlob::create(&buffer, pack_fields_off, pack_fields_jobject_off, unpack_fields_off);
3244 }
3245
3246 // Continuation point for throwing of implicit exceptions that are
3247 // not handled in the current activation. Fabricates an exception
3248 // oop and initiates normal exception dispatching in this
3249 // frame. Since we need to preserve callee-saved values (currently
3250 // only for C2, but done for C1 as well) we need a callee-saved oop
3251 // map and therefore have to make these stubs into RuntimeStubs
3252 // rather than BufferBlobs. If the compiler needs all registers to
3253 // be preserved between the fault point and the exception handler
3254 // then it must assume responsibility for that in
3255 // AbstractCompiler::continuation_for_implicit_null_exception or
3256 // continuation_for_implicit_division_by_zero_exception. All other
3257 // implicit exceptions (e.g., NullPointerException or
3258 // AbstractMethodError on entry) are either at call sites or
3259 // otherwise assume that stack unwinding will be initiated, so
3260 // caller saved registers were assumed volatile in the compiler.
3261
3262 RuntimeStub* SharedRuntime::generate_throw_exception(SharedStubId id, address runtime_entry) {
3263 assert(is_throw_id(id), "expected a throw stub id");
3264
3265 const char* name = SharedRuntime::stub_name(id);
3266
3267 // Information about frame layout at time of blocking runtime call.
3268 // Note that we only have to preserve callee-saved registers since
3269 // the compilers are responsible for supplying a continuation point
3270 // if they expect all registers to be preserved.
3271 // n.b. aarch64 asserts that frame::arg_reg_save_area_bytes == 0
3272 enum layout {
3273 rfp_off = 0,
3274 rfp_off2,
3275 return_off,
3276 return_off2,
3277 framesize // inclusive of return address
3278 };
3279
3280 int insts_size = 512;
3281 int locs_size = 64;
3282
3283 const char* timer_msg = "SharedRuntime generate_throw_exception";
3284 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime));
3285
3286 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, (uint)id, name);
3287 if (blob != nullptr) {
3288 return blob->as_runtime_stub();
3289 }
3290
3291 ResourceMark rm;
3292 CodeBuffer code(name, insts_size, locs_size);
3293 OopMapSet* oop_maps = new OopMapSet();
3294 MacroAssembler* masm = new MacroAssembler(&code);
3295
3296 address start = __ pc();
3297
3298 // This is an inlined and slightly modified version of call_VM
3299 // which has the ability to fetch the return PC out of
3300 // thread-local storage and also sets up last_Java_sp slightly
3301 // differently than the real call_VM
3302
3303 __ enter(); // Save FP and LR before call
3304
3305 assert(is_even(framesize/2), "sp not 16-byte aligned");
3306
3307 // lr and fp are already in place
3308 __ sub(sp, rfp, ((uint64_t)framesize-4) << LogBytesPerInt); // prolog
3309
3310 int frame_complete = __ pc() - start;
3311
3312 // Set up last_Java_sp and last_Java_fp
3313 address the_pc = __ pc();
3314 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
3315
3316 __ mov(c_rarg0, rthread);
3317 BLOCK_COMMENT("call runtime_entry");
3318 __ lea(rscratch1, RuntimeAddress(runtime_entry));
3319 __ blr(rscratch1);
3320
3321 // Generate oop map
3322 OopMap* map = new OopMap(framesize, 0);
3323
3324 oop_maps->add_gc_map(the_pc - start, map);
3325
3326 __ reset_last_Java_frame(true);
3327
3328 // Reinitialize the ptrue predicate register, in case the external runtime
3329 // call clobbers ptrue reg, as we may return to SVE compiled code.
3330 __ reinitialize_ptrue();
3331
3332 __ leave();
3333
3334 // check for pending exceptions
3335 #ifdef ASSERT
3336 Label L;
3337 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
3338 __ cbnz(rscratch1, L);
3339 __ should_not_reach_here();
3340 __ bind(L);
3341 #endif // ASSERT
3342 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3343
3344 // codeBlob framesize is in words (not VMRegImpl::slot_size)
3345 RuntimeStub* stub =
3346 RuntimeStub::new_runtime_stub(name,
3347 &code,
3348 frame_complete,
3349 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
3350 oop_maps, false);
3351 AOTCodeCache::store_code_blob(*stub, AOTCodeEntry::SharedBlob, (uint)id, name);
3352
3353 return stub;
3354 }
3355
3356 #if INCLUDE_JFR
3357
3358 static void jfr_prologue(address the_pc, MacroAssembler* masm, Register thread) {
3359 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
3360 __ mov(c_rarg0, thread);
3361 }
3362
3363 // The handle is dereferenced through a load barrier.
3364 static void jfr_epilogue(MacroAssembler* masm) {
3365 __ reset_last_Java_frame(true);
3366 }
3367
3368 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint.
3369 // It returns a jobject handle to the event writer.
3370 // The handle is dereferenced and the return value is the event writer oop.
3371 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() {
3372 enum layout {
3373 rbp_off,
3374 rbpH_off,
3375 return_off,
3376 return_off2,
3377 framesize // inclusive of return address
3378 };
3379
3380 int insts_size = 1024;
3381 int locs_size = 64;
3382 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_write_checkpoint_id);
3383 CodeBuffer code(name, insts_size, locs_size);
3384 OopMapSet* oop_maps = new OopMapSet();
3385 MacroAssembler* masm = new MacroAssembler(&code);
3386
3387 address start = __ pc();
3388 __ enter();
3389 int frame_complete = __ pc() - start;
3390 address the_pc = __ pc();
3391 jfr_prologue(the_pc, masm, rthread);
3392 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1);
3393 jfr_epilogue(masm);
3394 __ resolve_global_jobject(r0, rscratch1, rscratch2);
3395 __ leave();
3396 __ ret(lr);
3397
3398 OopMap* map = new OopMap(framesize, 1); // rfp
3399 oop_maps->add_gc_map(the_pc - start, map);
3400
3401 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
3402 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
3403 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
3404 oop_maps, false);
3405 return stub;
3406 }
3407
3408 // For c2: call to return a leased buffer.
3409 RuntimeStub* SharedRuntime::generate_jfr_return_lease() {
3410 enum layout {
3411 rbp_off,
3412 rbpH_off,
3413 return_off,
3414 return_off2,
3415 framesize // inclusive of return address
3416 };
3417
3418 int insts_size = 1024;
3419 int locs_size = 64;
3420
3421 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_return_lease_id);
3422 CodeBuffer code(name, insts_size, locs_size);
3423 OopMapSet* oop_maps = new OopMapSet();
3424 MacroAssembler* masm = new MacroAssembler(&code);
3425
3426 address start = __ pc();
3427 __ enter();
3428 int frame_complete = __ pc() - start;
3429 address the_pc = __ pc();
3430 jfr_prologue(the_pc, masm, rthread);
3431 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1);
3432 jfr_epilogue(masm);
3433
3434 __ leave();
3435 __ ret(lr);
3436
3437 OopMap* map = new OopMap(framesize, 1); // rfp
3438 oop_maps->add_gc_map(the_pc - start, map);
3439
3440 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
3441 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
3442 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
3443 oop_maps, false);
3444 return stub;
3445 }
3446
3447 #endif // INCLUDE_JFR