1 /*
   2  * Copyright (c) 2003, 2022, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
   4  * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
   5  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   6  *
   7  * This code is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 only, as
   9  * published by the Free Software Foundation.
  10  *
  11  * This code is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * version 2 for more details (a copy is included in the LICENSE file that
  15  * accompanied this code).
  16  *
  17  * You should have received a copy of the GNU General Public License version
  18  * 2 along with this work; if not, write to the Free Software Foundation,
  19  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  20  *
  21  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  22  * or visit www.oracle.com if you need additional information or have any
  23  * questions.
  24  *
  25  */
  26 
  27 #include "precompiled.hpp"
  28 #include "asm/macroAssembler.hpp"
  29 #include "asm/macroAssembler.inline.hpp"
  30 #include "classfile/symbolTable.hpp"
  31 #include "code/codeCache.hpp"
  32 #include "code/compiledIC.hpp"
  33 #include "code/debugInfoRec.hpp"
  34 #include "code/icBuffer.hpp"
  35 #include "code/vtableStubs.hpp"
  36 #include "compiler/oopMap.hpp"
  37 #include "gc/shared/barrierSetAssembler.hpp"
  38 #include "interpreter/interpreter.hpp"
  39 #include "interpreter/interp_masm.hpp"
  40 #include "logging/log.hpp"
  41 #include "memory/resourceArea.hpp"
  42 #include "nativeInst_aarch64.hpp"
  43 #include "oops/compiledICHolder.hpp"
  44 #include "oops/klass.inline.hpp"
  45 #include "oops/method.inline.hpp"
  46 #include "prims/methodHandles.hpp"
  47 #include "runtime/continuation.hpp"
  48 #include "runtime/continuationEntry.inline.hpp"
  49 #include "runtime/globals.hpp"
  50 #include "runtime/jniHandles.hpp"
  51 #include "runtime/safepointMechanism.hpp"
  52 #include "runtime/sharedRuntime.hpp"
  53 #include "runtime/signature.hpp"
  54 #include "runtime/stubRoutines.hpp"
  55 #include "runtime/vframeArray.hpp"
  56 #include "utilities/align.hpp"
  57 #include "utilities/formatBuffer.hpp"
  58 #include "vmreg_aarch64.inline.hpp"
  59 #ifdef COMPILER1
  60 #include "c1/c1_Runtime1.hpp"
  61 #endif
  62 #ifdef COMPILER2
  63 #include "adfiles/ad_aarch64.hpp"
  64 #include "opto/runtime.hpp"
  65 #endif
  66 #if INCLUDE_JVMCI
  67 #include "jvmci/jvmciJavaClasses.hpp"
  68 #endif
  69 
  70 #define __ masm->
  71 
  72 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  73 
  74 class SimpleRuntimeFrame {
  75 
  76   public:
  77 
  78   // Most of the runtime stubs have this simple frame layout.
  79   // This class exists to make the layout shared in one place.
  80   // Offsets are for compiler stack slots, which are jints.
  81   enum layout {
  82     // The frame sender code expects that rbp will be in the "natural" place and
  83     // will override any oopMap setting for it. We must therefore force the layout
  84     // so that it agrees with the frame sender code.
  85     // we don't expect any arg reg save area so aarch64 asserts that
  86     // frame::arg_reg_save_area_bytes == 0
  87     rfp_off = 0,
  88     rfp_off2,
  89     return_off, return_off2,
  90     framesize
  91   };
  92 };
  93 
  94 // FIXME -- this is used by C1
  95 class RegisterSaver {
  96   const bool _save_vectors;
  97  public:
  98   RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
  99 
 100   OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
 101   void restore_live_registers(MacroAssembler* masm);
 102 
 103   // Offsets into the register save area
 104   // Used by deoptimization when it is managing result register
 105   // values on its own
 106 
 107   int reg_offset_in_bytes(Register r);
 108   int r0_offset_in_bytes()    { return reg_offset_in_bytes(r0); }
 109   int rscratch1_offset_in_bytes()    { return reg_offset_in_bytes(rscratch1); }
 110   int v0_offset_in_bytes();
 111 
 112   // Total stack size in bytes for saving sve predicate registers.
 113   int total_sve_predicate_in_bytes();
 114 
 115   // Capture info about frame layout
 116   // Note this is only correct when not saving full vectors.
 117   enum layout {
 118                 fpu_state_off = 0,
 119                 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
 120                 // The frame sender code expects that rfp will be in
 121                 // the "natural" place and will override any oopMap
 122                 // setting for it. We must therefore force the layout
 123                 // so that it agrees with the frame sender code.
 124                 r0_off = fpu_state_off + FPUStateSizeInWords,
 125                 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register,
 126                 return_off = rfp_off + Register::max_slots_per_register,      // slot for return address
 127                 reg_save_size = return_off + Register::max_slots_per_register};
 128 
 129 };
 130 
 131 int RegisterSaver::reg_offset_in_bytes(Register r) {
 132   // The integer registers are located above the floating point
 133   // registers in the stack frame pushed by save_live_registers() so the
 134   // offset depends on whether we are saving full vectors, and whether
 135   // those vectors are NEON or SVE.
 136 
 137   int slots_per_vect = FloatRegister::save_slots_per_register;
 138 
 139 #if COMPILER2_OR_JVMCI
 140   if (_save_vectors) {
 141     slots_per_vect = FloatRegister::slots_per_neon_register;
 142 
 143 #ifdef COMPILER2
 144     if (Matcher::supports_scalable_vector()) {
 145       slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
 146     }
 147 #endif
 148   }
 149 #endif
 150 
 151   int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt;
 152   return r0_offset + r->encoding() * wordSize;
 153 }
 154 
 155 int RegisterSaver::v0_offset_in_bytes() {
 156   // The floating point registers are located above the predicate registers if
 157   // they are present in the stack frame pushed by save_live_registers(). So the
 158   // offset depends on the saved total predicate vectors in the stack frame.
 159   return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt;
 160 }
 161 
 162 int RegisterSaver::total_sve_predicate_in_bytes() {
 163 #ifdef COMPILER2
 164   if (_save_vectors && Matcher::supports_scalable_vector()) {
 165     // The number of total predicate bytes is unlikely to be a multiple
 166     // of 16 bytes so we manually align it up.
 167     return align_up(Matcher::scalable_predicate_reg_slots() *
 168                     VMRegImpl::stack_slot_size *
 169                     PRegister::number_of_saved_registers, 16);
 170   }
 171 #endif
 172   return 0;
 173 }
 174 
 175 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
 176   bool use_sve = false;
 177   int sve_vector_size_in_bytes = 0;
 178   int sve_vector_size_in_slots = 0;
 179   int sve_predicate_size_in_slots = 0;
 180   int total_predicate_in_bytes = total_sve_predicate_in_bytes();
 181   int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size;
 182 
 183 #ifdef COMPILER2
 184   use_sve = Matcher::supports_scalable_vector();
 185   if (use_sve) {
 186     sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
 187     sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
 188     sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots();
 189   }
 190 #endif
 191 
 192 #if COMPILER2_OR_JVMCI
 193   if (_save_vectors) {
 194     int extra_save_slots_per_register = 0;
 195     // Save upper half of vector registers
 196     if (use_sve) {
 197       extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register;
 198     } else {
 199       extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register;
 200     }
 201     int extra_vector_bytes = extra_save_slots_per_register *
 202                              VMRegImpl::stack_slot_size *
 203                              FloatRegister::number_of_registers;
 204     additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize);
 205   }
 206 #else
 207   assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
 208 #endif
 209 
 210   int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
 211                                      reg_save_size * BytesPerInt, 16);
 212   // OopMap frame size is in compiler stack slots (jint's) not bytes or words
 213   int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
 214   // The caller will allocate additional_frame_words
 215   int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
 216   // CodeBlob frame size is in words.
 217   int frame_size_in_words = frame_size_in_bytes / wordSize;
 218   *total_frame_words = frame_size_in_words;
 219 
 220   // Save Integer and Float registers.
 221   __ enter();
 222   __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes);
 223 
 224   // Set an oopmap for the call site.  This oopmap will map all
 225   // oop-registers and debug-info registers as callee-saved.  This
 226   // will allow deoptimization at this safepoint to find all possible
 227   // debug-info recordings, as well as let GC find all oops.
 228 
 229   OopMapSet *oop_maps = new OopMapSet();
 230   OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
 231 
 232   for (int i = 0; i < Register::number_of_registers; i++) {
 233     Register r = as_Register(i);
 234     if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) {
 235       // SP offsets are in 4-byte words.
 236       // Register slots are 8 bytes wide, 32 floating-point registers.
 237       int sp_offset = Register::max_slots_per_register * i +
 238                       FloatRegister::save_slots_per_register * FloatRegister::number_of_registers;
 239       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg());
 240     }
 241   }
 242 
 243   for (int i = 0; i < FloatRegister::number_of_registers; i++) {
 244     FloatRegister r = as_FloatRegister(i);
 245     int sp_offset = 0;
 246     if (_save_vectors) {
 247       sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) :
 248                             (FloatRegister::slots_per_neon_register * i);
 249     } else {
 250       sp_offset = FloatRegister::save_slots_per_register * i;
 251     }
 252     oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
 253   }
 254 
 255   if (_save_vectors && use_sve) {
 256     for (int i = 0; i < PRegister::number_of_saved_registers; i++) {
 257       PRegister r = as_PRegister(i);
 258       int sp_offset = sve_predicate_size_in_slots * i;
 259       oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
 260     }
 261   }
 262 
 263   return oop_map;
 264 }
 265 
 266 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
 267 #ifdef COMPILER2
 268   __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
 269                    Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes());
 270 #else
 271 #if !INCLUDE_JVMCI
 272   assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
 273 #endif
 274   __ pop_CPU_state(_save_vectors);
 275 #endif
 276   __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
 277   __ authenticate_return_address();
 278 }
 279 
 280 // Is vector's size (in bytes) bigger than a size saved by default?
 281 // 8 bytes vector registers are saved by default on AArch64.
 282 // The SVE supported min vector size is 8 bytes and we need to save
 283 // predicate registers when the vector size is 8 bytes as well.
 284 bool SharedRuntime::is_wide_vector(int size) {
 285   return size > 8 || (UseSVE > 0 && size >= 8);
 286 }
 287 
 288 // ---------------------------------------------------------------------------
 289 // Read the array of BasicTypes from a signature, and compute where the
 290 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 291 // quantities.  Values less than VMRegImpl::stack0 are registers, those above
 292 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 293 // as framesizes are fixed.
 294 // VMRegImpl::stack0 refers to the first slot 0(sp).
 295 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
 296 // Register up to Register::number_of_registers are the 64-bit
 297 // integer registers.
 298 
 299 // Note: the INPUTS in sig_bt are in units of Java argument words,
 300 // which are 64-bit.  The OUTPUTS are in 32-bit units.
 301 
 302 // The Java calling convention is a "shifted" version of the C ABI.
 303 // By skipping the first C ABI register we can call non-static jni
 304 // methods with small numbers of arguments without having to shuffle
 305 // the arguments at all. Since we control the java ABI we ought to at
 306 // least get some advantage out of it.
 307 
 308 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 309                                            VMRegPair *regs,
 310                                            int total_args_passed) {
 311 
 312   // Create the mapping between argument positions and
 313   // registers.
 314   static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
 315     j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
 316   };
 317   static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
 318     j_farg0, j_farg1, j_farg2, j_farg3,
 319     j_farg4, j_farg5, j_farg6, j_farg7
 320   };
 321 
 322 
 323   uint int_args = 0;
 324   uint fp_args = 0;
 325   uint stk_args = 0; // inc by 2 each time
 326 
 327   for (int i = 0; i < total_args_passed; i++) {
 328     switch (sig_bt[i]) {
 329     case T_BOOLEAN:
 330     case T_CHAR:
 331     case T_BYTE:
 332     case T_SHORT:
 333     case T_INT:
 334       if (int_args < Argument::n_int_register_parameters_j) {
 335         regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
 336       } else {
 337         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 338         stk_args += 2;
 339       }
 340       break;
 341     case T_VOID:
 342       // halves of T_LONG or T_DOUBLE
 343       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 344       regs[i].set_bad();
 345       break;
 346     case T_LONG:
 347       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 348       // fall through
 349     case T_OBJECT:
 350     case T_ARRAY:
 351     case T_ADDRESS:
 352     case T_PRIMITIVE_OBJECT:
 353       if (int_args < Argument::n_int_register_parameters_j) {
 354         regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
 355       } else {
 356         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 357         stk_args += 2;
 358       }
 359       break;
 360     case T_FLOAT:
 361       if (fp_args < Argument::n_float_register_parameters_j) {
 362         regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
 363       } else {
 364         regs[i].set1(VMRegImpl::stack2reg(stk_args));
 365         stk_args += 2;
 366       }
 367       break;
 368     case T_DOUBLE:
 369       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 370       if (fp_args < Argument::n_float_register_parameters_j) {
 371         regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
 372       } else {
 373         regs[i].set2(VMRegImpl::stack2reg(stk_args));
 374         stk_args += 2;
 375       }
 376       break;
 377     default:
 378       ShouldNotReachHere();
 379       break;
 380     }
 381   }
 382 
 383   return align_up(stk_args, 2);
 384 }
 385 
 386 
 387 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j;
 388 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j;
 389 
 390 int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) {
 391 
 392   // Create the mapping between argument positions and registers.
 393 
 394   static const Register INT_ArgReg[java_return_convention_max_int] = {
 395     r0 /* j_rarg7 */, j_rarg6, j_rarg5, j_rarg4, j_rarg3, j_rarg2, j_rarg1, j_rarg0
 396   };
 397 
 398   static const FloatRegister FP_ArgReg[java_return_convention_max_float] = {
 399     j_farg0, j_farg1, j_farg2, j_farg3, j_farg4, j_farg5, j_farg6, j_farg7
 400   };
 401 
 402   uint int_args = 0;
 403   uint fp_args = 0;
 404 
 405   for (int i = 0; i < total_args_passed; i++) {
 406     switch (sig_bt[i]) {
 407     case T_BOOLEAN:
 408     case T_CHAR:
 409     case T_BYTE:
 410     case T_SHORT:
 411     case T_INT:
 412       if (int_args < SharedRuntime::java_return_convention_max_int) {
 413         regs[i].set1(INT_ArgReg[int_args]->as_VMReg());
 414         int_args ++;
 415       } else {
 416         return -1;
 417       }
 418       break;
 419     case T_VOID:
 420       // halves of T_LONG or T_DOUBLE
 421       assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
 422       regs[i].set_bad();
 423       break;
 424     case T_LONG:
 425       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 426       // fall through
 427     case T_OBJECT:
 428     case T_ARRAY:
 429     case T_ADDRESS:
 430       // Should T_METADATA be added to java_calling_convention as well ?
 431     case T_METADATA:
 432     case T_PRIMITIVE_OBJECT:
 433       if (int_args < SharedRuntime::java_return_convention_max_int) {
 434         regs[i].set2(INT_ArgReg[int_args]->as_VMReg());
 435         int_args ++;
 436       } else {
 437         return -1;
 438       }
 439       break;
 440     case T_FLOAT:
 441       if (fp_args < SharedRuntime::java_return_convention_max_float) {
 442         regs[i].set1(FP_ArgReg[fp_args]->as_VMReg());
 443         fp_args ++;
 444       } else {
 445         return -1;
 446       }
 447       break;
 448     case T_DOUBLE:
 449       assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
 450       if (fp_args < SharedRuntime::java_return_convention_max_float) {
 451         regs[i].set2(FP_ArgReg[fp_args]->as_VMReg());
 452         fp_args ++;
 453       } else {
 454         return -1;
 455       }
 456       break;
 457     default:
 458       ShouldNotReachHere();
 459       break;
 460     }
 461   }
 462 
 463   return int_args + fp_args;
 464 }
 465 
 466 // Patch the callers callsite with entry to compiled code if it exists.
 467 static void patch_callers_callsite(MacroAssembler *masm) {
 468   Label L;
 469   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
 470   __ cbz(rscratch1, L);
 471 
 472   __ enter();
 473   __ push_CPU_state();
 474 
 475   // VM needs caller's callsite
 476   // VM needs target method
 477   // This needs to be a long call since we will relocate this adapter to
 478   // the codeBuffer and it may not reach
 479 
 480 #ifndef PRODUCT
 481   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
 482 #endif
 483 
 484   __ mov(c_rarg0, rmethod);
 485   __ mov(c_rarg1, lr);
 486   __ authenticate_return_address(c_rarg1, rscratch1);
 487   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 488   __ blr(rscratch1);
 489 
 490   // Explicit isb required because fixup_callers_callsite may change the code
 491   // stream.
 492   __ safepoint_isb();
 493 
 494   __ pop_CPU_state();
 495   // restore sp
 496   __ leave();
 497   __ bind(L);
 498 }
 499 
 500 // For each inline type argument, sig includes the list of fields of
 501 // the inline type. This utility function computes the number of
 502 // arguments for the call if inline types are passed by reference (the
 503 // calling convention the interpreter expects).
 504 static int compute_total_args_passed_int(const GrowableArray<SigEntry>* sig_extended) {
 505   int total_args_passed = 0;
 506   if (InlineTypePassFieldsAsArgs) {
 507      for (int i = 0; i < sig_extended->length(); i++) {
 508        BasicType bt = sig_extended->at(i)._bt;
 509        if (bt == T_PRIMITIVE_OBJECT) {
 510          // In sig_extended, an inline type argument starts with:
 511          // T_PRIMITIVE_OBJECT, followed by the types of the fields of the
 512          // inline type and T_VOID to mark the end of the value
 513          // type. Inline types are flattened so, for instance, in the
 514          // case of an inline type with an int field and an inline type
 515          // field that itself has 2 fields, an int and a long:
 516          // T_PRIMITIVE_OBJECT T_INT T_PRIMITIVE_OBJECT T_INT T_LONG T_VOID (second
 517          // slot for the T_LONG) T_VOID (inner T_PRIMITIVE_OBJECT) T_VOID
 518          // (outer T_PRIMITIVE_OBJECT)
 519          total_args_passed++;
 520          int vt = 1;
 521          do {
 522            i++;
 523            BasicType bt = sig_extended->at(i)._bt;
 524            BasicType prev_bt = sig_extended->at(i-1)._bt;
 525            if (bt == T_PRIMITIVE_OBJECT) {
 526              vt++;
 527            } else if (bt == T_VOID &&
 528                       prev_bt != T_LONG &&
 529                       prev_bt != T_DOUBLE) {
 530              vt--;
 531            }
 532          } while (vt != 0);
 533        } else {
 534          total_args_passed++;
 535        }
 536      }
 537   } else {
 538     total_args_passed = sig_extended->length();
 539   }
 540 
 541   return total_args_passed;
 542 }
 543 
 544 
 545 static void gen_c2i_adapter_helper(MacroAssembler* masm,
 546                                    BasicType bt,
 547                                    BasicType prev_bt,
 548                                    size_t size_in_bytes,
 549                                    const VMRegPair& reg_pair,
 550                                    const Address& to,
 551                                    Register tmp1,
 552                                    Register tmp2,
 553                                    Register tmp3,
 554                                    int extraspace,
 555                                    bool is_oop) {
 556   assert(bt != T_PRIMITIVE_OBJECT || !InlineTypePassFieldsAsArgs, "no inline type here");
 557   if (bt == T_VOID) {
 558     assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half");
 559     return;
 560   }
 561 
 562   // Say 4 args:
 563   // i   st_off
 564   // 0   32 T_LONG
 565   // 1   24 T_VOID
 566   // 2   16 T_OBJECT
 567   // 3    8 T_BOOL
 568   // -    0 return address
 569   //
 570   // However to make thing extra confusing. Because we can fit a Java long/double in
 571   // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
 572   // leaves one slot empty and only stores to a single slot. In this case the
 573   // slot that is occupied is the T_VOID slot. See I said it was confusing.
 574 
 575   bool wide = (size_in_bytes == wordSize);
 576   VMReg r_1 = reg_pair.first();
 577   VMReg r_2 = reg_pair.second();
 578   assert(r_2->is_valid() == wide, "invalid size");
 579   if (!r_1->is_valid()) {
 580     assert(!r_2->is_valid(), "");
 581     return;
 582   }
 583 
 584   if (!r_1->is_FloatRegister()) {
 585     Register val = r25;
 586     if (r_1->is_stack()) {
 587       // memory to memory use r25 (scratch registers is used by store_heap_oop)
 588       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 589       __ load_sized_value(val, Address(sp, ld_off), size_in_bytes, /* is_signed */ false);
 590     } else {
 591       val = r_1->as_Register();
 592     }
 593     assert_different_registers(to.base(), val, tmp1, tmp2, tmp3);
 594     if (is_oop) {
 595       __ store_heap_oop(to, val, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED);
 596     } else {
 597       __ store_sized_value(to, val, size_in_bytes);
 598     }
 599   } else {
 600     if (wide) {
 601       __ strd(r_1->as_FloatRegister(), to);
 602     } else {
 603       // only a float use just part of the slot
 604       __ strs(r_1->as_FloatRegister(), to);
 605     }
 606   }
 607 }
 608 
 609 static void gen_c2i_adapter(MacroAssembler *masm,
 610                             const GrowableArray<SigEntry>* sig_extended,
 611                             const VMRegPair *regs,
 612                             Label& skip_fixup,
 613                             address start,
 614                             OopMapSet* oop_maps,
 615                             int& frame_complete,
 616                             int& frame_size_in_words,
 617                             bool alloc_inline_receiver) {
 618 
 619   // Before we get into the guts of the C2I adapter, see if we should be here
 620   // at all.  We've come from compiled code and are attempting to jump to the
 621   // interpreter, which means the caller made a static call to get here
 622   // (vcalls always get a compiled target if there is one).  Check for a
 623   // compiled target.  If there is one, we need to patch the caller's call.
 624   patch_callers_callsite(masm);
 625 
 626   __ bind(skip_fixup);
 627 
 628   // Name some registers to be used in the following code. We can use
 629   // anything except r0-r7 which are arguments in the Java calling
 630   // convention, rmethod (r12), and r13 which holds the outgoing sender
 631   // SP for the interpreter.
 632   Register buf_array = r10;   // Array of buffered inline types
 633   Register buf_oop = r11;     // Buffered inline type oop
 634   Register tmp1 = r15;
 635   Register tmp2 = r16;
 636   Register tmp3 = r17;
 637 
 638   if (InlineTypePassFieldsAsArgs) {
 639     // Is there an inline type argument?
 640     bool has_inline_argument = false;
 641     for (int i = 0; i < sig_extended->length() && !has_inline_argument; i++) {
 642       has_inline_argument = (sig_extended->at(i)._bt == T_PRIMITIVE_OBJECT);
 643     }
 644     if (has_inline_argument) {
 645       // There is at least an inline type argument: we're coming from
 646       // compiled code so we have no buffers to back the inline types
 647       // Allocate the buffers here with a runtime call.
 648       RegisterSaver reg_save(false /* save_vectors */);
 649       OopMap* map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
 650 
 651       frame_complete = __ offset();
 652       address the_pc = __ pc();
 653 
 654       Label retaddr;
 655       __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
 656 
 657       __ mov(c_rarg0, rthread);
 658       __ mov(c_rarg1, rmethod);
 659       __ mov(c_rarg2, (int64_t)alloc_inline_receiver);
 660 
 661       __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::allocate_inline_types)));
 662       __ blr(rscratch1);
 663       __ bind(retaddr);
 664 
 665       oop_maps->add_gc_map(__ pc() - start, map);
 666       __ reset_last_Java_frame(false);
 667 
 668       reg_save.restore_live_registers(masm);
 669 
 670       Label no_exception;
 671       __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
 672       __ cbz(rscratch1, no_exception);
 673 
 674       __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
 675       __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
 676       __ b(RuntimeAddress(StubRoutines::forward_exception_entry()));
 677 
 678       __ bind(no_exception);
 679 
 680       // We get an array of objects from the runtime call
 681       __ get_vm_result(buf_array, rthread);
 682       __ get_vm_result_2(rmethod, rthread); // TODO: required to keep the callee Method live?
 683     }
 684   }
 685 
 686   // Since all args are passed on the stack, total_args_passed *
 687   // Interpreter::stackElementSize is the space we need.
 688 
 689   int total_args_passed = compute_total_args_passed_int(sig_extended);
 690   int extraspace = total_args_passed * Interpreter::stackElementSize;
 691 
 692   // stack is aligned, keep it that way
 693   extraspace = align_up(extraspace, StackAlignmentInBytes);
 694 
 695   // set senderSP value
 696   __ mov(r19_sender_sp, sp);
 697 
 698   __ sub(sp, sp, extraspace);
 699 
 700   // Now write the args into the outgoing interpreter space
 701 
 702   // next_arg_comp is the next argument from the compiler point of
 703   // view (inline type fields are passed in registers/on the stack). In
 704   // sig_extended, an inline type argument starts with: T_PRIMITIVE_OBJECT,
 705   // followed by the types of the fields of the inline type and T_VOID
 706   // to mark the end of the inline type. ignored counts the number of
 707   // T_PRIMITIVE_OBJECT/T_VOID. next_vt_arg is the next inline type argument:
 708   // used to get the buffer for that argument from the pool of buffers
 709   // we allocated above and want to pass to the
 710   // interpreter. next_arg_int is the next argument from the
 711   // interpreter point of view (inline types are passed by reference).
 712   for (int next_arg_comp = 0, ignored = 0, next_vt_arg = 0, next_arg_int = 0;
 713        next_arg_comp < sig_extended->length(); next_arg_comp++) {
 714     assert(ignored <= next_arg_comp, "shouldn't skip over more slots than there are arguments");
 715     assert(next_arg_int <= total_args_passed, "more arguments for the interpreter than expected?");
 716     BasicType bt = sig_extended->at(next_arg_comp)._bt;
 717     int st_off = (total_args_passed - next_arg_int - 1) * Interpreter::stackElementSize;
 718     if (!InlineTypePassFieldsAsArgs || bt != T_PRIMITIVE_OBJECT) {
 719       int next_off = st_off - Interpreter::stackElementSize;
 720       const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : st_off;
 721       const VMRegPair reg_pair = regs[next_arg_comp-ignored];
 722       size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4;
 723       gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL,
 724                              size_in_bytes, reg_pair, Address(sp, offset), tmp1, tmp2, tmp3, extraspace, false);
 725       next_arg_int++;
 726 #ifdef ASSERT
 727       if (bt == T_LONG || bt == T_DOUBLE) {
 728         // Overwrite the unused slot with known junk
 729         __ mov(rscratch1, CONST64(0xdeadffffdeadaaaa));
 730         __ str(rscratch1, Address(sp, st_off));
 731       }
 732 #endif /* ASSERT */
 733     } else {
 734       ignored++;
 735       // get the buffer from the just allocated pool of buffers
 736       int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + next_vt_arg * type2aelembytes(T_PRIMITIVE_OBJECT);
 737       __ load_heap_oop(buf_oop, Address(buf_array, index));
 738       next_vt_arg++; next_arg_int++;
 739       int vt = 1;
 740       // write fields we get from compiled code in registers/stack
 741       // slots to the buffer: we know we are done with that inline type
 742       // argument when we hit the T_VOID that acts as an end of inline
 743       // type delimiter for this inline type. Inline types are flattened
 744       // so we might encounter embedded inline types. Each entry in
 745       // sig_extended contains a field offset in the buffer.
 746       Label L_null;
 747       do {
 748         next_arg_comp++;
 749         BasicType bt = sig_extended->at(next_arg_comp)._bt;
 750         BasicType prev_bt = sig_extended->at(next_arg_comp - 1)._bt;
 751         if (bt == T_PRIMITIVE_OBJECT) {
 752           vt++;
 753           ignored++;
 754         } else if (bt == T_VOID && prev_bt != T_LONG && prev_bt != T_DOUBLE) {
 755           vt--;
 756           ignored++;
 757         } else {
 758           int off = sig_extended->at(next_arg_comp)._offset;
 759           if (off == -1) {
 760             // Nullable inline type argument, emit null check
 761             VMReg reg = regs[next_arg_comp-ignored].first();
 762             Label L_notNull;
 763             if (reg->is_stack()) {
 764               int ld_off = reg->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 765               __ ldr(tmp1, Address(sp, ld_off));
 766               __ cbnz(tmp1, L_notNull);
 767             } else {
 768               __ cbnz(reg->as_Register(), L_notNull);
 769             }
 770             __ str(zr, Address(sp, st_off));
 771             __ b(L_null);
 772             __ bind(L_notNull);
 773             continue;
 774           }
 775           assert(off > 0, "offset in object should be positive");
 776           size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
 777           bool is_oop = is_reference_type(bt);
 778           gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL,
 779                                  size_in_bytes, regs[next_arg_comp-ignored], Address(buf_oop, off), tmp1, tmp2, tmp3, extraspace, is_oop);
 780         }
 781       } while (vt != 0);
 782       // pass the buffer to the interpreter
 783       __ str(buf_oop, Address(sp, st_off));
 784       __ bind(L_null);
 785     }
 786   }
 787 
 788   __ mov(esp, sp); // Interp expects args on caller's expression stack
 789 
 790   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
 791   __ br(rscratch1);
 792 }
 793 
 794 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, int comp_args_on_stack, const GrowableArray<SigEntry>* sig, const VMRegPair *regs) {
 795 
 796 
 797   // Note: r19_sender_sp contains the senderSP on entry. We must
 798   // preserve it since we may do a i2c -> c2i transition if we lose a
 799   // race where compiled code goes non-entrant while we get args
 800   // ready.
 801 
 802   // Adapters are frameless.
 803 
 804   // An i2c adapter is frameless because the *caller* frame, which is
 805   // interpreted, routinely repairs its own esp (from
 806   // interpreter_frame_last_sp), even if a callee has modified the
 807   // stack pointer.  It also recalculates and aligns sp.
 808 
 809   // A c2i adapter is frameless because the *callee* frame, which is
 810   // interpreted, routinely repairs its caller's sp (from sender_sp,
 811   // which is set up via the senderSP register).
 812 
 813   // In other words, if *either* the caller or callee is interpreted, we can
 814   // get the stack pointer repaired after a call.
 815 
 816   // This is why c2i and i2c adapters cannot be indefinitely composed.
 817   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 818   // both caller and callee would be compiled methods, and neither would
 819   // clean up the stack pointer changes performed by the two adapters.
 820   // If this happens, control eventually transfers back to the compiled
 821   // caller, but with an uncorrected stack, causing delayed havoc.
 822 
 823   if (VerifyAdapterCalls &&
 824       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 825 #if 0
 826     // So, let's test for cascading c2i/i2c adapters right now.
 827     //  assert(Interpreter::contains($return_addr) ||
 828     //         StubRoutines::contains($return_addr),
 829     //         "i2c adapter must return to an interpreter frame");
 830     __ block_comment("verify_i2c { ");
 831     Label L_ok;
 832     if (Interpreter::code() != NULL)
 833       range_check(masm, rax, r11,
 834                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 835                   L_ok);
 836     if (StubRoutines::code1() != NULL)
 837       range_check(masm, rax, r11,
 838                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 839                   L_ok);
 840     if (StubRoutines::code2() != NULL)
 841       range_check(masm, rax, r11,
 842                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 843                   L_ok);
 844     const char* msg = "i2c adapter must return to an interpreter frame";
 845     __ block_comment(msg);
 846     __ stop(msg);
 847     __ bind(L_ok);
 848     __ block_comment("} verify_i2ce ");
 849 #endif
 850   }
 851 
 852   // Cut-out for having no stack args.
 853   int comp_words_on_stack = 0;
 854   if (comp_args_on_stack) {
 855      comp_words_on_stack = align_up(comp_args_on_stack * VMRegImpl::stack_slot_size, wordSize) >> LogBytesPerWord;
 856      __ sub(rscratch1, sp, comp_words_on_stack * wordSize);
 857      __ andr(sp, rscratch1, -16);
 858   }
 859 
 860   // Will jump to the compiled code just as if compiled code was doing it.
 861   // Pre-load the register-jump target early, to schedule it better.
 862   __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_inline_offset())));
 863 
 864 #if INCLUDE_JVMCI
 865   if (EnableJVMCI) {
 866     // check if this call should be routed towards a specific entry point
 867     __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 868     Label no_alternative_target;
 869     __ cbz(rscratch2, no_alternative_target);
 870     __ mov(rscratch1, rscratch2);
 871     __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
 872     __ bind(no_alternative_target);
 873   }
 874 #endif // INCLUDE_JVMCI
 875 
 876   int total_args_passed = sig->length();
 877 
 878   // Now generate the shuffle code.
 879   for (int i = 0; i < total_args_passed; i++) {
 880     BasicType bt = sig->at(i)._bt;
 881 
 882     assert(bt != T_PRIMITIVE_OBJECT, "i2c adapter doesn't unpack inline typ args");
 883     if (bt == T_VOID) {
 884       assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half");
 885       continue;
 886     }
 887 
 888     // Pick up 0, 1 or 2 words from SP+offset.
 889     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), "scrambled load targets?");
 890 
 891     // Load in argument order going down.
 892     int ld_off = (total_args_passed - i - 1) * Interpreter::stackElementSize;
 893     // Point to interpreter value (vs. tag)
 894     int next_off = ld_off - Interpreter::stackElementSize;
 895     //
 896     //
 897     //
 898     VMReg r_1 = regs[i].first();
 899     VMReg r_2 = regs[i].second();
 900     if (!r_1->is_valid()) {
 901       assert(!r_2->is_valid(), "");
 902       continue;
 903     }
 904     if (r_1->is_stack()) {
 905       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 906       int st_off = regs[i].first()->reg2stack() * VMRegImpl::stack_slot_size;
 907       if (!r_2->is_valid()) {
 908         // sign extend???
 909         __ ldrsw(rscratch2, Address(esp, ld_off));
 910         __ str(rscratch2, Address(sp, st_off));
 911       } else {
 912         //
 913         // We are using two optoregs. This can be either T_OBJECT,
 914         // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 915         // two slots but only uses one for thr T_LONG or T_DOUBLE case
 916         // So we must adjust where to pick up the data to match the
 917         // interpreter.
 918         //
 919         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 920         // are accessed as negative so LSW is at LOW address
 921 
 922         // ld_off is MSW so get LSW
 923         const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
 924         __ ldr(rscratch2, Address(esp, offset));
 925         // st_off is LSW (i.e. reg.first())
 926          __ str(rscratch2, Address(sp, st_off));
 927        }
 928      } else if (r_1->is_Register()) {  // Register argument
 929        Register r = r_1->as_Register();
 930        if (r_2->is_valid()) {
 931          //
 932          // We are using two VMRegs. This can be either T_OBJECT,
 933          // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
 934          // two slots but only uses one for thr T_LONG or T_DOUBLE case
 935          // So we must adjust where to pick up the data to match the
 936          // interpreter.
 937 
 938         const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
 939 
 940          // this can be a misaligned move
 941          __ ldr(r, Address(esp, offset));
 942        } else {
 943          // sign extend and use a full word?
 944          __ ldrw(r, Address(esp, ld_off));
 945        }
 946      } else {
 947        if (!r_2->is_valid()) {
 948          __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off));
 949        } else {
 950          __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off));
 951        }
 952      }
 953    }
 954 
 955 
 956   __ mov(rscratch2, rscratch1);
 957   __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
 958   __ mov(rscratch1, rscratch2);
 959 
 960   // 6243940 We might end up in handle_wrong_method if
 961   // the callee is deoptimized as we race thru here. If that
 962   // happens we don't want to take a safepoint because the
 963   // caller frame will look interpreted and arguments are now
 964   // "compiled" so it is much better to make this transition
 965   // invisible to the stack walking code. Unfortunately if
 966   // we try and find the callee by normal means a safepoint
 967   // is possible. So we stash the desired callee in the thread
 968   // and the vm will find there should this case occur.
 969 
 970   __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
 971   __ br(rscratch1);
 972 }
 973 
 974 static void gen_inline_cache_check(MacroAssembler *masm, Label& skip_fixup) {
 975 
 976   Label ok;
 977 
 978   Register holder = rscratch2;
 979   Register receiver = j_rarg0;
 980   Register tmp = r10;  // A call-clobbered register not used for arg passing
 981 
 982   // -------------------------------------------------------------------------
 983   // Generate a C2I adapter.  On entry we know rmethod holds the Method* during calls
 984   // to the interpreter.  The args start out packed in the compiled layout.  They
 985   // need to be unpacked into the interpreter layout.  This will almost always
 986   // require some stack space.  We grow the current (compiled) stack, then repack
 987   // the args.  We  finally end in a jump to the generic interpreter entry point.
 988   // On exit from the interpreter, the interpreter will restore our SP (lest the
 989   // compiled code, which relies solely on SP and not FP, get sick).
 990 
 991   {
 992     __ block_comment("c2i_unverified_entry {");
 993     __ load_klass(rscratch1, receiver);
 994     __ ldr(tmp, Address(holder, CompiledICHolder::holder_klass_offset()));
 995     __ cmp(rscratch1, tmp);
 996     __ ldr(rmethod, Address(holder, CompiledICHolder::holder_metadata_offset()));
 997     __ br(Assembler::EQ, ok);
 998     __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 999 
1000     __ bind(ok);
1001     // Method might have been compiled since the call site was patched to
1002     // interpreted; if that is the case treat it as a miss so we can get
1003     // the call site corrected.
1004     __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
1005     __ cbz(rscratch1, skip_fixup);
1006     __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1007     __ block_comment("} c2i_unverified_entry");
1008   }
1009 }
1010 
1011 
1012 // ---------------------------------------------------------------
1013 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm,
1014                                                             int comp_args_on_stack,
1015                                                             const GrowableArray<SigEntry>* sig,
1016                                                             const VMRegPair* regs,
1017                                                             const GrowableArray<SigEntry>* sig_cc,
1018                                                             const VMRegPair* regs_cc,
1019                                                             const GrowableArray<SigEntry>* sig_cc_ro,
1020                                                             const VMRegPair* regs_cc_ro,
1021                                                             AdapterFingerPrint* fingerprint,
1022                                                             AdapterBlob*& new_adapter,
1023                                                             bool allocate_code_blob) {
1024 
1025   address i2c_entry = __ pc();
1026   gen_i2c_adapter(masm, comp_args_on_stack, sig, regs);
1027 
1028   address c2i_unverified_entry = __ pc();
1029   Label skip_fixup;
1030 
1031   gen_inline_cache_check(masm, skip_fixup);
1032 
1033   OopMapSet* oop_maps = new OopMapSet();
1034   int frame_complete = CodeOffsets::frame_never_safe;
1035   int frame_size_in_words = 0;
1036 
1037   // Scalarized c2i adapter with non-scalarized receiver (i.e., don't pack receiver)
1038   address c2i_inline_ro_entry = __ pc();
1039   if (regs_cc != regs_cc_ro) {
1040     gen_c2i_adapter(masm, sig_cc_ro, regs_cc_ro, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, false);
1041     skip_fixup.reset();
1042   }
1043 
1044   // Scalarized c2i adapter
1045   address c2i_entry = __ pc();
1046 
1047   // Class initialization barrier for static methods
1048   address c2i_no_clinit_check_entry = NULL;
1049   if (VM_Version::supports_fast_class_init_checks()) {
1050     Label L_skip_barrier;
1051 
1052     { // Bypass the barrier for non-static methods
1053       __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset()));
1054       __ andsw(zr, rscratch1, JVM_ACC_STATIC);
1055       __ br(Assembler::EQ, L_skip_barrier); // non-static
1056     }
1057 
1058     __ load_method_holder(rscratch2, rmethod);
1059     __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1060     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1061 
1062     __ bind(L_skip_barrier);
1063     c2i_no_clinit_check_entry = __ pc();
1064   }
1065 
1066   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1067   bs->c2i_entry_barrier(masm);
1068 
1069   gen_c2i_adapter(masm, sig_cc, regs_cc, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, true);
1070 
1071   address c2i_unverified_inline_entry = c2i_unverified_entry;
1072 
1073   // Non-scalarized c2i adapter
1074   address c2i_inline_entry = c2i_entry;
1075   if (regs != regs_cc) {
1076     Label inline_entry_skip_fixup;
1077     c2i_unverified_inline_entry = __ pc();
1078     gen_inline_cache_check(masm, inline_entry_skip_fixup);
1079 
1080     c2i_inline_entry = __ pc();
1081     gen_c2i_adapter(masm, sig, regs, inline_entry_skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, false);
1082   }
1083 
1084   __ flush();
1085 
1086   // The c2i adapter might safepoint and trigger a GC. The caller must make sure that
1087   // the GC knows about the location of oop argument locations passed to the c2i adapter.
1088   if (allocate_code_blob) {
1089     bool caller_must_gc_arguments = (regs != regs_cc);
1090     new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps, caller_must_gc_arguments);
1091   }
1092 
1093   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_inline_entry, c2i_inline_ro_entry, c2i_unverified_entry, c2i_unverified_inline_entry, c2i_no_clinit_check_entry);
1094 }
1095 
1096 static int c_calling_convention_priv(const BasicType *sig_bt,
1097                                          VMRegPair *regs,
1098                                          VMRegPair *regs2,
1099                                          int total_args_passed) {
1100   assert(regs2 == NULL, "not needed on AArch64");
1101 
1102 // We return the amount of VMRegImpl stack slots we need to reserve for all
1103 // the arguments NOT counting out_preserve_stack_slots.
1104 
1105     static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
1106       c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5,  c_rarg6,  c_rarg7
1107     };
1108     static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1109       c_farg0, c_farg1, c_farg2, c_farg3,
1110       c_farg4, c_farg5, c_farg6, c_farg7
1111     };
1112 
1113     uint int_args = 0;
1114     uint fp_args = 0;
1115     uint stk_args = 0; // inc by 2 each time
1116 
1117     for (int i = 0; i < total_args_passed; i++) {
1118       switch (sig_bt[i]) {
1119       case T_BOOLEAN:
1120       case T_CHAR:
1121       case T_BYTE:
1122       case T_SHORT:
1123       case T_INT:
1124         if (int_args < Argument::n_int_register_parameters_c) {
1125           regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1126         } else {
1127 #ifdef __APPLE__
1128           // Less-than word types are stored one after another.
1129           // The code is unable to handle this so bailout.
1130           return -1;
1131 #endif
1132           regs[i].set1(VMRegImpl::stack2reg(stk_args));
1133           stk_args += 2;
1134         }
1135         break;
1136       case T_LONG:
1137         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1138         // fall through
1139       case T_OBJECT:
1140       case T_ARRAY:
1141       case T_PRIMITIVE_OBJECT:
1142       case T_ADDRESS:
1143       case T_METADATA:
1144         if (int_args < Argument::n_int_register_parameters_c) {
1145           regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1146         } else {
1147           regs[i].set2(VMRegImpl::stack2reg(stk_args));
1148           stk_args += 2;
1149         }
1150         break;
1151       case T_FLOAT:
1152         if (fp_args < Argument::n_float_register_parameters_c) {
1153           regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1154         } else {
1155 #ifdef __APPLE__
1156           // Less-than word types are stored one after another.
1157           // The code is unable to handle this so bailout.
1158           return -1;
1159 #endif
1160           regs[i].set1(VMRegImpl::stack2reg(stk_args));
1161           stk_args += 2;
1162         }
1163         break;
1164       case T_DOUBLE:
1165         assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1166         if (fp_args < Argument::n_float_register_parameters_c) {
1167           regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1168         } else {
1169           regs[i].set2(VMRegImpl::stack2reg(stk_args));
1170           stk_args += 2;
1171         }
1172         break;
1173       case T_VOID: // Halves of longs and doubles
1174         assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1175         regs[i].set_bad();
1176         break;
1177       default:
1178         ShouldNotReachHere();
1179         break;
1180       }
1181     }
1182 
1183   return stk_args;
1184 }
1185 
1186 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
1187                                              uint num_bits,
1188                                              uint total_args_passed) {
1189   Unimplemented();
1190   return 0;
1191 }
1192 
1193 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1194                                          VMRegPair *regs,
1195                                          VMRegPair *regs2,
1196                                          int total_args_passed)
1197 {
1198   int result = c_calling_convention_priv(sig_bt, regs, regs2, total_args_passed);
1199   guarantee(result >= 0, "Unsupported arguments configuration");
1200   return result;
1201 }
1202 
1203 
1204 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1205   // We always ignore the frame_slots arg and just use the space just below frame pointer
1206   // which by this time is free to use
1207   switch (ret_type) {
1208   case T_FLOAT:
1209     __ strs(v0, Address(rfp, -wordSize));
1210     break;
1211   case T_DOUBLE:
1212     __ strd(v0, Address(rfp, -wordSize));
1213     break;
1214   case T_VOID:  break;
1215   default: {
1216     __ str(r0, Address(rfp, -wordSize));
1217     }
1218   }
1219 }
1220 
1221 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1222   // We always ignore the frame_slots arg and just use the space just below frame pointer
1223   // which by this time is free to use
1224   switch (ret_type) {
1225   case T_FLOAT:
1226     __ ldrs(v0, Address(rfp, -wordSize));
1227     break;
1228   case T_DOUBLE:
1229     __ ldrd(v0, Address(rfp, -wordSize));
1230     break;
1231   case T_VOID:  break;
1232   default: {
1233     __ ldr(r0, Address(rfp, -wordSize));
1234     }
1235   }
1236 }
1237 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1238   RegSet x;
1239   for ( int i = first_arg ; i < arg_count ; i++ ) {
1240     if (args[i].first()->is_Register()) {
1241       x = x + args[i].first()->as_Register();
1242     } else if (args[i].first()->is_FloatRegister()) {
1243       __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
1244     }
1245   }
1246   __ push(x, sp);
1247 }
1248 
1249 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1250   RegSet x;
1251   for ( int i = first_arg ; i < arg_count ; i++ ) {
1252     if (args[i].first()->is_Register()) {
1253       x = x + args[i].first()->as_Register();
1254     } else {
1255       ;
1256     }
1257   }
1258   __ pop(x, sp);
1259   for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1260     if (args[i].first()->is_Register()) {
1261       ;
1262     } else if (args[i].first()->is_FloatRegister()) {
1263       __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
1264     }
1265   }
1266 }
1267 
1268 static void verify_oop_args(MacroAssembler* masm,
1269                             const methodHandle& method,
1270                             const BasicType* sig_bt,
1271                             const VMRegPair* regs) {
1272   Register temp_reg = r19;  // not part of any compiled calling seq
1273   if (VerifyOops) {
1274     for (int i = 0; i < method->size_of_parameters(); i++) {
1275       if (sig_bt[i] == T_OBJECT ||
1276           sig_bt[i] == T_ARRAY) {
1277         VMReg r = regs[i].first();
1278         assert(r->is_valid(), "bad oop arg");
1279         if (r->is_stack()) {
1280           __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1281           __ verify_oop(temp_reg);
1282         } else {
1283           __ verify_oop(r->as_Register());
1284         }
1285       }
1286     }
1287   }
1288 }
1289 
1290 // defined in stubGenerator_aarch64.cpp
1291 OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots);
1292 void fill_continuation_entry(MacroAssembler* masm);
1293 void continuation_enter_cleanup(MacroAssembler* masm);
1294 
1295 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
1296 // On entry: c_rarg1 -- the continuation object
1297 //           c_rarg2 -- isContinue
1298 //           c_rarg3 -- isVirtualThread
1299 static void gen_continuation_enter(MacroAssembler* masm,
1300                                  const methodHandle& method,
1301                                  const BasicType* sig_bt,
1302                                  const VMRegPair* regs,
1303                                  int& exception_offset,
1304                                  OopMapSet*oop_maps,
1305                                  int& frame_complete,
1306                                  int& stack_slots,
1307                                  int& interpreted_entry_offset,
1308                                  int& compiled_entry_offset) {
1309   //verify_oop_args(masm, method, sig_bt, regs);
1310   Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
1311 
1312   address start = __ pc();
1313 
1314   Label call_thaw, exit;
1315 
1316   // i2i entry used at interp_only_mode only
1317   interpreted_entry_offset = __ pc() - start;
1318   {
1319 
1320 #ifdef ASSERT
1321     Label is_interp_only;
1322     __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
1323     __ cbnzw(rscratch1, is_interp_only);
1324     __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
1325     __ bind(is_interp_only);
1326 #endif
1327 
1328     // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
1329     __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2));
1330     __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1));
1331     __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0));
1332     __ push_cont_fastpath(rthread);
1333 
1334     __ enter();
1335     stack_slots = 2; // will be adjusted in setup
1336     OopMap* map = continuation_enter_setup(masm, stack_slots);
1337     // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
1338     // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
1339 
1340     fill_continuation_entry(masm);
1341 
1342     __ cbnz(c_rarg2, call_thaw);
1343 
1344     const address tr_call = __ trampoline_call(resolve);
1345 
1346     oop_maps->add_gc_map(__ pc() - start, map);
1347     __ post_call_nop();
1348 
1349     __ b(exit);
1350 
1351     CodeBuffer* cbuf = masm->code_section()->outer();
1352     CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
1353   }
1354 
1355   // compiled entry
1356   __ align(CodeEntryAlignment);
1357   compiled_entry_offset = __ pc() - start;
1358 
1359   __ enter();
1360   stack_slots = 2; // will be adjusted in setup
1361   OopMap* map = continuation_enter_setup(masm, stack_slots);
1362   frame_complete = __ pc() - start;
1363 
1364   fill_continuation_entry(masm);
1365 
1366   __ cbnz(c_rarg2, call_thaw);
1367 
1368   const address tr_call = __ trampoline_call(resolve);
1369 
1370   oop_maps->add_gc_map(__ pc() - start, map);
1371   __ post_call_nop();
1372 
1373   __ b(exit);
1374 
1375   __ bind(call_thaw);
1376 
1377   __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1378   oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1379   ContinuationEntry::_return_pc_offset = __ pc() - start;
1380   __ post_call_nop();
1381 
1382   __ bind(exit);
1383   continuation_enter_cleanup(masm);
1384   __ leave();
1385   __ ret(lr);
1386 
1387   /// exception handling
1388 
1389   exception_offset = __ pc() - start;
1390   {
1391       __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1392 
1393       continuation_enter_cleanup(masm);
1394 
1395       __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1396       __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1397 
1398       // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1399 
1400       __ mov(r1, r0); // the exception handler
1401       __ mov(r0, r19); // restore return value contaning the exception oop
1402       __ verify_oop(r0);
1403 
1404       __ leave();
1405       __ mov(r3, lr);
1406       __ br(r1); // the exception handler
1407   }
1408 
1409   CodeBuffer* cbuf = masm->code_section()->outer();
1410   CompiledStaticCall::emit_to_interp_stub(*cbuf, tr_call);
1411 }
1412 
1413 static void gen_continuation_yield(MacroAssembler* masm,
1414                                    const methodHandle& method,
1415                                    const BasicType* sig_bt,
1416                                    const VMRegPair* regs,
1417                                    OopMapSet* oop_maps,
1418                                    int& frame_complete,
1419                                    int& stack_slots,
1420                                    int& compiled_entry_offset) {
1421     enum layout {
1422       rfp_off1,
1423       rfp_off2,
1424       lr_off,
1425       lr_off2,
1426       framesize // inclusive of return address
1427     };
1428     // assert(is_even(framesize/2), "sp not 16-byte aligned");
1429     stack_slots = framesize /  VMRegImpl::slots_per_word;
1430     assert(stack_slots == 2, "recheck layout");
1431 
1432     address start = __ pc();
1433 
1434     compiled_entry_offset = __ pc() - start;
1435     __ enter();
1436 
1437     __ mov(c_rarg1, sp);
1438 
1439     frame_complete = __ pc() - start;
1440     address the_pc = __ pc();
1441 
1442     __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1443 
1444     __ mov(c_rarg0, rthread);
1445     __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
1446     __ call_VM_leaf(Continuation::freeze_entry(), 2);
1447     __ reset_last_Java_frame(true);
1448 
1449     Label pinned;
1450 
1451     __ cbnz(r0, pinned);
1452 
1453     // We've succeeded, set sp to the ContinuationEntry
1454     __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1455     __ mov(sp, rscratch1);
1456     continuation_enter_cleanup(masm);
1457 
1458     __ bind(pinned); // pinned -- return to caller
1459 
1460     __ leave();
1461     __ ret(lr);
1462 
1463     OopMap* map = new OopMap(framesize, 1);
1464     oop_maps->add_gc_map(the_pc - start, map);
1465 }
1466 
1467 static void gen_special_dispatch(MacroAssembler* masm,
1468                                  const methodHandle& method,
1469                                  const BasicType* sig_bt,
1470                                  const VMRegPair* regs) {
1471   verify_oop_args(masm, method, sig_bt, regs);
1472   vmIntrinsics::ID iid = method->intrinsic_id();
1473 
1474   // Now write the args into the outgoing interpreter space
1475   bool     has_receiver   = false;
1476   Register receiver_reg   = noreg;
1477   int      member_arg_pos = -1;
1478   Register member_reg     = noreg;
1479   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1480   if (ref_kind != 0) {
1481     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1482     member_reg = r19;  // known to be free at this point
1483     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1484   } else if (iid == vmIntrinsics::_invokeBasic) {
1485     has_receiver = true;
1486   } else if (iid == vmIntrinsics::_linkToNative) {
1487     member_arg_pos = method->size_of_parameters() - 1;  // trailing NativeEntryPoint argument
1488     member_reg = r19;  // known to be free at this point
1489   } else {
1490     fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1491   }
1492 
1493   if (member_reg != noreg) {
1494     // Load the member_arg into register, if necessary.
1495     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1496     VMReg r = regs[member_arg_pos].first();
1497     if (r->is_stack()) {
1498       __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1499     } else {
1500       // no data motion is needed
1501       member_reg = r->as_Register();
1502     }
1503   }
1504 
1505   if (has_receiver) {
1506     // Make sure the receiver is loaded into a register.
1507     assert(method->size_of_parameters() > 0, "oob");
1508     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1509     VMReg r = regs[0].first();
1510     assert(r->is_valid(), "bad receiver arg");
1511     if (r->is_stack()) {
1512       // Porting note:  This assumes that compiled calling conventions always
1513       // pass the receiver oop in a register.  If this is not true on some
1514       // platform, pick a temp and load the receiver from stack.
1515       fatal("receiver always in a register");
1516       receiver_reg = r2;  // known to be free at this point
1517       __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1518     } else {
1519       // no data motion is needed
1520       receiver_reg = r->as_Register();
1521     }
1522   }
1523 
1524   // Figure out which address we are really jumping to:
1525   MethodHandles::generate_method_handle_dispatch(masm, iid,
1526                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1527 }
1528 
1529 // ---------------------------------------------------------------------------
1530 // Generate a native wrapper for a given method.  The method takes arguments
1531 // in the Java compiled code convention, marshals them to the native
1532 // convention (handlizes oops, etc), transitions to native, makes the call,
1533 // returns to java state (possibly blocking), unhandlizes any result and
1534 // returns.
1535 //
1536 // Critical native functions are a shorthand for the use of
1537 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1538 // functions.  The wrapper is expected to unpack the arguments before
1539 // passing them to the callee. Critical native functions leave the state _in_Java,
1540 // since they block out GC.
1541 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1542 // block and the check for pending exceptions it's impossible for them
1543 // to be thrown.
1544 //
1545 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1546                                                 const methodHandle& method,
1547                                                 int compile_id,
1548                                                 BasicType* in_sig_bt,
1549                                                 VMRegPair* in_regs,
1550                                                 BasicType ret_type) {
1551   if (method->is_continuation_native_intrinsic()) {
1552     int exception_offset = -1;
1553     OopMapSet* oop_maps = new OopMapSet();
1554     int frame_complete = -1;
1555     int stack_slots = -1;
1556     int interpreted_entry_offset = -1;
1557     int vep_offset = -1;
1558     if (method->is_continuation_enter_intrinsic()) {
1559       gen_continuation_enter(masm,
1560                              method,
1561                              in_sig_bt,
1562                              in_regs,
1563                              exception_offset,
1564                              oop_maps,
1565                              frame_complete,
1566                              stack_slots,
1567                              interpreted_entry_offset,
1568                              vep_offset);
1569     } else if (method->is_continuation_yield_intrinsic()) {
1570       gen_continuation_yield(masm,
1571                              method,
1572                              in_sig_bt,
1573                              in_regs,
1574                              oop_maps,
1575                              frame_complete,
1576                              stack_slots,
1577                              vep_offset);
1578     } else {
1579       guarantee(false, "Unknown Continuation native intrinsic");
1580     }
1581 
1582 #ifdef ASSERT
1583     if (method->is_continuation_enter_intrinsic()) {
1584       assert(interpreted_entry_offset != -1, "Must be set");
1585       assert(exception_offset != -1,         "Must be set");
1586     } else {
1587       assert(interpreted_entry_offset == -1, "Must be unset");
1588       assert(exception_offset == -1,         "Must be unset");
1589     }
1590     assert(frame_complete != -1,    "Must be set");
1591     assert(stack_slots != -1,       "Must be set");
1592     assert(vep_offset != -1,        "Must be set");
1593 #endif
1594 
1595     __ flush();
1596     nmethod* nm = nmethod::new_native_nmethod(method,
1597                                               compile_id,
1598                                               masm->code(),
1599                                               vep_offset,
1600                                               frame_complete,
1601                                               stack_slots,
1602                                               in_ByteSize(-1),
1603                                               in_ByteSize(-1),
1604                                               oop_maps,
1605                                               exception_offset);
1606     if (method->is_continuation_enter_intrinsic()) {
1607       ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1608     } else if (method->is_continuation_yield_intrinsic()) {
1609       _cont_doYield_stub = nm;
1610     } else {
1611       guarantee(false, "Unknown Continuation native intrinsic");
1612     }
1613     return nm;
1614   }
1615 
1616   if (method->is_method_handle_intrinsic()) {
1617     vmIntrinsics::ID iid = method->intrinsic_id();
1618     intptr_t start = (intptr_t)__ pc();
1619     int vep_offset = ((intptr_t)__ pc()) - start;
1620 
1621     // First instruction must be a nop as it may need to be patched on deoptimisation
1622     __ nop();
1623     gen_special_dispatch(masm,
1624                          method,
1625                          in_sig_bt,
1626                          in_regs);
1627     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1628     __ flush();
1629     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1630     return nmethod::new_native_nmethod(method,
1631                                        compile_id,
1632                                        masm->code(),
1633                                        vep_offset,
1634                                        frame_complete,
1635                                        stack_slots / VMRegImpl::slots_per_word,
1636                                        in_ByteSize(-1),
1637                                        in_ByteSize(-1),
1638                                        (OopMapSet*)NULL);
1639   }
1640   address native_func = method->native_function();
1641   assert(native_func != NULL, "must have function");
1642 
1643   // An OopMap for lock (and class if static)
1644   OopMapSet *oop_maps = new OopMapSet();
1645   intptr_t start = (intptr_t)__ pc();
1646 
1647   // We have received a description of where all the java arg are located
1648   // on entry to the wrapper. We need to convert these args to where
1649   // the jni function will expect them. To figure out where they go
1650   // we convert the java signature to a C signature by inserting
1651   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1652 
1653   const int total_in_args = method->size_of_parameters();
1654   int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1655 
1656   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1657   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1658   BasicType* in_elem_bt = NULL;
1659 
1660   int argc = 0;
1661   out_sig_bt[argc++] = T_ADDRESS;
1662   if (method->is_static()) {
1663     out_sig_bt[argc++] = T_OBJECT;
1664   }
1665 
1666   for (int i = 0; i < total_in_args ; i++ ) {
1667     out_sig_bt[argc++] = in_sig_bt[i];
1668   }
1669 
1670   // Now figure out where the args must be stored and how much stack space
1671   // they require.
1672   int out_arg_slots;
1673   out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, NULL, total_c_args);
1674 
1675   if (out_arg_slots < 0) {
1676     return NULL;
1677   }
1678 
1679   // Compute framesize for the wrapper.  We need to handlize all oops in
1680   // incoming registers
1681 
1682   // Calculate the total number of stack slots we will need.
1683 
1684   // First count the abi requirement plus all of the outgoing args
1685   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1686 
1687   // Now the space for the inbound oop handle area
1688   int total_save_slots = 8 * VMRegImpl::slots_per_word;  // 8 arguments passed in registers
1689 
1690   int oop_handle_offset = stack_slots;
1691   stack_slots += total_save_slots;
1692 
1693   // Now any space we need for handlizing a klass if static method
1694 
1695   int klass_slot_offset = 0;
1696   int klass_offset = -1;
1697   int lock_slot_offset = 0;
1698   bool is_static = false;
1699 
1700   if (method->is_static()) {
1701     klass_slot_offset = stack_slots;
1702     stack_slots += VMRegImpl::slots_per_word;
1703     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1704     is_static = true;
1705   }
1706 
1707   // Plus a lock if needed
1708 
1709   if (method->is_synchronized()) {
1710     lock_slot_offset = stack_slots;
1711     stack_slots += VMRegImpl::slots_per_word;
1712   }
1713 
1714   // Now a place (+2) to save return values or temp during shuffling
1715   // + 4 for return address (which we own) and saved rfp
1716   stack_slots += 6;
1717 
1718   // Ok The space we have allocated will look like:
1719   //
1720   //
1721   // FP-> |                     |
1722   //      |---------------------|
1723   //      | 2 slots for moves   |
1724   //      |---------------------|
1725   //      | lock box (if sync)  |
1726   //      |---------------------| <- lock_slot_offset
1727   //      | klass (if static)   |
1728   //      |---------------------| <- klass_slot_offset
1729   //      | oopHandle area      |
1730   //      |---------------------| <- oop_handle_offset (8 java arg registers)
1731   //      | outbound memory     |
1732   //      | based arguments     |
1733   //      |                     |
1734   //      |---------------------|
1735   //      |                     |
1736   // SP-> | out_preserved_slots |
1737   //
1738   //
1739 
1740 
1741   // Now compute actual number of stack words we need rounding to make
1742   // stack properly aligned.
1743   stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1744 
1745   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1746 
1747   // First thing make an ic check to see if we should even be here
1748 
1749   // We are free to use all registers as temps without saving them and
1750   // restoring them except rfp. rfp is the only callee save register
1751   // as far as the interpreter and the compiler(s) are concerned.
1752 
1753 
1754   const Register ic_reg = rscratch2;
1755   const Register receiver = j_rarg0;
1756 
1757   Label hit;
1758   Label exception_pending;
1759 
1760   assert_different_registers(ic_reg, receiver, rscratch1);
1761   __ verify_oop(receiver);
1762   __ cmp_klass(receiver, ic_reg, rscratch1);
1763   __ br(Assembler::EQ, hit);
1764 
1765   __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1766 
1767   // Verified entry point must be aligned
1768   __ align(8);
1769 
1770   __ bind(hit);
1771 
1772   int vep_offset = ((intptr_t)__ pc()) - start;
1773 
1774   // If we have to make this method not-entrant we'll overwrite its
1775   // first instruction with a jump.  For this action to be legal we
1776   // must ensure that this first instruction is a B, BL, NOP, BKPT,
1777   // SVC, HVC, or SMC.  Make it a NOP.
1778   __ nop();
1779 
1780   if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1781     Label L_skip_barrier;
1782     __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1783     __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1784     __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1785 
1786     __ bind(L_skip_barrier);
1787   }
1788 
1789   // Generate stack overflow check
1790   __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1791 
1792   // Generate a new frame for the wrapper.
1793   __ enter();
1794   // -2 because return address is already present and so is saved rfp
1795   __ sub(sp, sp, stack_size - 2*wordSize);
1796 
1797   BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1798   bs->nmethod_entry_barrier(masm, NULL /* slow_path */, NULL /* continuation */, NULL /* guard */);
1799 
1800   // Frame is now completed as far as size and linkage.
1801   int frame_complete = ((intptr_t)__ pc()) - start;
1802 
1803   // We use r20 as the oop handle for the receiver/klass
1804   // It is callee save so it survives the call to native
1805 
1806   const Register oop_handle_reg = r20;
1807 
1808   //
1809   // We immediately shuffle the arguments so that any vm call we have to
1810   // make from here on out (sync slow path, jvmti, etc.) we will have
1811   // captured the oops from our caller and have a valid oopMap for
1812   // them.
1813 
1814   // -----------------
1815   // The Grand Shuffle
1816 
1817   // The Java calling convention is either equal (linux) or denser (win64) than the
1818   // c calling convention. However the because of the jni_env argument the c calling
1819   // convention always has at least one more (and two for static) arguments than Java.
1820   // Therefore if we move the args from java -> c backwards then we will never have
1821   // a register->register conflict and we don't have to build a dependency graph
1822   // and figure out how to break any cycles.
1823   //
1824 
1825   // Record esp-based slot for receiver on stack for non-static methods
1826   int receiver_offset = -1;
1827 
1828   // This is a trick. We double the stack slots so we can claim
1829   // the oops in the caller's frame. Since we are sure to have
1830   // more args than the caller doubling is enough to make
1831   // sure we can capture all the incoming oop args from the
1832   // caller.
1833   //
1834   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1835 
1836   // Mark location of rfp (someday)
1837   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1838 
1839 
1840   int float_args = 0;
1841   int int_args = 0;
1842 
1843 #ifdef ASSERT
1844   bool reg_destroyed[Register::number_of_registers];
1845   bool freg_destroyed[FloatRegister::number_of_registers];
1846   for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1847     reg_destroyed[r] = false;
1848   }
1849   for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1850     freg_destroyed[f] = false;
1851   }
1852 
1853 #endif /* ASSERT */
1854 
1855   // For JNI natives the incoming and outgoing registers are offset upwards.
1856   GrowableArray<int> arg_order(2 * total_in_args);
1857   VMRegPair tmp_vmreg;
1858   tmp_vmreg.set2(r19->as_VMReg());
1859 
1860   for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1861     arg_order.push(i);
1862     arg_order.push(c_arg);
1863   }
1864 
1865   int temploc = -1;
1866   for (int ai = 0; ai < arg_order.length(); ai += 2) {
1867     int i = arg_order.at(ai);
1868     int c_arg = arg_order.at(ai + 1);
1869     __ block_comment(err_msg("move %d -> %d", i, c_arg));
1870     assert(c_arg != -1 && i != -1, "wrong order");
1871 #ifdef ASSERT
1872     if (in_regs[i].first()->is_Register()) {
1873       assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1874     } else if (in_regs[i].first()->is_FloatRegister()) {
1875       assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1876     }
1877     if (out_regs[c_arg].first()->is_Register()) {
1878       reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1879     } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1880       freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1881     }
1882 #endif /* ASSERT */
1883     switch (in_sig_bt[i]) {
1884       case T_ARRAY:
1885       case T_PRIMITIVE_OBJECT:
1886       case T_OBJECT:
1887         __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1888                        ((i == 0) && (!is_static)),
1889                        &receiver_offset);
1890         int_args++;
1891         break;
1892       case T_VOID:
1893         break;
1894 
1895       case T_FLOAT:
1896         __ float_move(in_regs[i], out_regs[c_arg]);
1897         float_args++;
1898         break;
1899 
1900       case T_DOUBLE:
1901         assert( i + 1 < total_in_args &&
1902                 in_sig_bt[i + 1] == T_VOID &&
1903                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1904         __ double_move(in_regs[i], out_regs[c_arg]);
1905         float_args++;
1906         break;
1907 
1908       case T_LONG :
1909         __ long_move(in_regs[i], out_regs[c_arg]);
1910         int_args++;
1911         break;
1912 
1913       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1914 
1915       default:
1916         __ move32_64(in_regs[i], out_regs[c_arg]);
1917         int_args++;
1918     }
1919   }
1920 
1921   // point c_arg at the first arg that is already loaded in case we
1922   // need to spill before we call out
1923   int c_arg = total_c_args - total_in_args;
1924 
1925   // Pre-load a static method's oop into c_rarg1.
1926   if (method->is_static()) {
1927 
1928     //  load oop into a register
1929     __ movoop(c_rarg1,
1930               JNIHandles::make_local(method->method_holder()->java_mirror()));
1931 
1932     // Now handlize the static class mirror it's known not-null.
1933     __ str(c_rarg1, Address(sp, klass_offset));
1934     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1935 
1936     // Now get the handle
1937     __ lea(c_rarg1, Address(sp, klass_offset));
1938     // and protect the arg if we must spill
1939     c_arg--;
1940   }
1941 
1942   // Change state to native (we save the return address in the thread, since it might not
1943   // be pushed on the stack when we do a stack traversal).
1944   // We use the same pc/oopMap repeatedly when we call out
1945 
1946   Label native_return;
1947   __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1948 
1949   Label dtrace_method_entry, dtrace_method_entry_done;
1950   {
1951     uint64_t offset;
1952     __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
1953     __ ldrb(rscratch1, Address(rscratch1, offset));
1954     __ cbnzw(rscratch1, dtrace_method_entry);
1955     __ bind(dtrace_method_entry_done);
1956   }
1957 
1958   // RedefineClasses() tracing support for obsolete method entry
1959   if (log_is_enabled(Trace, redefine, class, obsolete)) {
1960     // protect the args we've loaded
1961     save_args(masm, total_c_args, c_arg, out_regs);
1962     __ mov_metadata(c_rarg1, method());
1963     __ call_VM_leaf(
1964       CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1965       rthread, c_rarg1);
1966     restore_args(masm, total_c_args, c_arg, out_regs);
1967   }
1968 
1969   // Lock a synchronized method
1970 
1971   // Register definitions used by locking and unlocking
1972 
1973   const Register swap_reg = r0;
1974   const Register obj_reg  = r19;  // Will contain the oop
1975   const Register lock_reg = r13;  // Address of compiler lock object (BasicLock)
1976   const Register old_hdr  = r13;  // value of old header at unlock time
1977   const Register tmp = lr;
1978 
1979   Label slow_path_lock;
1980   Label lock_done;
1981 
1982   if (method->is_synchronized()) {
1983     Label count;
1984     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1985 
1986     // Get the handle (the 2nd argument)
1987     __ mov(oop_handle_reg, c_rarg1);
1988 
1989     // Get address of the box
1990 
1991     __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1992 
1993     // Load the oop from the handle
1994     __ ldr(obj_reg, Address(oop_handle_reg, 0));
1995 
1996     if (!UseHeavyMonitors) {
1997       // Load (object->mark() | 1) into swap_reg %r0
1998       __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
1999       __ orr(swap_reg, rscratch1, 1);
2000       if (EnableValhalla) {
2001         // Mask inline_type bit such that we go to the slow path if object is an inline type
2002         __ andr(swap_reg, swap_reg, ~((int) markWord::inline_type_bit_in_place));
2003       }
2004 
2005       // Save (object->mark() | 1) into BasicLock's displaced header
2006       __ str(swap_reg, Address(lock_reg, mark_word_offset));
2007 
2008       // src -> dest iff dest == r0 else r0 <- dest
2009       __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, count, /*fallthrough*/NULL);
2010 
2011       // Hmm should this move to the slow path code area???
2012 
2013       // Test if the oopMark is an obvious stack pointer, i.e.,
2014       //  1) (mark & 3) == 0, and
2015       //  2) sp <= mark < mark + os::pagesize()
2016       // These 3 tests can be done by evaluating the following
2017       // expression: ((mark - sp) & (3 - os::vm_page_size())),
2018       // assuming both stack pointer and pagesize have their
2019       // least significant 2 bits clear.
2020       // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg
2021 
2022       __ sub(swap_reg, sp, swap_reg);
2023       __ neg(swap_reg, swap_reg);
2024       __ ands(swap_reg, swap_reg, 3 - os::vm_page_size());
2025 
2026       // Save the test result, for recursive case, the result is zero
2027       __ str(swap_reg, Address(lock_reg, mark_word_offset));
2028       __ br(Assembler::NE, slow_path_lock);
2029     } else {
2030       __ b(slow_path_lock);
2031     }
2032     __ bind(count);
2033     __ increment(Address(rthread, JavaThread::held_monitor_count_offset()));
2034 
2035     // Slow path will re-enter here
2036     __ bind(lock_done);
2037   }
2038 
2039 
2040   // Finally just about ready to make the JNI call
2041 
2042   // get JNIEnv* which is first argument to native
2043   __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
2044 
2045   // Now set thread in native
2046   __ mov(rscratch1, _thread_in_native);
2047   __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
2048   __ stlrw(rscratch1, rscratch2);
2049 
2050   __ rt_call(native_func);
2051 
2052   __ bind(native_return);
2053 
2054   intptr_t return_pc = (intptr_t) __ pc();
2055   oop_maps->add_gc_map(return_pc - start, map);
2056 
2057   // Unpack native results.
2058   switch (ret_type) {
2059   case T_BOOLEAN: __ c2bool(r0);                     break;
2060   case T_CHAR   : __ ubfx(r0, r0, 0, 16);            break;
2061   case T_BYTE   : __ sbfx(r0, r0, 0, 8);             break;
2062   case T_SHORT  : __ sbfx(r0, r0, 0, 16);            break;
2063   case T_INT    : __ sbfx(r0, r0, 0, 32);            break;
2064   case T_DOUBLE :
2065   case T_FLOAT  :
2066     // Result is in v0 we'll save as needed
2067     break;
2068   case T_ARRAY:                 // Really a handle
2069   case T_PRIMITIVE_OBJECT:           // Really a handle
2070   case T_OBJECT:                // Really a handle
2071       break; // can't de-handlize until after safepoint check
2072   case T_VOID: break;
2073   case T_LONG: break;
2074   default       : ShouldNotReachHere();
2075   }
2076 
2077   Label safepoint_in_progress, safepoint_in_progress_done;
2078   Label after_transition;
2079 
2080   // Switch thread to "native transition" state before reading the synchronization state.
2081   // This additional state is necessary because reading and testing the synchronization
2082   // state is not atomic w.r.t. GC, as this scenario demonstrates:
2083   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2084   //     VM thread changes sync state to synchronizing and suspends threads for GC.
2085   //     Thread A is resumed to finish this native method, but doesn't block here since it
2086   //     didn't see any synchronization is progress, and escapes.
2087   __ mov(rscratch1, _thread_in_native_trans);
2088 
2089   __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
2090 
2091   // Force this write out before the read below
2092   if (!UseSystemMemoryBarrier) {
2093     __ dmb(Assembler::ISH);
2094   }
2095 
2096   __ verify_sve_vector_length();
2097 
2098   // Check for safepoint operation in progress and/or pending suspend requests.
2099   {
2100     // We need an acquire here to ensure that any subsequent load of the
2101     // global SafepointSynchronize::_state flag is ordered after this load
2102     // of the thread-local polling word.  We don't want this poll to
2103     // return false (i.e. not safepointing) and a later poll of the global
2104     // SafepointSynchronize::_state spuriously to return true.
2105     //
2106     // This is to avoid a race when we're in a native->Java transition
2107     // racing the code which wakes up from a safepoint.
2108 
2109     __ safepoint_poll(safepoint_in_progress, true /* at_return */, true /* acquire */, false /* in_nmethod */);
2110     __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
2111     __ cbnzw(rscratch1, safepoint_in_progress);
2112     __ bind(safepoint_in_progress_done);
2113   }
2114 
2115   // change thread state
2116   __ mov(rscratch1, _thread_in_Java);
2117   __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
2118   __ stlrw(rscratch1, rscratch2);
2119   __ bind(after_transition);
2120 
2121   Label reguard;
2122   Label reguard_done;
2123   __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
2124   __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
2125   __ br(Assembler::EQ, reguard);
2126   __ bind(reguard_done);
2127 
2128   // native result if any is live
2129 
2130   // Unlock
2131   Label unlock_done;
2132   Label slow_path_unlock;
2133   if (method->is_synchronized()) {
2134 
2135     // Get locked oop from the handle we passed to jni
2136     __ ldr(obj_reg, Address(oop_handle_reg, 0));
2137 
2138     Label done, not_recursive;
2139 
2140     if (!UseHeavyMonitors) {
2141       // Simple recursive lock?
2142       __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2143       __ cbnz(rscratch1, not_recursive);
2144       __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
2145       __ b(done);
2146     }
2147 
2148     __ bind(not_recursive);
2149 
2150     // Must save r0 if if it is live now because cmpxchg must use it
2151     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2152       save_native_result(masm, ret_type, stack_slots);
2153     }
2154 
2155     if (!UseHeavyMonitors) {
2156       // get address of the stack lock
2157       __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2158       //  get old displaced header
2159       __ ldr(old_hdr, Address(r0, 0));
2160 
2161       // Atomic swap old header if oop still contains the stack lock
2162       Label count;
2163       __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, count, &slow_path_unlock);
2164       __ bind(count);
2165       __ decrement(Address(rthread, JavaThread::held_monitor_count_offset()));
2166     } else {
2167       __ b(slow_path_unlock);
2168     }
2169 
2170     // slow path re-enters here
2171     __ bind(unlock_done);
2172     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2173       restore_native_result(masm, ret_type, stack_slots);
2174     }
2175 
2176     __ bind(done);
2177   }
2178 
2179   Label dtrace_method_exit, dtrace_method_exit_done;
2180   {
2181     uint64_t offset;
2182     __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset);
2183     __ ldrb(rscratch1, Address(rscratch1, offset));
2184     __ cbnzw(rscratch1, dtrace_method_exit);
2185     __ bind(dtrace_method_exit_done);
2186   }
2187 
2188   __ reset_last_Java_frame(false);
2189 
2190   // Unbox oop result, e.g. JNIHandles::resolve result.
2191   if (is_reference_type(ret_type)) {
2192     __ resolve_jobject(r0, r1, r2);
2193   }
2194 
2195   if (CheckJNICalls) {
2196     // clear_pending_jni_exception_check
2197     __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
2198   }
2199 
2200   // reset handle block
2201   __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
2202   __ str(zr, Address(r2, JNIHandleBlock::top_offset_in_bytes()));
2203 
2204   __ leave();
2205 
2206   // Any exception pending?
2207   __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2208   __ cbnz(rscratch1, exception_pending);
2209 
2210   // We're done
2211   __ ret(lr);
2212 
2213   // Unexpected paths are out of line and go here
2214 
2215   // forward the exception
2216   __ bind(exception_pending);
2217 
2218   // and forward the exception
2219   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2220 
2221   // Slow path locking & unlocking
2222   if (method->is_synchronized()) {
2223 
2224     __ block_comment("Slow path lock {");
2225     __ bind(slow_path_lock);
2226 
2227     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2228     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2229 
2230     // protect the args we've loaded
2231     save_args(masm, total_c_args, c_arg, out_regs);
2232 
2233     __ mov(c_rarg0, obj_reg);
2234     __ mov(c_rarg1, lock_reg);
2235     __ mov(c_rarg2, rthread);
2236 
2237     // Not a leaf but we have last_Java_frame setup as we want
2238     __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2239     restore_args(masm, total_c_args, c_arg, out_regs);
2240 
2241 #ifdef ASSERT
2242     { Label L;
2243       __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2244       __ cbz(rscratch1, L);
2245       __ stop("no pending exception allowed on exit from monitorenter");
2246       __ bind(L);
2247     }
2248 #endif
2249     __ b(lock_done);
2250 
2251     __ block_comment("} Slow path lock");
2252 
2253     __ block_comment("Slow path unlock {");
2254     __ bind(slow_path_unlock);
2255 
2256     // If we haven't already saved the native result we must save it now as xmm registers
2257     // are still exposed.
2258 
2259     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2260       save_native_result(masm, ret_type, stack_slots);
2261     }
2262 
2263     __ mov(c_rarg2, rthread);
2264     __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
2265     __ mov(c_rarg0, obj_reg);
2266 
2267     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2268     // NOTE that obj_reg == r19 currently
2269     __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2270     __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2271 
2272     __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
2273 
2274 #ifdef ASSERT
2275     {
2276       Label L;
2277       __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2278       __ cbz(rscratch1, L);
2279       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2280       __ bind(L);
2281     }
2282 #endif /* ASSERT */
2283 
2284     __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
2285 
2286     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2287       restore_native_result(masm, ret_type, stack_slots);
2288     }
2289     __ b(unlock_done);
2290 
2291     __ block_comment("} Slow path unlock");
2292 
2293   } // synchronized
2294 
2295   // SLOW PATH Reguard the stack if needed
2296 
2297   __ bind(reguard);
2298   save_native_result(masm, ret_type, stack_slots);
2299   __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2300   restore_native_result(masm, ret_type, stack_slots);
2301   // and continue
2302   __ b(reguard_done);
2303 
2304   // SLOW PATH safepoint
2305   {
2306     __ block_comment("safepoint {");
2307     __ bind(safepoint_in_progress);
2308 
2309     // Don't use call_VM as it will see a possible pending exception and forward it
2310     // and never return here preventing us from clearing _last_native_pc down below.
2311     //
2312     save_native_result(masm, ret_type, stack_slots);
2313     __ mov(c_rarg0, rthread);
2314 #ifndef PRODUCT
2315   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2316 #endif
2317     __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2318     __ blr(rscratch1);
2319 
2320     // Restore any method result value
2321     restore_native_result(masm, ret_type, stack_slots);
2322 
2323     __ b(safepoint_in_progress_done);
2324     __ block_comment("} safepoint");
2325   }
2326 
2327   // SLOW PATH dtrace support
2328   {
2329     __ block_comment("dtrace entry {");
2330     __ bind(dtrace_method_entry);
2331 
2332     // We have all of the arguments setup at this point. We must not touch any register
2333     // argument registers at this point (what if we save/restore them there are no oop?
2334 
2335     save_args(masm, total_c_args, c_arg, out_regs);
2336     __ mov_metadata(c_rarg1, method());
2337     __ call_VM_leaf(
2338       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2339       rthread, c_rarg1);
2340     restore_args(masm, total_c_args, c_arg, out_regs);
2341     __ b(dtrace_method_entry_done);
2342     __ block_comment("} dtrace entry");
2343   }
2344 
2345   {
2346     __ block_comment("dtrace exit {");
2347     __ bind(dtrace_method_exit);
2348     save_native_result(masm, ret_type, stack_slots);
2349     __ mov_metadata(c_rarg1, method());
2350     __ call_VM_leaf(
2351          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2352          rthread, c_rarg1);
2353     restore_native_result(masm, ret_type, stack_slots);
2354     __ b(dtrace_method_exit_done);
2355     __ block_comment("} dtrace exit");
2356   }
2357 
2358 
2359   __ flush();
2360 
2361   nmethod *nm = nmethod::new_native_nmethod(method,
2362                                             compile_id,
2363                                             masm->code(),
2364                                             vep_offset,
2365                                             frame_complete,
2366                                             stack_slots / VMRegImpl::slots_per_word,
2367                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2368                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2369                                             oop_maps);
2370 
2371   return nm;
2372 }
2373 
2374 // this function returns the adjust size (in number of words) to a c2i adapter
2375 // activation for use during deoptimization
2376 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2377   assert(callee_locals >= callee_parameters,
2378           "test and remove; got more parms than locals");
2379   if (callee_locals < callee_parameters)
2380     return 0;                   // No adjustment for negative locals
2381   int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2382   // diff is counted in stack words
2383   return align_up(diff, 2);
2384 }
2385 
2386 
2387 //------------------------------generate_deopt_blob----------------------------
2388 void SharedRuntime::generate_deopt_blob() {
2389   // Allocate space for the code
2390   ResourceMark rm;
2391   // Setup code generation tools
2392   int pad = 0;
2393 #if INCLUDE_JVMCI
2394   if (EnableJVMCI) {
2395     pad += 512; // Increase the buffer size when compiling for JVMCI
2396   }
2397 #endif
2398   CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2399   MacroAssembler* masm = new MacroAssembler(&buffer);
2400   int frame_size_in_words;
2401   OopMap* map = NULL;
2402   OopMapSet *oop_maps = new OopMapSet();
2403   RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2404 
2405   // -------------
2406   // This code enters when returning to a de-optimized nmethod.  A return
2407   // address has been pushed on the stack, and return values are in
2408   // registers.
2409   // If we are doing a normal deopt then we were called from the patched
2410   // nmethod from the point we returned to the nmethod. So the return
2411   // address on the stack is wrong by NativeCall::instruction_size
2412   // We will adjust the value so it looks like we have the original return
2413   // address on the stack (like when we eagerly deoptimized).
2414   // In the case of an exception pending when deoptimizing, we enter
2415   // with a return address on the stack that points after the call we patched
2416   // into the exception handler. We have the following register state from,
2417   // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2418   //    r0: exception oop
2419   //    r19: exception handler
2420   //    r3: throwing pc
2421   // So in this case we simply jam r3 into the useless return address and
2422   // the stack looks just like we want.
2423   //
2424   // At this point we need to de-opt.  We save the argument return
2425   // registers.  We call the first C routine, fetch_unroll_info().  This
2426   // routine captures the return values and returns a structure which
2427   // describes the current frame size and the sizes of all replacement frames.
2428   // The current frame is compiled code and may contain many inlined
2429   // functions, each with their own JVM state.  We pop the current frame, then
2430   // push all the new frames.  Then we call the C routine unpack_frames() to
2431   // populate these frames.  Finally unpack_frames() returns us the new target
2432   // address.  Notice that callee-save registers are BLOWN here; they have
2433   // already been captured in the vframeArray at the time the return PC was
2434   // patched.
2435   address start = __ pc();
2436   Label cont;
2437 
2438   // Prolog for non exception case!
2439 
2440   // Save everything in sight.
2441   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2442 
2443   // Normal deoptimization.  Save exec mode for unpack_frames.
2444   __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2445   __ b(cont);
2446 
2447   int reexecute_offset = __ pc() - start;
2448 #if INCLUDE_JVMCI && !defined(COMPILER1)
2449   if (EnableJVMCI && UseJVMCICompiler) {
2450     // JVMCI does not use this kind of deoptimization
2451     __ should_not_reach_here();
2452   }
2453 #endif
2454 
2455   // Reexecute case
2456   // return address is the pc describes what bci to do re-execute at
2457 
2458   // No need to update map as each call to save_live_registers will produce identical oopmap
2459   (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2460 
2461   __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2462   __ b(cont);
2463 
2464 #if INCLUDE_JVMCI
2465   Label after_fetch_unroll_info_call;
2466   int implicit_exception_uncommon_trap_offset = 0;
2467   int uncommon_trap_offset = 0;
2468 
2469   if (EnableJVMCI) {
2470     implicit_exception_uncommon_trap_offset = __ pc() - start;
2471 
2472     __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2473     __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2474 
2475     uncommon_trap_offset = __ pc() - start;
2476 
2477     // Save everything in sight.
2478     reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2479     // fetch_unroll_info needs to call last_java_frame()
2480     Label retaddr;
2481     __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2482 
2483     __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2484     __ movw(rscratch1, -1);
2485     __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2486 
2487     __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2488     __ mov(c_rarg0, rthread);
2489     __ movw(c_rarg2, rcpool); // exec mode
2490     __ lea(rscratch1,
2491            RuntimeAddress(CAST_FROM_FN_PTR(address,
2492                                            Deoptimization::uncommon_trap)));
2493     __ blr(rscratch1);
2494     __ bind(retaddr);
2495     oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2496 
2497     __ reset_last_Java_frame(false);
2498 
2499     __ b(after_fetch_unroll_info_call);
2500   } // EnableJVMCI
2501 #endif // INCLUDE_JVMCI
2502 
2503   int exception_offset = __ pc() - start;
2504 
2505   // Prolog for exception case
2506 
2507   // all registers are dead at this entry point, except for r0, and
2508   // r3 which contain the exception oop and exception pc
2509   // respectively.  Set them in TLS and fall thru to the
2510   // unpack_with_exception_in_tls entry point.
2511 
2512   __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2513   __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2514 
2515   int exception_in_tls_offset = __ pc() - start;
2516 
2517   // new implementation because exception oop is now passed in JavaThread
2518 
2519   // Prolog for exception case
2520   // All registers must be preserved because they might be used by LinearScan
2521   // Exceptiop oop and throwing PC are passed in JavaThread
2522   // tos: stack at point of call to method that threw the exception (i.e. only
2523   // args are on the stack, no return address)
2524 
2525   // The return address pushed by save_live_registers will be patched
2526   // later with the throwing pc. The correct value is not available
2527   // now because loading it from memory would destroy registers.
2528 
2529   // NB: The SP at this point must be the SP of the method that is
2530   // being deoptimized.  Deoptimization assumes that the frame created
2531   // here by save_live_registers is immediately below the method's SP.
2532   // This is a somewhat fragile mechanism.
2533 
2534   // Save everything in sight.
2535   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2536 
2537   // Now it is safe to overwrite any register
2538 
2539   // Deopt during an exception.  Save exec mode for unpack_frames.
2540   __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2541 
2542   // load throwing pc from JavaThread and patch it as the return address
2543   // of the current frame. Then clear the field in JavaThread
2544   __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2545   __ protect_return_address(r3, rscratch1);
2546   __ str(r3, Address(rfp, wordSize));
2547   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2548 
2549 #ifdef ASSERT
2550   // verify that there is really an exception oop in JavaThread
2551   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2552   __ verify_oop(r0);
2553 
2554   // verify that there is no pending exception
2555   Label no_pending_exception;
2556   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2557   __ cbz(rscratch1, no_pending_exception);
2558   __ stop("must not have pending exception here");
2559   __ bind(no_pending_exception);
2560 #endif
2561 
2562   __ bind(cont);
2563 
2564   // Call C code.  Need thread and this frame, but NOT official VM entry
2565   // crud.  We cannot block on this call, no GC can happen.
2566   //
2567   // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2568 
2569   // fetch_unroll_info needs to call last_java_frame().
2570 
2571   Label retaddr;
2572   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2573 #ifdef ASSERT0
2574   { Label L;
2575     __ ldr(rscratch1, Address(rthread,
2576                               JavaThread::last_Java_fp_offset()));
2577     __ cbz(rscratch1, L);
2578     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2579     __ bind(L);
2580   }
2581 #endif // ASSERT
2582   __ mov(c_rarg0, rthread);
2583   __ mov(c_rarg1, rcpool);
2584   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2585   __ blr(rscratch1);
2586   __ bind(retaddr);
2587 
2588   // Need to have an oopmap that tells fetch_unroll_info where to
2589   // find any register it might need.
2590   oop_maps->add_gc_map(__ pc() - start, map);
2591 
2592   __ reset_last_Java_frame(false);
2593 
2594 #if INCLUDE_JVMCI
2595   if (EnableJVMCI) {
2596     __ bind(after_fetch_unroll_info_call);
2597   }
2598 #endif
2599 
2600   // Load UnrollBlock* into r5
2601   __ mov(r5, r0);
2602 
2603   __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2604    Label noException;
2605   __ cmpw(rcpool, Deoptimization::Unpack_exception);   // Was exception pending?
2606   __ br(Assembler::NE, noException);
2607   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2608   // QQQ this is useless it was NULL above
2609   __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2610   __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2611   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2612 
2613   __ verify_oop(r0);
2614 
2615   // Overwrite the result registers with the exception results.
2616   __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2617   // I think this is useless
2618   // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2619 
2620   __ bind(noException);
2621 
2622   // Only register save data is on the stack.
2623   // Now restore the result registers.  Everything else is either dead
2624   // or captured in the vframeArray.
2625 
2626   // Restore fp result register
2627   __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2628   // Restore integer result register
2629   __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2630 
2631   // Pop all of the register save area off the stack
2632   __ add(sp, sp, frame_size_in_words * wordSize);
2633 
2634   // All of the register save area has been popped of the stack. Only the
2635   // return address remains.
2636 
2637   // Pop all the frames we must move/replace.
2638   //
2639   // Frame picture (youngest to oldest)
2640   // 1: self-frame (no frame link)
2641   // 2: deopting frame  (no frame link)
2642   // 3: caller of deopting frame (could be compiled/interpreted).
2643   //
2644   // Note: by leaving the return address of self-frame on the stack
2645   // and using the size of frame 2 to adjust the stack
2646   // when we are done the return to frame 3 will still be on the stack.
2647 
2648   // Pop deoptimized frame
2649   __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2650   __ sub(r2, r2, 2 * wordSize);
2651   __ add(sp, sp, r2);
2652   __ ldp(rfp, lr, __ post(sp, 2 * wordSize));
2653   __ authenticate_return_address();
2654   // LR should now be the return address to the caller (3)
2655 
2656 #ifdef ASSERT
2657   // Compilers generate code that bang the stack by as much as the
2658   // interpreter would need. So this stack banging should never
2659   // trigger a fault. Verify that it does not on non product builds.
2660   __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2661   __ bang_stack_size(r19, r2);
2662 #endif
2663   // Load address of array of frame pcs into r2
2664   __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2665 
2666   // Trash the old pc
2667   // __ addptr(sp, wordSize);  FIXME ????
2668 
2669   // Load address of array of frame sizes into r4
2670   __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2671 
2672   // Load counter into r3
2673   __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2674 
2675   // Now adjust the caller's stack to make up for the extra locals
2676   // but record the original sp so that we can save it in the skeletal interpreter
2677   // frame and the stack walking of interpreter_sender will get the unextended sp
2678   // value and not the "real" sp value.
2679 
2680   const Register sender_sp = r6;
2681 
2682   __ mov(sender_sp, sp);
2683   __ ldrw(r19, Address(r5,
2684                        Deoptimization::UnrollBlock::
2685                        caller_adjustment_offset_in_bytes()));
2686   __ sub(sp, sp, r19);
2687 
2688   // Push interpreter frames in a loop
2689   __ mov(rscratch1, (uint64_t)0xDEADDEAD);        // Make a recognizable pattern
2690   __ mov(rscratch2, rscratch1);
2691   Label loop;
2692   __ bind(loop);
2693   __ ldr(r19, Address(__ post(r4, wordSize)));          // Load frame size
2694   __ sub(r19, r19, 2*wordSize);           // We'll push pc and fp by hand
2695   __ ldr(lr, Address(__ post(r2, wordSize)));  // Load pc
2696   __ enter();                           // Save old & set new fp
2697   __ sub(sp, sp, r19);                  // Prolog
2698   // This value is corrected by layout_activation_impl
2699   __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2700   __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2701   __ mov(sender_sp, sp);               // Pass sender_sp to next frame
2702   __ sub(r3, r3, 1);                   // Decrement counter
2703   __ cbnz(r3, loop);
2704 
2705     // Re-push self-frame
2706   __ ldr(lr, Address(r2));
2707   __ enter();
2708 
2709   // Allocate a full sized register save area.  We subtract 2 because
2710   // enter() just pushed 2 words
2711   __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2712 
2713   // Restore frame locals after moving the frame
2714   __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2715   __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2716 
2717   // Call C code.  Need thread but NOT official VM entry
2718   // crud.  We cannot block on this call, no GC can happen.  Call should
2719   // restore return values to their stack-slots with the new SP.
2720   //
2721   // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2722 
2723   // Use rfp because the frames look interpreted now
2724   // Don't need the precise return PC here, just precise enough to point into this code blob.
2725   address the_pc = __ pc();
2726   __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2727 
2728   __ mov(c_rarg0, rthread);
2729   __ movw(c_rarg1, rcpool); // second arg: exec_mode
2730   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2731   __ blr(rscratch1);
2732 
2733   // Set an oopmap for the call site
2734   // Use the same PC we used for the last java frame
2735   oop_maps->add_gc_map(the_pc - start,
2736                        new OopMap( frame_size_in_words, 0 ));
2737 
2738   // Clear fp AND pc
2739   __ reset_last_Java_frame(true);
2740 
2741   // Collect return values
2742   __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2743   __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2744   // I think this is useless (throwing pc?)
2745   // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2746 
2747   // Pop self-frame.
2748   __ leave();                           // Epilog
2749 
2750   // Jump to interpreter
2751   __ ret(lr);
2752 
2753   // Make sure all code is generated
2754   masm->flush();
2755 
2756   _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2757   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2758 #if INCLUDE_JVMCI
2759   if (EnableJVMCI) {
2760     _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2761     _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2762   }
2763 #endif
2764 }
2765 
2766 // Number of stack slots between incoming argument block and the start of
2767 // a new frame.  The PROLOG must add this many slots to the stack.  The
2768 // EPILOG must remove this many slots. aarch64 needs two slots for
2769 // return address and fp.
2770 // TODO think this is correct but check
2771 uint SharedRuntime::in_preserve_stack_slots() {
2772   return 4;
2773 }
2774 
2775 uint SharedRuntime::out_preserve_stack_slots() {
2776   return 0;
2777 }
2778 
2779 #ifdef COMPILER2
2780 //------------------------------generate_uncommon_trap_blob--------------------
2781 void SharedRuntime::generate_uncommon_trap_blob() {
2782   // Allocate space for the code
2783   ResourceMark rm;
2784   // Setup code generation tools
2785   CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
2786   MacroAssembler* masm = new MacroAssembler(&buffer);
2787 
2788   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
2789 
2790   address start = __ pc();
2791 
2792   // Push self-frame.  We get here with a return address in LR
2793   // and sp should be 16 byte aligned
2794   // push rfp and retaddr by hand
2795   __ protect_return_address();
2796   __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
2797   // we don't expect an arg reg save area
2798 #ifndef PRODUCT
2799   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2800 #endif
2801   // compiler left unloaded_class_index in j_rarg0 move to where the
2802   // runtime expects it.
2803   if (c_rarg1 != j_rarg0) {
2804     __ movw(c_rarg1, j_rarg0);
2805   }
2806 
2807   // we need to set the past SP to the stack pointer of the stub frame
2808   // and the pc to the address where this runtime call will return
2809   // although actually any pc in this code blob will do).
2810   Label retaddr;
2811   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2812 
2813   // Call C code.  Need thread but NOT official VM entry
2814   // crud.  We cannot block on this call, no GC can happen.  Call should
2815   // capture callee-saved registers as well as return values.
2816   // Thread is in rdi already.
2817   //
2818   // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
2819   //
2820   // n.b. 2 gp args, 0 fp args, integral return type
2821 
2822   __ mov(c_rarg0, rthread);
2823   __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap);
2824   __ lea(rscratch1,
2825          RuntimeAddress(CAST_FROM_FN_PTR(address,
2826                                          Deoptimization::uncommon_trap)));
2827   __ blr(rscratch1);
2828   __ bind(retaddr);
2829 
2830   // Set an oopmap for the call site
2831   OopMapSet* oop_maps = new OopMapSet();
2832   OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
2833 
2834   // location of rfp is known implicitly by the frame sender code
2835 
2836   oop_maps->add_gc_map(__ pc() - start, map);
2837 
2838   __ reset_last_Java_frame(false);
2839 
2840   // move UnrollBlock* into r4
2841   __ mov(r4, r0);
2842 
2843 #ifdef ASSERT
2844   { Label L;
2845     __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2846     __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2847     __ br(Assembler::EQ, L);
2848     __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2849     __ bind(L);
2850   }
2851 #endif
2852 
2853   // Pop all the frames we must move/replace.
2854   //
2855   // Frame picture (youngest to oldest)
2856   // 1: self-frame (no frame link)
2857   // 2: deopting frame  (no frame link)
2858   // 3: caller of deopting frame (could be compiled/interpreted).
2859 
2860   // Pop self-frame.  We have no frame, and must rely only on r0 and sp.
2861   __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog!
2862 
2863   // Pop deoptimized frame (int)
2864   __ ldrw(r2, Address(r4,
2865                       Deoptimization::UnrollBlock::
2866                       size_of_deoptimized_frame_offset_in_bytes()));
2867   __ sub(r2, r2, 2 * wordSize);
2868   __ add(sp, sp, r2);
2869   __ ldp(rfp, lr, __ post(sp, 2 * wordSize));
2870   __ authenticate_return_address();
2871   // LR should now be the return address to the caller (3) frame
2872 
2873 #ifdef ASSERT
2874   // Compilers generate code that bang the stack by as much as the
2875   // interpreter would need. So this stack banging should never
2876   // trigger a fault. Verify that it does not on non product builds.
2877   __ ldrw(r1, Address(r4,
2878                       Deoptimization::UnrollBlock::
2879                       total_frame_sizes_offset_in_bytes()));
2880   __ bang_stack_size(r1, r2);
2881 #endif
2882 
2883   // Load address of array of frame pcs into r2 (address*)
2884   __ ldr(r2, Address(r4,
2885                      Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2886 
2887   // Load address of array of frame sizes into r5 (intptr_t*)
2888   __ ldr(r5, Address(r4,
2889                      Deoptimization::UnrollBlock::
2890                      frame_sizes_offset_in_bytes()));
2891 
2892   // Counter
2893   __ ldrw(r3, Address(r4,
2894                       Deoptimization::UnrollBlock::
2895                       number_of_frames_offset_in_bytes())); // (int)
2896 
2897   // Now adjust the caller's stack to make up for the extra locals but
2898   // record the original sp so that we can save it in the skeletal
2899   // interpreter frame and the stack walking of interpreter_sender
2900   // will get the unextended sp value and not the "real" sp value.
2901 
2902   const Register sender_sp = r8;
2903 
2904   __ mov(sender_sp, sp);
2905   __ ldrw(r1, Address(r4,
2906                       Deoptimization::UnrollBlock::
2907                       caller_adjustment_offset_in_bytes())); // (int)
2908   __ sub(sp, sp, r1);
2909 
2910   // Push interpreter frames in a loop
2911   Label loop;
2912   __ bind(loop);
2913   __ ldr(r1, Address(r5, 0));       // Load frame size
2914   __ sub(r1, r1, 2 * wordSize);     // We'll push pc and rfp by hand
2915   __ ldr(lr, Address(r2, 0));       // Save return address
2916   __ enter();                       // and old rfp & set new rfp
2917   __ sub(sp, sp, r1);               // Prolog
2918   __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2919   // This value is corrected by layout_activation_impl
2920   __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2921   __ mov(sender_sp, sp);          // Pass sender_sp to next frame
2922   __ add(r5, r5, wordSize);       // Bump array pointer (sizes)
2923   __ add(r2, r2, wordSize);       // Bump array pointer (pcs)
2924   __ subsw(r3, r3, 1);            // Decrement counter
2925   __ br(Assembler::GT, loop);
2926   __ ldr(lr, Address(r2, 0));     // save final return address
2927   // Re-push self-frame
2928   __ enter();                     // & old rfp & set new rfp
2929 
2930   // Use rfp because the frames look interpreted now
2931   // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
2932   // Don't need the precise return PC here, just precise enough to point into this code blob.
2933   address the_pc = __ pc();
2934   __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2935 
2936   // Call C code.  Need thread but NOT official VM entry
2937   // crud.  We cannot block on this call, no GC can happen.  Call should
2938   // restore return values to their stack-slots with the new SP.
2939   // Thread is in rdi already.
2940   //
2941   // BasicType unpack_frames(JavaThread* thread, int exec_mode);
2942   //
2943   // n.b. 2 gp args, 0 fp args, integral return type
2944 
2945   // sp should already be aligned
2946   __ mov(c_rarg0, rthread);
2947   __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap);
2948   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2949   __ blr(rscratch1);
2950 
2951   // Set an oopmap for the call site
2952   // Use the same PC we used for the last java frame
2953   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
2954 
2955   // Clear fp AND pc
2956   __ reset_last_Java_frame(true);
2957 
2958   // Pop self-frame.
2959   __ leave();                 // Epilog
2960 
2961   // Jump to interpreter
2962   __ ret(lr);
2963 
2964   // Make sure all code is generated
2965   masm->flush();
2966 
2967   _uncommon_trap_blob =  UncommonTrapBlob::create(&buffer, oop_maps,
2968                                                  SimpleRuntimeFrame::framesize >> 1);
2969 }
2970 #endif // COMPILER2
2971 
2972 
2973 //------------------------------generate_handler_blob------
2974 //
2975 // Generate a special Compile2Runtime blob that saves all registers,
2976 // and setup oopmap.
2977 //
2978 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2979   ResourceMark rm;
2980   OopMapSet *oop_maps = new OopMapSet();
2981   OopMap* map;
2982 
2983   // Allocate space for the code.  Setup code generation tools.
2984   CodeBuffer buffer("handler_blob", 2048, 1024);
2985   MacroAssembler* masm = new MacroAssembler(&buffer);
2986 
2987   address start   = __ pc();
2988   address call_pc = NULL;
2989   int frame_size_in_words;
2990   bool cause_return = (poll_type == POLL_AT_RETURN);
2991   RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */);
2992 
2993   // When the signal occurred, the LR was either signed and stored on the stack (in which
2994   // case it will be restored from the stack before being used) or unsigned and not stored
2995   // on the stack. Stipping ensures we get the right value.
2996   __ strip_return_address();
2997 
2998   // Save Integer and Float registers.
2999   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
3000 
3001   // The following is basically a call_VM.  However, we need the precise
3002   // address of the call in order to generate an oopmap. Hence, we do all the
3003   // work ourselves.
3004 
3005   Label retaddr;
3006   __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
3007 
3008   // The return address must always be correct so that frame constructor never
3009   // sees an invalid pc.
3010 
3011   if (!cause_return) {
3012     // overwrite the return address pushed by save_live_registers
3013     // Additionally, r20 is a callee-saved register so we can look at
3014     // it later to determine if someone changed the return address for
3015     // us!
3016     __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
3017     __ protect_return_address(r20, rscratch1);
3018     __ str(r20, Address(rfp, wordSize));
3019   }
3020 
3021   // Do the call
3022   __ mov(c_rarg0, rthread);
3023   __ lea(rscratch1, RuntimeAddress(call_ptr));
3024   __ blr(rscratch1);
3025   __ bind(retaddr);
3026 
3027   // Set an oopmap for the call site.  This oopmap will map all
3028   // oop-registers and debug-info registers as callee-saved.  This
3029   // will allow deoptimization at this safepoint to find all possible
3030   // debug-info recordings, as well as let GC find all oops.
3031 
3032   oop_maps->add_gc_map( __ pc() - start, map);
3033 
3034   Label noException;
3035 
3036   __ reset_last_Java_frame(false);
3037 
3038   __ membar(Assembler::LoadLoad | Assembler::LoadStore);
3039 
3040   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
3041   __ cbz(rscratch1, noException);
3042 
3043   // Exception pending
3044 
3045   reg_save.restore_live_registers(masm);
3046 
3047   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3048 
3049   // No exception case
3050   __ bind(noException);
3051 
3052   Label no_adjust, bail;
3053   if (!cause_return) {
3054     // If our stashed return pc was modified by the runtime we avoid touching it
3055     __ ldr(rscratch1, Address(rfp, wordSize));
3056     __ cmp(r20, rscratch1);
3057     __ br(Assembler::NE, no_adjust);
3058     __ authenticate_return_address(r20, rscratch1);
3059 
3060 #ifdef ASSERT
3061     // Verify the correct encoding of the poll we're about to skip.
3062     // See NativeInstruction::is_ldrw_to_zr()
3063     __ ldrw(rscratch1, Address(r20));
3064     __ ubfx(rscratch2, rscratch1, 22, 10);
3065     __ cmpw(rscratch2, 0b1011100101);
3066     __ br(Assembler::NE, bail);
3067     __ ubfx(rscratch2, rscratch1, 0, 5);
3068     __ cmpw(rscratch2, 0b11111);
3069     __ br(Assembler::NE, bail);
3070 #endif
3071     // Adjust return pc forward to step over the safepoint poll instruction
3072     __ add(r20, r20, NativeInstruction::instruction_size);
3073     __ protect_return_address(r20, rscratch1);
3074     __ str(r20, Address(rfp, wordSize));
3075   }
3076 
3077   __ bind(no_adjust);
3078   // Normal exit, restore registers and exit.
3079   reg_save.restore_live_registers(masm);
3080 
3081   __ ret(lr);
3082 
3083 #ifdef ASSERT
3084   __ bind(bail);
3085   __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
3086 #endif
3087 
3088   // Make sure all code is generated
3089   masm->flush();
3090 
3091   // Fill-out other meta info
3092   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3093 }
3094 
3095 //
3096 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3097 //
3098 // Generate a stub that calls into vm to find out the proper destination
3099 // of a java call. All the argument registers are live at this point
3100 // but since this is generic code we don't know what they are and the caller
3101 // must do any gc of the args.
3102 //
3103 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3104   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3105 
3106   // allocate space for the code
3107   ResourceMark rm;
3108 
3109   CodeBuffer buffer(name, 1000, 512);
3110   MacroAssembler* masm                = new MacroAssembler(&buffer);
3111 
3112   int frame_size_in_words;
3113   RegisterSaver reg_save(false /* save_vectors */);
3114 
3115   OopMapSet *oop_maps = new OopMapSet();
3116   OopMap* map = NULL;
3117 
3118   int start = __ offset();
3119 
3120   map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
3121 
3122   int frame_complete = __ offset();
3123 
3124   {
3125     Label retaddr;
3126     __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
3127 
3128     __ mov(c_rarg0, rthread);
3129     __ lea(rscratch1, RuntimeAddress(destination));
3130 
3131     __ blr(rscratch1);
3132     __ bind(retaddr);
3133   }
3134 
3135   // Set an oopmap for the call site.
3136   // We need this not only for callee-saved registers, but also for volatile
3137   // registers that the compiler might be keeping live across a safepoint.
3138 
3139   oop_maps->add_gc_map( __ offset() - start, map);
3140 
3141   // r0 contains the address we are going to jump to assuming no exception got installed
3142 
3143   // clear last_Java_sp
3144   __ reset_last_Java_frame(false);
3145   // check for pending exceptions
3146   Label pending;
3147   __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
3148   __ cbnz(rscratch1, pending);
3149 
3150   // get the returned Method*
3151   __ get_vm_result_2(rmethod, rthread);
3152   __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
3153 
3154   // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
3155   __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
3156   reg_save.restore_live_registers(masm);
3157 
3158   // We are back to the original state on entry and ready to go.
3159 
3160   __ br(rscratch1);
3161 
3162   // Pending exception after the safepoint
3163 
3164   __ bind(pending);
3165 
3166   reg_save.restore_live_registers(masm);
3167 
3168   // exception pending => remove activation and forward to exception handler
3169 
3170   __ str(zr, Address(rthread, JavaThread::vm_result_offset()));
3171 
3172   __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
3173   __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3174 
3175   // -------------
3176   // make sure all code is generated
3177   masm->flush();
3178 
3179   // return the  blob
3180   // frame_size_words or bytes??
3181   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3182 }
3183 
3184 #ifdef COMPILER2
3185 // This is here instead of runtime_aarch64_64.cpp because it uses SimpleRuntimeFrame
3186 //
3187 //------------------------------generate_exception_blob---------------------------
3188 // creates exception blob at the end
3189 // Using exception blob, this code is jumped from a compiled method.
3190 // (see emit_exception_handler in x86_64.ad file)
3191 //
3192 // Given an exception pc at a call we call into the runtime for the
3193 // handler in this method. This handler might merely restore state
3194 // (i.e. callee save registers) unwind the frame and jump to the
3195 // exception handler for the nmethod if there is no Java level handler
3196 // for the nmethod.
3197 //
3198 // This code is entered with a jmp.
3199 //
3200 // Arguments:
3201 //   r0: exception oop
3202 //   r3: exception pc
3203 //
3204 // Results:
3205 //   r0: exception oop
3206 //   r3: exception pc in caller or ???
3207 //   destination: exception handler of caller
3208 //
3209 // Note: the exception pc MUST be at a call (precise debug information)
3210 //       Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved.
3211 //
3212 
3213 void OptoRuntime::generate_exception_blob() {
3214   assert(!OptoRuntime::is_callee_saved_register(R3_num), "");
3215   assert(!OptoRuntime::is_callee_saved_register(R0_num), "");
3216   assert(!OptoRuntime::is_callee_saved_register(R2_num), "");
3217 
3218   assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3219 
3220   // Allocate space for the code
3221   ResourceMark rm;
3222   // Setup code generation tools
3223   CodeBuffer buffer("exception_blob", 2048, 1024);
3224   MacroAssembler* masm = new MacroAssembler(&buffer);
3225 
3226   // TODO check various assumptions made here
3227   //
3228   // make sure we do so before running this
3229 
3230   address start = __ pc();
3231 
3232   // push rfp and retaddr by hand
3233   // Exception pc is 'return address' for stack walker
3234   __ protect_return_address();
3235   __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize)));
3236   // there are no callee save registers and we don't expect an
3237   // arg reg save area
3238 #ifndef PRODUCT
3239   assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
3240 #endif
3241   // Store exception in Thread object. We cannot pass any arguments to the
3242   // handle_exception call, since we do not want to make any assumption
3243   // about the size of the frame where the exception happened in.
3244   __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
3245   __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
3246 
3247   // This call does all the hard work.  It checks if an exception handler
3248   // exists in the method.
3249   // If so, it returns the handler address.
3250   // If not, it prepares for stack-unwinding, restoring the callee-save
3251   // registers of the frame being removed.
3252   //
3253   // address OptoRuntime::handle_exception_C(JavaThread* thread)
3254   //
3255   // n.b. 1 gp arg, 0 fp args, integral return type
3256 
3257   // the stack should always be aligned
3258   address the_pc = __ pc();
3259   __ set_last_Java_frame(sp, noreg, the_pc, rscratch1);
3260   __ mov(c_rarg0, rthread);
3261   __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3262   __ blr(rscratch1);
3263   // handle_exception_C is a special VM call which does not require an explicit
3264   // instruction sync afterwards.
3265 
3266   // May jump to SVE compiled code
3267   __ reinitialize_ptrue();
3268 
3269   // Set an oopmap for the call site.  This oopmap will only be used if we
3270   // are unwinding the stack.  Hence, all locations will be dead.
3271   // Callee-saved registers will be the same as the frame above (i.e.,
3272   // handle_exception_stub), since they were restored when we got the
3273   // exception.
3274 
3275   OopMapSet* oop_maps = new OopMapSet();
3276 
3277   oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3278 
3279   __ reset_last_Java_frame(false);
3280 
3281   // Restore callee-saved registers
3282 
3283   // rfp is an implicitly saved callee saved register (i.e. the calling
3284   // convention will save restore it in prolog/epilog) Other than that
3285   // there are no callee save registers now that adapter frames are gone.
3286   // and we dont' expect an arg reg save area
3287   __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize)));
3288   __ authenticate_return_address(r3);
3289 
3290   // r0: exception handler
3291 
3292   // We have a handler in r0 (could be deopt blob).
3293   __ mov(r8, r0);
3294 
3295   // Get the exception oop
3296   __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
3297   // Get the exception pc in case we are deoptimized
3298   __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset()));
3299 #ifdef ASSERT
3300   __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset()));
3301   __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
3302 #endif
3303   // Clear the exception oop so GC no longer processes it as a root.
3304   __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
3305 
3306   // r0: exception oop
3307   // r8:  exception handler
3308   // r4: exception pc
3309   // Jump to handler
3310 
3311   __ br(r8);
3312 
3313   // Make sure all code is generated
3314   masm->flush();
3315 
3316   // Set exception blob
3317   _exception_blob =  ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3318 }
3319 
3320 #endif // COMPILER2
3321 
3322 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) {
3323   BufferBlob* buf = BufferBlob::create("inline types pack/unpack", 16 * K);
3324   CodeBuffer buffer(buf);
3325   short buffer_locs[20];
3326   buffer.insts()->initialize_shared_locs((relocInfo*)buffer_locs,
3327                                          sizeof(buffer_locs)/sizeof(relocInfo));
3328 
3329   MacroAssembler _masm(&buffer);
3330   MacroAssembler* masm = &_masm;
3331 
3332   const Array<SigEntry>* sig_vk = vk->extended_sig();
3333   const Array<VMRegPair>* regs = vk->return_regs();
3334 
3335   int pack_fields_jobject_off = __ offset();
3336   // Resolve pre-allocated buffer from JNI handle.
3337   // We cannot do this in generate_call_stub() because it requires GC code to be initialized.
3338   Register Rresult = r14;  // See StubGenerator::generate_call_stub().
3339   __ ldr(r0, Address(Rresult));
3340   __ resolve_jobject(r0 /* value */,
3341                      rthread /* thread */,
3342                      r12 /* tmp */);
3343   __ str(r0, Address(Rresult));
3344 
3345   int pack_fields_off = __ offset();
3346 
3347   int j = 1;
3348   for (int i = 0; i < sig_vk->length(); i++) {
3349     BasicType bt = sig_vk->at(i)._bt;
3350     if (bt == T_PRIMITIVE_OBJECT) {
3351       continue;
3352     }
3353     if (bt == T_VOID) {
3354       if (sig_vk->at(i-1)._bt == T_LONG ||
3355           sig_vk->at(i-1)._bt == T_DOUBLE) {
3356         j++;
3357       }
3358       continue;
3359     }
3360     int off = sig_vk->at(i)._offset;
3361     VMRegPair pair = regs->at(j);
3362     VMReg r_1 = pair.first();
3363     VMReg r_2 = pair.second();
3364     Address to(r0, off);
3365     if (bt == T_FLOAT) {
3366       __ strs(r_1->as_FloatRegister(), to);
3367     } else if (bt == T_DOUBLE) {
3368       __ strd(r_1->as_FloatRegister(), to);
3369     } else if (bt == T_OBJECT || bt == T_ARRAY) {
3370       Register val = r_1->as_Register();
3371       assert_different_registers(r0, val);
3372       // We don't need barriers because the destination is a newly allocated object.
3373       // Also, we cannot use store_heap_oop(to, val) because it uses r8 as tmp.
3374       if (UseCompressedOops) {
3375         __ encode_heap_oop(val);
3376         __ str(val, to);
3377       } else {
3378         __ str(val, to);
3379       }
3380     } else {
3381       assert(is_java_primitive(bt), "unexpected basic type");
3382       assert_different_registers(r0, r_1->as_Register());
3383       size_t size_in_bytes = type2aelembytes(bt);
3384       __ store_sized_value(to, r_1->as_Register(), size_in_bytes);
3385     }
3386     j++;
3387   }
3388   assert(j == regs->length(), "missed a field?");
3389 
3390   __ ret(lr);
3391 
3392   int unpack_fields_off = __ offset();
3393 
3394   Label skip;
3395   __ cbz(r0, skip);
3396 
3397   j = 1;
3398   for (int i = 0; i < sig_vk->length(); i++) {
3399     BasicType bt = sig_vk->at(i)._bt;
3400     if (bt == T_PRIMITIVE_OBJECT) {
3401       continue;
3402     }
3403     if (bt == T_VOID) {
3404       if (sig_vk->at(i-1)._bt == T_LONG ||
3405           sig_vk->at(i-1)._bt == T_DOUBLE) {
3406         j++;
3407       }
3408       continue;
3409     }
3410     int off = sig_vk->at(i)._offset;
3411     assert(off > 0, "offset in object should be positive");
3412     VMRegPair pair = regs->at(j);
3413     VMReg r_1 = pair.first();
3414     VMReg r_2 = pair.second();
3415     Address from(r0, off);
3416     if (bt == T_FLOAT) {
3417       __ ldrs(r_1->as_FloatRegister(), from);
3418     } else if (bt == T_DOUBLE) {
3419       __ ldrd(r_1->as_FloatRegister(), from);
3420     } else if (bt == T_OBJECT || bt == T_ARRAY) {
3421       assert_different_registers(r0, r_1->as_Register());
3422       __ load_heap_oop(r_1->as_Register(), from);
3423     } else {
3424       assert(is_java_primitive(bt), "unexpected basic type");
3425       assert_different_registers(r0, r_1->as_Register());
3426 
3427       size_t size_in_bytes = type2aelembytes(bt);
3428       __ load_sized_value(r_1->as_Register(), from, size_in_bytes, bt != T_CHAR && bt != T_BOOLEAN);
3429     }
3430     j++;
3431   }
3432   assert(j == regs->length(), "missed a field?");
3433 
3434   __ bind(skip);
3435 
3436   __ ret(lr);
3437 
3438   __ flush();
3439 
3440   return BufferedInlineTypeBlob::create(&buffer, pack_fields_off, pack_fields_jobject_off, unpack_fields_off);
3441 }