1 /* 2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved. 4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved. 5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 6 * 7 * This code is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 only, as 9 * published by the Free Software Foundation. 10 * 11 * This code is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * version 2 for more details (a copy is included in the LICENSE file that 15 * accompanied this code). 16 * 17 * You should have received a copy of the GNU General Public License version 18 * 2 along with this work; if not, write to the Free Software Foundation, 19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 20 * 21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 22 * or visit www.oracle.com if you need additional information or have any 23 * questions. 24 * 25 */ 26 27 #include "precompiled.hpp" 28 #include "asm/macroAssembler.hpp" 29 #include "asm/macroAssembler.inline.hpp" 30 #include "classfile/symbolTable.hpp" 31 #include "code/codeCache.hpp" 32 #include "code/compiledIC.hpp" 33 #include "code/debugInfoRec.hpp" 34 #include "code/vtableStubs.hpp" 35 #include "compiler/oopMap.hpp" 36 #include "gc/shared/barrierSetAssembler.hpp" 37 #include "interpreter/interpreter.hpp" 38 #include "interpreter/interp_masm.hpp" 39 #include "logging/log.hpp" 40 #include "memory/resourceArea.hpp" 41 #include "nativeInst_aarch64.hpp" 42 #include "oops/klass.inline.hpp" 43 #include "oops/method.inline.hpp" 44 #include "prims/methodHandles.hpp" 45 #include "runtime/continuation.hpp" 46 #include "runtime/continuationEntry.inline.hpp" 47 #include "runtime/globals.hpp" 48 #include "runtime/jniHandles.hpp" 49 #include "runtime/safepointMechanism.hpp" 50 #include "runtime/sharedRuntime.hpp" 51 #include "runtime/signature.hpp" 52 #include "runtime/stubRoutines.hpp" 53 #include "runtime/timerTrace.hpp" 54 #include "runtime/vframeArray.hpp" 55 #include "utilities/align.hpp" 56 #include "utilities/formatBuffer.hpp" 57 #include "vmreg_aarch64.inline.hpp" 58 #ifdef COMPILER1 59 #include "c1/c1_Runtime1.hpp" 60 #endif 61 #ifdef COMPILER2 62 #include "adfiles/ad_aarch64.hpp" 63 #include "opto/runtime.hpp" 64 #endif 65 #if INCLUDE_JVMCI 66 #include "jvmci/jvmciJavaClasses.hpp" 67 #endif 68 69 #define __ masm-> 70 71 #ifdef PRODUCT 72 #define BLOCK_COMMENT(str) /* nothing */ 73 #else 74 #define BLOCK_COMMENT(str) __ block_comment(str) 75 #endif 76 77 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 78 79 // FIXME -- this is used by C1 80 class RegisterSaver { 81 const bool _save_vectors; 82 public: 83 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {} 84 85 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); 86 void restore_live_registers(MacroAssembler* masm); 87 88 // Offsets into the register save area 89 // Used by deoptimization when it is managing result register 90 // values on its own 91 92 int reg_offset_in_bytes(Register r); 93 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); } 94 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); } 95 int v0_offset_in_bytes(); 96 97 // Total stack size in bytes for saving sve predicate registers. 98 int total_sve_predicate_in_bytes(); 99 100 // Capture info about frame layout 101 // Note this is only correct when not saving full vectors. 102 enum layout { 103 fpu_state_off = 0, 104 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1, 105 // The frame sender code expects that rfp will be in 106 // the "natural" place and will override any oopMap 107 // setting for it. We must therefore force the layout 108 // so that it agrees with the frame sender code. 109 r0_off = fpu_state_off + FPUStateSizeInWords, 110 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register, 111 return_off = rfp_off + Register::max_slots_per_register, // slot for return address 112 reg_save_size = return_off + Register::max_slots_per_register}; 113 114 }; 115 116 int RegisterSaver::reg_offset_in_bytes(Register r) { 117 // The integer registers are located above the floating point 118 // registers in the stack frame pushed by save_live_registers() so the 119 // offset depends on whether we are saving full vectors, and whether 120 // those vectors are NEON or SVE. 121 122 int slots_per_vect = FloatRegister::save_slots_per_register; 123 124 #if COMPILER2_OR_JVMCI 125 if (_save_vectors) { 126 slots_per_vect = FloatRegister::slots_per_neon_register; 127 128 #ifdef COMPILER2 129 if (Matcher::supports_scalable_vector()) { 130 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT); 131 } 132 #endif 133 } 134 #endif 135 136 int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt; 137 return r0_offset + r->encoding() * wordSize; 138 } 139 140 int RegisterSaver::v0_offset_in_bytes() { 141 // The floating point registers are located above the predicate registers if 142 // they are present in the stack frame pushed by save_live_registers(). So the 143 // offset depends on the saved total predicate vectors in the stack frame. 144 return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt; 145 } 146 147 int RegisterSaver::total_sve_predicate_in_bytes() { 148 #ifdef COMPILER2 149 if (_save_vectors && Matcher::supports_scalable_vector()) { 150 return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) * 151 PRegister::number_of_registers; 152 } 153 #endif 154 return 0; 155 } 156 157 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { 158 bool use_sve = false; 159 int sve_vector_size_in_bytes = 0; 160 int sve_vector_size_in_slots = 0; 161 int sve_predicate_size_in_slots = 0; 162 int total_predicate_in_bytes = total_sve_predicate_in_bytes(); 163 int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size; 164 165 #ifdef COMPILER2 166 use_sve = Matcher::supports_scalable_vector(); 167 if (use_sve) { 168 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE); 169 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT); 170 sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots(); 171 } 172 #endif 173 174 #if COMPILER2_OR_JVMCI 175 if (_save_vectors) { 176 int extra_save_slots_per_register = 0; 177 // Save upper half of vector registers 178 if (use_sve) { 179 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register; 180 } else { 181 extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register; 182 } 183 int extra_vector_bytes = extra_save_slots_per_register * 184 VMRegImpl::stack_slot_size * 185 FloatRegister::number_of_registers; 186 additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize); 187 } 188 #else 189 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI"); 190 #endif 191 192 int frame_size_in_bytes = align_up(additional_frame_words * wordSize + 193 reg_save_size * BytesPerInt, 16); 194 // OopMap frame size is in compiler stack slots (jint's) not bytes or words 195 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; 196 // The caller will allocate additional_frame_words 197 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt; 198 // CodeBlob frame size is in words. 199 int frame_size_in_words = frame_size_in_bytes / wordSize; 200 *total_frame_words = frame_size_in_words; 201 202 // Save Integer and Float registers. 203 __ enter(); 204 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes); 205 206 // Set an oopmap for the call site. This oopmap will map all 207 // oop-registers and debug-info registers as callee-saved. This 208 // will allow deoptimization at this safepoint to find all possible 209 // debug-info recordings, as well as let GC find all oops. 210 211 OopMapSet *oop_maps = new OopMapSet(); 212 OopMap* oop_map = new OopMap(frame_size_in_slots, 0); 213 214 for (int i = 0; i < Register::number_of_registers; i++) { 215 Register r = as_Register(i); 216 if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) { 217 // SP offsets are in 4-byte words. 218 // Register slots are 8 bytes wide, 32 floating-point registers. 219 int sp_offset = Register::max_slots_per_register * i + 220 FloatRegister::save_slots_per_register * FloatRegister::number_of_registers; 221 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg()); 222 } 223 } 224 225 for (int i = 0; i < FloatRegister::number_of_registers; i++) { 226 FloatRegister r = as_FloatRegister(i); 227 int sp_offset = 0; 228 if (_save_vectors) { 229 sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) : 230 (FloatRegister::slots_per_neon_register * i); 231 } else { 232 sp_offset = FloatRegister::save_slots_per_register * i; 233 } 234 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg()); 235 } 236 237 return oop_map; 238 } 239 240 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { 241 #ifdef COMPILER2 242 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(), 243 Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes()); 244 #else 245 #if !INCLUDE_JVMCI 246 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI"); 247 #endif 248 __ pop_CPU_state(_save_vectors); 249 #endif 250 __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize))); 251 __ authenticate_return_address(); 252 } 253 254 // Is vector's size (in bytes) bigger than a size saved by default? 255 // 8 bytes vector registers are saved by default on AArch64. 256 // The SVE supported min vector size is 8 bytes and we need to save 257 // predicate registers when the vector size is 8 bytes as well. 258 bool SharedRuntime::is_wide_vector(int size) { 259 return size > 8 || (UseSVE > 0 && size >= 8); 260 } 261 262 // --------------------------------------------------------------------------- 263 // Read the array of BasicTypes from a signature, and compute where the 264 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 265 // quantities. Values less than VMRegImpl::stack0 are registers, those above 266 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 267 // as framesizes are fixed. 268 // VMRegImpl::stack0 refers to the first slot 0(sp). 269 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. 270 // Register up to Register::number_of_registers are the 64-bit 271 // integer registers. 272 273 // Note: the INPUTS in sig_bt are in units of Java argument words, 274 // which are 64-bit. The OUTPUTS are in 32-bit units. 275 276 // The Java calling convention is a "shifted" version of the C ABI. 277 // By skipping the first C ABI register we can call non-static jni 278 // methods with small numbers of arguments without having to shuffle 279 // the arguments at all. Since we control the java ABI we ought to at 280 // least get some advantage out of it. 281 282 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 283 VMRegPair *regs, 284 int total_args_passed) { 285 286 // Create the mapping between argument positions and 287 // registers. 288 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { 289 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7 290 }; 291 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { 292 j_farg0, j_farg1, j_farg2, j_farg3, 293 j_farg4, j_farg5, j_farg6, j_farg7 294 }; 295 296 297 uint int_args = 0; 298 uint fp_args = 0; 299 uint stk_args = 0; 300 301 for (int i = 0; i < total_args_passed; i++) { 302 switch (sig_bt[i]) { 303 case T_BOOLEAN: 304 case T_CHAR: 305 case T_BYTE: 306 case T_SHORT: 307 case T_INT: 308 if (int_args < Argument::n_int_register_parameters_j) { 309 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 310 } else { 311 stk_args = align_up(stk_args, 2); 312 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 313 stk_args += 1; 314 } 315 break; 316 case T_VOID: 317 // halves of T_LONG or T_DOUBLE 318 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 319 regs[i].set_bad(); 320 break; 321 case T_LONG: 322 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 323 // fall through 324 case T_OBJECT: 325 case T_ARRAY: 326 case T_ADDRESS: 327 if (int_args < Argument::n_int_register_parameters_j) { 328 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 329 } else { 330 stk_args = align_up(stk_args, 2); 331 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 332 stk_args += 2; 333 } 334 break; 335 case T_FLOAT: 336 if (fp_args < Argument::n_float_register_parameters_j) { 337 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 338 } else { 339 stk_args = align_up(stk_args, 2); 340 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 341 stk_args += 1; 342 } 343 break; 344 case T_DOUBLE: 345 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 346 if (fp_args < Argument::n_float_register_parameters_j) { 347 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 348 } else { 349 stk_args = align_up(stk_args, 2); 350 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 351 stk_args += 2; 352 } 353 break; 354 default: 355 ShouldNotReachHere(); 356 break; 357 } 358 } 359 360 return stk_args; 361 } 362 363 364 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j; 365 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j; 366 367 int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) { 368 369 // Create the mapping between argument positions and registers. 370 371 static const Register INT_ArgReg[java_return_convention_max_int] = { 372 r0 /* j_rarg7 */, j_rarg6, j_rarg5, j_rarg4, j_rarg3, j_rarg2, j_rarg1, j_rarg0 373 }; 374 375 static const FloatRegister FP_ArgReg[java_return_convention_max_float] = { 376 j_farg0, j_farg1, j_farg2, j_farg3, j_farg4, j_farg5, j_farg6, j_farg7 377 }; 378 379 uint int_args = 0; 380 uint fp_args = 0; 381 382 for (int i = 0; i < total_args_passed; i++) { 383 switch (sig_bt[i]) { 384 case T_BOOLEAN: 385 case T_CHAR: 386 case T_BYTE: 387 case T_SHORT: 388 case T_INT: 389 if (int_args < SharedRuntime::java_return_convention_max_int) { 390 regs[i].set1(INT_ArgReg[int_args]->as_VMReg()); 391 int_args ++; 392 } else { 393 return -1; 394 } 395 break; 396 case T_VOID: 397 // halves of T_LONG or T_DOUBLE 398 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 399 regs[i].set_bad(); 400 break; 401 case T_LONG: 402 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 403 // fall through 404 case T_OBJECT: 405 case T_ARRAY: 406 case T_ADDRESS: 407 // Should T_METADATA be added to java_calling_convention as well ? 408 case T_METADATA: 409 if (int_args < SharedRuntime::java_return_convention_max_int) { 410 regs[i].set2(INT_ArgReg[int_args]->as_VMReg()); 411 int_args ++; 412 } else { 413 return -1; 414 } 415 break; 416 case T_FLOAT: 417 if (fp_args < SharedRuntime::java_return_convention_max_float) { 418 regs[i].set1(FP_ArgReg[fp_args]->as_VMReg()); 419 fp_args ++; 420 } else { 421 return -1; 422 } 423 break; 424 case T_DOUBLE: 425 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 426 if (fp_args < SharedRuntime::java_return_convention_max_float) { 427 regs[i].set2(FP_ArgReg[fp_args]->as_VMReg()); 428 fp_args ++; 429 } else { 430 return -1; 431 } 432 break; 433 default: 434 ShouldNotReachHere(); 435 break; 436 } 437 } 438 439 return int_args + fp_args; 440 } 441 442 // Patch the callers callsite with entry to compiled code if it exists. 443 static void patch_callers_callsite(MacroAssembler *masm) { 444 Label L; 445 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 446 __ cbz(rscratch1, L); 447 448 __ enter(); 449 __ push_CPU_state(); 450 451 // VM needs caller's callsite 452 // VM needs target method 453 // This needs to be a long call since we will relocate this adapter to 454 // the codeBuffer and it may not reach 455 456 #ifndef PRODUCT 457 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 458 #endif 459 460 __ mov(c_rarg0, rmethod); 461 __ mov(c_rarg1, lr); 462 __ authenticate_return_address(c_rarg1); 463 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 464 __ blr(rscratch1); 465 466 // Explicit isb required because fixup_callers_callsite may change the code 467 // stream. 468 __ safepoint_isb(); 469 470 __ pop_CPU_state(); 471 // restore sp 472 __ leave(); 473 __ bind(L); 474 } 475 476 // For each inline type argument, sig includes the list of fields of 477 // the inline type. This utility function computes the number of 478 // arguments for the call if inline types are passed by reference (the 479 // calling convention the interpreter expects). 480 static int compute_total_args_passed_int(const GrowableArray<SigEntry>* sig_extended) { 481 int total_args_passed = 0; 482 if (InlineTypePassFieldsAsArgs) { 483 for (int i = 0; i < sig_extended->length(); i++) { 484 BasicType bt = sig_extended->at(i)._bt; 485 if (bt == T_METADATA) { 486 // In sig_extended, an inline type argument starts with: 487 // T_METADATA, followed by the types of the fields of the 488 // inline type and T_VOID to mark the end of the value 489 // type. Inline types are flattened so, for instance, in the 490 // case of an inline type with an int field and an inline type 491 // field that itself has 2 fields, an int and a long: 492 // T_METADATA T_INT T_METADATA T_INT T_LONG T_VOID (second 493 // slot for the T_LONG) T_VOID (inner inline type) T_VOID 494 // (outer inline type) 495 total_args_passed++; 496 int vt = 1; 497 do { 498 i++; 499 BasicType bt = sig_extended->at(i)._bt; 500 BasicType prev_bt = sig_extended->at(i-1)._bt; 501 if (bt == T_METADATA) { 502 vt++; 503 } else if (bt == T_VOID && 504 prev_bt != T_LONG && 505 prev_bt != T_DOUBLE) { 506 vt--; 507 } 508 } while (vt != 0); 509 } else { 510 total_args_passed++; 511 } 512 } 513 } else { 514 total_args_passed = sig_extended->length(); 515 } 516 517 return total_args_passed; 518 } 519 520 521 static void gen_c2i_adapter_helper(MacroAssembler* masm, 522 BasicType bt, 523 BasicType prev_bt, 524 size_t size_in_bytes, 525 const VMRegPair& reg_pair, 526 const Address& to, 527 Register tmp1, 528 Register tmp2, 529 Register tmp3, 530 int extraspace, 531 bool is_oop) { 532 if (bt == T_VOID) { 533 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half"); 534 return; 535 } 536 537 // Say 4 args: 538 // i st_off 539 // 0 32 T_LONG 540 // 1 24 T_VOID 541 // 2 16 T_OBJECT 542 // 3 8 T_BOOL 543 // - 0 return address 544 // 545 // However to make thing extra confusing. Because we can fit a Java long/double in 546 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter 547 // leaves one slot empty and only stores to a single slot. In this case the 548 // slot that is occupied is the T_VOID slot. See I said it was confusing. 549 550 bool wide = (size_in_bytes == wordSize); 551 VMReg r_1 = reg_pair.first(); 552 VMReg r_2 = reg_pair.second(); 553 assert(r_2->is_valid() == wide, "invalid size"); 554 if (!r_1->is_valid()) { 555 assert(!r_2->is_valid(), ""); 556 return; 557 } 558 559 if (!r_1->is_FloatRegister()) { 560 Register val = r25; 561 if (r_1->is_stack()) { 562 // memory to memory use r25 (scratch registers is used by store_heap_oop) 563 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 564 __ load_sized_value(val, Address(sp, ld_off), size_in_bytes, /* is_signed */ false); 565 } else { 566 val = r_1->as_Register(); 567 } 568 assert_different_registers(to.base(), val, tmp1, tmp2, tmp3); 569 if (is_oop) { 570 __ store_heap_oop(to, val, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED); 571 } else { 572 __ store_sized_value(to, val, size_in_bytes); 573 } 574 } else { 575 if (wide) { 576 __ strd(r_1->as_FloatRegister(), to); 577 } else { 578 // only a float use just part of the slot 579 __ strs(r_1->as_FloatRegister(), to); 580 } 581 } 582 } 583 584 static void gen_c2i_adapter(MacroAssembler *masm, 585 const GrowableArray<SigEntry>* sig_extended, 586 const VMRegPair *regs, 587 bool requires_clinit_barrier, 588 address& c2i_no_clinit_check_entry, 589 Label& skip_fixup, 590 address start, 591 OopMapSet* oop_maps, 592 int& frame_complete, 593 int& frame_size_in_words, 594 bool alloc_inline_receiver) { 595 if (requires_clinit_barrier && VM_Version::supports_fast_class_init_checks()) { 596 Label L_skip_barrier; 597 598 { // Bypass the barrier for non-static methods 599 __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset())); 600 __ andsw(zr, rscratch1, JVM_ACC_STATIC); 601 __ br(Assembler::EQ, L_skip_barrier); // non-static 602 } 603 604 __ load_method_holder(rscratch2, rmethod); 605 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier); 606 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); 607 608 __ bind(L_skip_barrier); 609 c2i_no_clinit_check_entry = __ pc(); 610 } 611 612 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 613 bs->c2i_entry_barrier(masm); 614 615 // Before we get into the guts of the C2I adapter, see if we should be here 616 // at all. We've come from compiled code and are attempting to jump to the 617 // interpreter, which means the caller made a static call to get here 618 // (vcalls always get a compiled target if there is one). Check for a 619 // compiled target. If there is one, we need to patch the caller's call. 620 patch_callers_callsite(masm); 621 622 __ bind(skip_fixup); 623 624 // Name some registers to be used in the following code. We can use 625 // anything except r0-r7 which are arguments in the Java calling 626 // convention, rmethod (r12), and r13 which holds the outgoing sender 627 // SP for the interpreter. 628 Register buf_array = r10; // Array of buffered inline types 629 Register buf_oop = r11; // Buffered inline type oop 630 Register tmp1 = r15; 631 Register tmp2 = r16; 632 Register tmp3 = r17; 633 634 if (InlineTypePassFieldsAsArgs) { 635 // Is there an inline type argument? 636 bool has_inline_argument = false; 637 for (int i = 0; i < sig_extended->length() && !has_inline_argument; i++) { 638 has_inline_argument = (sig_extended->at(i)._bt == T_METADATA); 639 } 640 if (has_inline_argument) { 641 // There is at least an inline type argument: we're coming from 642 // compiled code so we have no buffers to back the inline types 643 // Allocate the buffers here with a runtime call. 644 RegisterSaver reg_save(false /* save_vectors */); 645 OopMap* map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 646 647 frame_complete = __ offset(); 648 address the_pc = __ pc(); 649 650 Label retaddr; 651 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 652 653 __ mov(c_rarg0, rthread); 654 __ mov(c_rarg1, rmethod); 655 __ mov(c_rarg2, (int64_t)alloc_inline_receiver); 656 657 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::allocate_inline_types))); 658 __ blr(rscratch1); 659 __ bind(retaddr); 660 661 oop_maps->add_gc_map(__ pc() - start, map); 662 __ reset_last_Java_frame(false); 663 664 reg_save.restore_live_registers(masm); 665 666 Label no_exception; 667 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 668 __ cbz(rscratch1, no_exception); 669 670 __ str(zr, Address(rthread, JavaThread::vm_result_offset())); 671 __ ldr(r0, Address(rthread, Thread::pending_exception_offset())); 672 __ b(RuntimeAddress(StubRoutines::forward_exception_entry())); 673 674 __ bind(no_exception); 675 676 // We get an array of objects from the runtime call 677 __ get_vm_result(buf_array, rthread); 678 __ get_vm_result_2(rmethod, rthread); // TODO: required to keep the callee Method live? 679 } 680 } 681 682 // Since all args are passed on the stack, total_args_passed * 683 // Interpreter::stackElementSize is the space we need. 684 685 int total_args_passed = compute_total_args_passed_int(sig_extended); 686 int extraspace = total_args_passed * Interpreter::stackElementSize; 687 688 // stack is aligned, keep it that way 689 extraspace = align_up(extraspace, StackAlignmentInBytes); 690 691 // set senderSP value 692 __ mov(r19_sender_sp, sp); 693 694 __ sub(sp, sp, extraspace); 695 696 // Now write the args into the outgoing interpreter space 697 698 // next_arg_comp is the next argument from the compiler point of 699 // view (inline type fields are passed in registers/on the stack). In 700 // sig_extended, an inline type argument starts with: T_METADATA, 701 // followed by the types of the fields of the inline type and T_VOID 702 // to mark the end of the inline type. ignored counts the number of 703 // T_METADATA/T_VOID. next_vt_arg is the next inline type argument: 704 // used to get the buffer for that argument from the pool of buffers 705 // we allocated above and want to pass to the 706 // interpreter. next_arg_int is the next argument from the 707 // interpreter point of view (inline types are passed by reference). 708 for (int next_arg_comp = 0, ignored = 0, next_vt_arg = 0, next_arg_int = 0; 709 next_arg_comp < sig_extended->length(); next_arg_comp++) { 710 assert(ignored <= next_arg_comp, "shouldn't skip over more slots than there are arguments"); 711 assert(next_arg_int <= total_args_passed, "more arguments for the interpreter than expected?"); 712 BasicType bt = sig_extended->at(next_arg_comp)._bt; 713 int st_off = (total_args_passed - next_arg_int - 1) * Interpreter::stackElementSize; 714 if (!InlineTypePassFieldsAsArgs || bt != T_METADATA) { 715 int next_off = st_off - Interpreter::stackElementSize; 716 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : st_off; 717 const VMRegPair reg_pair = regs[next_arg_comp-ignored]; 718 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4; 719 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL, 720 size_in_bytes, reg_pair, Address(sp, offset), tmp1, tmp2, tmp3, extraspace, false); 721 next_arg_int++; 722 #ifdef ASSERT 723 if (bt == T_LONG || bt == T_DOUBLE) { 724 // Overwrite the unused slot with known junk 725 __ mov(rscratch1, CONST64(0xdeadffffdeadaaaa)); 726 __ str(rscratch1, Address(sp, st_off)); 727 } 728 #endif /* ASSERT */ 729 } else { 730 ignored++; 731 // get the buffer from the just allocated pool of buffers 732 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + next_vt_arg * type2aelembytes(T_OBJECT); 733 __ load_heap_oop(buf_oop, Address(buf_array, index), tmp1, tmp2); 734 next_vt_arg++; next_arg_int++; 735 int vt = 1; 736 // write fields we get from compiled code in registers/stack 737 // slots to the buffer: we know we are done with that inline type 738 // argument when we hit the T_VOID that acts as an end of inline 739 // type delimiter for this inline type. Inline types are flattened 740 // so we might encounter embedded inline types. Each entry in 741 // sig_extended contains a field offset in the buffer. 742 Label L_null; 743 do { 744 next_arg_comp++; 745 BasicType bt = sig_extended->at(next_arg_comp)._bt; 746 BasicType prev_bt = sig_extended->at(next_arg_comp - 1)._bt; 747 if (bt == T_METADATA) { 748 vt++; 749 ignored++; 750 } else if (bt == T_VOID && prev_bt != T_LONG && prev_bt != T_DOUBLE) { 751 vt--; 752 ignored++; 753 } else { 754 int off = sig_extended->at(next_arg_comp)._offset; 755 if (off == -1) { 756 // Nullable inline type argument, emit null check 757 VMReg reg = regs[next_arg_comp-ignored].first(); 758 Label L_notNull; 759 if (reg->is_stack()) { 760 int ld_off = reg->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 761 __ ldrb(tmp1, Address(sp, ld_off)); 762 __ cbnz(tmp1, L_notNull); 763 } else { 764 __ cbnz(reg->as_Register(), L_notNull); 765 } 766 __ str(zr, Address(sp, st_off)); 767 __ b(L_null); 768 __ bind(L_notNull); 769 continue; 770 } 771 assert(off > 0, "offset in object should be positive"); 772 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize; 773 bool is_oop = is_reference_type(bt); 774 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL, 775 size_in_bytes, regs[next_arg_comp-ignored], Address(buf_oop, off), tmp1, tmp2, tmp3, extraspace, is_oop); 776 } 777 } while (vt != 0); 778 // pass the buffer to the interpreter 779 __ str(buf_oop, Address(sp, st_off)); 780 __ bind(L_null); 781 } 782 } 783 784 __ mov(esp, sp); // Interp expects args on caller's expression stack 785 786 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset()))); 787 __ br(rscratch1); 788 } 789 790 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, int comp_args_on_stack, const GrowableArray<SigEntry>* sig, const VMRegPair *regs) { 791 792 793 // Note: r19_sender_sp contains the senderSP on entry. We must 794 // preserve it since we may do a i2c -> c2i transition if we lose a 795 // race where compiled code goes non-entrant while we get args 796 // ready. 797 798 // Adapters are frameless. 799 800 // An i2c adapter is frameless because the *caller* frame, which is 801 // interpreted, routinely repairs its own esp (from 802 // interpreter_frame_last_sp), even if a callee has modified the 803 // stack pointer. It also recalculates and aligns sp. 804 805 // A c2i adapter is frameless because the *callee* frame, which is 806 // interpreted, routinely repairs its caller's sp (from sender_sp, 807 // which is set up via the senderSP register). 808 809 // In other words, if *either* the caller or callee is interpreted, we can 810 // get the stack pointer repaired after a call. 811 812 // This is why c2i and i2c adapters cannot be indefinitely composed. 813 // In particular, if a c2i adapter were to somehow call an i2c adapter, 814 // both caller and callee would be compiled methods, and neither would 815 // clean up the stack pointer changes performed by the two adapters. 816 // If this happens, control eventually transfers back to the compiled 817 // caller, but with an uncorrected stack, causing delayed havoc. 818 819 if (VerifyAdapterCalls && 820 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) { 821 #if 0 822 // So, let's test for cascading c2i/i2c adapters right now. 823 // assert(Interpreter::contains($return_addr) || 824 // StubRoutines::contains($return_addr), 825 // "i2c adapter must return to an interpreter frame"); 826 __ block_comment("verify_i2c { "); 827 Label L_ok; 828 if (Interpreter::code() != nullptr) { 829 range_check(masm, rax, r11, 830 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 831 L_ok); 832 } 833 if (StubRoutines::initial_stubs_code() != nullptr) { 834 range_check(masm, rax, r11, 835 StubRoutines::initial_stubs_code()->code_begin(), 836 StubRoutines::initial_stubs_code()->code_end(), 837 L_ok); 838 } 839 if (StubRoutines::final_stubs_code() != nullptr) { 840 range_check(masm, rax, r11, 841 StubRoutines::final_stubs_code()->code_begin(), 842 StubRoutines::final_stubs_code()->code_end(), 843 L_ok); 844 } 845 const char* msg = "i2c adapter must return to an interpreter frame"; 846 __ block_comment(msg); 847 __ stop(msg); 848 __ bind(L_ok); 849 __ block_comment("} verify_i2ce "); 850 #endif 851 } 852 853 // Cut-out for having no stack args. 854 int comp_words_on_stack = 0; 855 if (comp_args_on_stack) { 856 comp_words_on_stack = align_up(comp_args_on_stack * VMRegImpl::stack_slot_size, wordSize) >> LogBytesPerWord; 857 __ sub(rscratch1, sp, comp_words_on_stack * wordSize); 858 __ andr(sp, rscratch1, -16); 859 } 860 861 // Will jump to the compiled code just as if compiled code was doing it. 862 // Pre-load the register-jump target early, to schedule it better. 863 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_inline_offset()))); 864 865 #if INCLUDE_JVMCI 866 if (EnableJVMCI) { 867 // check if this call should be routed towards a specific entry point 868 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 869 Label no_alternative_target; 870 __ cbz(rscratch2, no_alternative_target); 871 __ mov(rscratch1, rscratch2); 872 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 873 __ bind(no_alternative_target); 874 } 875 #endif // INCLUDE_JVMCI 876 877 int total_args_passed = sig->length(); 878 879 // Now generate the shuffle code. 880 for (int i = 0; i < total_args_passed; i++) { 881 BasicType bt = sig->at(i)._bt; 882 if (bt == T_VOID) { 883 assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half"); 884 continue; 885 } 886 887 // Pick up 0, 1 or 2 words from SP+offset. 888 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), "scrambled load targets?"); 889 890 // Load in argument order going down. 891 int ld_off = (total_args_passed - i - 1) * Interpreter::stackElementSize; 892 // Point to interpreter value (vs. tag) 893 int next_off = ld_off - Interpreter::stackElementSize; 894 // 895 // 896 // 897 VMReg r_1 = regs[i].first(); 898 VMReg r_2 = regs[i].second(); 899 if (!r_1->is_valid()) { 900 assert(!r_2->is_valid(), ""); 901 continue; 902 } 903 if (r_1->is_stack()) { 904 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 905 int st_off = regs[i].first()->reg2stack() * VMRegImpl::stack_slot_size; 906 if (!r_2->is_valid()) { 907 // sign extend??? 908 __ ldrsw(rscratch2, Address(esp, ld_off)); 909 __ str(rscratch2, Address(sp, st_off)); 910 } else { 911 // 912 // We are using two optoregs. This can be either T_OBJECT, 913 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 914 // two slots but only uses one for thr T_LONG or T_DOUBLE case 915 // So we must adjust where to pick up the data to match the 916 // interpreter. 917 // 918 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 919 // are accessed as negative so LSW is at LOW address 920 921 // ld_off is MSW so get LSW 922 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off; 923 __ ldr(rscratch2, Address(esp, offset)); 924 // st_off is LSW (i.e. reg.first()) 925 __ str(rscratch2, Address(sp, st_off)); 926 } 927 } else if (r_1->is_Register()) { // Register argument 928 Register r = r_1->as_Register(); 929 if (r_2->is_valid()) { 930 // 931 // We are using two VMRegs. This can be either T_OBJECT, 932 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 933 // two slots but only uses one for thr T_LONG or T_DOUBLE case 934 // So we must adjust where to pick up the data to match the 935 // interpreter. 936 937 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off; 938 939 // this can be a misaligned move 940 __ ldr(r, Address(esp, offset)); 941 } else { 942 // sign extend and use a full word? 943 __ ldrw(r, Address(esp, ld_off)); 944 } 945 } else { 946 if (!r_2->is_valid()) { 947 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off)); 948 } else { 949 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off)); 950 } 951 } 952 } 953 954 955 __ mov(rscratch2, rscratch1); 956 __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1 957 __ mov(rscratch1, rscratch2); 958 959 // 6243940 We might end up in handle_wrong_method if 960 // the callee is deoptimized as we race thru here. If that 961 // happens we don't want to take a safepoint because the 962 // caller frame will look interpreted and arguments are now 963 // "compiled" so it is much better to make this transition 964 // invisible to the stack walking code. Unfortunately if 965 // we try and find the callee by normal means a safepoint 966 // is possible. So we stash the desired callee in the thread 967 // and the vm will find there should this case occur. 968 969 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset())); 970 __ br(rscratch1); 971 } 972 973 static void gen_inline_cache_check(MacroAssembler *masm, Label& skip_fixup) { 974 Register data = rscratch2; 975 __ ic_check(1 /* end_alignment */); 976 __ ldr(rmethod, Address(data, CompiledICData::speculated_method_offset())); 977 978 // Method might have been compiled since the call site was patched to 979 // interpreted; if that is the case treat it as a miss so we can get 980 // the call site corrected. 981 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 982 __ cbz(rscratch1, skip_fixup); 983 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 984 } 985 986 // --------------------------------------------------------------- 987 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm, 988 int comp_args_on_stack, 989 const GrowableArray<SigEntry>* sig, 990 const VMRegPair* regs, 991 const GrowableArray<SigEntry>* sig_cc, 992 const VMRegPair* regs_cc, 993 const GrowableArray<SigEntry>* sig_cc_ro, 994 const VMRegPair* regs_cc_ro, 995 AdapterFingerPrint* fingerprint, 996 AdapterBlob*& new_adapter, 997 bool allocate_code_blob) { 998 999 address i2c_entry = __ pc(); 1000 gen_i2c_adapter(masm, comp_args_on_stack, sig, regs); 1001 1002 // ------------------------------------------------------------------------- 1003 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls 1004 // to the interpreter. The args start out packed in the compiled layout. They 1005 // need to be unpacked into the interpreter layout. This will almost always 1006 // require some stack space. We grow the current (compiled) stack, then repack 1007 // the args. We finally end in a jump to the generic interpreter entry point. 1008 // On exit from the interpreter, the interpreter will restore our SP (lest the 1009 // compiled code, which relies solely on SP and not FP, get sick). 1010 1011 address c2i_unverified_entry = __ pc(); 1012 address c2i_unverified_inline_entry = __ pc(); 1013 Label skip_fixup; 1014 1015 gen_inline_cache_check(masm, skip_fixup); 1016 1017 OopMapSet* oop_maps = new OopMapSet(); 1018 int frame_complete = CodeOffsets::frame_never_safe; 1019 int frame_size_in_words = 0; 1020 1021 // Scalarized c2i adapter with non-scalarized receiver (i.e., don't pack receiver) 1022 address c2i_no_clinit_check_entry = nullptr; 1023 address c2i_inline_ro_entry = __ pc(); 1024 if (regs_cc != regs_cc_ro) { 1025 // No class init barrier needed because method is guaranteed to be non-static 1026 gen_c2i_adapter(masm, sig_cc_ro, regs_cc_ro, /* requires_clinit_barrier = */ false, c2i_no_clinit_check_entry, 1027 skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false); 1028 skip_fixup.reset(); 1029 } 1030 1031 // Scalarized c2i adapter 1032 address c2i_entry = __ pc(); 1033 address c2i_inline_entry = __ pc(); 1034 gen_c2i_adapter(masm, sig_cc, regs_cc, /* requires_clinit_barrier = */ true, c2i_no_clinit_check_entry, 1035 skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ true); 1036 1037 // Non-scalarized c2i adapter 1038 if (regs != regs_cc) { 1039 c2i_unverified_inline_entry = __ pc(); 1040 Label inline_entry_skip_fixup; 1041 gen_inline_cache_check(masm, inline_entry_skip_fixup); 1042 1043 c2i_inline_entry = __ pc(); 1044 gen_c2i_adapter(masm, sig, regs, /* requires_clinit_barrier = */ true, c2i_no_clinit_check_entry, 1045 inline_entry_skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false); 1046 } 1047 1048 1049 // The c2i adapter might safepoint and trigger a GC. The caller must make sure that 1050 // the GC knows about the location of oop argument locations passed to the c2i adapter. 1051 if (allocate_code_blob) { 1052 bool caller_must_gc_arguments = (regs != regs_cc); 1053 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps, caller_must_gc_arguments); 1054 } 1055 1056 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_inline_entry, c2i_inline_ro_entry, c2i_unverified_entry, c2i_unverified_inline_entry, c2i_no_clinit_check_entry); 1057 } 1058 1059 static int c_calling_convention_priv(const BasicType *sig_bt, 1060 VMRegPair *regs, 1061 int total_args_passed) { 1062 1063 // We return the amount of VMRegImpl stack slots we need to reserve for all 1064 // the arguments NOT counting out_preserve_stack_slots. 1065 1066 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { 1067 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7 1068 }; 1069 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { 1070 c_farg0, c_farg1, c_farg2, c_farg3, 1071 c_farg4, c_farg5, c_farg6, c_farg7 1072 }; 1073 1074 uint int_args = 0; 1075 uint fp_args = 0; 1076 uint stk_args = 0; // inc by 2 each time 1077 1078 for (int i = 0; i < total_args_passed; i++) { 1079 switch (sig_bt[i]) { 1080 case T_BOOLEAN: 1081 case T_CHAR: 1082 case T_BYTE: 1083 case T_SHORT: 1084 case T_INT: 1085 if (int_args < Argument::n_int_register_parameters_c) { 1086 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 1087 } else { 1088 #ifdef __APPLE__ 1089 // Less-than word types are stored one after another. 1090 // The code is unable to handle this so bailout. 1091 return -1; 1092 #endif 1093 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 1094 stk_args += 2; 1095 } 1096 break; 1097 case T_LONG: 1098 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 1099 // fall through 1100 case T_OBJECT: 1101 case T_ARRAY: 1102 case T_ADDRESS: 1103 case T_METADATA: 1104 if (int_args < Argument::n_int_register_parameters_c) { 1105 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 1106 } else { 1107 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 1108 stk_args += 2; 1109 } 1110 break; 1111 case T_FLOAT: 1112 if (fp_args < Argument::n_float_register_parameters_c) { 1113 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 1114 } else { 1115 #ifdef __APPLE__ 1116 // Less-than word types are stored one after another. 1117 // The code is unable to handle this so bailout. 1118 return -1; 1119 #endif 1120 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 1121 stk_args += 2; 1122 } 1123 break; 1124 case T_DOUBLE: 1125 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 1126 if (fp_args < Argument::n_float_register_parameters_c) { 1127 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 1128 } else { 1129 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 1130 stk_args += 2; 1131 } 1132 break; 1133 case T_VOID: // Halves of longs and doubles 1134 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 1135 regs[i].set_bad(); 1136 break; 1137 default: 1138 ShouldNotReachHere(); 1139 break; 1140 } 1141 } 1142 1143 return stk_args; 1144 } 1145 1146 int SharedRuntime::vector_calling_convention(VMRegPair *regs, 1147 uint num_bits, 1148 uint total_args_passed) { 1149 // More than 8 argument inputs are not supported now. 1150 assert(total_args_passed <= Argument::n_float_register_parameters_c, "unsupported"); 1151 assert(num_bits >= 64 && num_bits <= 2048 && is_power_of_2(num_bits), "unsupported"); 1152 1153 static const FloatRegister VEC_ArgReg[Argument::n_float_register_parameters_c] = { 1154 v0, v1, v2, v3, v4, v5, v6, v7 1155 }; 1156 1157 // On SVE, we use the same vector registers with 128-bit vector registers on NEON. 1158 int next_reg_val = num_bits == 64 ? 1 : 3; 1159 for (uint i = 0; i < total_args_passed; i++) { 1160 VMReg vmreg = VEC_ArgReg[i]->as_VMReg(); 1161 regs[i].set_pair(vmreg->next(next_reg_val), vmreg); 1162 } 1163 return 0; 1164 } 1165 1166 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 1167 VMRegPair *regs, 1168 int total_args_passed) 1169 { 1170 int result = c_calling_convention_priv(sig_bt, regs, total_args_passed); 1171 guarantee(result >= 0, "Unsupported arguments configuration"); 1172 return result; 1173 } 1174 1175 1176 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1177 // We always ignore the frame_slots arg and just use the space just below frame pointer 1178 // which by this time is free to use 1179 switch (ret_type) { 1180 case T_FLOAT: 1181 __ strs(v0, Address(rfp, -wordSize)); 1182 break; 1183 case T_DOUBLE: 1184 __ strd(v0, Address(rfp, -wordSize)); 1185 break; 1186 case T_VOID: break; 1187 default: { 1188 __ str(r0, Address(rfp, -wordSize)); 1189 } 1190 } 1191 } 1192 1193 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1194 // We always ignore the frame_slots arg and just use the space just below frame pointer 1195 // which by this time is free to use 1196 switch (ret_type) { 1197 case T_FLOAT: 1198 __ ldrs(v0, Address(rfp, -wordSize)); 1199 break; 1200 case T_DOUBLE: 1201 __ ldrd(v0, Address(rfp, -wordSize)); 1202 break; 1203 case T_VOID: break; 1204 default: { 1205 __ ldr(r0, Address(rfp, -wordSize)); 1206 } 1207 } 1208 } 1209 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1210 RegSet x; 1211 for ( int i = first_arg ; i < arg_count ; i++ ) { 1212 if (args[i].first()->is_Register()) { 1213 x = x + args[i].first()->as_Register(); 1214 } else if (args[i].first()->is_FloatRegister()) { 1215 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize))); 1216 } 1217 } 1218 __ push(x, sp); 1219 } 1220 1221 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1222 RegSet x; 1223 for ( int i = first_arg ; i < arg_count ; i++ ) { 1224 if (args[i].first()->is_Register()) { 1225 x = x + args[i].first()->as_Register(); 1226 } else { 1227 ; 1228 } 1229 } 1230 __ pop(x, sp); 1231 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { 1232 if (args[i].first()->is_Register()) { 1233 ; 1234 } else if (args[i].first()->is_FloatRegister()) { 1235 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize))); 1236 } 1237 } 1238 } 1239 1240 static void verify_oop_args(MacroAssembler* masm, 1241 const methodHandle& method, 1242 const BasicType* sig_bt, 1243 const VMRegPair* regs) { 1244 Register temp_reg = r19; // not part of any compiled calling seq 1245 if (VerifyOops) { 1246 for (int i = 0; i < method->size_of_parameters(); i++) { 1247 if (sig_bt[i] == T_OBJECT || 1248 sig_bt[i] == T_ARRAY) { 1249 VMReg r = regs[i].first(); 1250 assert(r->is_valid(), "bad oop arg"); 1251 if (r->is_stack()) { 1252 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1253 __ verify_oop(temp_reg); 1254 } else { 1255 __ verify_oop(r->as_Register()); 1256 } 1257 } 1258 } 1259 } 1260 } 1261 1262 // on exit, sp points to the ContinuationEntry 1263 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) { 1264 assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, ""); 1265 assert(in_bytes(ContinuationEntry::cont_offset()) % VMRegImpl::stack_slot_size == 0, ""); 1266 assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, ""); 1267 1268 stack_slots += (int)ContinuationEntry::size()/wordSize; 1269 __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata 1270 1271 OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/); 1272 1273 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1274 __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset())); 1275 __ mov(rscratch1, sp); // we can't use sp as the source in str 1276 __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1277 1278 return map; 1279 } 1280 1281 // on entry c_rarg1 points to the continuation 1282 // sp points to ContinuationEntry 1283 // c_rarg3 -- isVirtualThread 1284 static void fill_continuation_entry(MacroAssembler* masm) { 1285 #ifdef ASSERT 1286 __ movw(rscratch1, ContinuationEntry::cookie_value()); 1287 __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset())); 1288 #endif 1289 1290 __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset())); 1291 __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset())); 1292 __ str (zr, Address(sp, ContinuationEntry::chunk_offset())); 1293 __ strw(zr, Address(sp, ContinuationEntry::argsize_offset())); 1294 __ strw(zr, Address(sp, ContinuationEntry::pin_count_offset())); 1295 1296 __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset())); 1297 __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset())); 1298 __ ldr(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset())); 1299 __ str(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset())); 1300 1301 __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset())); 1302 __ str(zr, Address(rthread, JavaThread::held_monitor_count_offset())); 1303 } 1304 1305 // on entry, sp points to the ContinuationEntry 1306 // on exit, rfp points to the spilled rfp in the entry frame 1307 static void continuation_enter_cleanup(MacroAssembler* masm) { 1308 #ifndef PRODUCT 1309 Label OK; 1310 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1311 __ cmp(sp, rscratch1); 1312 __ br(Assembler::EQ, OK); 1313 __ stop("incorrect sp1"); 1314 __ bind(OK); 1315 #endif 1316 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset())); 1317 __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset())); 1318 1319 if (CheckJNICalls) { 1320 // Check if this is a virtual thread continuation 1321 Label L_skip_vthread_code; 1322 __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset())); 1323 __ cbzw(rscratch1, L_skip_vthread_code); 1324 1325 // If the held monitor count is > 0 and this vthread is terminating then 1326 // it failed to release a JNI monitor. So we issue the same log message 1327 // that JavaThread::exit does. 1328 __ ldr(rscratch1, Address(rthread, JavaThread::jni_monitor_count_offset())); 1329 __ cbz(rscratch1, L_skip_vthread_code); 1330 1331 // Save return value potentially containing the exception oop in callee-saved R19. 1332 __ mov(r19, r0); 1333 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::log_jni_monitor_still_held)); 1334 // Restore potential return value. 1335 __ mov(r0, r19); 1336 1337 // For vthreads we have to explicitly zero the JNI monitor count of the carrier 1338 // on termination. The held count is implicitly zeroed below when we restore from 1339 // the parent held count (which has to be zero). 1340 __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset())); 1341 1342 __ bind(L_skip_vthread_code); 1343 } 1344 #ifdef ASSERT 1345 else { 1346 // Check if this is a virtual thread continuation 1347 Label L_skip_vthread_code; 1348 __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset())); 1349 __ cbzw(rscratch1, L_skip_vthread_code); 1350 1351 // See comment just above. If not checking JNI calls the JNI count is only 1352 // needed for assertion checking. 1353 __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset())); 1354 1355 __ bind(L_skip_vthread_code); 1356 } 1357 #endif 1358 1359 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset())); 1360 __ str(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset())); 1361 1362 __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset())); 1363 __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset())); 1364 __ add(rfp, sp, (int)ContinuationEntry::size()); 1365 } 1366 1367 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread) 1368 // On entry: c_rarg1 -- the continuation object 1369 // c_rarg2 -- isContinue 1370 // c_rarg3 -- isVirtualThread 1371 static void gen_continuation_enter(MacroAssembler* masm, 1372 const methodHandle& method, 1373 const BasicType* sig_bt, 1374 const VMRegPair* regs, 1375 int& exception_offset, 1376 OopMapSet*oop_maps, 1377 int& frame_complete, 1378 int& stack_slots, 1379 int& interpreted_entry_offset, 1380 int& compiled_entry_offset) { 1381 //verify_oop_args(masm, method, sig_bt, regs); 1382 Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type); 1383 1384 address start = __ pc(); 1385 1386 Label call_thaw, exit; 1387 1388 // i2i entry used at interp_only_mode only 1389 interpreted_entry_offset = __ pc() - start; 1390 { 1391 1392 #ifdef ASSERT 1393 Label is_interp_only; 1394 __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset())); 1395 __ cbnzw(rscratch1, is_interp_only); 1396 __ stop("enterSpecial interpreter entry called when not in interp_only_mode"); 1397 __ bind(is_interp_only); 1398 #endif 1399 1400 // Read interpreter arguments into registers (this is an ad-hoc i2c adapter) 1401 __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2)); 1402 __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1)); 1403 __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0)); 1404 __ push_cont_fastpath(rthread); 1405 1406 __ enter(); 1407 stack_slots = 2; // will be adjusted in setup 1408 OopMap* map = continuation_enter_setup(masm, stack_slots); 1409 // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe, 1410 // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway. 1411 1412 fill_continuation_entry(masm); 1413 1414 __ cbnz(c_rarg2, call_thaw); 1415 1416 const address tr_call = __ trampoline_call(resolve); 1417 if (tr_call == nullptr) { 1418 fatal("CodeCache is full at gen_continuation_enter"); 1419 } 1420 1421 oop_maps->add_gc_map(__ pc() - start, map); 1422 __ post_call_nop(); 1423 1424 __ b(exit); 1425 1426 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call); 1427 if (stub == nullptr) { 1428 fatal("CodeCache is full at gen_continuation_enter"); 1429 } 1430 } 1431 1432 // compiled entry 1433 __ align(CodeEntryAlignment); 1434 compiled_entry_offset = __ pc() - start; 1435 1436 __ enter(); 1437 stack_slots = 2; // will be adjusted in setup 1438 OopMap* map = continuation_enter_setup(masm, stack_slots); 1439 frame_complete = __ pc() - start; 1440 1441 fill_continuation_entry(masm); 1442 1443 __ cbnz(c_rarg2, call_thaw); 1444 1445 const address tr_call = __ trampoline_call(resolve); 1446 if (tr_call == nullptr) { 1447 fatal("CodeCache is full at gen_continuation_enter"); 1448 } 1449 1450 oop_maps->add_gc_map(__ pc() - start, map); 1451 __ post_call_nop(); 1452 1453 __ b(exit); 1454 1455 __ bind(call_thaw); 1456 1457 __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw())); 1458 oop_maps->add_gc_map(__ pc() - start, map->deep_copy()); 1459 ContinuationEntry::_return_pc_offset = __ pc() - start; 1460 __ post_call_nop(); 1461 1462 __ bind(exit); 1463 continuation_enter_cleanup(masm); 1464 __ leave(); 1465 __ ret(lr); 1466 1467 /// exception handling 1468 1469 exception_offset = __ pc() - start; 1470 { 1471 __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19 1472 1473 continuation_enter_cleanup(masm); 1474 1475 __ ldr(c_rarg1, Address(rfp, wordSize)); // return address 1476 __ authenticate_return_address(c_rarg1); 1477 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1); 1478 1479 // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc 1480 1481 __ mov(r1, r0); // the exception handler 1482 __ mov(r0, r19); // restore return value contaning the exception oop 1483 __ verify_oop(r0); 1484 1485 __ leave(); 1486 __ mov(r3, lr); 1487 __ br(r1); // the exception handler 1488 } 1489 1490 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call); 1491 if (stub == nullptr) { 1492 fatal("CodeCache is full at gen_continuation_enter"); 1493 } 1494 } 1495 1496 static void gen_continuation_yield(MacroAssembler* masm, 1497 const methodHandle& method, 1498 const BasicType* sig_bt, 1499 const VMRegPair* regs, 1500 OopMapSet* oop_maps, 1501 int& frame_complete, 1502 int& stack_slots, 1503 int& compiled_entry_offset) { 1504 enum layout { 1505 rfp_off1, 1506 rfp_off2, 1507 lr_off, 1508 lr_off2, 1509 framesize // inclusive of return address 1510 }; 1511 // assert(is_even(framesize/2), "sp not 16-byte aligned"); 1512 stack_slots = framesize / VMRegImpl::slots_per_word; 1513 assert(stack_slots == 2, "recheck layout"); 1514 1515 address start = __ pc(); 1516 1517 compiled_entry_offset = __ pc() - start; 1518 __ enter(); 1519 1520 __ mov(c_rarg1, sp); 1521 1522 frame_complete = __ pc() - start; 1523 address the_pc = __ pc(); 1524 1525 __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup 1526 1527 __ mov(c_rarg0, rthread); 1528 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 1529 __ call_VM_leaf(Continuation::freeze_entry(), 2); 1530 __ reset_last_Java_frame(true); 1531 1532 Label pinned; 1533 1534 __ cbnz(r0, pinned); 1535 1536 // We've succeeded, set sp to the ContinuationEntry 1537 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1538 __ mov(sp, rscratch1); 1539 continuation_enter_cleanup(masm); 1540 1541 __ bind(pinned); // pinned -- return to caller 1542 1543 // handle pending exception thrown by freeze 1544 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 1545 Label ok; 1546 __ cbz(rscratch1, ok); 1547 __ leave(); 1548 __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry())); 1549 __ br(rscratch1); 1550 __ bind(ok); 1551 1552 __ leave(); 1553 __ ret(lr); 1554 1555 OopMap* map = new OopMap(framesize, 1); 1556 oop_maps->add_gc_map(the_pc - start, map); 1557 } 1558 1559 static void gen_special_dispatch(MacroAssembler* masm, 1560 const methodHandle& method, 1561 const BasicType* sig_bt, 1562 const VMRegPair* regs) { 1563 verify_oop_args(masm, method, sig_bt, regs); 1564 vmIntrinsics::ID iid = method->intrinsic_id(); 1565 1566 // Now write the args into the outgoing interpreter space 1567 bool has_receiver = false; 1568 Register receiver_reg = noreg; 1569 int member_arg_pos = -1; 1570 Register member_reg = noreg; 1571 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1572 if (ref_kind != 0) { 1573 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1574 member_reg = r19; // known to be free at this point 1575 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1576 } else if (iid == vmIntrinsics::_invokeBasic) { 1577 has_receiver = true; 1578 } else if (iid == vmIntrinsics::_linkToNative) { 1579 member_arg_pos = method->size_of_parameters() - 1; // trailing NativeEntryPoint argument 1580 member_reg = r19; // known to be free at this point 1581 } else { 1582 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid)); 1583 } 1584 1585 if (member_reg != noreg) { 1586 // Load the member_arg into register, if necessary. 1587 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1588 VMReg r = regs[member_arg_pos].first(); 1589 if (r->is_stack()) { 1590 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1591 } else { 1592 // no data motion is needed 1593 member_reg = r->as_Register(); 1594 } 1595 } 1596 1597 if (has_receiver) { 1598 // Make sure the receiver is loaded into a register. 1599 assert(method->size_of_parameters() > 0, "oob"); 1600 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1601 VMReg r = regs[0].first(); 1602 assert(r->is_valid(), "bad receiver arg"); 1603 if (r->is_stack()) { 1604 // Porting note: This assumes that compiled calling conventions always 1605 // pass the receiver oop in a register. If this is not true on some 1606 // platform, pick a temp and load the receiver from stack. 1607 fatal("receiver always in a register"); 1608 receiver_reg = r2; // known to be free at this point 1609 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1610 } else { 1611 // no data motion is needed 1612 receiver_reg = r->as_Register(); 1613 } 1614 } 1615 1616 // Figure out which address we are really jumping to: 1617 MethodHandles::generate_method_handle_dispatch(masm, iid, 1618 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1619 } 1620 1621 // --------------------------------------------------------------------------- 1622 // Generate a native wrapper for a given method. The method takes arguments 1623 // in the Java compiled code convention, marshals them to the native 1624 // convention (handlizes oops, etc), transitions to native, makes the call, 1625 // returns to java state (possibly blocking), unhandlizes any result and 1626 // returns. 1627 // 1628 // Critical native functions are a shorthand for the use of 1629 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1630 // functions. The wrapper is expected to unpack the arguments before 1631 // passing them to the callee. Critical native functions leave the state _in_Java, 1632 // since they block out GC. 1633 // Some other parts of JNI setup are skipped like the tear down of the JNI handle 1634 // block and the check for pending exceptions it's impossible for them 1635 // to be thrown. 1636 // 1637 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1638 const methodHandle& method, 1639 int compile_id, 1640 BasicType* in_sig_bt, 1641 VMRegPair* in_regs, 1642 BasicType ret_type) { 1643 if (method->is_continuation_native_intrinsic()) { 1644 int exception_offset = -1; 1645 OopMapSet* oop_maps = new OopMapSet(); 1646 int frame_complete = -1; 1647 int stack_slots = -1; 1648 int interpreted_entry_offset = -1; 1649 int vep_offset = -1; 1650 if (method->is_continuation_enter_intrinsic()) { 1651 gen_continuation_enter(masm, 1652 method, 1653 in_sig_bt, 1654 in_regs, 1655 exception_offset, 1656 oop_maps, 1657 frame_complete, 1658 stack_slots, 1659 interpreted_entry_offset, 1660 vep_offset); 1661 } else if (method->is_continuation_yield_intrinsic()) { 1662 gen_continuation_yield(masm, 1663 method, 1664 in_sig_bt, 1665 in_regs, 1666 oop_maps, 1667 frame_complete, 1668 stack_slots, 1669 vep_offset); 1670 } else { 1671 guarantee(false, "Unknown Continuation native intrinsic"); 1672 } 1673 1674 #ifdef ASSERT 1675 if (method->is_continuation_enter_intrinsic()) { 1676 assert(interpreted_entry_offset != -1, "Must be set"); 1677 assert(exception_offset != -1, "Must be set"); 1678 } else { 1679 assert(interpreted_entry_offset == -1, "Must be unset"); 1680 assert(exception_offset == -1, "Must be unset"); 1681 } 1682 assert(frame_complete != -1, "Must be set"); 1683 assert(stack_slots != -1, "Must be set"); 1684 assert(vep_offset != -1, "Must be set"); 1685 #endif 1686 1687 __ flush(); 1688 nmethod* nm = nmethod::new_native_nmethod(method, 1689 compile_id, 1690 masm->code(), 1691 vep_offset, 1692 frame_complete, 1693 stack_slots, 1694 in_ByteSize(-1), 1695 in_ByteSize(-1), 1696 oop_maps, 1697 exception_offset); 1698 if (nm == nullptr) return nm; 1699 if (method->is_continuation_enter_intrinsic()) { 1700 ContinuationEntry::set_enter_code(nm, interpreted_entry_offset); 1701 } else if (method->is_continuation_yield_intrinsic()) { 1702 _cont_doYield_stub = nm; 1703 } else { 1704 guarantee(false, "Unknown Continuation native intrinsic"); 1705 } 1706 return nm; 1707 } 1708 1709 if (method->is_method_handle_intrinsic()) { 1710 vmIntrinsics::ID iid = method->intrinsic_id(); 1711 intptr_t start = (intptr_t)__ pc(); 1712 int vep_offset = ((intptr_t)__ pc()) - start; 1713 1714 // First instruction must be a nop as it may need to be patched on deoptimisation 1715 __ nop(); 1716 gen_special_dispatch(masm, 1717 method, 1718 in_sig_bt, 1719 in_regs); 1720 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1721 __ flush(); 1722 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1723 return nmethod::new_native_nmethod(method, 1724 compile_id, 1725 masm->code(), 1726 vep_offset, 1727 frame_complete, 1728 stack_slots / VMRegImpl::slots_per_word, 1729 in_ByteSize(-1), 1730 in_ByteSize(-1), 1731 nullptr); 1732 } 1733 address native_func = method->native_function(); 1734 assert(native_func != nullptr, "must have function"); 1735 1736 // An OopMap for lock (and class if static) 1737 OopMapSet *oop_maps = new OopMapSet(); 1738 intptr_t start = (intptr_t)__ pc(); 1739 1740 // We have received a description of where all the java arg are located 1741 // on entry to the wrapper. We need to convert these args to where 1742 // the jni function will expect them. To figure out where they go 1743 // we convert the java signature to a C signature by inserting 1744 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1745 1746 const int total_in_args = method->size_of_parameters(); 1747 int total_c_args = total_in_args + (method->is_static() ? 2 : 1); 1748 1749 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1750 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1751 BasicType* in_elem_bt = nullptr; 1752 1753 int argc = 0; 1754 out_sig_bt[argc++] = T_ADDRESS; 1755 if (method->is_static()) { 1756 out_sig_bt[argc++] = T_OBJECT; 1757 } 1758 1759 for (int i = 0; i < total_in_args ; i++ ) { 1760 out_sig_bt[argc++] = in_sig_bt[i]; 1761 } 1762 1763 // Now figure out where the args must be stored and how much stack space 1764 // they require. 1765 int out_arg_slots; 1766 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args); 1767 1768 if (out_arg_slots < 0) { 1769 return nullptr; 1770 } 1771 1772 // Compute framesize for the wrapper. We need to handlize all oops in 1773 // incoming registers 1774 1775 // Calculate the total number of stack slots we will need. 1776 1777 // First count the abi requirement plus all of the outgoing args 1778 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1779 1780 // Now the space for the inbound oop handle area 1781 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers 1782 1783 int oop_handle_offset = stack_slots; 1784 stack_slots += total_save_slots; 1785 1786 // Now any space we need for handlizing a klass if static method 1787 1788 int klass_slot_offset = 0; 1789 int klass_offset = -1; 1790 int lock_slot_offset = 0; 1791 bool is_static = false; 1792 1793 if (method->is_static()) { 1794 klass_slot_offset = stack_slots; 1795 stack_slots += VMRegImpl::slots_per_word; 1796 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1797 is_static = true; 1798 } 1799 1800 // Plus a lock if needed 1801 1802 if (method->is_synchronized()) { 1803 lock_slot_offset = stack_slots; 1804 stack_slots += VMRegImpl::slots_per_word; 1805 } 1806 1807 // Now a place (+2) to save return values or temp during shuffling 1808 // + 4 for return address (which we own) and saved rfp 1809 stack_slots += 6; 1810 1811 // Ok The space we have allocated will look like: 1812 // 1813 // 1814 // FP-> | | 1815 // |---------------------| 1816 // | 2 slots for moves | 1817 // |---------------------| 1818 // | lock box (if sync) | 1819 // |---------------------| <- lock_slot_offset 1820 // | klass (if static) | 1821 // |---------------------| <- klass_slot_offset 1822 // | oopHandle area | 1823 // |---------------------| <- oop_handle_offset (8 java arg registers) 1824 // | outbound memory | 1825 // | based arguments | 1826 // | | 1827 // |---------------------| 1828 // | | 1829 // SP-> | out_preserved_slots | 1830 // 1831 // 1832 1833 1834 // Now compute actual number of stack words we need rounding to make 1835 // stack properly aligned. 1836 stack_slots = align_up(stack_slots, StackAlignmentInSlots); 1837 1838 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1839 1840 // First thing make an ic check to see if we should even be here 1841 1842 // We are free to use all registers as temps without saving them and 1843 // restoring them except rfp. rfp is the only callee save register 1844 // as far as the interpreter and the compiler(s) are concerned. 1845 1846 const Register receiver = j_rarg0; 1847 1848 Label exception_pending; 1849 1850 assert_different_registers(receiver, rscratch1); 1851 __ verify_oop(receiver); 1852 __ ic_check(8 /* end_alignment */); 1853 1854 // Verified entry point must be aligned 1855 int vep_offset = ((intptr_t)__ pc()) - start; 1856 1857 // If we have to make this method not-entrant we'll overwrite its 1858 // first instruction with a jump. For this action to be legal we 1859 // must ensure that this first instruction is a B, BL, NOP, BKPT, 1860 // SVC, HVC, or SMC. Make it a NOP. 1861 __ nop(); 1862 1863 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) { 1864 Label L_skip_barrier; 1865 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass* 1866 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier); 1867 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); 1868 1869 __ bind(L_skip_barrier); 1870 } 1871 1872 // Generate stack overflow check 1873 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size())); 1874 1875 // Generate a new frame for the wrapper. 1876 __ enter(); 1877 // -2 because return address is already present and so is saved rfp 1878 __ sub(sp, sp, stack_size - 2*wordSize); 1879 1880 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 1881 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */); 1882 1883 // Frame is now completed as far as size and linkage. 1884 int frame_complete = ((intptr_t)__ pc()) - start; 1885 1886 // We use r20 as the oop handle for the receiver/klass 1887 // It is callee save so it survives the call to native 1888 1889 const Register oop_handle_reg = r20; 1890 1891 // 1892 // We immediately shuffle the arguments so that any vm call we have to 1893 // make from here on out (sync slow path, jvmti, etc.) we will have 1894 // captured the oops from our caller and have a valid oopMap for 1895 // them. 1896 1897 // ----------------- 1898 // The Grand Shuffle 1899 1900 // The Java calling convention is either equal (linux) or denser (win64) than the 1901 // c calling convention. However the because of the jni_env argument the c calling 1902 // convention always has at least one more (and two for static) arguments than Java. 1903 // Therefore if we move the args from java -> c backwards then we will never have 1904 // a register->register conflict and we don't have to build a dependency graph 1905 // and figure out how to break any cycles. 1906 // 1907 1908 // Record esp-based slot for receiver on stack for non-static methods 1909 int receiver_offset = -1; 1910 1911 // This is a trick. We double the stack slots so we can claim 1912 // the oops in the caller's frame. Since we are sure to have 1913 // more args than the caller doubling is enough to make 1914 // sure we can capture all the incoming oop args from the 1915 // caller. 1916 // 1917 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1918 1919 // Mark location of rfp (someday) 1920 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp)); 1921 1922 1923 int float_args = 0; 1924 int int_args = 0; 1925 1926 #ifdef ASSERT 1927 bool reg_destroyed[Register::number_of_registers]; 1928 bool freg_destroyed[FloatRegister::number_of_registers]; 1929 for ( int r = 0 ; r < Register::number_of_registers ; r++ ) { 1930 reg_destroyed[r] = false; 1931 } 1932 for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) { 1933 freg_destroyed[f] = false; 1934 } 1935 1936 #endif /* ASSERT */ 1937 1938 // For JNI natives the incoming and outgoing registers are offset upwards. 1939 GrowableArray<int> arg_order(2 * total_in_args); 1940 VMRegPair tmp_vmreg; 1941 tmp_vmreg.set2(r19->as_VMReg()); 1942 1943 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { 1944 arg_order.push(i); 1945 arg_order.push(c_arg); 1946 } 1947 1948 int temploc = -1; 1949 for (int ai = 0; ai < arg_order.length(); ai += 2) { 1950 int i = arg_order.at(ai); 1951 int c_arg = arg_order.at(ai + 1); 1952 __ block_comment(err_msg("move %d -> %d", i, c_arg)); 1953 assert(c_arg != -1 && i != -1, "wrong order"); 1954 #ifdef ASSERT 1955 if (in_regs[i].first()->is_Register()) { 1956 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); 1957 } else if (in_regs[i].first()->is_FloatRegister()) { 1958 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!"); 1959 } 1960 if (out_regs[c_arg].first()->is_Register()) { 1961 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 1962 } else if (out_regs[c_arg].first()->is_FloatRegister()) { 1963 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true; 1964 } 1965 #endif /* ASSERT */ 1966 switch (in_sig_bt[i]) { 1967 case T_ARRAY: 1968 case T_OBJECT: 1969 __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 1970 ((i == 0) && (!is_static)), 1971 &receiver_offset); 1972 int_args++; 1973 break; 1974 case T_VOID: 1975 break; 1976 1977 case T_FLOAT: 1978 __ float_move(in_regs[i], out_regs[c_arg]); 1979 float_args++; 1980 break; 1981 1982 case T_DOUBLE: 1983 assert( i + 1 < total_in_args && 1984 in_sig_bt[i + 1] == T_VOID && 1985 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 1986 __ double_move(in_regs[i], out_regs[c_arg]); 1987 float_args++; 1988 break; 1989 1990 case T_LONG : 1991 __ long_move(in_regs[i], out_regs[c_arg]); 1992 int_args++; 1993 break; 1994 1995 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 1996 1997 default: 1998 __ move32_64(in_regs[i], out_regs[c_arg]); 1999 int_args++; 2000 } 2001 } 2002 2003 // point c_arg at the first arg that is already loaded in case we 2004 // need to spill before we call out 2005 int c_arg = total_c_args - total_in_args; 2006 2007 // Pre-load a static method's oop into c_rarg1. 2008 if (method->is_static()) { 2009 2010 // load oop into a register 2011 __ movoop(c_rarg1, 2012 JNIHandles::make_local(method->method_holder()->java_mirror())); 2013 2014 // Now handlize the static class mirror it's known not-null. 2015 __ str(c_rarg1, Address(sp, klass_offset)); 2016 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 2017 2018 // Now get the handle 2019 __ lea(c_rarg1, Address(sp, klass_offset)); 2020 // and protect the arg if we must spill 2021 c_arg--; 2022 } 2023 2024 // Change state to native (we save the return address in the thread, since it might not 2025 // be pushed on the stack when we do a stack traversal). 2026 // We use the same pc/oopMap repeatedly when we call out 2027 2028 Label native_return; 2029 __ set_last_Java_frame(sp, noreg, native_return, rscratch1); 2030 2031 Label dtrace_method_entry, dtrace_method_entry_done; 2032 if (DTraceMethodProbes) { 2033 __ b(dtrace_method_entry); 2034 __ bind(dtrace_method_entry_done); 2035 } 2036 2037 // RedefineClasses() tracing support for obsolete method entry 2038 if (log_is_enabled(Trace, redefine, class, obsolete)) { 2039 // protect the args we've loaded 2040 save_args(masm, total_c_args, c_arg, out_regs); 2041 __ mov_metadata(c_rarg1, method()); 2042 __ call_VM_leaf( 2043 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 2044 rthread, c_rarg1); 2045 restore_args(masm, total_c_args, c_arg, out_regs); 2046 } 2047 2048 // Lock a synchronized method 2049 2050 // Register definitions used by locking and unlocking 2051 2052 const Register swap_reg = r0; 2053 const Register obj_reg = r19; // Will contain the oop 2054 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) 2055 const Register old_hdr = r13; // value of old header at unlock time 2056 const Register lock_tmp = r14; // Temporary used by lightweight_lock/unlock 2057 const Register tmp = lr; 2058 2059 Label slow_path_lock; 2060 Label lock_done; 2061 2062 if (method->is_synchronized()) { 2063 Label count; 2064 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 2065 2066 // Get the handle (the 2nd argument) 2067 __ mov(oop_handle_reg, c_rarg1); 2068 2069 // Get address of the box 2070 2071 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2072 2073 // Load the oop from the handle 2074 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 2075 2076 if (LockingMode == LM_MONITOR) { 2077 __ b(slow_path_lock); 2078 } else if (LockingMode == LM_LEGACY) { 2079 // Load (object->mark() | 1) into swap_reg %r0 2080 __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 2081 __ orr(swap_reg, rscratch1, 1); 2082 if (EnableValhalla) { 2083 // Mask inline_type bit such that we go to the slow path if object is an inline type 2084 __ andr(swap_reg, swap_reg, ~((int) markWord::inline_type_bit_in_place)); 2085 } 2086 2087 // Save (object->mark() | 1) into BasicLock's displaced header 2088 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 2089 2090 // src -> dest iff dest == r0 else r0 <- dest 2091 __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, count, /*fallthrough*/nullptr); 2092 2093 // Hmm should this move to the slow path code area??? 2094 2095 // Test if the oopMark is an obvious stack pointer, i.e., 2096 // 1) (mark & 3) == 0, and 2097 // 2) sp <= mark < mark + os::pagesize() 2098 // These 3 tests can be done by evaluating the following 2099 // expression: ((mark - sp) & (3 - os::vm_page_size())), 2100 // assuming both stack pointer and pagesize have their 2101 // least significant 2 bits clear. 2102 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg 2103 2104 __ sub(swap_reg, sp, swap_reg); 2105 __ neg(swap_reg, swap_reg); 2106 __ ands(swap_reg, swap_reg, 3 - (int)os::vm_page_size()); 2107 2108 // Save the test result, for recursive case, the result is zero 2109 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 2110 __ br(Assembler::NE, slow_path_lock); 2111 } else { 2112 assert(LockingMode == LM_LIGHTWEIGHT, "must be"); 2113 __ lightweight_lock(lock_reg, obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock); 2114 } 2115 __ bind(count); 2116 __ increment(Address(rthread, JavaThread::held_monitor_count_offset())); 2117 2118 // Slow path will re-enter here 2119 __ bind(lock_done); 2120 } 2121 2122 2123 // Finally just about ready to make the JNI call 2124 2125 // get JNIEnv* which is first argument to native 2126 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset()))); 2127 2128 // Now set thread in native 2129 __ mov(rscratch1, _thread_in_native); 2130 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 2131 __ stlrw(rscratch1, rscratch2); 2132 2133 __ rt_call(native_func); 2134 2135 __ bind(native_return); 2136 2137 intptr_t return_pc = (intptr_t) __ pc(); 2138 oop_maps->add_gc_map(return_pc - start, map); 2139 2140 // Verify or restore cpu control state after JNI call 2141 __ restore_cpu_control_state_after_jni(rscratch1, rscratch2); 2142 2143 // Unpack native results. 2144 switch (ret_type) { 2145 case T_BOOLEAN: __ c2bool(r0); break; 2146 case T_CHAR : __ ubfx(r0, r0, 0, 16); break; 2147 case T_BYTE : __ sbfx(r0, r0, 0, 8); break; 2148 case T_SHORT : __ sbfx(r0, r0, 0, 16); break; 2149 case T_INT : __ sbfx(r0, r0, 0, 32); break; 2150 case T_DOUBLE : 2151 case T_FLOAT : 2152 // Result is in v0 we'll save as needed 2153 break; 2154 case T_ARRAY: // Really a handle 2155 case T_OBJECT: // Really a handle 2156 break; // can't de-handlize until after safepoint check 2157 case T_VOID: break; 2158 case T_LONG: break; 2159 default : ShouldNotReachHere(); 2160 } 2161 2162 Label safepoint_in_progress, safepoint_in_progress_done; 2163 Label after_transition; 2164 2165 // Switch thread to "native transition" state before reading the synchronization state. 2166 // This additional state is necessary because reading and testing the synchronization 2167 // state is not atomic w.r.t. GC, as this scenario demonstrates: 2168 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 2169 // VM thread changes sync state to synchronizing and suspends threads for GC. 2170 // Thread A is resumed to finish this native method, but doesn't block here since it 2171 // didn't see any synchronization is progress, and escapes. 2172 __ mov(rscratch1, _thread_in_native_trans); 2173 2174 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset())); 2175 2176 // Force this write out before the read below 2177 if (!UseSystemMemoryBarrier) { 2178 __ dmb(Assembler::ISH); 2179 } 2180 2181 __ verify_sve_vector_length(); 2182 2183 // Check for safepoint operation in progress and/or pending suspend requests. 2184 { 2185 // No need for acquire as Java threads always disarm themselves. 2186 __ safepoint_poll(safepoint_in_progress, true /* at_return */, false /* acquire */, false /* in_nmethod */); 2187 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset())); 2188 __ cbnzw(rscratch1, safepoint_in_progress); 2189 __ bind(safepoint_in_progress_done); 2190 } 2191 2192 // change thread state 2193 __ mov(rscratch1, _thread_in_Java); 2194 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 2195 __ stlrw(rscratch1, rscratch2); 2196 __ bind(after_transition); 2197 2198 Label reguard; 2199 Label reguard_done; 2200 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset())); 2201 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled); 2202 __ br(Assembler::EQ, reguard); 2203 __ bind(reguard_done); 2204 2205 // native result if any is live 2206 2207 // Unlock 2208 Label unlock_done; 2209 Label slow_path_unlock; 2210 if (method->is_synchronized()) { 2211 2212 // Get locked oop from the handle we passed to jni 2213 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 2214 2215 Label done, not_recursive; 2216 2217 if (LockingMode == LM_LEGACY) { 2218 // Simple recursive lock? 2219 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2220 __ cbnz(rscratch1, not_recursive); 2221 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset())); 2222 __ b(done); 2223 } 2224 2225 __ bind(not_recursive); 2226 2227 // Must save r0 if if it is live now because cmpxchg must use it 2228 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2229 save_native_result(masm, ret_type, stack_slots); 2230 } 2231 2232 if (LockingMode == LM_MONITOR) { 2233 __ b(slow_path_unlock); 2234 } else if (LockingMode == LM_LEGACY) { 2235 // get address of the stack lock 2236 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2237 // get old displaced header 2238 __ ldr(old_hdr, Address(r0, 0)); 2239 2240 // Atomic swap old header if oop still contains the stack lock 2241 Label count; 2242 __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, count, &slow_path_unlock); 2243 __ bind(count); 2244 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset())); 2245 } else { 2246 assert(LockingMode == LM_LIGHTWEIGHT, ""); 2247 __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock); 2248 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset())); 2249 } 2250 2251 // slow path re-enters here 2252 __ bind(unlock_done); 2253 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2254 restore_native_result(masm, ret_type, stack_slots); 2255 } 2256 2257 __ bind(done); 2258 } 2259 2260 Label dtrace_method_exit, dtrace_method_exit_done; 2261 if (DTraceMethodProbes) { 2262 __ b(dtrace_method_exit); 2263 __ bind(dtrace_method_exit_done); 2264 } 2265 2266 __ reset_last_Java_frame(false); 2267 2268 // Unbox oop result, e.g. JNIHandles::resolve result. 2269 if (is_reference_type(ret_type)) { 2270 __ resolve_jobject(r0, r1, r2); 2271 } 2272 2273 if (CheckJNICalls) { 2274 // clear_pending_jni_exception_check 2275 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset())); 2276 } 2277 2278 // reset handle block 2279 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset())); 2280 __ str(zr, Address(r2, JNIHandleBlock::top_offset())); 2281 2282 __ leave(); 2283 2284 // Any exception pending? 2285 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2286 __ cbnz(rscratch1, exception_pending); 2287 2288 // We're done 2289 __ ret(lr); 2290 2291 // Unexpected paths are out of line and go here 2292 2293 // forward the exception 2294 __ bind(exception_pending); 2295 2296 // and forward the exception 2297 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2298 2299 // Slow path locking & unlocking 2300 if (method->is_synchronized()) { 2301 2302 __ block_comment("Slow path lock {"); 2303 __ bind(slow_path_lock); 2304 2305 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 2306 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2307 2308 // protect the args we've loaded 2309 save_args(masm, total_c_args, c_arg, out_regs); 2310 2311 __ mov(c_rarg0, obj_reg); 2312 __ mov(c_rarg1, lock_reg); 2313 __ mov(c_rarg2, rthread); 2314 2315 // Not a leaf but we have last_Java_frame setup as we want 2316 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); 2317 restore_args(masm, total_c_args, c_arg, out_regs); 2318 2319 #ifdef ASSERT 2320 { Label L; 2321 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2322 __ cbz(rscratch1, L); 2323 __ stop("no pending exception allowed on exit from monitorenter"); 2324 __ bind(L); 2325 } 2326 #endif 2327 __ b(lock_done); 2328 2329 __ block_comment("} Slow path lock"); 2330 2331 __ block_comment("Slow path unlock {"); 2332 __ bind(slow_path_unlock); 2333 2334 // If we haven't already saved the native result we must save it now as xmm registers 2335 // are still exposed. 2336 2337 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2338 save_native_result(masm, ret_type, stack_slots); 2339 } 2340 2341 __ mov(c_rarg2, rthread); 2342 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2343 __ mov(c_rarg0, obj_reg); 2344 2345 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 2346 // NOTE that obj_reg == r19 currently 2347 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2348 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2349 2350 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)); 2351 2352 #ifdef ASSERT 2353 { 2354 Label L; 2355 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2356 __ cbz(rscratch1, L); 2357 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 2358 __ bind(L); 2359 } 2360 #endif /* ASSERT */ 2361 2362 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2363 2364 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2365 restore_native_result(masm, ret_type, stack_slots); 2366 } 2367 __ b(unlock_done); 2368 2369 __ block_comment("} Slow path unlock"); 2370 2371 } // synchronized 2372 2373 // SLOW PATH Reguard the stack if needed 2374 2375 __ bind(reguard); 2376 save_native_result(masm, ret_type, stack_slots); 2377 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); 2378 restore_native_result(masm, ret_type, stack_slots); 2379 // and continue 2380 __ b(reguard_done); 2381 2382 // SLOW PATH safepoint 2383 { 2384 __ block_comment("safepoint {"); 2385 __ bind(safepoint_in_progress); 2386 2387 // Don't use call_VM as it will see a possible pending exception and forward it 2388 // and never return here preventing us from clearing _last_native_pc down below. 2389 // 2390 save_native_result(masm, ret_type, stack_slots); 2391 __ mov(c_rarg0, rthread); 2392 #ifndef PRODUCT 2393 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 2394 #endif 2395 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); 2396 __ blr(rscratch1); 2397 2398 // Restore any method result value 2399 restore_native_result(masm, ret_type, stack_slots); 2400 2401 __ b(safepoint_in_progress_done); 2402 __ block_comment("} safepoint"); 2403 } 2404 2405 // SLOW PATH dtrace support 2406 if (DTraceMethodProbes) { 2407 { 2408 __ block_comment("dtrace entry {"); 2409 __ bind(dtrace_method_entry); 2410 2411 // We have all of the arguments setup at this point. We must not touch any register 2412 // argument registers at this point (what if we save/restore them there are no oop? 2413 2414 save_args(masm, total_c_args, c_arg, out_regs); 2415 __ mov_metadata(c_rarg1, method()); 2416 __ call_VM_leaf( 2417 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 2418 rthread, c_rarg1); 2419 restore_args(masm, total_c_args, c_arg, out_regs); 2420 __ b(dtrace_method_entry_done); 2421 __ block_comment("} dtrace entry"); 2422 } 2423 2424 { 2425 __ block_comment("dtrace exit {"); 2426 __ bind(dtrace_method_exit); 2427 save_native_result(masm, ret_type, stack_slots); 2428 __ mov_metadata(c_rarg1, method()); 2429 __ call_VM_leaf( 2430 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 2431 rthread, c_rarg1); 2432 restore_native_result(masm, ret_type, stack_slots); 2433 __ b(dtrace_method_exit_done); 2434 __ block_comment("} dtrace exit"); 2435 } 2436 } 2437 2438 __ flush(); 2439 2440 nmethod *nm = nmethod::new_native_nmethod(method, 2441 compile_id, 2442 masm->code(), 2443 vep_offset, 2444 frame_complete, 2445 stack_slots / VMRegImpl::slots_per_word, 2446 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2447 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2448 oop_maps); 2449 2450 return nm; 2451 } 2452 2453 // this function returns the adjust size (in number of words) to a c2i adapter 2454 // activation for use during deoptimization 2455 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { 2456 assert(callee_locals >= callee_parameters, 2457 "test and remove; got more parms than locals"); 2458 if (callee_locals < callee_parameters) 2459 return 0; // No adjustment for negative locals 2460 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2461 // diff is counted in stack words 2462 return align_up(diff, 2); 2463 } 2464 2465 2466 //------------------------------generate_deopt_blob---------------------------- 2467 void SharedRuntime::generate_deopt_blob() { 2468 // Allocate space for the code 2469 ResourceMark rm; 2470 // Setup code generation tools 2471 int pad = 0; 2472 #if INCLUDE_JVMCI 2473 if (EnableJVMCI) { 2474 pad += 512; // Increase the buffer size when compiling for JVMCI 2475 } 2476 #endif 2477 const char* name = SharedRuntime::stub_name(SharedStubId::deopt_id); 2478 CodeBuffer buffer(name, 2048+pad, 1024); 2479 MacroAssembler* masm = new MacroAssembler(&buffer); 2480 int frame_size_in_words; 2481 OopMap* map = nullptr; 2482 OopMapSet *oop_maps = new OopMapSet(); 2483 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0); 2484 2485 // ------------- 2486 // This code enters when returning to a de-optimized nmethod. A return 2487 // address has been pushed on the stack, and return values are in 2488 // registers. 2489 // If we are doing a normal deopt then we were called from the patched 2490 // nmethod from the point we returned to the nmethod. So the return 2491 // address on the stack is wrong by NativeCall::instruction_size 2492 // We will adjust the value so it looks like we have the original return 2493 // address on the stack (like when we eagerly deoptimized). 2494 // In the case of an exception pending when deoptimizing, we enter 2495 // with a return address on the stack that points after the call we patched 2496 // into the exception handler. We have the following register state from, 2497 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). 2498 // r0: exception oop 2499 // r19: exception handler 2500 // r3: throwing pc 2501 // So in this case we simply jam r3 into the useless return address and 2502 // the stack looks just like we want. 2503 // 2504 // At this point we need to de-opt. We save the argument return 2505 // registers. We call the first C routine, fetch_unroll_info(). This 2506 // routine captures the return values and returns a structure which 2507 // describes the current frame size and the sizes of all replacement frames. 2508 // The current frame is compiled code and may contain many inlined 2509 // functions, each with their own JVM state. We pop the current frame, then 2510 // push all the new frames. Then we call the C routine unpack_frames() to 2511 // populate these frames. Finally unpack_frames() returns us the new target 2512 // address. Notice that callee-save registers are BLOWN here; they have 2513 // already been captured in the vframeArray at the time the return PC was 2514 // patched. 2515 address start = __ pc(); 2516 Label cont; 2517 2518 // Prolog for non exception case! 2519 2520 // Save everything in sight. 2521 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2522 2523 // Normal deoptimization. Save exec mode for unpack_frames. 2524 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved 2525 __ b(cont); 2526 2527 int reexecute_offset = __ pc() - start; 2528 #if INCLUDE_JVMCI && !defined(COMPILER1) 2529 if (UseJVMCICompiler) { 2530 // JVMCI does not use this kind of deoptimization 2531 __ should_not_reach_here(); 2532 } 2533 #endif 2534 2535 // Reexecute case 2536 // return address is the pc describes what bci to do re-execute at 2537 2538 // No need to update map as each call to save_live_registers will produce identical oopmap 2539 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2540 2541 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved 2542 __ b(cont); 2543 2544 #if INCLUDE_JVMCI 2545 Label after_fetch_unroll_info_call; 2546 int implicit_exception_uncommon_trap_offset = 0; 2547 int uncommon_trap_offset = 0; 2548 2549 if (EnableJVMCI) { 2550 implicit_exception_uncommon_trap_offset = __ pc() - start; 2551 2552 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2553 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2554 2555 uncommon_trap_offset = __ pc() - start; 2556 2557 // Save everything in sight. 2558 reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2559 // fetch_unroll_info needs to call last_java_frame() 2560 Label retaddr; 2561 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2562 2563 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2564 __ movw(rscratch1, -1); 2565 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2566 2567 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute); 2568 __ mov(c_rarg0, rthread); 2569 __ movw(c_rarg2, rcpool); // exec mode 2570 __ lea(rscratch1, 2571 RuntimeAddress(CAST_FROM_FN_PTR(address, 2572 Deoptimization::uncommon_trap))); 2573 __ blr(rscratch1); 2574 __ bind(retaddr); 2575 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); 2576 2577 __ reset_last_Java_frame(false); 2578 2579 __ b(after_fetch_unroll_info_call); 2580 } // EnableJVMCI 2581 #endif // INCLUDE_JVMCI 2582 2583 int exception_offset = __ pc() - start; 2584 2585 // Prolog for exception case 2586 2587 // all registers are dead at this entry point, except for r0, and 2588 // r3 which contain the exception oop and exception pc 2589 // respectively. Set them in TLS and fall thru to the 2590 // unpack_with_exception_in_tls entry point. 2591 2592 __ str(r3, Address(rthread, JavaThread::exception_pc_offset())); 2593 __ str(r0, Address(rthread, JavaThread::exception_oop_offset())); 2594 2595 int exception_in_tls_offset = __ pc() - start; 2596 2597 // new implementation because exception oop is now passed in JavaThread 2598 2599 // Prolog for exception case 2600 // All registers must be preserved because they might be used by LinearScan 2601 // Exceptiop oop and throwing PC are passed in JavaThread 2602 // tos: stack at point of call to method that threw the exception (i.e. only 2603 // args are on the stack, no return address) 2604 2605 // The return address pushed by save_live_registers will be patched 2606 // later with the throwing pc. The correct value is not available 2607 // now because loading it from memory would destroy registers. 2608 2609 // NB: The SP at this point must be the SP of the method that is 2610 // being deoptimized. Deoptimization assumes that the frame created 2611 // here by save_live_registers is immediately below the method's SP. 2612 // This is a somewhat fragile mechanism. 2613 2614 // Save everything in sight. 2615 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2616 2617 // Now it is safe to overwrite any register 2618 2619 // Deopt during an exception. Save exec mode for unpack_frames. 2620 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved 2621 2622 // load throwing pc from JavaThread and patch it as the return address 2623 // of the current frame. Then clear the field in JavaThread 2624 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2625 __ protect_return_address(r3); 2626 __ str(r3, Address(rfp, wordSize)); 2627 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2628 2629 #ifdef ASSERT 2630 // verify that there is really an exception oop in JavaThread 2631 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2632 __ verify_oop(r0); 2633 2634 // verify that there is no pending exception 2635 Label no_pending_exception; 2636 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2637 __ cbz(rscratch1, no_pending_exception); 2638 __ stop("must not have pending exception here"); 2639 __ bind(no_pending_exception); 2640 #endif 2641 2642 __ bind(cont); 2643 2644 // Call C code. Need thread and this frame, but NOT official VM entry 2645 // crud. We cannot block on this call, no GC can happen. 2646 // 2647 // UnrollBlock* fetch_unroll_info(JavaThread* thread) 2648 2649 // fetch_unroll_info needs to call last_java_frame(). 2650 2651 Label retaddr; 2652 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2653 #ifdef ASSERT 2654 { Label L; 2655 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset())); 2656 __ cbz(rscratch1, L); 2657 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); 2658 __ bind(L); 2659 } 2660 #endif // ASSERT 2661 __ mov(c_rarg0, rthread); 2662 __ mov(c_rarg1, rcpool); 2663 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2664 __ blr(rscratch1); 2665 __ bind(retaddr); 2666 2667 // Need to have an oopmap that tells fetch_unroll_info where to 2668 // find any register it might need. 2669 oop_maps->add_gc_map(__ pc() - start, map); 2670 2671 __ reset_last_Java_frame(false); 2672 2673 #if INCLUDE_JVMCI 2674 if (EnableJVMCI) { 2675 __ bind(after_fetch_unroll_info_call); 2676 } 2677 #endif 2678 2679 // Load UnrollBlock* into r5 2680 __ mov(r5, r0); 2681 2682 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset())); 2683 Label noException; 2684 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending? 2685 __ br(Assembler::NE, noException); 2686 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2687 // QQQ this is useless it was null above 2688 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2689 __ str(zr, Address(rthread, JavaThread::exception_oop_offset())); 2690 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2691 2692 __ verify_oop(r0); 2693 2694 // Overwrite the result registers with the exception results. 2695 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2696 // I think this is useless 2697 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2698 2699 __ bind(noException); 2700 2701 // Only register save data is on the stack. 2702 // Now restore the result registers. Everything else is either dead 2703 // or captured in the vframeArray. 2704 2705 // Restore fp result register 2706 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes())); 2707 // Restore integer result register 2708 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2709 2710 // Pop all of the register save area off the stack 2711 __ add(sp, sp, frame_size_in_words * wordSize); 2712 2713 // All of the register save area has been popped of the stack. Only the 2714 // return address remains. 2715 2716 // Pop all the frames we must move/replace. 2717 // 2718 // Frame picture (youngest to oldest) 2719 // 1: self-frame (no frame link) 2720 // 2: deopting frame (no frame link) 2721 // 3: caller of deopting frame (could be compiled/interpreted). 2722 // 2723 // Note: by leaving the return address of self-frame on the stack 2724 // and using the size of frame 2 to adjust the stack 2725 // when we are done the return to frame 3 will still be on the stack. 2726 2727 // Pop deoptimized frame 2728 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset())); 2729 __ sub(r2, r2, 2 * wordSize); 2730 __ add(sp, sp, r2); 2731 __ ldp(rfp, zr, __ post(sp, 2 * wordSize)); 2732 2733 #ifdef ASSERT 2734 // Compilers generate code that bang the stack by as much as the 2735 // interpreter would need. So this stack banging should never 2736 // trigger a fault. Verify that it does not on non product builds. 2737 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset())); 2738 __ bang_stack_size(r19, r2); 2739 #endif 2740 // Load address of array of frame pcs into r2 2741 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset())); 2742 2743 // Trash the old pc 2744 // __ addptr(sp, wordSize); FIXME ???? 2745 2746 // Load address of array of frame sizes into r4 2747 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset())); 2748 2749 // Load counter into r3 2750 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset())); 2751 2752 // Now adjust the caller's stack to make up for the extra locals 2753 // but record the original sp so that we can save it in the skeletal interpreter 2754 // frame and the stack walking of interpreter_sender will get the unextended sp 2755 // value and not the "real" sp value. 2756 2757 const Register sender_sp = r6; 2758 2759 __ mov(sender_sp, sp); 2760 __ ldrw(r19, Address(r5, 2761 Deoptimization::UnrollBlock:: 2762 caller_adjustment_offset())); 2763 __ sub(sp, sp, r19); 2764 2765 // Push interpreter frames in a loop 2766 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern 2767 __ mov(rscratch2, rscratch1); 2768 Label loop; 2769 __ bind(loop); 2770 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size 2771 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand 2772 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc 2773 __ enter(); // Save old & set new fp 2774 __ sub(sp, sp, r19); // Prolog 2775 // This value is corrected by layout_activation_impl 2776 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); 2777 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable 2778 __ mov(sender_sp, sp); // Pass sender_sp to next frame 2779 __ sub(r3, r3, 1); // Decrement counter 2780 __ cbnz(r3, loop); 2781 2782 // Re-push self-frame 2783 __ ldr(lr, Address(r2)); 2784 __ enter(); 2785 2786 // Allocate a full sized register save area. We subtract 2 because 2787 // enter() just pushed 2 words 2788 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize); 2789 2790 // Restore frame locals after moving the frame 2791 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes())); 2792 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2793 2794 // Call C code. Need thread but NOT official VM entry 2795 // crud. We cannot block on this call, no GC can happen. Call should 2796 // restore return values to their stack-slots with the new SP. 2797 // 2798 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) 2799 2800 // Use rfp because the frames look interpreted now 2801 // Don't need the precise return PC here, just precise enough to point into this code blob. 2802 address the_pc = __ pc(); 2803 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 2804 2805 __ mov(c_rarg0, rthread); 2806 __ movw(c_rarg1, rcpool); // second arg: exec_mode 2807 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2808 __ blr(rscratch1); 2809 2810 // Set an oopmap for the call site 2811 // Use the same PC we used for the last java frame 2812 oop_maps->add_gc_map(the_pc - start, 2813 new OopMap( frame_size_in_words, 0 )); 2814 2815 // Clear fp AND pc 2816 __ reset_last_Java_frame(true); 2817 2818 // Collect return values 2819 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes())); 2820 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2821 // I think this is useless (throwing pc?) 2822 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2823 2824 // Pop self-frame. 2825 __ leave(); // Epilog 2826 2827 // Jump to interpreter 2828 __ ret(lr); 2829 2830 // Make sure all code is generated 2831 masm->flush(); 2832 2833 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2834 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2835 #if INCLUDE_JVMCI 2836 if (EnableJVMCI) { 2837 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); 2838 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); 2839 } 2840 #endif 2841 } 2842 2843 // Number of stack slots between incoming argument block and the start of 2844 // a new frame. The PROLOG must add this many slots to the stack. The 2845 // EPILOG must remove this many slots. aarch64 needs two slots for 2846 // return address and fp. 2847 // TODO think this is correct but check 2848 uint SharedRuntime::in_preserve_stack_slots() { 2849 return 4; 2850 } 2851 2852 uint SharedRuntime::out_preserve_stack_slots() { 2853 return 0; 2854 } 2855 2856 2857 //------------------------------generate_handler_blob------ 2858 // 2859 // Generate a special Compile2Runtime blob that saves all registers, 2860 // and setup oopmap. 2861 // 2862 SafepointBlob* SharedRuntime::generate_handler_blob(SharedStubId id, address call_ptr) { 2863 assert(is_polling_page_id(id), "expected a polling page stub id"); 2864 2865 ResourceMark rm; 2866 OopMapSet *oop_maps = new OopMapSet(); 2867 OopMap* map; 2868 2869 // Allocate space for the code. Setup code generation tools. 2870 const char* name = SharedRuntime::stub_name(id); 2871 CodeBuffer buffer(name, 2048, 1024); 2872 MacroAssembler* masm = new MacroAssembler(&buffer); 2873 2874 address start = __ pc(); 2875 address call_pc = nullptr; 2876 int frame_size_in_words; 2877 bool cause_return = (id == SharedStubId::polling_page_return_handler_id); 2878 RegisterSaver reg_save(id == SharedStubId::polling_page_vectors_safepoint_handler_id /* save_vectors */); 2879 2880 // When the signal occurred, the LR was either signed and stored on the stack (in which 2881 // case it will be restored from the stack before being used) or unsigned and not stored 2882 // on the stack. Stipping ensures we get the right value. 2883 __ strip_return_address(); 2884 2885 // Save Integer and Float registers. 2886 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2887 2888 // The following is basically a call_VM. However, we need the precise 2889 // address of the call in order to generate an oopmap. Hence, we do all the 2890 // work ourselves. 2891 2892 Label retaddr; 2893 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2894 2895 // The return address must always be correct so that frame constructor never 2896 // sees an invalid pc. 2897 2898 if (!cause_return) { 2899 // overwrite the return address pushed by save_live_registers 2900 // Additionally, r20 is a callee-saved register so we can look at 2901 // it later to determine if someone changed the return address for 2902 // us! 2903 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset())); 2904 __ protect_return_address(r20); 2905 __ str(r20, Address(rfp, wordSize)); 2906 } 2907 2908 // Do the call 2909 __ mov(c_rarg0, rthread); 2910 __ lea(rscratch1, RuntimeAddress(call_ptr)); 2911 __ blr(rscratch1); 2912 __ bind(retaddr); 2913 2914 // Set an oopmap for the call site. This oopmap will map all 2915 // oop-registers and debug-info registers as callee-saved. This 2916 // will allow deoptimization at this safepoint to find all possible 2917 // debug-info recordings, as well as let GC find all oops. 2918 2919 oop_maps->add_gc_map( __ pc() - start, map); 2920 2921 Label noException; 2922 2923 __ reset_last_Java_frame(false); 2924 2925 __ membar(Assembler::LoadLoad | Assembler::LoadStore); 2926 2927 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2928 __ cbz(rscratch1, noException); 2929 2930 // Exception pending 2931 2932 reg_save.restore_live_registers(masm); 2933 2934 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2935 2936 // No exception case 2937 __ bind(noException); 2938 2939 Label no_adjust, bail; 2940 if (!cause_return) { 2941 // If our stashed return pc was modified by the runtime we avoid touching it 2942 __ ldr(rscratch1, Address(rfp, wordSize)); 2943 __ cmp(r20, rscratch1); 2944 __ br(Assembler::NE, no_adjust); 2945 __ authenticate_return_address(r20); 2946 2947 #ifdef ASSERT 2948 // Verify the correct encoding of the poll we're about to skip. 2949 // See NativeInstruction::is_ldrw_to_zr() 2950 __ ldrw(rscratch1, Address(r20)); 2951 __ ubfx(rscratch2, rscratch1, 22, 10); 2952 __ cmpw(rscratch2, 0b1011100101); 2953 __ br(Assembler::NE, bail); 2954 __ ubfx(rscratch2, rscratch1, 0, 5); 2955 __ cmpw(rscratch2, 0b11111); 2956 __ br(Assembler::NE, bail); 2957 #endif 2958 // Adjust return pc forward to step over the safepoint poll instruction 2959 __ add(r20, r20, NativeInstruction::instruction_size); 2960 __ protect_return_address(r20); 2961 __ str(r20, Address(rfp, wordSize)); 2962 } 2963 2964 __ bind(no_adjust); 2965 // Normal exit, restore registers and exit. 2966 reg_save.restore_live_registers(masm); 2967 2968 __ ret(lr); 2969 2970 #ifdef ASSERT 2971 __ bind(bail); 2972 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected"); 2973 #endif 2974 2975 // Make sure all code is generated 2976 masm->flush(); 2977 2978 // Fill-out other meta info 2979 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 2980 } 2981 2982 // 2983 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 2984 // 2985 // Generate a stub that calls into vm to find out the proper destination 2986 // of a java call. All the argument registers are live at this point 2987 // but since this is generic code we don't know what they are and the caller 2988 // must do any gc of the args. 2989 // 2990 RuntimeStub* SharedRuntime::generate_resolve_blob(SharedStubId id, address destination) { 2991 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before"); 2992 assert(is_resolve_id(id), "expected a resolve stub id"); 2993 2994 // allocate space for the code 2995 ResourceMark rm; 2996 2997 const char* name = SharedRuntime::stub_name(id); 2998 CodeBuffer buffer(name, 1000, 512); 2999 MacroAssembler* masm = new MacroAssembler(&buffer); 3000 3001 int frame_size_in_words; 3002 RegisterSaver reg_save(false /* save_vectors */); 3003 3004 OopMapSet *oop_maps = new OopMapSet(); 3005 OopMap* map = nullptr; 3006 3007 int start = __ offset(); 3008 3009 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 3010 3011 int frame_complete = __ offset(); 3012 3013 { 3014 Label retaddr; 3015 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 3016 3017 __ mov(c_rarg0, rthread); 3018 __ lea(rscratch1, RuntimeAddress(destination)); 3019 3020 __ blr(rscratch1); 3021 __ bind(retaddr); 3022 } 3023 3024 // Set an oopmap for the call site. 3025 // We need this not only for callee-saved registers, but also for volatile 3026 // registers that the compiler might be keeping live across a safepoint. 3027 3028 oop_maps->add_gc_map( __ offset() - start, map); 3029 3030 // r0 contains the address we are going to jump to assuming no exception got installed 3031 3032 // clear last_Java_sp 3033 __ reset_last_Java_frame(false); 3034 // check for pending exceptions 3035 Label pending; 3036 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 3037 __ cbnz(rscratch1, pending); 3038 3039 // get the returned Method* 3040 __ get_vm_result_2(rmethod, rthread); 3041 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod))); 3042 3043 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch 3044 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes())); 3045 reg_save.restore_live_registers(masm); 3046 3047 // We are back to the original state on entry and ready to go. 3048 3049 __ br(rscratch1); 3050 3051 // Pending exception after the safepoint 3052 3053 __ bind(pending); 3054 3055 reg_save.restore_live_registers(masm); 3056 3057 // exception pending => remove activation and forward to exception handler 3058 3059 __ str(zr, Address(rthread, JavaThread::vm_result_offset())); 3060 3061 __ ldr(r0, Address(rthread, Thread::pending_exception_offset())); 3062 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3063 3064 // ------------- 3065 // make sure all code is generated 3066 masm->flush(); 3067 3068 // return the blob 3069 // frame_size_words or bytes?? 3070 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); 3071 } 3072 3073 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) { 3074 BufferBlob* buf = BufferBlob::create("inline types pack/unpack", 16 * K); 3075 CodeBuffer buffer(buf); 3076 short buffer_locs[20]; 3077 buffer.insts()->initialize_shared_locs((relocInfo*)buffer_locs, 3078 sizeof(buffer_locs)/sizeof(relocInfo)); 3079 3080 MacroAssembler _masm(&buffer); 3081 MacroAssembler* masm = &_masm; 3082 3083 const Array<SigEntry>* sig_vk = vk->extended_sig(); 3084 const Array<VMRegPair>* regs = vk->return_regs(); 3085 3086 int pack_fields_jobject_off = __ offset(); 3087 // Resolve pre-allocated buffer from JNI handle. 3088 // We cannot do this in generate_call_stub() because it requires GC code to be initialized. 3089 Register Rresult = r14; // See StubGenerator::generate_call_stub(). 3090 __ ldr(r0, Address(Rresult)); 3091 __ resolve_jobject(r0 /* value */, 3092 rthread /* thread */, 3093 r12 /* tmp */); 3094 __ str(r0, Address(Rresult)); 3095 3096 int pack_fields_off = __ offset(); 3097 3098 int j = 1; 3099 for (int i = 0; i < sig_vk->length(); i++) { 3100 BasicType bt = sig_vk->at(i)._bt; 3101 if (bt == T_METADATA) { 3102 continue; 3103 } 3104 if (bt == T_VOID) { 3105 if (sig_vk->at(i-1)._bt == T_LONG || 3106 sig_vk->at(i-1)._bt == T_DOUBLE) { 3107 j++; 3108 } 3109 continue; 3110 } 3111 int off = sig_vk->at(i)._offset; 3112 VMRegPair pair = regs->at(j); 3113 VMReg r_1 = pair.first(); 3114 VMReg r_2 = pair.second(); 3115 Address to(r0, off); 3116 if (bt == T_FLOAT) { 3117 __ strs(r_1->as_FloatRegister(), to); 3118 } else if (bt == T_DOUBLE) { 3119 __ strd(r_1->as_FloatRegister(), to); 3120 } else { 3121 Register val = r_1->as_Register(); 3122 assert_different_registers(to.base(), val, r15, r16, r17); 3123 if (is_reference_type(bt)) { 3124 __ store_heap_oop(to, val, r15, r16, r17, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED); 3125 } else { 3126 __ store_sized_value(to, r_1->as_Register(), type2aelembytes(bt)); 3127 } 3128 } 3129 j++; 3130 } 3131 assert(j == regs->length(), "missed a field?"); 3132 3133 __ ret(lr); 3134 3135 int unpack_fields_off = __ offset(); 3136 3137 Label skip; 3138 __ cbz(r0, skip); 3139 3140 j = 1; 3141 for (int i = 0; i < sig_vk->length(); i++) { 3142 BasicType bt = sig_vk->at(i)._bt; 3143 if (bt == T_METADATA) { 3144 continue; 3145 } 3146 if (bt == T_VOID) { 3147 if (sig_vk->at(i-1)._bt == T_LONG || 3148 sig_vk->at(i-1)._bt == T_DOUBLE) { 3149 j++; 3150 } 3151 continue; 3152 } 3153 int off = sig_vk->at(i)._offset; 3154 assert(off > 0, "offset in object should be positive"); 3155 VMRegPair pair = regs->at(j); 3156 VMReg r_1 = pair.first(); 3157 VMReg r_2 = pair.second(); 3158 Address from(r0, off); 3159 if (bt == T_FLOAT) { 3160 __ ldrs(r_1->as_FloatRegister(), from); 3161 } else if (bt == T_DOUBLE) { 3162 __ ldrd(r_1->as_FloatRegister(), from); 3163 } else if (bt == T_OBJECT || bt == T_ARRAY) { 3164 assert_different_registers(r0, r_1->as_Register()); 3165 __ load_heap_oop(r_1->as_Register(), from, rscratch1, rscratch2); 3166 } else { 3167 assert(is_java_primitive(bt), "unexpected basic type"); 3168 assert_different_registers(r0, r_1->as_Register()); 3169 3170 size_t size_in_bytes = type2aelembytes(bt); 3171 __ load_sized_value(r_1->as_Register(), from, size_in_bytes, bt != T_CHAR && bt != T_BOOLEAN); 3172 } 3173 j++; 3174 } 3175 assert(j == regs->length(), "missed a field?"); 3176 3177 __ bind(skip); 3178 3179 __ ret(lr); 3180 3181 __ flush(); 3182 3183 return BufferedInlineTypeBlob::create(&buffer, pack_fields_off, pack_fields_jobject_off, unpack_fields_off); 3184 } 3185 3186 // Continuation point for throwing of implicit exceptions that are 3187 // not handled in the current activation. Fabricates an exception 3188 // oop and initiates normal exception dispatching in this 3189 // frame. Since we need to preserve callee-saved values (currently 3190 // only for C2, but done for C1 as well) we need a callee-saved oop 3191 // map and therefore have to make these stubs into RuntimeStubs 3192 // rather than BufferBlobs. If the compiler needs all registers to 3193 // be preserved between the fault point and the exception handler 3194 // then it must assume responsibility for that in 3195 // AbstractCompiler::continuation_for_implicit_null_exception or 3196 // continuation_for_implicit_division_by_zero_exception. All other 3197 // implicit exceptions (e.g., NullPointerException or 3198 // AbstractMethodError on entry) are either at call sites or 3199 // otherwise assume that stack unwinding will be initiated, so 3200 // caller saved registers were assumed volatile in the compiler. 3201 3202 RuntimeStub* SharedRuntime::generate_throw_exception(SharedStubId id, address runtime_entry) { 3203 assert(is_throw_id(id), "expected a throw stub id"); 3204 3205 const char* name = SharedRuntime::stub_name(id); 3206 3207 // Information about frame layout at time of blocking runtime call. 3208 // Note that we only have to preserve callee-saved registers since 3209 // the compilers are responsible for supplying a continuation point 3210 // if they expect all registers to be preserved. 3211 // n.b. aarch64 asserts that frame::arg_reg_save_area_bytes == 0 3212 enum layout { 3213 rfp_off = 0, 3214 rfp_off2, 3215 return_off, 3216 return_off2, 3217 framesize // inclusive of return address 3218 }; 3219 3220 int insts_size = 512; 3221 int locs_size = 64; 3222 3223 ResourceMark rm; 3224 const char* timer_msg = "SharedRuntime generate_throw_exception"; 3225 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime)); 3226 3227 CodeBuffer code(name, insts_size, locs_size); 3228 OopMapSet* oop_maps = new OopMapSet(); 3229 MacroAssembler* masm = new MacroAssembler(&code); 3230 3231 address start = __ pc(); 3232 3233 // This is an inlined and slightly modified version of call_VM 3234 // which has the ability to fetch the return PC out of 3235 // thread-local storage and also sets up last_Java_sp slightly 3236 // differently than the real call_VM 3237 3238 __ enter(); // Save FP and LR before call 3239 3240 assert(is_even(framesize/2), "sp not 16-byte aligned"); 3241 3242 // lr and fp are already in place 3243 __ sub(sp, rfp, ((uint64_t)framesize-4) << LogBytesPerInt); // prolog 3244 3245 int frame_complete = __ pc() - start; 3246 3247 // Set up last_Java_sp and last_Java_fp 3248 address the_pc = __ pc(); 3249 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 3250 3251 __ mov(c_rarg0, rthread); 3252 BLOCK_COMMENT("call runtime_entry"); 3253 __ mov(rscratch1, runtime_entry); 3254 __ blr(rscratch1); 3255 3256 // Generate oop map 3257 OopMap* map = new OopMap(framesize, 0); 3258 3259 oop_maps->add_gc_map(the_pc - start, map); 3260 3261 __ reset_last_Java_frame(true); 3262 3263 // Reinitialize the ptrue predicate register, in case the external runtime 3264 // call clobbers ptrue reg, as we may return to SVE compiled code. 3265 __ reinitialize_ptrue(); 3266 3267 __ leave(); 3268 3269 // check for pending exceptions 3270 #ifdef ASSERT 3271 Label L; 3272 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 3273 __ cbnz(rscratch1, L); 3274 __ should_not_reach_here(); 3275 __ bind(L); 3276 #endif // ASSERT 3277 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3278 3279 // codeBlob framesize is in words (not VMRegImpl::slot_size) 3280 RuntimeStub* stub = 3281 RuntimeStub::new_runtime_stub(name, 3282 &code, 3283 frame_complete, 3284 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 3285 oop_maps, false); 3286 return stub; 3287 } 3288 3289 #if INCLUDE_JFR 3290 3291 static void jfr_prologue(address the_pc, MacroAssembler* masm, Register thread) { 3292 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 3293 __ mov(c_rarg0, thread); 3294 } 3295 3296 // The handle is dereferenced through a load barrier. 3297 static void jfr_epilogue(MacroAssembler* masm) { 3298 __ reset_last_Java_frame(true); 3299 } 3300 3301 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint. 3302 // It returns a jobject handle to the event writer. 3303 // The handle is dereferenced and the return value is the event writer oop. 3304 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() { 3305 enum layout { 3306 rbp_off, 3307 rbpH_off, 3308 return_off, 3309 return_off2, 3310 framesize // inclusive of return address 3311 }; 3312 3313 int insts_size = 1024; 3314 int locs_size = 64; 3315 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_write_checkpoint_id); 3316 CodeBuffer code(name, insts_size, locs_size); 3317 OopMapSet* oop_maps = new OopMapSet(); 3318 MacroAssembler* masm = new MacroAssembler(&code); 3319 3320 address start = __ pc(); 3321 __ enter(); 3322 int frame_complete = __ pc() - start; 3323 address the_pc = __ pc(); 3324 jfr_prologue(the_pc, masm, rthread); 3325 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1); 3326 jfr_epilogue(masm); 3327 __ resolve_global_jobject(r0, rscratch1, rscratch2); 3328 __ leave(); 3329 __ ret(lr); 3330 3331 OopMap* map = new OopMap(framesize, 1); // rfp 3332 oop_maps->add_gc_map(the_pc - start, map); 3333 3334 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size) 3335 RuntimeStub::new_runtime_stub(name, &code, frame_complete, 3336 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 3337 oop_maps, false); 3338 return stub; 3339 } 3340 3341 // For c2: call to return a leased buffer. 3342 RuntimeStub* SharedRuntime::generate_jfr_return_lease() { 3343 enum layout { 3344 rbp_off, 3345 rbpH_off, 3346 return_off, 3347 return_off2, 3348 framesize // inclusive of return address 3349 }; 3350 3351 int insts_size = 1024; 3352 int locs_size = 64; 3353 3354 const char* name = SharedRuntime::stub_name(SharedStubId::jfr_return_lease_id); 3355 CodeBuffer code(name, insts_size, locs_size); 3356 OopMapSet* oop_maps = new OopMapSet(); 3357 MacroAssembler* masm = new MacroAssembler(&code); 3358 3359 address start = __ pc(); 3360 __ enter(); 3361 int frame_complete = __ pc() - start; 3362 address the_pc = __ pc(); 3363 jfr_prologue(the_pc, masm, rthread); 3364 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1); 3365 jfr_epilogue(masm); 3366 3367 __ leave(); 3368 __ ret(lr); 3369 3370 OopMap* map = new OopMap(framesize, 1); // rfp 3371 oop_maps->add_gc_map(the_pc - start, map); 3372 3373 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size) 3374 RuntimeStub::new_runtime_stub(name, &code, frame_complete, 3375 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 3376 oop_maps, false); 3377 return stub; 3378 } 3379 3380 #endif // INCLUDE_JFR