1 /*
2 * Copyright (c) 2003, 2025, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved.
4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved.
5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
6 *
7 * This code is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 only, as
9 * published by the Free Software Foundation.
10 *
11 * This code is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * version 2 for more details (a copy is included in the LICENSE file that
15 * accompanied this code).
16 *
17 * You should have received a copy of the GNU General Public License version
18 * 2 along with this work; if not, write to the Free Software Foundation,
19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 *
21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
22 * or visit www.oracle.com if you need additional information or have any
23 * questions.
24 *
25 */
26
27 #include "asm/macroAssembler.hpp"
28 #include "asm/macroAssembler.inline.hpp"
29 #include "code/aotCodeCache.hpp"
30 #include "code/codeCache.hpp"
31 #include "code/compiledIC.hpp"
32 #include "code/debugInfoRec.hpp"
33 #include "code/vtableStubs.hpp"
34 #include "compiler/oopMap.hpp"
35 #include "gc/shared/barrierSetAssembler.hpp"
36 #include "interpreter/interpreter.hpp"
37 #include "interpreter/interp_masm.hpp"
38 #include "logging/log.hpp"
39 #include "memory/resourceArea.hpp"
40 #include "nativeInst_aarch64.hpp"
41 #include "oops/klass.inline.hpp"
42 #include "oops/method.inline.hpp"
43 #include "prims/methodHandles.hpp"
44 #include "runtime/continuation.hpp"
45 #include "runtime/continuationEntry.inline.hpp"
46 #include "runtime/globals.hpp"
47 #include "runtime/jniHandles.hpp"
48 #include "runtime/safepointMechanism.hpp"
49 #include "runtime/sharedRuntime.hpp"
50 #include "runtime/signature.hpp"
51 #include "runtime/stubRoutines.hpp"
52 #include "runtime/timerTrace.hpp"
53 #include "runtime/vframeArray.hpp"
54 #include "utilities/align.hpp"
55 #include "utilities/formatBuffer.hpp"
56 #include "vmreg_aarch64.inline.hpp"
57 #ifdef COMPILER1
58 #include "c1/c1_Runtime1.hpp"
59 #endif
60 #ifdef COMPILER2
61 #include "adfiles/ad_aarch64.hpp"
62 #include "opto/runtime.hpp"
63 #endif
64 #if INCLUDE_JVMCI
65 #include "jvmci/jvmciJavaClasses.hpp"
66 #endif
67
68 #define __ masm->
69
70 #ifdef PRODUCT
71 #define BLOCK_COMMENT(str) /* nothing */
72 #else
73 #define BLOCK_COMMENT(str) __ block_comment(str)
74 #endif
75
76 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
77
78 // FIXME -- this is used by C1
79 class RegisterSaver {
80 const bool _save_vectors;
81 public:
82 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {}
83
84 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words);
85 void restore_live_registers(MacroAssembler* masm);
86
87 // Offsets into the register save area
88 // Used by deoptimization when it is managing result register
89 // values on its own
90
91 int reg_offset_in_bytes(Register r);
92 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); }
93 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); }
94 int v0_offset_in_bytes();
95
96 // Total stack size in bytes for saving sve predicate registers.
97 int total_sve_predicate_in_bytes();
98
99 // Capture info about frame layout
100 // Note this is only correct when not saving full vectors.
101 enum layout {
102 fpu_state_off = 0,
103 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1,
104 // The frame sender code expects that rfp will be in
105 // the "natural" place and will override any oopMap
106 // setting for it. We must therefore force the layout
107 // so that it agrees with the frame sender code.
108 r0_off = fpu_state_off + FPUStateSizeInWords,
109 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register,
110 return_off = rfp_off + Register::max_slots_per_register, // slot for return address
111 reg_save_size = return_off + Register::max_slots_per_register};
112
113 };
114
115 int RegisterSaver::reg_offset_in_bytes(Register r) {
116 // The integer registers are located above the floating point
117 // registers in the stack frame pushed by save_live_registers() so the
118 // offset depends on whether we are saving full vectors, and whether
119 // those vectors are NEON or SVE.
120
121 int slots_per_vect = FloatRegister::save_slots_per_register;
122
123 #if COMPILER2_OR_JVMCI
124 if (_save_vectors) {
125 slots_per_vect = FloatRegister::slots_per_neon_register;
126
127 #ifdef COMPILER2
128 if (Matcher::supports_scalable_vector()) {
129 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT);
130 }
131 #endif
132 }
133 #endif
134
135 int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt;
136 return r0_offset + r->encoding() * wordSize;
137 }
138
139 int RegisterSaver::v0_offset_in_bytes() {
140 // The floating point registers are located above the predicate registers if
141 // they are present in the stack frame pushed by save_live_registers(). So the
142 // offset depends on the saved total predicate vectors in the stack frame.
143 return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt;
144 }
145
146 int RegisterSaver::total_sve_predicate_in_bytes() {
147 #ifdef COMPILER2
148 if (_save_vectors && Matcher::supports_scalable_vector()) {
149 return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) *
150 PRegister::number_of_registers;
151 }
152 #endif
153 return 0;
154 }
155
156 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) {
157 bool use_sve = false;
158 int sve_vector_size_in_bytes = 0;
159 int sve_vector_size_in_slots = 0;
160 int sve_predicate_size_in_slots = 0;
161 int total_predicate_in_bytes = total_sve_predicate_in_bytes();
162 int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size;
163
164 #ifdef COMPILER2
165 use_sve = Matcher::supports_scalable_vector();
166 if (use_sve) {
167 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE);
168 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT);
169 sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots();
170 }
171 #endif
172
173 #if COMPILER2_OR_JVMCI
174 if (_save_vectors) {
175 int extra_save_slots_per_register = 0;
176 // Save upper half of vector registers
177 if (use_sve) {
178 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register;
179 } else {
180 extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register;
181 }
182 int extra_vector_bytes = extra_save_slots_per_register *
183 VMRegImpl::stack_slot_size *
184 FloatRegister::number_of_registers;
185 additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize);
186 }
187 #else
188 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
189 #endif
190
191 int frame_size_in_bytes = align_up(additional_frame_words * wordSize +
192 reg_save_size * BytesPerInt, 16);
193 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
194 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
195 // The caller will allocate additional_frame_words
196 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt;
197 // CodeBlob frame size is in words.
198 int frame_size_in_words = frame_size_in_bytes / wordSize;
199 *total_frame_words = frame_size_in_words;
200
201 // Save Integer and Float registers.
202 __ enter();
203 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes);
204
205 // Set an oopmap for the call site. This oopmap will map all
206 // oop-registers and debug-info registers as callee-saved. This
207 // will allow deoptimization at this safepoint to find all possible
208 // debug-info recordings, as well as let GC find all oops.
209
210 OopMapSet *oop_maps = new OopMapSet();
211 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
212
213 for (int i = 0; i < Register::number_of_registers; i++) {
214 Register r = as_Register(i);
215 if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) {
216 // SP offsets are in 4-byte words.
217 // Register slots are 8 bytes wide, 32 floating-point registers.
218 int sp_offset = Register::max_slots_per_register * i +
219 FloatRegister::save_slots_per_register * FloatRegister::number_of_registers;
220 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg());
221 }
222 }
223
224 for (int i = 0; i < FloatRegister::number_of_registers; i++) {
225 FloatRegister r = as_FloatRegister(i);
226 int sp_offset = 0;
227 if (_save_vectors) {
228 sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) :
229 (FloatRegister::slots_per_neon_register * i);
230 } else {
231 sp_offset = FloatRegister::save_slots_per_register * i;
232 }
233 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg());
234 }
235
236 return oop_map;
237 }
238
239 void RegisterSaver::restore_live_registers(MacroAssembler* masm) {
240 #ifdef COMPILER2
241 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(),
242 Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes());
243 #else
244 #if !INCLUDE_JVMCI
245 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI");
246 #endif
247 __ pop_CPU_state(_save_vectors);
248 #endif
249 __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize)));
250 __ authenticate_return_address();
251 }
252
253 // Is vector's size (in bytes) bigger than a size saved by default?
254 // 8 bytes vector registers are saved by default on AArch64.
255 // The SVE supported min vector size is 8 bytes and we need to save
256 // predicate registers when the vector size is 8 bytes as well.
257 bool SharedRuntime::is_wide_vector(int size) {
258 return size > 8 || (UseSVE > 0 && size >= 8);
259 }
260
261 // ---------------------------------------------------------------------------
262 // Read the array of BasicTypes from a signature, and compute where the
263 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
264 // quantities. Values less than VMRegImpl::stack0 are registers, those above
265 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
266 // as framesizes are fixed.
267 // VMRegImpl::stack0 refers to the first slot 0(sp).
268 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.
269 // Register up to Register::number_of_registers are the 64-bit
270 // integer registers.
271
272 // Note: the INPUTS in sig_bt are in units of Java argument words,
273 // which are 64-bit. The OUTPUTS are in 32-bit units.
274
275 // The Java calling convention is a "shifted" version of the C ABI.
276 // By skipping the first C ABI register we can call non-static jni
277 // methods with small numbers of arguments without having to shuffle
278 // the arguments at all. Since we control the java ABI we ought to at
279 // least get some advantage out of it.
280
281 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
282 VMRegPair *regs,
283 int total_args_passed) {
284
285 // Create the mapping between argument positions and
286 // registers.
287 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
288 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7
289 };
290 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
291 j_farg0, j_farg1, j_farg2, j_farg3,
292 j_farg4, j_farg5, j_farg6, j_farg7
293 };
294
295
296 uint int_args = 0;
297 uint fp_args = 0;
298 uint stk_args = 0;
299
300 for (int i = 0; i < total_args_passed; i++) {
301 switch (sig_bt[i]) {
302 case T_BOOLEAN:
303 case T_CHAR:
304 case T_BYTE:
305 case T_SHORT:
306 case T_INT:
307 if (int_args < Argument::n_int_register_parameters_j) {
308 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
309 } else {
310 stk_args = align_up(stk_args, 2);
311 regs[i].set1(VMRegImpl::stack2reg(stk_args));
312 stk_args += 1;
313 }
314 break;
315 case T_VOID:
316 // halves of T_LONG or T_DOUBLE
317 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
318 regs[i].set_bad();
319 break;
320 case T_LONG:
321 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
322 // fall through
323 case T_OBJECT:
324 case T_ARRAY:
325 case T_ADDRESS:
326 if (int_args < Argument::n_int_register_parameters_j) {
327 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
328 } else {
329 stk_args = align_up(stk_args, 2);
330 regs[i].set2(VMRegImpl::stack2reg(stk_args));
331 stk_args += 2;
332 }
333 break;
334 case T_FLOAT:
335 if (fp_args < Argument::n_float_register_parameters_j) {
336 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
337 } else {
338 stk_args = align_up(stk_args, 2);
339 regs[i].set1(VMRegImpl::stack2reg(stk_args));
340 stk_args += 1;
341 }
342 break;
343 case T_DOUBLE:
344 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
345 if (fp_args < Argument::n_float_register_parameters_j) {
346 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
347 } else {
348 stk_args = align_up(stk_args, 2);
349 regs[i].set2(VMRegImpl::stack2reg(stk_args));
350 stk_args += 2;
351 }
352 break;
353 default:
354 ShouldNotReachHere();
355 break;
356 }
357 }
358
359 return stk_args;
360 }
361
362 // Patch the callers callsite with entry to compiled code if it exists.
363 static void patch_callers_callsite(MacroAssembler *masm) {
364 Label L;
365 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset())));
366 __ cbz(rscratch1, L);
367
368 __ enter();
369 __ push_CPU_state();
370
371 // VM needs caller's callsite
372 // VM needs target method
373 // This needs to be a long call since we will relocate this adapter to
374 // the codeBuffer and it may not reach
375
376 #ifndef PRODUCT
377 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
378 #endif
379
380 __ mov(c_rarg0, rmethod);
381 __ mov(c_rarg1, lr);
382 __ authenticate_return_address(c_rarg1);
383 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
384 __ blr(rscratch1);
385
386 // Explicit isb required because fixup_callers_callsite may change the code
387 // stream.
388 __ safepoint_isb();
389
390 __ pop_CPU_state();
391 // restore sp
392 __ leave();
393 __ bind(L);
394 }
395
396 static void gen_c2i_adapter(MacroAssembler *masm,
397 int total_args_passed, 398 int comp_args_on_stack, 399 const BasicType *sig_bt,
400 const VMRegPair *regs,
401 Label& skip_fixup) {
402 // Before we get into the guts of the C2I adapter, see if we should be here
403 // at all. We've come from compiled code and are attempting to jump to the
404 // interpreter, which means the caller made a static call to get here
405 // (vcalls always get a compiled target if there is one). Check for a
406 // compiled target. If there is one, we need to patch the caller's call.
407 patch_callers_callsite(masm);
408
409 __ bind(skip_fixup);
410
411 int words_pushed = 0;
412
413 // Since all args are passed on the stack, total_args_passed * 414 // Interpreter::stackElementSize is the space we need.
415
416 int extraspace = total_args_passed * Interpreter::stackElementSize;
417
418 __ mov(r19_sender_sp, sp);
419
420 // stack is aligned, keep it that way 421 extraspace = align_up(extraspace, 2*wordSize);
422
423 if (extraspace) 424 __ sub(sp, sp, extraspace);
425
426 // Now write the args into the outgoing interpreter space 427 for (int i = 0; i < total_args_passed; i++) { 428 if (sig_bt[i] == T_VOID) { 429 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 430 continue; 431 }
432
433 // offset to start parameters 434 int st_off = (total_args_passed - i - 1) * Interpreter::stackElementSize; 435 int next_off = st_off - Interpreter::stackElementSize; 436 437 // Say 4 args: 438 // i st_off 439 // 0 32 T_LONG 440 // 1 24 T_VOID 441 // 2 16 T_OBJECT 442 // 3 8 T_BOOL 443 // - 0 return address 444 // 445 // However to make thing extra confusing. Because we can fit a Java long/double in 446 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter 447 // leaves one slot empty and only stores to a single slot. In this case the 448 // slot that is occupied is the T_VOID slot. See I said it was confusing.
449
450 VMReg r_1 = regs[i].first(); 451 VMReg r_2 = regs[i].second(); 452 if (!r_1->is_valid()) { 453 assert(!r_2->is_valid(), ""); 454 continue;
455 }
456 if (r_1->is_stack()) { 457 // memory to memory use rscratch1 458 int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size 459 + extraspace 460 + words_pushed * wordSize); 461 if (!r_2->is_valid()) { 462 // sign extend?? 463 __ ldrw(rscratch1, Address(sp, ld_off)); 464 __ str(rscratch1, Address(sp, st_off));
465
466 } else {
467
468 __ ldr(rscratch1, Address(sp, ld_off));
469
470 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 471 // T_DOUBLE and T_LONG use two slots in the interpreter 472 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 473 // ld_off == LSW, ld_off+wordSize == MSW 474 // st_off == MSW, next_off == LSW 475 __ str(rscratch1, Address(sp, next_off));
476 #ifdef ASSERT
477 // Overwrite the unused slot with known junk 478 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaaaull); 479 __ str(rscratch1, Address(sp, st_off)); 480 #endif /* ASSERT */ 481 } else { 482 __ str(rscratch1, Address(sp, st_off)); 483 }
484 }
485 } else if (r_1->is_Register()) { 486 Register r = r_1->as_Register(); 487 if (!r_2->is_valid()) { 488 // must be only an int (or less ) so move only 32bits to slot 489 // why not sign extend?? 490 __ str(r, Address(sp, st_off)); 491 } else { 492 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 493 // T_DOUBLE and T_LONG use two slots in the interpreter 494 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 495 // jlong/double in gpr 496 #ifdef ASSERT 497 // Overwrite the unused slot with known junk 498 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaabull); 499 __ str(rscratch1, Address(sp, st_off));
500 #endif /* ASSERT */
501 __ str(r, Address(sp, next_off));
502 } else {
503 __ str(r, Address(sp, st_off));
504 }
505 } 506 } else { 507 assert(r_1->is_FloatRegister(), ""); 508 if (!r_2->is_valid()) { 509 // only a float use just part of the slot 510 __ strs(r_1->as_FloatRegister(), Address(sp, st_off)); 511 } else { 512 #ifdef ASSERT 513 // Overwrite the unused slot with known junk 514 __ mov(rscratch1, (uint64_t)0xdeadffffdeadaaacull); 515 __ str(rscratch1, Address(sp, st_off)); 516 #endif /* ASSERT */ 517 __ strd(r_1->as_FloatRegister(), Address(sp, next_off)); 518 }
519 }
520 }
521
522 __ mov(esp, sp); // Interp expects args on caller's expression stack
523
524 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset())));
525 __ br(rscratch1);
526 }
527
528
529 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, 530 int total_args_passed, 531 int comp_args_on_stack, 532 const BasicType *sig_bt, 533 const VMRegPair *regs) {
534
535 // Note: r19_sender_sp contains the senderSP on entry. We must
536 // preserve it since we may do a i2c -> c2i transition if we lose a
537 // race where compiled code goes non-entrant while we get args
538 // ready.
539
540 // Adapters are frameless.
541
542 // An i2c adapter is frameless because the *caller* frame, which is
543 // interpreted, routinely repairs its own esp (from
544 // interpreter_frame_last_sp), even if a callee has modified the
545 // stack pointer. It also recalculates and aligns sp.
546
547 // A c2i adapter is frameless because the *callee* frame, which is
548 // interpreted, routinely repairs its caller's sp (from sender_sp,
549 // which is set up via the senderSP register).
550
551 // In other words, if *either* the caller or callee is interpreted, we can
552 // get the stack pointer repaired after a call.
553
554 // This is why c2i and i2c adapters cannot be indefinitely composed.
555 // In particular, if a c2i adapter were to somehow call an i2c adapter,
556 // both caller and callee would be compiled methods, and neither would
557 // clean up the stack pointer changes performed by the two adapters.
558 // If this happens, control eventually transfers back to the compiled
559 // caller, but with an uncorrected stack, causing delayed havoc.
560
561 // Cut-out for having no stack args.
562 int comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
563 if (comp_args_on_stack) {
564 __ sub(rscratch1, sp, comp_words_on_stack * wordSize); 565 __ andr(sp, rscratch1, -16);
566 }
567
568 // Will jump to the compiled code just as if compiled code was doing it.
569 // Pre-load the register-jump target early, to schedule it better.
570 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset())));
571
572 #if INCLUDE_JVMCI
573 if (EnableJVMCI) {
574 // check if this call should be routed towards a specific entry point
575 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
576 Label no_alternative_target;
577 __ cbz(rscratch2, no_alternative_target);
578 __ mov(rscratch1, rscratch2);
579 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
580 __ bind(no_alternative_target);
581 }
582 #endif // INCLUDE_JVMCI
583
584 // Now generate the shuffle code.
585 for (int i = 0; i < total_args_passed; i++) {
586 if (sig_bt[i] == T_VOID) { 587 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
588 continue;
589 }
590
591 // Pick up 0, 1 or 2 words from SP+offset.
592
593 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 594 "scrambled load targets?");
595 // Load in argument order going down.
596 int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize;
597 // Point to interpreter value (vs. tag)
598 int next_off = ld_off - Interpreter::stackElementSize;
599 //
600 //
601 //
602 VMReg r_1 = regs[i].first();
603 VMReg r_2 = regs[i].second();
604 if (!r_1->is_valid()) {
605 assert(!r_2->is_valid(), "");
606 continue;
607 }
608 if (r_1->is_stack()) {
609 // Convert stack slot to an SP offset (+ wordSize to account for return address )
610 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size;
611 if (!r_2->is_valid()) {
612 // sign extend???
613 __ ldrsw(rscratch2, Address(esp, ld_off));
614 __ str(rscratch2, Address(sp, st_off));
615 } else {
616 //
617 // We are using two optoregs. This can be either T_OBJECT,
618 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates
619 // two slots but only uses one for thr T_LONG or T_DOUBLE case
620 // So we must adjust where to pick up the data to match the
621 // interpreter.
622 //
623 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
624 // are accessed as negative so LSW is at LOW address
625
626 // ld_off is MSW so get LSW
627 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 628 next_off : ld_off;
629 __ ldr(rscratch2, Address(esp, offset));
630 // st_off is LSW (i.e. reg.first())
631 __ str(rscratch2, Address(sp, st_off)); 632 } 633 } else if (r_1->is_Register()) { // Register argument 634 Register r = r_1->as_Register(); 635 if (r_2->is_valid()) { 636 // 637 // We are using two VMRegs. This can be either T_OBJECT, 638 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 639 // two slots but only uses one for thr T_LONG or T_DOUBLE case 640 // So we must adjust where to pick up the data to match the 641 // interpreter.
642
643 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 644 next_off : ld_off; 645 646 // this can be a misaligned move 647 __ ldr(r, Address(esp, offset)); 648 } else { 649 // sign extend and use a full word? 650 __ ldrw(r, Address(esp, ld_off)); 651 } 652 } else { 653 if (!r_2->is_valid()) { 654 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off)); 655 } else { 656 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off)); 657 } 658 } 659 }
660
661 __ mov(rscratch2, rscratch1);
662 __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1
663 __ mov(rscratch1, rscratch2);
664
665 // 6243940 We might end up in handle_wrong_method if
666 // the callee is deoptimized as we race thru here. If that
667 // happens we don't want to take a safepoint because the
668 // caller frame will look interpreted and arguments are now
669 // "compiled" so it is much better to make this transition
670 // invisible to the stack walking code. Unfortunately if
671 // we try and find the callee by normal means a safepoint
672 // is possible. So we stash the desired callee in the thread
673 // and the vm will find there should this case occur.
674
675 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset()));
676
677 __ br(rscratch1);
678 }
679
680 // --------------------------------------------------------------- 681 void SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 682 int total_args_passed, 683 int comp_args_on_stack, 684 const BasicType *sig_bt, 685 const VMRegPair *regs, 686 address entry_address[AdapterBlob::ENTRY_COUNT]) { 687 entry_address[AdapterBlob::I2C] = __ pc();
688
689 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
690
691 entry_address[AdapterBlob::C2I_Unverified] = __ pc(); 692 Label skip_fixup;
693
694 Register data = rscratch2; 695 Register receiver = j_rarg0; 696 Register tmp = r10; // A call-clobbered register not used for arg passing
697
698 // -------------------------------------------------------------------------
699 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls
700 // to the interpreter. The args start out packed in the compiled layout. They
701 // need to be unpacked into the interpreter layout. This will almost always
702 // require some stack space. We grow the current (compiled) stack, then repack
703 // the args. We finally end in a jump to the generic interpreter entry point.
704 // On exit from the interpreter, the interpreter will restore our SP (lest the
705 // compiled code, which relies solely on SP and not FP, get sick).
706
707 { 708 __ block_comment("c2i_unverified_entry {"); 709 // Method might have been compiled since the call site was patched to 710 // interpreted; if that is the case treat it as a miss so we can get 711 // the call site corrected. 712 __ ic_check(1 /* end_alignment */); 713 __ ldr(rmethod, Address(data, CompiledICData::speculated_method_offset()));
714
715 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 716 __ cbz(rscratch1, skip_fixup); 717 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 718 __ block_comment("} c2i_unverified_entry"); 719 }
720
721 entry_address[AdapterBlob::C2I] = __ pc();
722
723 // Class initialization barrier for static methods
724 entry_address[AdapterBlob::C2I_No_Clinit_Check] = nullptr;
725 if (VM_Version::supports_fast_class_init_checks()) { 726 Label L_skip_barrier; 727 728 { // Bypass the barrier for non-static methods 729 __ ldrh(rscratch1, Address(rmethod, Method::access_flags_offset())); 730 __ andsw(zr, rscratch1, JVM_ACC_STATIC); 731 __ br(Assembler::EQ, L_skip_barrier); // non-static 732 } 733 734 __ load_method_holder(rscratch2, rmethod); 735 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier); 736 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); 737 738 __ bind(L_skip_barrier); 739 entry_address[AdapterBlob::C2I_No_Clinit_Check] = __ pc();
740 }
741 742 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 743 bs->c2i_entry_barrier(masm); 744 745 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 746 return;
747 }
748
749 static int c_calling_convention_priv(const BasicType *sig_bt,
750 VMRegPair *regs,
751 int total_args_passed) {
752
753 // We return the amount of VMRegImpl stack slots we need to reserve for all
754 // the arguments NOT counting out_preserve_stack_slots.
755
756 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
757 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7
758 };
759 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
760 c_farg0, c_farg1, c_farg2, c_farg3,
761 c_farg4, c_farg5, c_farg6, c_farg7
762 };
763
764 uint int_args = 0;
765 uint fp_args = 0;
766 uint stk_args = 0; // inc by 2 each time
767
768 for (int i = 0; i < total_args_passed; i++) {
769 switch (sig_bt[i]) {
770 case T_BOOLEAN:
771 case T_CHAR:
772 case T_BYTE:
773 case T_SHORT:
774 case T_INT:
775 if (int_args < Argument::n_int_register_parameters_c) {
776 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
777 } else {
778 #ifdef __APPLE__
779 // Less-than word types are stored one after another.
780 // The code is unable to handle this so bailout.
781 return -1;
782 #endif
783 regs[i].set1(VMRegImpl::stack2reg(stk_args));
784 stk_args += 2;
785 }
786 break;
787 case T_LONG:
788 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
789 // fall through
790 case T_OBJECT:
791 case T_ARRAY:
792 case T_ADDRESS:
793 case T_METADATA:
794 if (int_args < Argument::n_int_register_parameters_c) {
795 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
796 } else {
797 regs[i].set2(VMRegImpl::stack2reg(stk_args));
798 stk_args += 2;
799 }
800 break;
801 case T_FLOAT:
802 if (fp_args < Argument::n_float_register_parameters_c) {
803 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
804 } else {
805 #ifdef __APPLE__
806 // Less-than word types are stored one after another.
807 // The code is unable to handle this so bailout.
808 return -1;
809 #endif
810 regs[i].set1(VMRegImpl::stack2reg(stk_args));
811 stk_args += 2;
812 }
813 break;
814 case T_DOUBLE:
815 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
816 if (fp_args < Argument::n_float_register_parameters_c) {
817 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
818 } else {
819 regs[i].set2(VMRegImpl::stack2reg(stk_args));
820 stk_args += 2;
821 }
822 break;
823 case T_VOID: // Halves of longs and doubles
824 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
825 regs[i].set_bad();
826 break;
827 default:
828 ShouldNotReachHere();
829 break;
830 }
831 }
832
833 return stk_args;
834 }
835
836 int SharedRuntime::vector_calling_convention(VMRegPair *regs,
837 uint num_bits,
838 uint total_args_passed) {
839 // More than 8 argument inputs are not supported now.
840 assert(total_args_passed <= Argument::n_float_register_parameters_c, "unsupported");
841 assert(num_bits >= 64 && num_bits <= 2048 && is_power_of_2(num_bits), "unsupported");
842
843 static const FloatRegister VEC_ArgReg[Argument::n_float_register_parameters_c] = {
844 v0, v1, v2, v3, v4, v5, v6, v7
845 };
846
847 // On SVE, we use the same vector registers with 128-bit vector registers on NEON.
848 int next_reg_val = num_bits == 64 ? 1 : 3;
849 for (uint i = 0; i < total_args_passed; i++) {
850 VMReg vmreg = VEC_ArgReg[i]->as_VMReg();
851 regs[i].set_pair(vmreg->next(next_reg_val), vmreg);
852 }
853 return 0;
854 }
855
856 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
857 VMRegPair *regs,
858 int total_args_passed)
859 {
860 int result = c_calling_convention_priv(sig_bt, regs, total_args_passed);
861 guarantee(result >= 0, "Unsupported arguments configuration");
862 return result;
863 }
864
865
866 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
867 // We always ignore the frame_slots arg and just use the space just below frame pointer
868 // which by this time is free to use
869 switch (ret_type) {
870 case T_FLOAT:
871 __ strs(v0, Address(rfp, -wordSize));
872 break;
873 case T_DOUBLE:
874 __ strd(v0, Address(rfp, -wordSize));
875 break;
876 case T_VOID: break;
877 default: {
878 __ str(r0, Address(rfp, -wordSize));
879 }
880 }
881 }
882
883 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
884 // We always ignore the frame_slots arg and just use the space just below frame pointer
885 // which by this time is free to use
886 switch (ret_type) {
887 case T_FLOAT:
888 __ ldrs(v0, Address(rfp, -wordSize));
889 break;
890 case T_DOUBLE:
891 __ ldrd(v0, Address(rfp, -wordSize));
892 break;
893 case T_VOID: break;
894 default: {
895 __ ldr(r0, Address(rfp, -wordSize));
896 }
897 }
898 }
899 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
900 RegSet x;
901 for ( int i = first_arg ; i < arg_count ; i++ ) {
902 if (args[i].first()->is_Register()) {
903 x = x + args[i].first()->as_Register();
904 } else if (args[i].first()->is_FloatRegister()) {
905 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize)));
906 }
907 }
908 __ push(x, sp);
909 }
910
911 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
912 RegSet x;
913 for ( int i = first_arg ; i < arg_count ; i++ ) {
914 if (args[i].first()->is_Register()) {
915 x = x + args[i].first()->as_Register();
916 } else {
917 ;
918 }
919 }
920 __ pop(x, sp);
921 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
922 if (args[i].first()->is_Register()) {
923 ;
924 } else if (args[i].first()->is_FloatRegister()) {
925 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize)));
926 }
927 }
928 }
929
930 static void verify_oop_args(MacroAssembler* masm,
931 const methodHandle& method,
932 const BasicType* sig_bt,
933 const VMRegPair* regs) {
934 Register temp_reg = r19; // not part of any compiled calling seq
935 if (VerifyOops) {
936 for (int i = 0; i < method->size_of_parameters(); i++) {
937 if (sig_bt[i] == T_OBJECT ||
938 sig_bt[i] == T_ARRAY) {
939 VMReg r = regs[i].first();
940 assert(r->is_valid(), "bad oop arg");
941 if (r->is_stack()) {
942 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
943 __ verify_oop(temp_reg);
944 } else {
945 __ verify_oop(r->as_Register());
946 }
947 }
948 }
949 }
950 }
951
952 // on exit, sp points to the ContinuationEntry
953 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) {
954 assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, "");
955 assert(in_bytes(ContinuationEntry::cont_offset()) % VMRegImpl::stack_slot_size == 0, "");
956 assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, "");
957
958 stack_slots += (int)ContinuationEntry::size()/wordSize;
959 __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata
960
961 OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/);
962
963 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
964 __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset()));
965 __ mov(rscratch1, sp); // we can't use sp as the source in str
966 __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
967
968 return map;
969 }
970
971 // on entry c_rarg1 points to the continuation
972 // sp points to ContinuationEntry
973 // c_rarg3 -- isVirtualThread
974 static void fill_continuation_entry(MacroAssembler* masm) {
975 #ifdef ASSERT
976 __ movw(rscratch1, ContinuationEntry::cookie_value());
977 __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset()));
978 #endif
979
980 __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset()));
981 __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset()));
982 __ str (zr, Address(sp, ContinuationEntry::chunk_offset()));
983 __ strw(zr, Address(sp, ContinuationEntry::argsize_offset()));
984 __ strw(zr, Address(sp, ContinuationEntry::pin_count_offset()));
985
986 __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
987 __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
988
989 __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset()));
990 }
991
992 // on entry, sp points to the ContinuationEntry
993 // on exit, rfp points to the spilled rfp in the entry frame
994 static void continuation_enter_cleanup(MacroAssembler* masm) {
995 #ifndef PRODUCT
996 Label OK;
997 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
998 __ cmp(sp, rscratch1);
999 __ br(Assembler::EQ, OK);
1000 __ stop("incorrect sp1");
1001 __ bind(OK);
1002 #endif
1003 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset()));
1004 __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset()));
1005 __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset()));
1006 __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset()));
1007 __ add(rfp, sp, (int)ContinuationEntry::size());
1008 }
1009
1010 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread)
1011 // On entry: c_rarg1 -- the continuation object
1012 // c_rarg2 -- isContinue
1013 // c_rarg3 -- isVirtualThread
1014 static void gen_continuation_enter(MacroAssembler* masm,
1015 const methodHandle& method,
1016 const BasicType* sig_bt,
1017 const VMRegPair* regs,
1018 int& exception_offset,
1019 OopMapSet*oop_maps,
1020 int& frame_complete,
1021 int& stack_slots,
1022 int& interpreted_entry_offset,
1023 int& compiled_entry_offset) {
1024 //verify_oop_args(masm, method, sig_bt, regs);
1025 Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type);
1026
1027 address start = __ pc();
1028
1029 Label call_thaw, exit;
1030
1031 // i2i entry used at interp_only_mode only
1032 interpreted_entry_offset = __ pc() - start;
1033 {
1034
1035 #ifdef ASSERT
1036 Label is_interp_only;
1037 __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset()));
1038 __ cbnzw(rscratch1, is_interp_only);
1039 __ stop("enterSpecial interpreter entry called when not in interp_only_mode");
1040 __ bind(is_interp_only);
1041 #endif
1042
1043 // Read interpreter arguments into registers (this is an ad-hoc i2c adapter)
1044 __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2));
1045 __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1));
1046 __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0));
1047 __ push_cont_fastpath(rthread);
1048
1049 __ enter();
1050 stack_slots = 2; // will be adjusted in setup
1051 OopMap* map = continuation_enter_setup(masm, stack_slots);
1052 // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe,
1053 // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway.
1054
1055 fill_continuation_entry(masm);
1056
1057 __ cbnz(c_rarg2, call_thaw);
1058
1059 const address tr_call = __ trampoline_call(resolve);
1060 if (tr_call == nullptr) {
1061 fatal("CodeCache is full at gen_continuation_enter");
1062 }
1063
1064 oop_maps->add_gc_map(__ pc() - start, map);
1065 __ post_call_nop();
1066
1067 __ b(exit);
1068
1069 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1070 if (stub == nullptr) {
1071 fatal("CodeCache is full at gen_continuation_enter");
1072 }
1073 }
1074
1075 // compiled entry
1076 __ align(CodeEntryAlignment);
1077 compiled_entry_offset = __ pc() - start;
1078
1079 __ enter();
1080 stack_slots = 2; // will be adjusted in setup
1081 OopMap* map = continuation_enter_setup(masm, stack_slots);
1082 frame_complete = __ pc() - start;
1083
1084 fill_continuation_entry(masm);
1085
1086 __ cbnz(c_rarg2, call_thaw);
1087
1088 const address tr_call = __ trampoline_call(resolve);
1089 if (tr_call == nullptr) {
1090 fatal("CodeCache is full at gen_continuation_enter");
1091 }
1092
1093 oop_maps->add_gc_map(__ pc() - start, map);
1094 __ post_call_nop();
1095
1096 __ b(exit);
1097
1098 __ bind(call_thaw);
1099
1100 ContinuationEntry::_thaw_call_pc_offset = __ pc() - start;
1101 __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw()));
1102 oop_maps->add_gc_map(__ pc() - start, map->deep_copy());
1103 ContinuationEntry::_return_pc_offset = __ pc() - start;
1104 __ post_call_nop();
1105
1106 __ bind(exit);
1107 ContinuationEntry::_cleanup_offset = __ pc() - start;
1108 continuation_enter_cleanup(masm);
1109 __ leave();
1110 __ ret(lr);
1111
1112 /// exception handling
1113
1114 exception_offset = __ pc() - start;
1115 {
1116 __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19
1117
1118 continuation_enter_cleanup(masm);
1119
1120 __ ldr(c_rarg1, Address(rfp, wordSize)); // return address
1121 __ authenticate_return_address(c_rarg1);
1122 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1);
1123
1124 // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc
1125
1126 __ mov(r1, r0); // the exception handler
1127 __ mov(r0, r19); // restore return value contaning the exception oop
1128 __ verify_oop(r0);
1129
1130 __ leave();
1131 __ mov(r3, lr);
1132 __ br(r1); // the exception handler
1133 }
1134
1135 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call);
1136 if (stub == nullptr) {
1137 fatal("CodeCache is full at gen_continuation_enter");
1138 }
1139 }
1140
1141 static void gen_continuation_yield(MacroAssembler* masm,
1142 const methodHandle& method,
1143 const BasicType* sig_bt,
1144 const VMRegPair* regs,
1145 OopMapSet* oop_maps,
1146 int& frame_complete,
1147 int& stack_slots,
1148 int& compiled_entry_offset) {
1149 enum layout {
1150 rfp_off1,
1151 rfp_off2,
1152 lr_off,
1153 lr_off2,
1154 framesize // inclusive of return address
1155 };
1156 // assert(is_even(framesize/2), "sp not 16-byte aligned");
1157 stack_slots = framesize / VMRegImpl::slots_per_word;
1158 assert(stack_slots == 2, "recheck layout");
1159
1160 address start = __ pc();
1161
1162 compiled_entry_offset = __ pc() - start;
1163 __ enter();
1164
1165 __ mov(c_rarg1, sp);
1166
1167 frame_complete = __ pc() - start;
1168 address the_pc = __ pc();
1169
1170 __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup
1171
1172 __ mov(c_rarg0, rthread);
1173 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
1174 __ call_VM_leaf(Continuation::freeze_entry(), 2);
1175 __ reset_last_Java_frame(true);
1176
1177 Label pinned;
1178
1179 __ cbnz(r0, pinned);
1180
1181 // We've succeeded, set sp to the ContinuationEntry
1182 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset()));
1183 __ mov(sp, rscratch1);
1184 continuation_enter_cleanup(masm);
1185
1186 __ bind(pinned); // pinned -- return to caller
1187
1188 // handle pending exception thrown by freeze
1189 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1190 Label ok;
1191 __ cbz(rscratch1, ok);
1192 __ leave();
1193 __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry()));
1194 __ br(rscratch1);
1195 __ bind(ok);
1196
1197 __ leave();
1198 __ ret(lr);
1199
1200 OopMap* map = new OopMap(framesize, 1);
1201 oop_maps->add_gc_map(the_pc - start, map);
1202 }
1203
1204 void SharedRuntime::continuation_enter_cleanup(MacroAssembler* masm) {
1205 ::continuation_enter_cleanup(masm);
1206 }
1207
1208 static void gen_special_dispatch(MacroAssembler* masm,
1209 const methodHandle& method,
1210 const BasicType* sig_bt,
1211 const VMRegPair* regs) {
1212 verify_oop_args(masm, method, sig_bt, regs);
1213 vmIntrinsics::ID iid = method->intrinsic_id();
1214
1215 // Now write the args into the outgoing interpreter space
1216 bool has_receiver = false;
1217 Register receiver_reg = noreg;
1218 int member_arg_pos = -1;
1219 Register member_reg = noreg;
1220 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1221 if (ref_kind != 0) {
1222 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1223 member_reg = r19; // known to be free at this point
1224 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1225 } else if (iid == vmIntrinsics::_invokeBasic) {
1226 has_receiver = true;
1227 } else if (iid == vmIntrinsics::_linkToNative) {
1228 member_arg_pos = method->size_of_parameters() - 1; // trailing NativeEntryPoint argument
1229 member_reg = r19; // known to be free at this point
1230 } else {
1231 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid));
1232 }
1233
1234 if (member_reg != noreg) {
1235 // Load the member_arg into register, if necessary.
1236 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1237 VMReg r = regs[member_arg_pos].first();
1238 if (r->is_stack()) {
1239 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1240 } else {
1241 // no data motion is needed
1242 member_reg = r->as_Register();
1243 }
1244 }
1245
1246 if (has_receiver) {
1247 // Make sure the receiver is loaded into a register.
1248 assert(method->size_of_parameters() > 0, "oob");
1249 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1250 VMReg r = regs[0].first();
1251 assert(r->is_valid(), "bad receiver arg");
1252 if (r->is_stack()) {
1253 // Porting note: This assumes that compiled calling conventions always
1254 // pass the receiver oop in a register. If this is not true on some
1255 // platform, pick a temp and load the receiver from stack.
1256 fatal("receiver always in a register");
1257 receiver_reg = r2; // known to be free at this point
1258 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size));
1259 } else {
1260 // no data motion is needed
1261 receiver_reg = r->as_Register();
1262 }
1263 }
1264
1265 // Figure out which address we are really jumping to:
1266 MethodHandles::generate_method_handle_dispatch(masm, iid,
1267 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1268 }
1269
1270 // ---------------------------------------------------------------------------
1271 // Generate a native wrapper for a given method. The method takes arguments
1272 // in the Java compiled code convention, marshals them to the native
1273 // convention (handlizes oops, etc), transitions to native, makes the call,
1274 // returns to java state (possibly blocking), unhandlizes any result and
1275 // returns.
1276 //
1277 // Critical native functions are a shorthand for the use of
1278 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1279 // functions. The wrapper is expected to unpack the arguments before
1280 // passing them to the callee. Critical native functions leave the state _in_Java,
1281 // since they block out GC.
1282 // Some other parts of JNI setup are skipped like the tear down of the JNI handle
1283 // block and the check for pending exceptions it's impossible for them
1284 // to be thrown.
1285 //
1286 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1287 const methodHandle& method,
1288 int compile_id,
1289 BasicType* in_sig_bt,
1290 VMRegPair* in_regs,
1291 BasicType ret_type) {
1292 if (method->is_continuation_native_intrinsic()) {
1293 int exception_offset = -1;
1294 OopMapSet* oop_maps = new OopMapSet();
1295 int frame_complete = -1;
1296 int stack_slots = -1;
1297 int interpreted_entry_offset = -1;
1298 int vep_offset = -1;
1299 if (method->is_continuation_enter_intrinsic()) {
1300 gen_continuation_enter(masm,
1301 method,
1302 in_sig_bt,
1303 in_regs,
1304 exception_offset,
1305 oop_maps,
1306 frame_complete,
1307 stack_slots,
1308 interpreted_entry_offset,
1309 vep_offset);
1310 } else if (method->is_continuation_yield_intrinsic()) {
1311 gen_continuation_yield(masm,
1312 method,
1313 in_sig_bt,
1314 in_regs,
1315 oop_maps,
1316 frame_complete,
1317 stack_slots,
1318 vep_offset);
1319 } else {
1320 guarantee(false, "Unknown Continuation native intrinsic");
1321 }
1322
1323 #ifdef ASSERT
1324 if (method->is_continuation_enter_intrinsic()) {
1325 assert(interpreted_entry_offset != -1, "Must be set");
1326 assert(exception_offset != -1, "Must be set");
1327 } else {
1328 assert(interpreted_entry_offset == -1, "Must be unset");
1329 assert(exception_offset == -1, "Must be unset");
1330 }
1331 assert(frame_complete != -1, "Must be set");
1332 assert(stack_slots != -1, "Must be set");
1333 assert(vep_offset != -1, "Must be set");
1334 #endif
1335
1336 __ flush();
1337 nmethod* nm = nmethod::new_native_nmethod(method,
1338 compile_id,
1339 masm->code(),
1340 vep_offset,
1341 frame_complete,
1342 stack_slots,
1343 in_ByteSize(-1),
1344 in_ByteSize(-1),
1345 oop_maps,
1346 exception_offset);
1347 if (nm == nullptr) return nm;
1348 if (method->is_continuation_enter_intrinsic()) {
1349 ContinuationEntry::set_enter_code(nm, interpreted_entry_offset);
1350 } else if (method->is_continuation_yield_intrinsic()) {
1351 _cont_doYield_stub = nm;
1352 } else {
1353 guarantee(false, "Unknown Continuation native intrinsic");
1354 }
1355 return nm;
1356 }
1357
1358 if (method->is_method_handle_intrinsic()) {
1359 vmIntrinsics::ID iid = method->intrinsic_id();
1360 intptr_t start = (intptr_t)__ pc();
1361 int vep_offset = ((intptr_t)__ pc()) - start;
1362
1363 // First instruction must be a nop as it may need to be patched on deoptimisation
1364 __ nop();
1365 gen_special_dispatch(masm,
1366 method,
1367 in_sig_bt,
1368 in_regs);
1369 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1370 __ flush();
1371 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1372 return nmethod::new_native_nmethod(method,
1373 compile_id,
1374 masm->code(),
1375 vep_offset,
1376 frame_complete,
1377 stack_slots / VMRegImpl::slots_per_word,
1378 in_ByteSize(-1),
1379 in_ByteSize(-1),
1380 nullptr);
1381 }
1382 address native_func = method->native_function();
1383 assert(native_func != nullptr, "must have function");
1384
1385 // An OopMap for lock (and class if static)
1386 OopMapSet *oop_maps = new OopMapSet();
1387 intptr_t start = (intptr_t)__ pc();
1388
1389 // We have received a description of where all the java arg are located
1390 // on entry to the wrapper. We need to convert these args to where
1391 // the jni function will expect them. To figure out where they go
1392 // we convert the java signature to a C signature by inserting
1393 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1394
1395 const int total_in_args = method->size_of_parameters();
1396 int total_c_args = total_in_args + (method->is_static() ? 2 : 1);
1397
1398 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1399 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1400
1401 int argc = 0;
1402 out_sig_bt[argc++] = T_ADDRESS;
1403 if (method->is_static()) {
1404 out_sig_bt[argc++] = T_OBJECT;
1405 }
1406
1407 for (int i = 0; i < total_in_args ; i++ ) {
1408 out_sig_bt[argc++] = in_sig_bt[i];
1409 }
1410
1411 // Now figure out where the args must be stored and how much stack space
1412 // they require.
1413 int out_arg_slots;
1414 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args);
1415
1416 if (out_arg_slots < 0) {
1417 return nullptr;
1418 }
1419
1420 // Compute framesize for the wrapper. We need to handlize all oops in
1421 // incoming registers
1422
1423 // Calculate the total number of stack slots we will need.
1424
1425 // First count the abi requirement plus all of the outgoing args
1426 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1427
1428 // Now the space for the inbound oop handle area
1429 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers
1430
1431 int oop_handle_offset = stack_slots;
1432 stack_slots += total_save_slots;
1433
1434 // Now any space we need for handlizing a klass if static method
1435
1436 int klass_slot_offset = 0;
1437 int klass_offset = -1;
1438 int lock_slot_offset = 0;
1439 bool is_static = false;
1440
1441 if (method->is_static()) {
1442 klass_slot_offset = stack_slots;
1443 stack_slots += VMRegImpl::slots_per_word;
1444 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1445 is_static = true;
1446 }
1447
1448 // Plus a lock if needed
1449
1450 if (method->is_synchronized()) {
1451 lock_slot_offset = stack_slots;
1452 stack_slots += VMRegImpl::slots_per_word;
1453 }
1454
1455 // Now a place (+2) to save return values or temp during shuffling
1456 // + 4 for return address (which we own) and saved rfp
1457 stack_slots += 6;
1458
1459 // Ok The space we have allocated will look like:
1460 //
1461 //
1462 // FP-> | |
1463 // |---------------------|
1464 // | 2 slots for moves |
1465 // |---------------------|
1466 // | lock box (if sync) |
1467 // |---------------------| <- lock_slot_offset
1468 // | klass (if static) |
1469 // |---------------------| <- klass_slot_offset
1470 // | oopHandle area |
1471 // |---------------------| <- oop_handle_offset (8 java arg registers)
1472 // | outbound memory |
1473 // | based arguments |
1474 // | |
1475 // |---------------------|
1476 // | |
1477 // SP-> | out_preserved_slots |
1478 //
1479 //
1480
1481
1482 // Now compute actual number of stack words we need rounding to make
1483 // stack properly aligned.
1484 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1485
1486 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1487
1488 // First thing make an ic check to see if we should even be here
1489
1490 // We are free to use all registers as temps without saving them and
1491 // restoring them except rfp. rfp is the only callee save register
1492 // as far as the interpreter and the compiler(s) are concerned.
1493
1494 const Register receiver = j_rarg0;
1495
1496 Label exception_pending;
1497
1498 assert_different_registers(receiver, rscratch1);
1499 __ verify_oop(receiver);
1500 __ ic_check(8 /* end_alignment */);
1501
1502 // Verified entry point must be aligned
1503 int vep_offset = ((intptr_t)__ pc()) - start;
1504
1505 // If we have to make this method not-entrant we'll overwrite its
1506 // first instruction with a jump. For this action to be legal we
1507 // must ensure that this first instruction is a B, BL, NOP, BKPT,
1508 // SVC, HVC, or SMC. Make it a NOP.
1509 __ nop();
1510
1511 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
1512 Label L_skip_barrier;
1513 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass*
1514 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier);
1515 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub()));
1516
1517 __ bind(L_skip_barrier);
1518 }
1519
1520 // Generate stack overflow check
1521 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size()));
1522
1523 // Generate a new frame for the wrapper.
1524 __ enter();
1525 // -2 because return address is already present and so is saved rfp
1526 __ sub(sp, sp, stack_size - 2*wordSize);
1527
1528 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler();
1529 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */);
1530
1531 // Frame is now completed as far as size and linkage.
1532 int frame_complete = ((intptr_t)__ pc()) - start;
1533
1534 // We use r20 as the oop handle for the receiver/klass
1535 // It is callee save so it survives the call to native
1536
1537 const Register oop_handle_reg = r20;
1538
1539 //
1540 // We immediately shuffle the arguments so that any vm call we have to
1541 // make from here on out (sync slow path, jvmti, etc.) we will have
1542 // captured the oops from our caller and have a valid oopMap for
1543 // them.
1544
1545 // -----------------
1546 // The Grand Shuffle
1547
1548 // The Java calling convention is either equal (linux) or denser (win64) than the
1549 // c calling convention. However the because of the jni_env argument the c calling
1550 // convention always has at least one more (and two for static) arguments than Java.
1551 // Therefore if we move the args from java -> c backwards then we will never have
1552 // a register->register conflict and we don't have to build a dependency graph
1553 // and figure out how to break any cycles.
1554 //
1555
1556 // Record esp-based slot for receiver on stack for non-static methods
1557 int receiver_offset = -1;
1558
1559 // This is a trick. We double the stack slots so we can claim
1560 // the oops in the caller's frame. Since we are sure to have
1561 // more args than the caller doubling is enough to make
1562 // sure we can capture all the incoming oop args from the
1563 // caller.
1564 //
1565 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1566
1567 // Mark location of rfp (someday)
1568 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp));
1569
1570
1571 int float_args = 0;
1572 int int_args = 0;
1573
1574 #ifdef ASSERT
1575 bool reg_destroyed[Register::number_of_registers];
1576 bool freg_destroyed[FloatRegister::number_of_registers];
1577 for ( int r = 0 ; r < Register::number_of_registers ; r++ ) {
1578 reg_destroyed[r] = false;
1579 }
1580 for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) {
1581 freg_destroyed[f] = false;
1582 }
1583
1584 #endif /* ASSERT */
1585
1586 // For JNI natives the incoming and outgoing registers are offset upwards.
1587 GrowableArray<int> arg_order(2 * total_in_args);
1588
1589 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1590 arg_order.push(i);
1591 arg_order.push(c_arg);
1592 }
1593
1594 for (int ai = 0; ai < arg_order.length(); ai += 2) {
1595 int i = arg_order.at(ai);
1596 int c_arg = arg_order.at(ai + 1);
1597 __ block_comment(err_msg("move %d -> %d", i, c_arg));
1598 assert(c_arg != -1 && i != -1, "wrong order");
1599 #ifdef ASSERT
1600 if (in_regs[i].first()->is_Register()) {
1601 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
1602 } else if (in_regs[i].first()->is_FloatRegister()) {
1603 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!");
1604 }
1605 if (out_regs[c_arg].first()->is_Register()) {
1606 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
1607 } else if (out_regs[c_arg].first()->is_FloatRegister()) {
1608 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true;
1609 }
1610 #endif /* ASSERT */
1611 switch (in_sig_bt[i]) {
1612 case T_ARRAY:
1613 case T_OBJECT:
1614 __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1615 ((i == 0) && (!is_static)),
1616 &receiver_offset);
1617 int_args++;
1618 break;
1619 case T_VOID:
1620 break;
1621
1622 case T_FLOAT:
1623 __ float_move(in_regs[i], out_regs[c_arg]);
1624 float_args++;
1625 break;
1626
1627 case T_DOUBLE:
1628 assert( i + 1 < total_in_args &&
1629 in_sig_bt[i + 1] == T_VOID &&
1630 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1631 __ double_move(in_regs[i], out_regs[c_arg]);
1632 float_args++;
1633 break;
1634
1635 case T_LONG :
1636 __ long_move(in_regs[i], out_regs[c_arg]);
1637 int_args++;
1638 break;
1639
1640 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1641
1642 default:
1643 __ move32_64(in_regs[i], out_regs[c_arg]);
1644 int_args++;
1645 }
1646 }
1647
1648 // point c_arg at the first arg that is already loaded in case we
1649 // need to spill before we call out
1650 int c_arg = total_c_args - total_in_args;
1651
1652 // Pre-load a static method's oop into c_rarg1.
1653 if (method->is_static()) {
1654
1655 // load oop into a register
1656 __ movoop(c_rarg1,
1657 JNIHandles::make_local(method->method_holder()->java_mirror()));
1658
1659 // Now handlize the static class mirror it's known not-null.
1660 __ str(c_rarg1, Address(sp, klass_offset));
1661 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1662
1663 // Now get the handle
1664 __ lea(c_rarg1, Address(sp, klass_offset));
1665 // and protect the arg if we must spill
1666 c_arg--;
1667 }
1668
1669 // Change state to native (we save the return address in the thread, since it might not
1670 // be pushed on the stack when we do a stack traversal). It is enough that the pc()
1671 // points into the right code segment. It does not have to be the correct return pc.
1672 // We use the same pc/oopMap repeatedly when we call out.
1673
1674 Label native_return;
1675 if (method->is_object_wait0()) {
1676 // For convenience we use the pc we want to resume to in case of preemption on Object.wait.
1677 __ set_last_Java_frame(sp, noreg, native_return, rscratch1);
1678 } else {
1679 intptr_t the_pc = (intptr_t) __ pc();
1680 oop_maps->add_gc_map(the_pc - start, map);
1681
1682 __ set_last_Java_frame(sp, noreg, __ pc(), rscratch1);
1683 }
1684
1685 Label dtrace_method_entry, dtrace_method_entry_done;
1686 if (DTraceMethodProbes) {
1687 __ b(dtrace_method_entry);
1688 __ bind(dtrace_method_entry_done);
1689 }
1690
1691 // RedefineClasses() tracing support for obsolete method entry
1692 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1693 // protect the args we've loaded
1694 save_args(masm, total_c_args, c_arg, out_regs);
1695 __ mov_metadata(c_rarg1, method());
1696 __ call_VM_leaf(
1697 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1698 rthread, c_rarg1);
1699 restore_args(masm, total_c_args, c_arg, out_regs);
1700 }
1701
1702 // Lock a synchronized method
1703
1704 // Register definitions used by locking and unlocking
1705
1706 const Register swap_reg = r0;
1707 const Register obj_reg = r19; // Will contain the oop
1708 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
1709 const Register old_hdr = r13; // value of old header at unlock time
1710 const Register lock_tmp = r14; // Temporary used by lightweight_lock/unlock
1711 const Register tmp = lr;
1712
1713 Label slow_path_lock;
1714 Label lock_done;
1715
1716 if (method->is_synchronized()) {
1717 // Get the handle (the 2nd argument)
1718 __ mov(oop_handle_reg, c_rarg1);
1719
1720 // Get address of the box
1721
1722 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1723
1724 // Load the oop from the handle
1725 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1726
1727 __ lightweight_lock(lock_reg, obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock);
1728
1729 // Slow path will re-enter here
1730 __ bind(lock_done);
1731 }
1732
1733
1734 // Finally just about ready to make the JNI call
1735
1736 // get JNIEnv* which is first argument to native
1737 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset())));
1738
1739 // Now set thread in native
1740 __ mov(rscratch1, _thread_in_native);
1741 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1742 __ stlrw(rscratch1, rscratch2);
1743
1744 __ rt_call(native_func);
1745
1746 // Verify or restore cpu control state after JNI call
1747 __ restore_cpu_control_state_after_jni(rscratch1, rscratch2);
1748
1749 // Unpack native results.
1750 switch (ret_type) {
1751 case T_BOOLEAN: __ c2bool(r0); break;
1752 case T_CHAR : __ ubfx(r0, r0, 0, 16); break;
1753 case T_BYTE : __ sbfx(r0, r0, 0, 8); break;
1754 case T_SHORT : __ sbfx(r0, r0, 0, 16); break;
1755 case T_INT : __ sbfx(r0, r0, 0, 32); break;
1756 case T_DOUBLE :
1757 case T_FLOAT :
1758 // Result is in v0 we'll save as needed
1759 break;
1760 case T_ARRAY: // Really a handle
1761 case T_OBJECT: // Really a handle
1762 break; // can't de-handlize until after safepoint check
1763 case T_VOID: break;
1764 case T_LONG: break;
1765 default : ShouldNotReachHere();
1766 }
1767
1768 Label safepoint_in_progress, safepoint_in_progress_done;
1769
1770 // Switch thread to "native transition" state before reading the synchronization state.
1771 // This additional state is necessary because reading and testing the synchronization
1772 // state is not atomic w.r.t. GC, as this scenario demonstrates:
1773 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
1774 // VM thread changes sync state to synchronizing and suspends threads for GC.
1775 // Thread A is resumed to finish this native method, but doesn't block here since it
1776 // didn't see any synchronization is progress, and escapes.
1777 __ mov(rscratch1, _thread_in_native_trans);
1778
1779 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset()));
1780
1781 // Force this write out before the read below
1782 if (!UseSystemMemoryBarrier) {
1783 __ dmb(Assembler::ISH);
1784 }
1785
1786 __ verify_sve_vector_length();
1787
1788 // Check for safepoint operation in progress and/or pending suspend requests.
1789 {
1790 // No need for acquire as Java threads always disarm themselves.
1791 __ safepoint_poll(safepoint_in_progress, true /* at_return */, false /* in_nmethod */);
1792 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
1793 __ cbnzw(rscratch1, safepoint_in_progress);
1794 __ bind(safepoint_in_progress_done);
1795 }
1796
1797 // change thread state
1798 __ mov(rscratch1, _thread_in_Java);
1799 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset()));
1800 __ stlrw(rscratch1, rscratch2);
1801
1802 if (method->is_object_wait0()) {
1803 // Check preemption for Object.wait()
1804 __ ldr(rscratch1, Address(rthread, JavaThread::preempt_alternate_return_offset()));
1805 __ cbz(rscratch1, native_return);
1806 __ str(zr, Address(rthread, JavaThread::preempt_alternate_return_offset()));
1807 __ br(rscratch1);
1808 __ bind(native_return);
1809
1810 intptr_t the_pc = (intptr_t) __ pc();
1811 oop_maps->add_gc_map(the_pc - start, map);
1812 }
1813
1814 Label reguard;
1815 Label reguard_done;
1816 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset()));
1817 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled);
1818 __ br(Assembler::EQ, reguard);
1819 __ bind(reguard_done);
1820
1821 // native result if any is live
1822
1823 // Unlock
1824 Label unlock_done;
1825 Label slow_path_unlock;
1826 if (method->is_synchronized()) {
1827
1828 // Get locked oop from the handle we passed to jni
1829 __ ldr(obj_reg, Address(oop_handle_reg, 0));
1830
1831 // Must save r0 if if it is live now because cmpxchg must use it
1832 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1833 save_native_result(masm, ret_type, stack_slots);
1834 }
1835
1836 __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock);
1837
1838 // slow path re-enters here
1839 __ bind(unlock_done);
1840 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
1841 restore_native_result(masm, ret_type, stack_slots);
1842 }
1843 }
1844
1845 Label dtrace_method_exit, dtrace_method_exit_done;
1846 if (DTraceMethodProbes) {
1847 __ b(dtrace_method_exit);
1848 __ bind(dtrace_method_exit_done);
1849 }
1850
1851 __ reset_last_Java_frame(false);
1852
1853 // Unbox oop result, e.g. JNIHandles::resolve result.
1854 if (is_reference_type(ret_type)) {
1855 __ resolve_jobject(r0, r1, r2);
1856 }
1857
1858 if (CheckJNICalls) {
1859 // clear_pending_jni_exception_check
1860 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset()));
1861 }
1862
1863 // reset handle block
1864 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset()));
1865 __ str(zr, Address(r2, JNIHandleBlock::top_offset()));
1866
1867 __ leave();
1868
1869 #if INCLUDE_JFR
1870 // We need to do a poll test after unwind in case the sampler
1871 // managed to sample the native frame after returning to Java.
1872 Label L_return;
1873 __ ldr(rscratch1, Address(rthread, JavaThread::polling_word_offset()));
1874 address poll_test_pc = __ pc();
1875 __ relocate(relocInfo::poll_return_type);
1876 __ tbz(rscratch1, log2i_exact(SafepointMechanism::poll_bit()), L_return);
1877 assert(SharedRuntime::polling_page_return_handler_blob() != nullptr,
1878 "polling page return stub not created yet");
1879 address stub = SharedRuntime::polling_page_return_handler_blob()->entry_point();
1880 __ adr(rscratch1, InternalAddress(poll_test_pc));
1881 __ str(rscratch1, Address(rthread, JavaThread::saved_exception_pc_offset()));
1882 __ far_jump(RuntimeAddress(stub));
1883 __ bind(L_return);
1884 #endif // INCLUDE_JFR
1885
1886 // Any exception pending?
1887 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1888 __ cbnz(rscratch1, exception_pending);
1889
1890 // We're done
1891 __ ret(lr);
1892
1893 // Unexpected paths are out of line and go here
1894
1895 // forward the exception
1896 __ bind(exception_pending);
1897
1898 // and forward the exception
1899 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
1900
1901 // Slow path locking & unlocking
1902 if (method->is_synchronized()) {
1903
1904 __ block_comment("Slow path lock {");
1905 __ bind(slow_path_lock);
1906
1907 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
1908 // args are (oop obj, BasicLock* lock, JavaThread* thread)
1909
1910 // protect the args we've loaded
1911 save_args(masm, total_c_args, c_arg, out_regs);
1912
1913 __ mov(c_rarg0, obj_reg);
1914 __ mov(c_rarg1, lock_reg);
1915 __ mov(c_rarg2, rthread);
1916
1917 // Not a leaf but we have last_Java_frame setup as we want.
1918 // We don't want to unmount in case of contention since that would complicate preserving
1919 // the arguments that had already been marshalled into the native convention. So we force
1920 // the freeze slow path to find this native wrapper frame (see recurse_freeze_native_frame())
1921 // and pin the vthread. Otherwise the fast path won't find it since we don't walk the stack.
1922 __ push_cont_fastpath();
1923 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
1924 __ pop_cont_fastpath();
1925 restore_args(masm, total_c_args, c_arg, out_regs);
1926
1927 #ifdef ASSERT
1928 { Label L;
1929 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1930 __ cbz(rscratch1, L);
1931 __ stop("no pending exception allowed on exit from monitorenter");
1932 __ bind(L);
1933 }
1934 #endif
1935 __ b(lock_done);
1936
1937 __ block_comment("} Slow path lock");
1938
1939 __ block_comment("Slow path unlock {");
1940 __ bind(slow_path_unlock);
1941
1942 // If we haven't already saved the native result we must save it now as xmm registers
1943 // are still exposed.
1944
1945 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1946 save_native_result(masm, ret_type, stack_slots);
1947 }
1948
1949 __ mov(c_rarg2, rthread);
1950 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size));
1951 __ mov(c_rarg0, obj_reg);
1952
1953 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
1954 // NOTE that obj_reg == r19 currently
1955 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1956 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1957
1958 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C));
1959
1960 #ifdef ASSERT
1961 {
1962 Label L;
1963 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1964 __ cbz(rscratch1, L);
1965 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
1966 __ bind(L);
1967 }
1968 #endif /* ASSERT */
1969
1970 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset())));
1971
1972 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
1973 restore_native_result(masm, ret_type, stack_slots);
1974 }
1975 __ b(unlock_done);
1976
1977 __ block_comment("} Slow path unlock");
1978
1979 } // synchronized
1980
1981 // SLOW PATH Reguard the stack if needed
1982
1983 __ bind(reguard);
1984 save_native_result(masm, ret_type, stack_slots);
1985 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
1986 restore_native_result(masm, ret_type, stack_slots);
1987 // and continue
1988 __ b(reguard_done);
1989
1990 // SLOW PATH safepoint
1991 {
1992 __ block_comment("safepoint {");
1993 __ bind(safepoint_in_progress);
1994
1995 // Don't use call_VM as it will see a possible pending exception and forward it
1996 // and never return here preventing us from clearing _last_native_pc down below.
1997 //
1998 save_native_result(masm, ret_type, stack_slots);
1999 __ mov(c_rarg0, rthread);
2000 #ifndef PRODUCT
2001 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area");
2002 #endif
2003 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2004 __ blr(rscratch1);
2005
2006 // Restore any method result value
2007 restore_native_result(masm, ret_type, stack_slots);
2008
2009 __ b(safepoint_in_progress_done);
2010 __ block_comment("} safepoint");
2011 }
2012
2013 // SLOW PATH dtrace support
2014 if (DTraceMethodProbes) {
2015 {
2016 __ block_comment("dtrace entry {");
2017 __ bind(dtrace_method_entry);
2018
2019 // We have all of the arguments setup at this point. We must not touch any register
2020 // argument registers at this point (what if we save/restore them there are no oop?
2021
2022 save_args(masm, total_c_args, c_arg, out_regs);
2023 __ mov_metadata(c_rarg1, method());
2024 __ call_VM_leaf(
2025 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2026 rthread, c_rarg1);
2027 restore_args(masm, total_c_args, c_arg, out_regs);
2028 __ b(dtrace_method_entry_done);
2029 __ block_comment("} dtrace entry");
2030 }
2031
2032 {
2033 __ block_comment("dtrace exit {");
2034 __ bind(dtrace_method_exit);
2035 save_native_result(masm, ret_type, stack_slots);
2036 __ mov_metadata(c_rarg1, method());
2037 __ call_VM_leaf(
2038 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2039 rthread, c_rarg1);
2040 restore_native_result(masm, ret_type, stack_slots);
2041 __ b(dtrace_method_exit_done);
2042 __ block_comment("} dtrace exit");
2043 }
2044 }
2045
2046 __ flush();
2047
2048 nmethod *nm = nmethod::new_native_nmethod(method,
2049 compile_id,
2050 masm->code(),
2051 vep_offset,
2052 frame_complete,
2053 stack_slots / VMRegImpl::slots_per_word,
2054 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2055 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2056 oop_maps);
2057
2058 return nm;
2059 }
2060
2061 // this function returns the adjust size (in number of words) to a c2i adapter
2062 // activation for use during deoptimization
2063 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2064 assert(callee_locals >= callee_parameters,
2065 "test and remove; got more parms than locals");
2066 if (callee_locals < callee_parameters)
2067 return 0; // No adjustment for negative locals
2068 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2069 // diff is counted in stack words
2070 return align_up(diff, 2);
2071 }
2072
2073
2074 //------------------------------generate_deopt_blob----------------------------
2075 void SharedRuntime::generate_deopt_blob() {
2076 // Allocate space for the code
2077 ResourceMark rm;
2078 // Setup code generation tools
2079 int pad = 0;
2080 #if INCLUDE_JVMCI
2081 if (EnableJVMCI) {
2082 pad += 512; // Increase the buffer size when compiling for JVMCI
2083 }
2084 #endif
2085 const char* name = SharedRuntime::stub_name(StubId::shared_deopt_id);
2086 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, BlobId::shared_deopt_id);
2087 if (blob != nullptr) {
2088 _deopt_blob = blob->as_deoptimization_blob();
2089 return;
2090 }
2091
2092 CodeBuffer buffer(name, 2048+pad, 1024);
2093 MacroAssembler* masm = new MacroAssembler(&buffer);
2094 int frame_size_in_words;
2095 OopMap* map = nullptr;
2096 OopMapSet *oop_maps = new OopMapSet();
2097 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0);
2098
2099 // -------------
2100 // This code enters when returning to a de-optimized nmethod. A return
2101 // address has been pushed on the stack, and return values are in
2102 // registers.
2103 // If we are doing a normal deopt then we were called from the patched
2104 // nmethod from the point we returned to the nmethod. So the return
2105 // address on the stack is wrong by NativeCall::instruction_size
2106 // We will adjust the value so it looks like we have the original return
2107 // address on the stack (like when we eagerly deoptimized).
2108 // In the case of an exception pending when deoptimizing, we enter
2109 // with a return address on the stack that points after the call we patched
2110 // into the exception handler. We have the following register state from,
2111 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2112 // r0: exception oop
2113 // r19: exception handler
2114 // r3: throwing pc
2115 // So in this case we simply jam r3 into the useless return address and
2116 // the stack looks just like we want.
2117 //
2118 // At this point we need to de-opt. We save the argument return
2119 // registers. We call the first C routine, fetch_unroll_info(). This
2120 // routine captures the return values and returns a structure which
2121 // describes the current frame size and the sizes of all replacement frames.
2122 // The current frame is compiled code and may contain many inlined
2123 // functions, each with their own JVM state. We pop the current frame, then
2124 // push all the new frames. Then we call the C routine unpack_frames() to
2125 // populate these frames. Finally unpack_frames() returns us the new target
2126 // address. Notice that callee-save registers are BLOWN here; they have
2127 // already been captured in the vframeArray at the time the return PC was
2128 // patched.
2129 address start = __ pc();
2130 Label cont;
2131
2132 // Prolog for non exception case!
2133
2134 // Save everything in sight.
2135 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2136
2137 // Normal deoptimization. Save exec mode for unpack_frames.
2138 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved
2139 __ b(cont);
2140
2141 int reexecute_offset = __ pc() - start;
2142 #if INCLUDE_JVMCI && !defined(COMPILER1)
2143 if (UseJVMCICompiler) {
2144 // JVMCI does not use this kind of deoptimization
2145 __ should_not_reach_here();
2146 }
2147 #endif
2148
2149 // Reexecute case
2150 // return address is the pc describes what bci to do re-execute at
2151
2152 // No need to update map as each call to save_live_registers will produce identical oopmap
2153 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2154
2155 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved
2156 __ b(cont);
2157
2158 #if INCLUDE_JVMCI
2159 Label after_fetch_unroll_info_call;
2160 int implicit_exception_uncommon_trap_offset = 0;
2161 int uncommon_trap_offset = 0;
2162
2163 if (EnableJVMCI) {
2164 implicit_exception_uncommon_trap_offset = __ pc() - start;
2165
2166 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2167 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2168
2169 uncommon_trap_offset = __ pc() - start;
2170
2171 // Save everything in sight.
2172 reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2173 // fetch_unroll_info needs to call last_java_frame()
2174 Label retaddr;
2175 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2176
2177 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2178 __ movw(rscratch1, -1);
2179 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset())));
2180
2181 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute);
2182 __ mov(c_rarg0, rthread);
2183 __ movw(c_rarg2, rcpool); // exec mode
2184 __ lea(rscratch1,
2185 RuntimeAddress(CAST_FROM_FN_PTR(address,
2186 Deoptimization::uncommon_trap)));
2187 __ blr(rscratch1);
2188 __ bind(retaddr);
2189 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2190
2191 __ reset_last_Java_frame(false);
2192
2193 __ b(after_fetch_unroll_info_call);
2194 } // EnableJVMCI
2195 #endif // INCLUDE_JVMCI
2196
2197 int exception_offset = __ pc() - start;
2198
2199 // Prolog for exception case
2200
2201 // all registers are dead at this entry point, except for r0, and
2202 // r3 which contain the exception oop and exception pc
2203 // respectively. Set them in TLS and fall thru to the
2204 // unpack_with_exception_in_tls entry point.
2205
2206 __ str(r3, Address(rthread, JavaThread::exception_pc_offset()));
2207 __ str(r0, Address(rthread, JavaThread::exception_oop_offset()));
2208
2209 int exception_in_tls_offset = __ pc() - start;
2210
2211 // new implementation because exception oop is now passed in JavaThread
2212
2213 // Prolog for exception case
2214 // All registers must be preserved because they might be used by LinearScan
2215 // Exceptiop oop and throwing PC are passed in JavaThread
2216 // tos: stack at point of call to method that threw the exception (i.e. only
2217 // args are on the stack, no return address)
2218
2219 // The return address pushed by save_live_registers will be patched
2220 // later with the throwing pc. The correct value is not available
2221 // now because loading it from memory would destroy registers.
2222
2223 // NB: The SP at this point must be the SP of the method that is
2224 // being deoptimized. Deoptimization assumes that the frame created
2225 // here by save_live_registers is immediately below the method's SP.
2226 // This is a somewhat fragile mechanism.
2227
2228 // Save everything in sight.
2229 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2230
2231 // Now it is safe to overwrite any register
2232
2233 // Deopt during an exception. Save exec mode for unpack_frames.
2234 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved
2235
2236 // load throwing pc from JavaThread and patch it as the return address
2237 // of the current frame. Then clear the field in JavaThread
2238 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2239 __ protect_return_address(r3);
2240 __ str(r3, Address(rfp, wordSize));
2241 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2242
2243 #ifdef ASSERT
2244 // verify that there is really an exception oop in JavaThread
2245 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2246 __ verify_oop(r0);
2247
2248 // verify that there is no pending exception
2249 Label no_pending_exception;
2250 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2251 __ cbz(rscratch1, no_pending_exception);
2252 __ stop("must not have pending exception here");
2253 __ bind(no_pending_exception);
2254 #endif
2255
2256 __ bind(cont);
2257
2258 // Call C code. Need thread and this frame, but NOT official VM entry
2259 // crud. We cannot block on this call, no GC can happen.
2260 //
2261 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2262
2263 // fetch_unroll_info needs to call last_java_frame().
2264
2265 Label retaddr;
2266 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2267 #ifdef ASSERT
2268 { Label L;
2269 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset()));
2270 __ cbz(rscratch1, L);
2271 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2272 __ bind(L);
2273 }
2274 #endif // ASSERT
2275 __ mov(c_rarg0, rthread);
2276 __ mov(c_rarg1, rcpool);
2277 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2278 __ blr(rscratch1);
2279 __ bind(retaddr);
2280
2281 // Need to have an oopmap that tells fetch_unroll_info where to
2282 // find any register it might need.
2283 oop_maps->add_gc_map(__ pc() - start, map);
2284
2285 __ reset_last_Java_frame(false);
2286
2287 #if INCLUDE_JVMCI
2288 if (EnableJVMCI) {
2289 __ bind(after_fetch_unroll_info_call);
2290 }
2291 #endif
2292
2293 // Load UnrollBlock* into r5
2294 __ mov(r5, r0);
2295
2296 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset()));
2297 Label noException;
2298 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending?
2299 __ br(Assembler::NE, noException);
2300 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset()));
2301 // QQQ this is useless it was null above
2302 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset()));
2303 __ str(zr, Address(rthread, JavaThread::exception_oop_offset()));
2304 __ str(zr, Address(rthread, JavaThread::exception_pc_offset()));
2305
2306 __ verify_oop(r0);
2307
2308 // Overwrite the result registers with the exception results.
2309 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2310 // I think this is useless
2311 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2312
2313 __ bind(noException);
2314
2315 // Only register save data is on the stack.
2316 // Now restore the result registers. Everything else is either dead
2317 // or captured in the vframeArray.
2318
2319 // Restore fp result register
2320 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2321 // Restore integer result register
2322 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2323
2324 // Pop all of the register save area off the stack
2325 __ add(sp, sp, frame_size_in_words * wordSize);
2326
2327 // All of the register save area has been popped of the stack. Only the
2328 // return address remains.
2329
2330 // Pop all the frames we must move/replace.
2331 //
2332 // Frame picture (youngest to oldest)
2333 // 1: self-frame (no frame link)
2334 // 2: deopting frame (no frame link)
2335 // 3: caller of deopting frame (could be compiled/interpreted).
2336 //
2337 // Note: by leaving the return address of self-frame on the stack
2338 // and using the size of frame 2 to adjust the stack
2339 // when we are done the return to frame 3 will still be on the stack.
2340
2341 // Pop deoptimized frame
2342 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset()));
2343 __ sub(r2, r2, 2 * wordSize);
2344 __ add(sp, sp, r2);
2345 __ ldp(rfp, zr, __ post(sp, 2 * wordSize));
2346
2347 #ifdef ASSERT
2348 // Compilers generate code that bang the stack by as much as the
2349 // interpreter would need. So this stack banging should never
2350 // trigger a fault. Verify that it does not on non product builds.
2351 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset()));
2352 __ bang_stack_size(r19, r2);
2353 #endif
2354 // Load address of array of frame pcs into r2
2355 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset()));
2356
2357 // Trash the old pc
2358 // __ addptr(sp, wordSize); FIXME ????
2359
2360 // Load address of array of frame sizes into r4
2361 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset()));
2362
2363 // Load counter into r3
2364 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset()));
2365
2366 // Now adjust the caller's stack to make up for the extra locals
2367 // but record the original sp so that we can save it in the skeletal interpreter
2368 // frame and the stack walking of interpreter_sender will get the unextended sp
2369 // value and not the "real" sp value.
2370
2371 const Register sender_sp = r6;
2372
2373 __ mov(sender_sp, sp);
2374 __ ldrw(r19, Address(r5,
2375 Deoptimization::UnrollBlock::
2376 caller_adjustment_offset()));
2377 __ sub(sp, sp, r19);
2378
2379 // Push interpreter frames in a loop
2380 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern
2381 __ mov(rscratch2, rscratch1);
2382 Label loop;
2383 __ bind(loop);
2384 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size
2385 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand
2386 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc
2387 __ enter(); // Save old & set new fp
2388 __ sub(sp, sp, r19); // Prolog
2389 // This value is corrected by layout_activation_impl
2390 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
2391 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable
2392 __ mov(sender_sp, sp); // Pass sender_sp to next frame
2393 __ sub(r3, r3, 1); // Decrement counter
2394 __ cbnz(r3, loop);
2395
2396 // Re-push self-frame
2397 __ ldr(lr, Address(r2));
2398 __ enter();
2399
2400 // Allocate a full sized register save area. We subtract 2 because
2401 // enter() just pushed 2 words
2402 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize);
2403
2404 // Restore frame locals after moving the frame
2405 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2406 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2407
2408 // Call C code. Need thread but NOT official VM entry
2409 // crud. We cannot block on this call, no GC can happen. Call should
2410 // restore return values to their stack-slots with the new SP.
2411 //
2412 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
2413
2414 // Use rfp because the frames look interpreted now
2415 // Don't need the precise return PC here, just precise enough to point into this code blob.
2416 address the_pc = __ pc();
2417 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2418
2419 __ mov(c_rarg0, rthread);
2420 __ movw(c_rarg1, rcpool); // second arg: exec_mode
2421 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2422 __ blr(rscratch1);
2423
2424 // Set an oopmap for the call site
2425 // Use the same PC we used for the last java frame
2426 oop_maps->add_gc_map(the_pc - start,
2427 new OopMap( frame_size_in_words, 0 ));
2428
2429 // Clear fp AND pc
2430 __ reset_last_Java_frame(true);
2431
2432 // Collect return values
2433 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes()));
2434 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes()));
2435 // I think this is useless (throwing pc?)
2436 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes()));
2437
2438 // Pop self-frame.
2439 __ leave(); // Epilog
2440
2441 // Jump to interpreter
2442 __ ret(lr);
2443
2444 // Make sure all code is generated
2445 masm->flush();
2446
2447 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2448 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2449 #if INCLUDE_JVMCI
2450 if (EnableJVMCI) {
2451 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
2452 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
2453 }
2454 #endif
2455
2456 AOTCodeCache::store_code_blob(*_deopt_blob, AOTCodeEntry::SharedBlob, BlobId::shared_deopt_id);
2457 }
2458
2459 // Number of stack slots between incoming argument block and the start of
2460 // a new frame. The PROLOG must add this many slots to the stack. The
2461 // EPILOG must remove this many slots. aarch64 needs two slots for
2462 // return address and fp.
2463 // TODO think this is correct but check
2464 uint SharedRuntime::in_preserve_stack_slots() {
2465 return 4;
2466 }
2467
2468 uint SharedRuntime::out_preserve_stack_slots() {
2469 return 0;
2470 }
2471
2472
2473 VMReg SharedRuntime::thread_register() {
2474 return rthread->as_VMReg();
2475 }
2476
2477 //------------------------------generate_handler_blob------
2478 //
2479 // Generate a special Compile2Runtime blob that saves all registers,
2480 // and setup oopmap.
2481 //
2482 SafepointBlob* SharedRuntime::generate_handler_blob(StubId id, address call_ptr) {
2483 assert(is_polling_page_id(id), "expected a polling page stub id");
2484
2485 // Allocate space for the code. Setup code generation tools.
2486 const char* name = SharedRuntime::stub_name(id);
2487 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2488 if (blob != nullptr) {
2489 return blob->as_safepoint_blob();
2490 }
2491
2492 ResourceMark rm;
2493 OopMapSet *oop_maps = new OopMapSet();
2494 OopMap* map;
2495 CodeBuffer buffer(name, 2048, 1024);
2496 MacroAssembler* masm = new MacroAssembler(&buffer);
2497
2498 address start = __ pc();
2499 address call_pc = nullptr;
2500 int frame_size_in_words;
2501 bool cause_return = (id == StubId::shared_polling_page_return_handler_id);
2502 RegisterSaver reg_save(id == StubId::shared_polling_page_vectors_safepoint_handler_id /* save_vectors */);
2503
2504 // When the signal occurred, the LR was either signed and stored on the stack (in which
2505 // case it will be restored from the stack before being used) or unsigned and not stored
2506 // on the stack. Stipping ensures we get the right value.
2507 __ strip_return_address();
2508
2509 // Save Integer and Float registers.
2510 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2511
2512 // The following is basically a call_VM. However, we need the precise
2513 // address of the call in order to generate an oopmap. Hence, we do all the
2514 // work ourselves.
2515
2516 Label retaddr;
2517 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2518
2519 // The return address must always be correct so that frame constructor never
2520 // sees an invalid pc.
2521
2522 if (!cause_return) {
2523 // overwrite the return address pushed by save_live_registers
2524 // Additionally, r20 is a callee-saved register so we can look at
2525 // it later to determine if someone changed the return address for
2526 // us!
2527 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset()));
2528 __ protect_return_address(r20);
2529 __ str(r20, Address(rfp, wordSize));
2530 }
2531
2532 // Do the call
2533 __ mov(c_rarg0, rthread);
2534 __ lea(rscratch1, RuntimeAddress(call_ptr));
2535 __ blr(rscratch1);
2536 __ bind(retaddr);
2537
2538 // Set an oopmap for the call site. This oopmap will map all
2539 // oop-registers and debug-info registers as callee-saved. This
2540 // will allow deoptimization at this safepoint to find all possible
2541 // debug-info recordings, as well as let GC find all oops.
2542
2543 oop_maps->add_gc_map( __ pc() - start, map);
2544
2545 Label noException;
2546
2547 __ reset_last_Java_frame(false);
2548
2549 __ membar(Assembler::LoadLoad | Assembler::LoadStore);
2550
2551 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2552 __ cbz(rscratch1, noException);
2553
2554 // Exception pending
2555
2556 reg_save.restore_live_registers(masm);
2557
2558 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2559
2560 // No exception case
2561 __ bind(noException);
2562
2563 Label no_adjust, bail;
2564 if (!cause_return) {
2565 // If our stashed return pc was modified by the runtime we avoid touching it
2566 __ ldr(rscratch1, Address(rfp, wordSize));
2567 __ cmp(r20, rscratch1);
2568 __ br(Assembler::NE, no_adjust);
2569 __ authenticate_return_address(r20);
2570
2571 #ifdef ASSERT
2572 // Verify the correct encoding of the poll we're about to skip.
2573 // See NativeInstruction::is_ldrw_to_zr()
2574 __ ldrw(rscratch1, Address(r20));
2575 __ ubfx(rscratch2, rscratch1, 22, 10);
2576 __ cmpw(rscratch2, 0b1011100101);
2577 __ br(Assembler::NE, bail);
2578 __ ubfx(rscratch2, rscratch1, 0, 5);
2579 __ cmpw(rscratch2, 0b11111);
2580 __ br(Assembler::NE, bail);
2581 #endif
2582 // Adjust return pc forward to step over the safepoint poll instruction
2583 __ add(r20, r20, NativeInstruction::instruction_size);
2584 __ protect_return_address(r20);
2585 __ str(r20, Address(rfp, wordSize));
2586 }
2587
2588 __ bind(no_adjust);
2589 // Normal exit, restore registers and exit.
2590 reg_save.restore_live_registers(masm);
2591
2592 __ ret(lr);
2593
2594 #ifdef ASSERT
2595 __ bind(bail);
2596 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
2597 #endif
2598
2599 // Make sure all code is generated
2600 masm->flush();
2601
2602 // Fill-out other meta info
2603 SafepointBlob* sp_blob = SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
2604
2605 AOTCodeCache::store_code_blob(*sp_blob, AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2606 return sp_blob;
2607 }
2608
2609 //
2610 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
2611 //
2612 // Generate a stub that calls into vm to find out the proper destination
2613 // of a java call. All the argument registers are live at this point
2614 // but since this is generic code we don't know what they are and the caller
2615 // must do any gc of the args.
2616 //
2617 RuntimeStub* SharedRuntime::generate_resolve_blob(StubId id, address destination) {
2618 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before");
2619 assert(is_resolve_id(id), "expected a resolve stub id");
2620
2621 const char* name = SharedRuntime::stub_name(id);
2622 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2623 if (blob != nullptr) {
2624 return blob->as_runtime_stub();
2625 }
2626
2627 // allocate space for the code
2628 ResourceMark rm;
2629 CodeBuffer buffer(name, 1000, 512);
2630 MacroAssembler* masm = new MacroAssembler(&buffer);
2631
2632 int frame_size_in_words;
2633 RegisterSaver reg_save(false /* save_vectors */);
2634
2635 OopMapSet *oop_maps = new OopMapSet();
2636 OopMap* map = nullptr;
2637
2638 int start = __ offset();
2639
2640 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
2641
2642 int frame_complete = __ offset();
2643
2644 {
2645 Label retaddr;
2646 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1);
2647
2648 __ mov(c_rarg0, rthread);
2649 __ lea(rscratch1, RuntimeAddress(destination));
2650
2651 __ blr(rscratch1);
2652 __ bind(retaddr);
2653 }
2654
2655 // Set an oopmap for the call site.
2656 // We need this not only for callee-saved registers, but also for volatile
2657 // registers that the compiler might be keeping live across a safepoint.
2658
2659 oop_maps->add_gc_map( __ offset() - start, map);
2660
2661 // r0 contains the address we are going to jump to assuming no exception got installed
2662
2663 // clear last_Java_sp
2664 __ reset_last_Java_frame(false);
2665 // check for pending exceptions
2666 Label pending;
2667 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2668 __ cbnz(rscratch1, pending);
2669
2670 // get the returned Method*
2671 __ get_vm_result_metadata(rmethod, rthread);
2672 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod)));
2673
2674 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch
2675 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes()));
2676 reg_save.restore_live_registers(masm);
2677
2678 // We are back to the original state on entry and ready to go.
2679
2680 __ br(rscratch1);
2681
2682 // Pending exception after the safepoint
2683
2684 __ bind(pending);
2685
2686 reg_save.restore_live_registers(masm);
2687
2688 // exception pending => remove activation and forward to exception handler
2689
2690 __ str(zr, Address(rthread, JavaThread::vm_result_oop_offset()));
2691
2692 __ ldr(r0, Address(rthread, Thread::pending_exception_offset()));
2693 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2694
2695 // -------------
2696 // make sure all code is generated
2697 masm->flush();
2698
2699 // return the blob
2700 // frame_size_words or bytes??
2701 RuntimeStub* rs_blob = RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
2702
2703 AOTCodeCache::store_code_blob(*rs_blob, AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2704 return rs_blob;
2705 }
2706
2707 // Continuation point for throwing of implicit exceptions that are
2708 // not handled in the current activation. Fabricates an exception
2709 // oop and initiates normal exception dispatching in this
2710 // frame. Since we need to preserve callee-saved values (currently
2711 // only for C2, but done for C1 as well) we need a callee-saved oop
2712 // map and therefore have to make these stubs into RuntimeStubs
2713 // rather than BufferBlobs. If the compiler needs all registers to
2714 // be preserved between the fault point and the exception handler
2715 // then it must assume responsibility for that in
2716 // AbstractCompiler::continuation_for_implicit_null_exception or
2717 // continuation_for_implicit_division_by_zero_exception. All other
2718 // implicit exceptions (e.g., NullPointerException or
2719 // AbstractMethodError on entry) are either at call sites or
2720 // otherwise assume that stack unwinding will be initiated, so
2721 // caller saved registers were assumed volatile in the compiler.
2722
2723 RuntimeStub* SharedRuntime::generate_throw_exception(StubId id, address runtime_entry) {
2724 assert(is_throw_id(id), "expected a throw stub id");
2725
2726 const char* name = SharedRuntime::stub_name(id);
2727
2728 // Information about frame layout at time of blocking runtime call.
2729 // Note that we only have to preserve callee-saved registers since
2730 // the compilers are responsible for supplying a continuation point
2731 // if they expect all registers to be preserved.
2732 // n.b. aarch64 asserts that frame::arg_reg_save_area_bytes == 0
2733 enum layout {
2734 rfp_off = 0,
2735 rfp_off2,
2736 return_off,
2737 return_off2,
2738 framesize // inclusive of return address
2739 };
2740
2741 int insts_size = 512;
2742 int locs_size = 64;
2743
2744 const char* timer_msg = "SharedRuntime generate_throw_exception";
2745 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime));
2746
2747 CodeBlob* blob = AOTCodeCache::load_code_blob(AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2748 if (blob != nullptr) {
2749 return blob->as_runtime_stub();
2750 }
2751
2752 ResourceMark rm;
2753 CodeBuffer code(name, insts_size, locs_size);
2754 OopMapSet* oop_maps = new OopMapSet();
2755 MacroAssembler* masm = new MacroAssembler(&code);
2756
2757 address start = __ pc();
2758
2759 // This is an inlined and slightly modified version of call_VM
2760 // which has the ability to fetch the return PC out of
2761 // thread-local storage and also sets up last_Java_sp slightly
2762 // differently than the real call_VM
2763
2764 __ enter(); // Save FP and LR before call
2765
2766 assert(is_even(framesize/2), "sp not 16-byte aligned");
2767
2768 // lr and fp are already in place
2769 __ sub(sp, rfp, ((uint64_t)framesize-4) << LogBytesPerInt); // prolog
2770
2771 int frame_complete = __ pc() - start;
2772
2773 // Set up last_Java_sp and last_Java_fp
2774 address the_pc = __ pc();
2775 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2776
2777 __ mov(c_rarg0, rthread);
2778 BLOCK_COMMENT("call runtime_entry");
2779 __ lea(rscratch1, RuntimeAddress(runtime_entry));
2780 __ blr(rscratch1);
2781
2782 // Generate oop map
2783 OopMap* map = new OopMap(framesize, 0);
2784
2785 oop_maps->add_gc_map(the_pc - start, map);
2786
2787 __ reset_last_Java_frame(true);
2788
2789 // Reinitialize the ptrue predicate register, in case the external runtime
2790 // call clobbers ptrue reg, as we may return to SVE compiled code.
2791 __ reinitialize_ptrue();
2792
2793 __ leave();
2794
2795 // check for pending exceptions
2796 #ifdef ASSERT
2797 Label L;
2798 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset()));
2799 __ cbnz(rscratch1, L);
2800 __ should_not_reach_here();
2801 __ bind(L);
2802 #endif // ASSERT
2803 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2804
2805 // codeBlob framesize is in words (not VMRegImpl::slot_size)
2806 RuntimeStub* stub =
2807 RuntimeStub::new_runtime_stub(name,
2808 &code,
2809 frame_complete,
2810 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2811 oop_maps, false);
2812 AOTCodeCache::store_code_blob(*stub, AOTCodeEntry::SharedBlob, StubInfo::blob(id));
2813
2814 return stub;
2815 }
2816
2817 #if INCLUDE_JFR
2818
2819 static void jfr_prologue(address the_pc, MacroAssembler* masm, Register thread) {
2820 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1);
2821 __ mov(c_rarg0, thread);
2822 }
2823
2824 // The handle is dereferenced through a load barrier.
2825 static void jfr_epilogue(MacroAssembler* masm) {
2826 __ reset_last_Java_frame(true);
2827 }
2828
2829 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint.
2830 // It returns a jobject handle to the event writer.
2831 // The handle is dereferenced and the return value is the event writer oop.
2832 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() {
2833 enum layout {
2834 rbp_off,
2835 rbpH_off,
2836 return_off,
2837 return_off2,
2838 framesize // inclusive of return address
2839 };
2840
2841 int insts_size = 1024;
2842 int locs_size = 64;
2843 const char* name = SharedRuntime::stub_name(StubId::shared_jfr_write_checkpoint_id);
2844 CodeBuffer code(name, insts_size, locs_size);
2845 OopMapSet* oop_maps = new OopMapSet();
2846 MacroAssembler* masm = new MacroAssembler(&code);
2847
2848 address start = __ pc();
2849 __ enter();
2850 int frame_complete = __ pc() - start;
2851 address the_pc = __ pc();
2852 jfr_prologue(the_pc, masm, rthread);
2853 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1);
2854 jfr_epilogue(masm);
2855 __ resolve_global_jobject(r0, rscratch1, rscratch2);
2856 __ leave();
2857 __ ret(lr);
2858
2859 OopMap* map = new OopMap(framesize, 1); // rfp
2860 oop_maps->add_gc_map(the_pc - start, map);
2861
2862 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
2863 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
2864 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2865 oop_maps, false);
2866 return stub;
2867 }
2868
2869 // For c2: call to return a leased buffer.
2870 RuntimeStub* SharedRuntime::generate_jfr_return_lease() {
2871 enum layout {
2872 rbp_off,
2873 rbpH_off,
2874 return_off,
2875 return_off2,
2876 framesize // inclusive of return address
2877 };
2878
2879 int insts_size = 1024;
2880 int locs_size = 64;
2881
2882 const char* name = SharedRuntime::stub_name(StubId::shared_jfr_return_lease_id);
2883 CodeBuffer code(name, insts_size, locs_size);
2884 OopMapSet* oop_maps = new OopMapSet();
2885 MacroAssembler* masm = new MacroAssembler(&code);
2886
2887 address start = __ pc();
2888 __ enter();
2889 int frame_complete = __ pc() - start;
2890 address the_pc = __ pc();
2891 jfr_prologue(the_pc, masm, rthread);
2892 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1);
2893 jfr_epilogue(masm);
2894
2895 __ leave();
2896 __ ret(lr);
2897
2898 OopMap* map = new OopMap(framesize, 1); // rfp
2899 oop_maps->add_gc_map(the_pc - start, map);
2900
2901 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size)
2902 RuntimeStub::new_runtime_stub(name, &code, frame_complete,
2903 (framesize >> (LogBytesPerWord - LogBytesPerInt)),
2904 oop_maps, false);
2905 return stub;
2906 }
2907
2908 #endif // INCLUDE_JFR
--- EOF ---