1 /* 2 * Copyright (c) 2003, 2024, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved. 4 * Copyright (c) 2021, Azul Systems, Inc. All rights reserved. 5 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 6 * 7 * This code is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 only, as 9 * published by the Free Software Foundation. 10 * 11 * This code is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * version 2 for more details (a copy is included in the LICENSE file that 15 * accompanied this code). 16 * 17 * You should have received a copy of the GNU General Public License version 18 * 2 along with this work; if not, write to the Free Software Foundation, 19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 20 * 21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 22 * or visit www.oracle.com if you need additional information or have any 23 * questions. 24 * 25 */ 26 27 #include "precompiled.hpp" 28 #include "asm/macroAssembler.hpp" 29 #include "asm/macroAssembler.inline.hpp" 30 #include "classfile/symbolTable.hpp" 31 #include "code/codeCache.hpp" 32 #include "code/compiledIC.hpp" 33 #include "code/debugInfoRec.hpp" 34 #include "code/vtableStubs.hpp" 35 #include "compiler/oopMap.hpp" 36 #include "gc/shared/barrierSetAssembler.hpp" 37 #include "interpreter/interpreter.hpp" 38 #include "interpreter/interp_masm.hpp" 39 #include "logging/log.hpp" 40 #include "memory/resourceArea.hpp" 41 #include "nativeInst_aarch64.hpp" 42 #include "oops/klass.inline.hpp" 43 #include "oops/method.inline.hpp" 44 #include "prims/methodHandles.hpp" 45 #include "runtime/continuation.hpp" 46 #include "runtime/continuationEntry.inline.hpp" 47 #include "runtime/globals.hpp" 48 #include "runtime/jniHandles.hpp" 49 #include "runtime/safepointMechanism.hpp" 50 #include "runtime/sharedRuntime.hpp" 51 #include "runtime/signature.hpp" 52 #include "runtime/stubRoutines.hpp" 53 #include "runtime/vframeArray.hpp" 54 #include "utilities/align.hpp" 55 #include "utilities/formatBuffer.hpp" 56 #include "vmreg_aarch64.inline.hpp" 57 #ifdef COMPILER1 58 #include "c1/c1_Runtime1.hpp" 59 #endif 60 #ifdef COMPILER2 61 #include "adfiles/ad_aarch64.hpp" 62 #include "opto/runtime.hpp" 63 #endif 64 #if INCLUDE_JVMCI 65 #include "jvmci/jvmciJavaClasses.hpp" 66 #endif 67 68 #define __ masm-> 69 70 #ifdef PRODUCT 71 #define BLOCK_COMMENT(str) /* nothing */ 72 #else 73 #define BLOCK_COMMENT(str) __ block_comment(str) 74 #endif 75 76 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 77 78 // FIXME -- this is used by C1 79 class RegisterSaver { 80 const bool _save_vectors; 81 public: 82 RegisterSaver(bool save_vectors) : _save_vectors(save_vectors) {} 83 84 OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words); 85 void restore_live_registers(MacroAssembler* masm); 86 87 // Offsets into the register save area 88 // Used by deoptimization when it is managing result register 89 // values on its own 90 91 int reg_offset_in_bytes(Register r); 92 int r0_offset_in_bytes() { return reg_offset_in_bytes(r0); } 93 int rscratch1_offset_in_bytes() { return reg_offset_in_bytes(rscratch1); } 94 int v0_offset_in_bytes(); 95 96 // Total stack size in bytes for saving sve predicate registers. 97 int total_sve_predicate_in_bytes(); 98 99 // Capture info about frame layout 100 // Note this is only correct when not saving full vectors. 101 enum layout { 102 fpu_state_off = 0, 103 fpu_state_end = fpu_state_off + FPUStateSizeInWords - 1, 104 // The frame sender code expects that rfp will be in 105 // the "natural" place and will override any oopMap 106 // setting for it. We must therefore force the layout 107 // so that it agrees with the frame sender code. 108 r0_off = fpu_state_off + FPUStateSizeInWords, 109 rfp_off = r0_off + (Register::number_of_registers - 2) * Register::max_slots_per_register, 110 return_off = rfp_off + Register::max_slots_per_register, // slot for return address 111 reg_save_size = return_off + Register::max_slots_per_register}; 112 113 }; 114 115 int RegisterSaver::reg_offset_in_bytes(Register r) { 116 // The integer registers are located above the floating point 117 // registers in the stack frame pushed by save_live_registers() so the 118 // offset depends on whether we are saving full vectors, and whether 119 // those vectors are NEON or SVE. 120 121 int slots_per_vect = FloatRegister::save_slots_per_register; 122 123 #if COMPILER2_OR_JVMCI 124 if (_save_vectors) { 125 slots_per_vect = FloatRegister::slots_per_neon_register; 126 127 #ifdef COMPILER2 128 if (Matcher::supports_scalable_vector()) { 129 slots_per_vect = Matcher::scalable_vector_reg_size(T_FLOAT); 130 } 131 #endif 132 } 133 #endif 134 135 int r0_offset = v0_offset_in_bytes() + (slots_per_vect * FloatRegister::number_of_registers) * BytesPerInt; 136 return r0_offset + r->encoding() * wordSize; 137 } 138 139 int RegisterSaver::v0_offset_in_bytes() { 140 // The floating point registers are located above the predicate registers if 141 // they are present in the stack frame pushed by save_live_registers(). So the 142 // offset depends on the saved total predicate vectors in the stack frame. 143 return (total_sve_predicate_in_bytes() / VMRegImpl::stack_slot_size) * BytesPerInt; 144 } 145 146 int RegisterSaver::total_sve_predicate_in_bytes() { 147 #ifdef COMPILER2 148 if (_save_vectors && Matcher::supports_scalable_vector()) { 149 return (Matcher::scalable_vector_reg_size(T_BYTE) >> LogBitsPerByte) * 150 PRegister::number_of_registers; 151 } 152 #endif 153 return 0; 154 } 155 156 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words) { 157 bool use_sve = false; 158 int sve_vector_size_in_bytes = 0; 159 int sve_vector_size_in_slots = 0; 160 int sve_predicate_size_in_slots = 0; 161 int total_predicate_in_bytes = total_sve_predicate_in_bytes(); 162 int total_predicate_in_slots = total_predicate_in_bytes / VMRegImpl::stack_slot_size; 163 164 #ifdef COMPILER2 165 use_sve = Matcher::supports_scalable_vector(); 166 if (use_sve) { 167 sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE); 168 sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT); 169 sve_predicate_size_in_slots = Matcher::scalable_predicate_reg_slots(); 170 } 171 #endif 172 173 #if COMPILER2_OR_JVMCI 174 if (_save_vectors) { 175 int extra_save_slots_per_register = 0; 176 // Save upper half of vector registers 177 if (use_sve) { 178 extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegister::save_slots_per_register; 179 } else { 180 extra_save_slots_per_register = FloatRegister::extra_save_slots_per_neon_register; 181 } 182 int extra_vector_bytes = extra_save_slots_per_register * 183 VMRegImpl::stack_slot_size * 184 FloatRegister::number_of_registers; 185 additional_frame_words += ((extra_vector_bytes + total_predicate_in_bytes) / wordSize); 186 } 187 #else 188 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI"); 189 #endif 190 191 int frame_size_in_bytes = align_up(additional_frame_words * wordSize + 192 reg_save_size * BytesPerInt, 16); 193 // OopMap frame size is in compiler stack slots (jint's) not bytes or words 194 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; 195 // The caller will allocate additional_frame_words 196 int additional_frame_slots = additional_frame_words * wordSize / BytesPerInt; 197 // CodeBlob frame size is in words. 198 int frame_size_in_words = frame_size_in_bytes / wordSize; 199 *total_frame_words = frame_size_in_words; 200 201 // Save Integer and Float registers. 202 __ enter(); 203 __ push_CPU_state(_save_vectors, use_sve, sve_vector_size_in_bytes, total_predicate_in_bytes); 204 205 // Set an oopmap for the call site. This oopmap will map all 206 // oop-registers and debug-info registers as callee-saved. This 207 // will allow deoptimization at this safepoint to find all possible 208 // debug-info recordings, as well as let GC find all oops. 209 210 OopMapSet *oop_maps = new OopMapSet(); 211 OopMap* oop_map = new OopMap(frame_size_in_slots, 0); 212 213 for (int i = 0; i < Register::number_of_registers; i++) { 214 Register r = as_Register(i); 215 if (i <= rfp->encoding() && r != rscratch1 && r != rscratch2) { 216 // SP offsets are in 4-byte words. 217 // Register slots are 8 bytes wide, 32 floating-point registers. 218 int sp_offset = Register::max_slots_per_register * i + 219 FloatRegister::save_slots_per_register * FloatRegister::number_of_registers; 220 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), r->as_VMReg()); 221 } 222 } 223 224 for (int i = 0; i < FloatRegister::number_of_registers; i++) { 225 FloatRegister r = as_FloatRegister(i); 226 int sp_offset = 0; 227 if (_save_vectors) { 228 sp_offset = use_sve ? (total_predicate_in_slots + sve_vector_size_in_slots * i) : 229 (FloatRegister::slots_per_neon_register * i); 230 } else { 231 sp_offset = FloatRegister::save_slots_per_register * i; 232 } 233 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg()); 234 } 235 236 return oop_map; 237 } 238 239 void RegisterSaver::restore_live_registers(MacroAssembler* masm) { 240 #ifdef COMPILER2 241 __ pop_CPU_state(_save_vectors, Matcher::supports_scalable_vector(), 242 Matcher::scalable_vector_reg_size(T_BYTE), total_sve_predicate_in_bytes()); 243 #else 244 #if !INCLUDE_JVMCI 245 assert(!_save_vectors, "vectors are generated only by C2 and JVMCI"); 246 #endif 247 __ pop_CPU_state(_save_vectors); 248 #endif 249 __ ldp(rfp, lr, Address(__ post(sp, 2 * wordSize))); 250 __ authenticate_return_address(); 251 } 252 253 // Is vector's size (in bytes) bigger than a size saved by default? 254 // 8 bytes vector registers are saved by default on AArch64. 255 // The SVE supported min vector size is 8 bytes and we need to save 256 // predicate registers when the vector size is 8 bytes as well. 257 bool SharedRuntime::is_wide_vector(int size) { 258 return size > 8 || (UseSVE > 0 && size >= 8); 259 } 260 261 // --------------------------------------------------------------------------- 262 // Read the array of BasicTypes from a signature, and compute where the 263 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 264 // quantities. Values less than VMRegImpl::stack0 are registers, those above 265 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 266 // as framesizes are fixed. 267 // VMRegImpl::stack0 refers to the first slot 0(sp). 268 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. 269 // Register up to Register::number_of_registers are the 64-bit 270 // integer registers. 271 272 // Note: the INPUTS in sig_bt are in units of Java argument words, 273 // which are 64-bit. The OUTPUTS are in 32-bit units. 274 275 // The Java calling convention is a "shifted" version of the C ABI. 276 // By skipping the first C ABI register we can call non-static jni 277 // methods with small numbers of arguments without having to shuffle 278 // the arguments at all. Since we control the java ABI we ought to at 279 // least get some advantage out of it. 280 281 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 282 VMRegPair *regs, 283 int total_args_passed) { 284 285 // Create the mapping between argument positions and 286 // registers. 287 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { 288 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7 289 }; 290 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { 291 j_farg0, j_farg1, j_farg2, j_farg3, 292 j_farg4, j_farg5, j_farg6, j_farg7 293 }; 294 295 296 uint int_args = 0; 297 uint fp_args = 0; 298 uint stk_args = 0; 299 300 for (int i = 0; i < total_args_passed; i++) { 301 switch (sig_bt[i]) { 302 case T_BOOLEAN: 303 case T_CHAR: 304 case T_BYTE: 305 case T_SHORT: 306 case T_INT: 307 if (int_args < Argument::n_int_register_parameters_j) { 308 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 309 } else { 310 stk_args = align_up(stk_args, 2); 311 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 312 stk_args += 1; 313 } 314 break; 315 case T_VOID: 316 // halves of T_LONG or T_DOUBLE 317 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 318 regs[i].set_bad(); 319 break; 320 case T_LONG: 321 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 322 // fall through 323 case T_OBJECT: 324 case T_ARRAY: 325 case T_ADDRESS: 326 if (int_args < Argument::n_int_register_parameters_j) { 327 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 328 } else { 329 stk_args = align_up(stk_args, 2); 330 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 331 stk_args += 2; 332 } 333 break; 334 case T_FLOAT: 335 if (fp_args < Argument::n_float_register_parameters_j) { 336 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 337 } else { 338 stk_args = align_up(stk_args, 2); 339 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 340 stk_args += 1; 341 } 342 break; 343 case T_DOUBLE: 344 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 345 if (fp_args < Argument::n_float_register_parameters_j) { 346 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 347 } else { 348 stk_args = align_up(stk_args, 2); 349 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 350 stk_args += 2; 351 } 352 break; 353 default: 354 ShouldNotReachHere(); 355 break; 356 } 357 } 358 359 return stk_args; 360 } 361 362 363 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j; 364 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j; 365 366 int SharedRuntime::java_return_convention(const BasicType *sig_bt, VMRegPair *regs, int total_args_passed) { 367 368 // Create the mapping between argument positions and registers. 369 370 static const Register INT_ArgReg[java_return_convention_max_int] = { 371 r0 /* j_rarg7 */, j_rarg6, j_rarg5, j_rarg4, j_rarg3, j_rarg2, j_rarg1, j_rarg0 372 }; 373 374 static const FloatRegister FP_ArgReg[java_return_convention_max_float] = { 375 j_farg0, j_farg1, j_farg2, j_farg3, j_farg4, j_farg5, j_farg6, j_farg7 376 }; 377 378 uint int_args = 0; 379 uint fp_args = 0; 380 381 for (int i = 0; i < total_args_passed; i++) { 382 switch (sig_bt[i]) { 383 case T_BOOLEAN: 384 case T_CHAR: 385 case T_BYTE: 386 case T_SHORT: 387 case T_INT: 388 if (int_args < SharedRuntime::java_return_convention_max_int) { 389 regs[i].set1(INT_ArgReg[int_args]->as_VMReg()); 390 int_args ++; 391 } else { 392 return -1; 393 } 394 break; 395 case T_VOID: 396 // halves of T_LONG or T_DOUBLE 397 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 398 regs[i].set_bad(); 399 break; 400 case T_LONG: 401 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 402 // fall through 403 case T_OBJECT: 404 case T_ARRAY: 405 case T_ADDRESS: 406 // Should T_METADATA be added to java_calling_convention as well ? 407 case T_METADATA: 408 if (int_args < SharedRuntime::java_return_convention_max_int) { 409 regs[i].set2(INT_ArgReg[int_args]->as_VMReg()); 410 int_args ++; 411 } else { 412 return -1; 413 } 414 break; 415 case T_FLOAT: 416 if (fp_args < SharedRuntime::java_return_convention_max_float) { 417 regs[i].set1(FP_ArgReg[fp_args]->as_VMReg()); 418 fp_args ++; 419 } else { 420 return -1; 421 } 422 break; 423 case T_DOUBLE: 424 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 425 if (fp_args < SharedRuntime::java_return_convention_max_float) { 426 regs[i].set2(FP_ArgReg[fp_args]->as_VMReg()); 427 fp_args ++; 428 } else { 429 return -1; 430 } 431 break; 432 default: 433 ShouldNotReachHere(); 434 break; 435 } 436 } 437 438 return int_args + fp_args; 439 } 440 441 // Patch the callers callsite with entry to compiled code if it exists. 442 static void patch_callers_callsite(MacroAssembler *masm) { 443 Label L; 444 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 445 __ cbz(rscratch1, L); 446 447 __ enter(); 448 __ push_CPU_state(); 449 450 // VM needs caller's callsite 451 // VM needs target method 452 // This needs to be a long call since we will relocate this adapter to 453 // the codeBuffer and it may not reach 454 455 #ifndef PRODUCT 456 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 457 #endif 458 459 __ mov(c_rarg0, rmethod); 460 __ mov(c_rarg1, lr); 461 __ authenticate_return_address(c_rarg1); 462 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 463 __ blr(rscratch1); 464 465 // Explicit isb required because fixup_callers_callsite may change the code 466 // stream. 467 __ safepoint_isb(); 468 469 __ pop_CPU_state(); 470 // restore sp 471 __ leave(); 472 __ bind(L); 473 } 474 475 // For each inline type argument, sig includes the list of fields of 476 // the inline type. This utility function computes the number of 477 // arguments for the call if inline types are passed by reference (the 478 // calling convention the interpreter expects). 479 static int compute_total_args_passed_int(const GrowableArray<SigEntry>* sig_extended) { 480 int total_args_passed = 0; 481 if (InlineTypePassFieldsAsArgs) { 482 for (int i = 0; i < sig_extended->length(); i++) { 483 BasicType bt = sig_extended->at(i)._bt; 484 if (bt == T_METADATA) { 485 // In sig_extended, an inline type argument starts with: 486 // T_METADATA, followed by the types of the fields of the 487 // inline type and T_VOID to mark the end of the value 488 // type. Inline types are flattened so, for instance, in the 489 // case of an inline type with an int field and an inline type 490 // field that itself has 2 fields, an int and a long: 491 // T_METADATA T_INT T_METADATA T_INT T_LONG T_VOID (second 492 // slot for the T_LONG) T_VOID (inner inline type) T_VOID 493 // (outer inline type) 494 total_args_passed++; 495 int vt = 1; 496 do { 497 i++; 498 BasicType bt = sig_extended->at(i)._bt; 499 BasicType prev_bt = sig_extended->at(i-1)._bt; 500 if (bt == T_METADATA) { 501 vt++; 502 } else if (bt == T_VOID && 503 prev_bt != T_LONG && 504 prev_bt != T_DOUBLE) { 505 vt--; 506 } 507 } while (vt != 0); 508 } else { 509 total_args_passed++; 510 } 511 } 512 } else { 513 total_args_passed = sig_extended->length(); 514 } 515 516 return total_args_passed; 517 } 518 519 520 static void gen_c2i_adapter_helper(MacroAssembler* masm, 521 BasicType bt, 522 BasicType prev_bt, 523 size_t size_in_bytes, 524 const VMRegPair& reg_pair, 525 const Address& to, 526 Register tmp1, 527 Register tmp2, 528 Register tmp3, 529 int extraspace, 530 bool is_oop) { 531 if (bt == T_VOID) { 532 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half"); 533 return; 534 } 535 536 // Say 4 args: 537 // i st_off 538 // 0 32 T_LONG 539 // 1 24 T_VOID 540 // 2 16 T_OBJECT 541 // 3 8 T_BOOL 542 // - 0 return address 543 // 544 // However to make thing extra confusing. Because we can fit a Java long/double in 545 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter 546 // leaves one slot empty and only stores to a single slot. In this case the 547 // slot that is occupied is the T_VOID slot. See I said it was confusing. 548 549 bool wide = (size_in_bytes == wordSize); 550 VMReg r_1 = reg_pair.first(); 551 VMReg r_2 = reg_pair.second(); 552 assert(r_2->is_valid() == wide, "invalid size"); 553 if (!r_1->is_valid()) { 554 assert(!r_2->is_valid(), ""); 555 return; 556 } 557 558 if (!r_1->is_FloatRegister()) { 559 Register val = r25; 560 if (r_1->is_stack()) { 561 // memory to memory use r25 (scratch registers is used by store_heap_oop) 562 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 563 __ load_sized_value(val, Address(sp, ld_off), size_in_bytes, /* is_signed */ false); 564 } else { 565 val = r_1->as_Register(); 566 } 567 assert_different_registers(to.base(), val, tmp1, tmp2, tmp3); 568 if (is_oop) { 569 __ store_heap_oop(to, val, tmp1, tmp2, tmp3, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED); 570 } else { 571 __ store_sized_value(to, val, size_in_bytes); 572 } 573 } else { 574 if (wide) { 575 __ strd(r_1->as_FloatRegister(), to); 576 } else { 577 // only a float use just part of the slot 578 __ strs(r_1->as_FloatRegister(), to); 579 } 580 } 581 } 582 583 static void gen_c2i_adapter(MacroAssembler *masm, 584 const GrowableArray<SigEntry>* sig_extended, 585 const VMRegPair *regs, 586 bool requires_clinit_barrier, 587 address& c2i_no_clinit_check_entry, 588 Label& skip_fixup, 589 address start, 590 OopMapSet* oop_maps, 591 int& frame_complete, 592 int& frame_size_in_words, 593 bool alloc_inline_receiver) { 594 if (requires_clinit_barrier && VM_Version::supports_fast_class_init_checks()) { 595 Label L_skip_barrier; 596 597 { // Bypass the barrier for non-static methods 598 __ ldrw(rscratch1, Address(rmethod, Method::access_flags_offset())); 599 __ andsw(zr, rscratch1, JVM_ACC_STATIC); 600 __ br(Assembler::EQ, L_skip_barrier); // non-static 601 } 602 603 __ load_method_holder(rscratch2, rmethod); 604 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier); 605 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); 606 607 __ bind(L_skip_barrier); 608 c2i_no_clinit_check_entry = __ pc(); 609 } 610 611 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 612 bs->c2i_entry_barrier(masm); 613 614 // Before we get into the guts of the C2I adapter, see if we should be here 615 // at all. We've come from compiled code and are attempting to jump to the 616 // interpreter, which means the caller made a static call to get here 617 // (vcalls always get a compiled target if there is one). Check for a 618 // compiled target. If there is one, we need to patch the caller's call. 619 patch_callers_callsite(masm); 620 621 __ bind(skip_fixup); 622 623 // Name some registers to be used in the following code. We can use 624 // anything except r0-r7 which are arguments in the Java calling 625 // convention, rmethod (r12), and r13 which holds the outgoing sender 626 // SP for the interpreter. 627 Register buf_array = r10; // Array of buffered inline types 628 Register buf_oop = r11; // Buffered inline type oop 629 Register tmp1 = r15; 630 Register tmp2 = r16; 631 Register tmp3 = r17; 632 633 if (InlineTypePassFieldsAsArgs) { 634 // Is there an inline type argument? 635 bool has_inline_argument = false; 636 for (int i = 0; i < sig_extended->length() && !has_inline_argument; i++) { 637 has_inline_argument = (sig_extended->at(i)._bt == T_METADATA); 638 } 639 if (has_inline_argument) { 640 // There is at least an inline type argument: we're coming from 641 // compiled code so we have no buffers to back the inline types 642 // Allocate the buffers here with a runtime call. 643 RegisterSaver reg_save(false /* save_vectors */); 644 OopMap* map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 645 646 frame_complete = __ offset(); 647 address the_pc = __ pc(); 648 649 Label retaddr; 650 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 651 652 __ mov(c_rarg0, rthread); 653 __ mov(c_rarg1, rmethod); 654 __ mov(c_rarg2, (int64_t)alloc_inline_receiver); 655 656 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::allocate_inline_types))); 657 __ blr(rscratch1); 658 __ bind(retaddr); 659 660 oop_maps->add_gc_map(__ pc() - start, map); 661 __ reset_last_Java_frame(false); 662 663 reg_save.restore_live_registers(masm); 664 665 Label no_exception; 666 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 667 __ cbz(rscratch1, no_exception); 668 669 __ str(zr, Address(rthread, JavaThread::vm_result_offset())); 670 __ ldr(r0, Address(rthread, Thread::pending_exception_offset())); 671 __ b(RuntimeAddress(StubRoutines::forward_exception_entry())); 672 673 __ bind(no_exception); 674 675 // We get an array of objects from the runtime call 676 __ get_vm_result(buf_array, rthread); 677 __ get_vm_result_2(rmethod, rthread); // TODO: required to keep the callee Method live? 678 } 679 } 680 681 // Since all args are passed on the stack, total_args_passed * 682 // Interpreter::stackElementSize is the space we need. 683 684 int total_args_passed = compute_total_args_passed_int(sig_extended); 685 int extraspace = total_args_passed * Interpreter::stackElementSize; 686 687 // stack is aligned, keep it that way 688 extraspace = align_up(extraspace, StackAlignmentInBytes); 689 690 // set senderSP value 691 __ mov(r19_sender_sp, sp); 692 693 __ sub(sp, sp, extraspace); 694 695 // Now write the args into the outgoing interpreter space 696 697 // next_arg_comp is the next argument from the compiler point of 698 // view (inline type fields are passed in registers/on the stack). In 699 // sig_extended, an inline type argument starts with: T_METADATA, 700 // followed by the types of the fields of the inline type and T_VOID 701 // to mark the end of the inline type. ignored counts the number of 702 // T_METADATA/T_VOID. next_vt_arg is the next inline type argument: 703 // used to get the buffer for that argument from the pool of buffers 704 // we allocated above and want to pass to the 705 // interpreter. next_arg_int is the next argument from the 706 // interpreter point of view (inline types are passed by reference). 707 for (int next_arg_comp = 0, ignored = 0, next_vt_arg = 0, next_arg_int = 0; 708 next_arg_comp < sig_extended->length(); next_arg_comp++) { 709 assert(ignored <= next_arg_comp, "shouldn't skip over more slots than there are arguments"); 710 assert(next_arg_int <= total_args_passed, "more arguments for the interpreter than expected?"); 711 BasicType bt = sig_extended->at(next_arg_comp)._bt; 712 int st_off = (total_args_passed - next_arg_int - 1) * Interpreter::stackElementSize; 713 if (!InlineTypePassFieldsAsArgs || bt != T_METADATA) { 714 int next_off = st_off - Interpreter::stackElementSize; 715 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : st_off; 716 const VMRegPair reg_pair = regs[next_arg_comp-ignored]; 717 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4; 718 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL, 719 size_in_bytes, reg_pair, Address(sp, offset), tmp1, tmp2, tmp3, extraspace, false); 720 next_arg_int++; 721 #ifdef ASSERT 722 if (bt == T_LONG || bt == T_DOUBLE) { 723 // Overwrite the unused slot with known junk 724 __ mov(rscratch1, CONST64(0xdeadffffdeadaaaa)); 725 __ str(rscratch1, Address(sp, st_off)); 726 } 727 #endif /* ASSERT */ 728 } else { 729 ignored++; 730 // get the buffer from the just allocated pool of buffers 731 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + next_vt_arg * type2aelembytes(T_OBJECT); 732 __ load_heap_oop(buf_oop, Address(buf_array, index), tmp1, tmp2); 733 next_vt_arg++; next_arg_int++; 734 int vt = 1; 735 // write fields we get from compiled code in registers/stack 736 // slots to the buffer: we know we are done with that inline type 737 // argument when we hit the T_VOID that acts as an end of inline 738 // type delimiter for this inline type. Inline types are flattened 739 // so we might encounter embedded inline types. Each entry in 740 // sig_extended contains a field offset in the buffer. 741 Label L_null; 742 do { 743 next_arg_comp++; 744 BasicType bt = sig_extended->at(next_arg_comp)._bt; 745 BasicType prev_bt = sig_extended->at(next_arg_comp - 1)._bt; 746 if (bt == T_METADATA) { 747 vt++; 748 ignored++; 749 } else if (bt == T_VOID && prev_bt != T_LONG && prev_bt != T_DOUBLE) { 750 vt--; 751 ignored++; 752 } else { 753 int off = sig_extended->at(next_arg_comp)._offset; 754 if (off == -1) { 755 // Nullable inline type argument, emit null check 756 VMReg reg = regs[next_arg_comp-ignored].first(); 757 Label L_notNull; 758 if (reg->is_stack()) { 759 int ld_off = reg->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 760 __ ldrb(tmp1, Address(sp, ld_off)); 761 __ cbnz(tmp1, L_notNull); 762 } else { 763 __ cbnz(reg->as_Register(), L_notNull); 764 } 765 __ str(zr, Address(sp, st_off)); 766 __ b(L_null); 767 __ bind(L_notNull); 768 continue; 769 } 770 assert(off > 0, "offset in object should be positive"); 771 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize; 772 bool is_oop = is_reference_type(bt); 773 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended->at(next_arg_comp-1)._bt : T_ILLEGAL, 774 size_in_bytes, regs[next_arg_comp-ignored], Address(buf_oop, off), tmp1, tmp2, tmp3, extraspace, is_oop); 775 } 776 } while (vt != 0); 777 // pass the buffer to the interpreter 778 __ str(buf_oop, Address(sp, st_off)); 779 __ bind(L_null); 780 } 781 } 782 783 __ mov(esp, sp); // Interp expects args on caller's expression stack 784 785 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset()))); 786 __ br(rscratch1); 787 } 788 789 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, int comp_args_on_stack, const GrowableArray<SigEntry>* sig, const VMRegPair *regs) { 790 791 792 // Note: r19_sender_sp contains the senderSP on entry. We must 793 // preserve it since we may do a i2c -> c2i transition if we lose a 794 // race where compiled code goes non-entrant while we get args 795 // ready. 796 797 // Adapters are frameless. 798 799 // An i2c adapter is frameless because the *caller* frame, which is 800 // interpreted, routinely repairs its own esp (from 801 // interpreter_frame_last_sp), even if a callee has modified the 802 // stack pointer. It also recalculates and aligns sp. 803 804 // A c2i adapter is frameless because the *callee* frame, which is 805 // interpreted, routinely repairs its caller's sp (from sender_sp, 806 // which is set up via the senderSP register). 807 808 // In other words, if *either* the caller or callee is interpreted, we can 809 // get the stack pointer repaired after a call. 810 811 // This is why c2i and i2c adapters cannot be indefinitely composed. 812 // In particular, if a c2i adapter were to somehow call an i2c adapter, 813 // both caller and callee would be compiled methods, and neither would 814 // clean up the stack pointer changes performed by the two adapters. 815 // If this happens, control eventually transfers back to the compiled 816 // caller, but with an uncorrected stack, causing delayed havoc. 817 818 if (VerifyAdapterCalls && 819 (Interpreter::code() != nullptr || StubRoutines::final_stubs_code() != nullptr)) { 820 #if 0 821 // So, let's test for cascading c2i/i2c adapters right now. 822 // assert(Interpreter::contains($return_addr) || 823 // StubRoutines::contains($return_addr), 824 // "i2c adapter must return to an interpreter frame"); 825 __ block_comment("verify_i2c { "); 826 Label L_ok; 827 if (Interpreter::code() != nullptr) { 828 range_check(masm, rax, r11, 829 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 830 L_ok); 831 } 832 if (StubRoutines::initial_stubs_code() != nullptr) { 833 range_check(masm, rax, r11, 834 StubRoutines::initial_stubs_code()->code_begin(), 835 StubRoutines::initial_stubs_code()->code_end(), 836 L_ok); 837 } 838 if (StubRoutines::final_stubs_code() != nullptr) { 839 range_check(masm, rax, r11, 840 StubRoutines::final_stubs_code()->code_begin(), 841 StubRoutines::final_stubs_code()->code_end(), 842 L_ok); 843 } 844 const char* msg = "i2c adapter must return to an interpreter frame"; 845 __ block_comment(msg); 846 __ stop(msg); 847 __ bind(L_ok); 848 __ block_comment("} verify_i2ce "); 849 #endif 850 } 851 852 // Cut-out for having no stack args. 853 int comp_words_on_stack = 0; 854 if (comp_args_on_stack) { 855 comp_words_on_stack = align_up(comp_args_on_stack * VMRegImpl::stack_slot_size, wordSize) >> LogBytesPerWord; 856 __ sub(rscratch1, sp, comp_words_on_stack * wordSize); 857 __ andr(sp, rscratch1, -16); 858 } 859 860 // Will jump to the compiled code just as if compiled code was doing it. 861 // Pre-load the register-jump target early, to schedule it better. 862 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_inline_offset()))); 863 864 #if INCLUDE_JVMCI 865 if (EnableJVMCI) { 866 // check if this call should be routed towards a specific entry point 867 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 868 Label no_alternative_target; 869 __ cbz(rscratch2, no_alternative_target); 870 __ mov(rscratch1, rscratch2); 871 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 872 __ bind(no_alternative_target); 873 } 874 #endif // INCLUDE_JVMCI 875 876 int total_args_passed = sig->length(); 877 878 // Now generate the shuffle code. 879 for (int i = 0; i < total_args_passed; i++) { 880 BasicType bt = sig->at(i)._bt; 881 if (bt == T_VOID) { 882 assert(i > 0 && (sig->at(i - 1)._bt == T_LONG || sig->at(i - 1)._bt == T_DOUBLE), "missing half"); 883 continue; 884 } 885 886 // Pick up 0, 1 or 2 words from SP+offset. 887 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), "scrambled load targets?"); 888 889 // Load in argument order going down. 890 int ld_off = (total_args_passed - i - 1) * Interpreter::stackElementSize; 891 // Point to interpreter value (vs. tag) 892 int next_off = ld_off - Interpreter::stackElementSize; 893 // 894 // 895 // 896 VMReg r_1 = regs[i].first(); 897 VMReg r_2 = regs[i].second(); 898 if (!r_1->is_valid()) { 899 assert(!r_2->is_valid(), ""); 900 continue; 901 } 902 if (r_1->is_stack()) { 903 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 904 int st_off = regs[i].first()->reg2stack() * VMRegImpl::stack_slot_size; 905 if (!r_2->is_valid()) { 906 // sign extend??? 907 __ ldrsw(rscratch2, Address(esp, ld_off)); 908 __ str(rscratch2, Address(sp, st_off)); 909 } else { 910 // 911 // We are using two optoregs. This can be either T_OBJECT, 912 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 913 // two slots but only uses one for thr T_LONG or T_DOUBLE case 914 // So we must adjust where to pick up the data to match the 915 // interpreter. 916 // 917 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 918 // are accessed as negative so LSW is at LOW address 919 920 // ld_off is MSW so get LSW 921 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off; 922 __ ldr(rscratch2, Address(esp, offset)); 923 // st_off is LSW (i.e. reg.first()) 924 __ str(rscratch2, Address(sp, st_off)); 925 } 926 } else if (r_1->is_Register()) { // Register argument 927 Register r = r_1->as_Register(); 928 if (r_2->is_valid()) { 929 // 930 // We are using two VMRegs. This can be either T_OBJECT, 931 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 932 // two slots but only uses one for thr T_LONG or T_DOUBLE case 933 // So we must adjust where to pick up the data to match the 934 // interpreter. 935 936 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off; 937 938 // this can be a misaligned move 939 __ ldr(r, Address(esp, offset)); 940 } else { 941 // sign extend and use a full word? 942 __ ldrw(r, Address(esp, ld_off)); 943 } 944 } else { 945 if (!r_2->is_valid()) { 946 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off)); 947 } else { 948 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off)); 949 } 950 } 951 } 952 953 954 __ mov(rscratch2, rscratch1); 955 __ push_cont_fastpath(rthread); // Set JavaThread::_cont_fastpath to the sp of the oldest interpreted frame we know about; kills rscratch1 956 __ mov(rscratch1, rscratch2); 957 958 // 6243940 We might end up in handle_wrong_method if 959 // the callee is deoptimized as we race thru here. If that 960 // happens we don't want to take a safepoint because the 961 // caller frame will look interpreted and arguments are now 962 // "compiled" so it is much better to make this transition 963 // invisible to the stack walking code. Unfortunately if 964 // we try and find the callee by normal means a safepoint 965 // is possible. So we stash the desired callee in the thread 966 // and the vm will find there should this case occur. 967 968 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset())); 969 __ br(rscratch1); 970 } 971 972 static void gen_inline_cache_check(MacroAssembler *masm, Label& skip_fixup) { 973 Register data = rscratch2; 974 __ ic_check(1 /* end_alignment */); 975 __ ldr(rmethod, Address(data, CompiledICData::speculated_method_offset())); 976 977 // Method might have been compiled since the call site was patched to 978 // interpreted; if that is the case treat it as a miss so we can get 979 // the call site corrected. 980 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 981 __ cbz(rscratch1, skip_fixup); 982 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 983 } 984 985 // --------------------------------------------------------------- 986 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler* masm, 987 int comp_args_on_stack, 988 const GrowableArray<SigEntry>* sig, 989 const VMRegPair* regs, 990 const GrowableArray<SigEntry>* sig_cc, 991 const VMRegPair* regs_cc, 992 const GrowableArray<SigEntry>* sig_cc_ro, 993 const VMRegPair* regs_cc_ro, 994 AdapterFingerPrint* fingerprint, 995 AdapterBlob*& new_adapter, 996 bool allocate_code_blob) { 997 998 address i2c_entry = __ pc(); 999 gen_i2c_adapter(masm, comp_args_on_stack, sig, regs); 1000 1001 // ------------------------------------------------------------------------- 1002 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls 1003 // to the interpreter. The args start out packed in the compiled layout. They 1004 // need to be unpacked into the interpreter layout. This will almost always 1005 // require some stack space. We grow the current (compiled) stack, then repack 1006 // the args. We finally end in a jump to the generic interpreter entry point. 1007 // On exit from the interpreter, the interpreter will restore our SP (lest the 1008 // compiled code, which relies solely on SP and not FP, get sick). 1009 1010 address c2i_unverified_entry = __ pc(); 1011 address c2i_unverified_inline_entry = __ pc(); 1012 Label skip_fixup; 1013 1014 gen_inline_cache_check(masm, skip_fixup); 1015 1016 OopMapSet* oop_maps = new OopMapSet(); 1017 int frame_complete = CodeOffsets::frame_never_safe; 1018 int frame_size_in_words = 0; 1019 1020 // Scalarized c2i adapter with non-scalarized receiver (i.e., don't pack receiver) 1021 address c2i_no_clinit_check_entry = nullptr; 1022 address c2i_inline_ro_entry = __ pc(); 1023 if (regs_cc != regs_cc_ro) { 1024 // No class init barrier needed because method is guaranteed to be non-static 1025 gen_c2i_adapter(masm, sig_cc_ro, regs_cc_ro, /* requires_clinit_barrier = */ false, c2i_no_clinit_check_entry, 1026 skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false); 1027 skip_fixup.reset(); 1028 } 1029 1030 // Scalarized c2i adapter 1031 address c2i_entry = __ pc(); 1032 address c2i_inline_entry = __ pc(); 1033 gen_c2i_adapter(masm, sig_cc, regs_cc, /* requires_clinit_barrier = */ true, c2i_no_clinit_check_entry, 1034 skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ true); 1035 1036 // Non-scalarized c2i adapter 1037 if (regs != regs_cc) { 1038 c2i_unverified_inline_entry = __ pc(); 1039 Label inline_entry_skip_fixup; 1040 gen_inline_cache_check(masm, inline_entry_skip_fixup); 1041 1042 c2i_inline_entry = __ pc(); 1043 gen_c2i_adapter(masm, sig, regs, /* requires_clinit_barrier = */ true, c2i_no_clinit_check_entry, 1044 inline_entry_skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words, /* alloc_inline_receiver = */ false); 1045 } 1046 1047 1048 // The c2i adapter might safepoint and trigger a GC. The caller must make sure that 1049 // the GC knows about the location of oop argument locations passed to the c2i adapter. 1050 if (allocate_code_blob) { 1051 bool caller_must_gc_arguments = (regs != regs_cc); 1052 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps, caller_must_gc_arguments); 1053 } 1054 1055 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_inline_entry, c2i_inline_ro_entry, c2i_unverified_entry, c2i_unverified_inline_entry, c2i_no_clinit_check_entry); 1056 } 1057 1058 static int c_calling_convention_priv(const BasicType *sig_bt, 1059 VMRegPair *regs, 1060 int total_args_passed) { 1061 1062 // We return the amount of VMRegImpl stack slots we need to reserve for all 1063 // the arguments NOT counting out_preserve_stack_slots. 1064 1065 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { 1066 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7 1067 }; 1068 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { 1069 c_farg0, c_farg1, c_farg2, c_farg3, 1070 c_farg4, c_farg5, c_farg6, c_farg7 1071 }; 1072 1073 uint int_args = 0; 1074 uint fp_args = 0; 1075 uint stk_args = 0; // inc by 2 each time 1076 1077 for (int i = 0; i < total_args_passed; i++) { 1078 switch (sig_bt[i]) { 1079 case T_BOOLEAN: 1080 case T_CHAR: 1081 case T_BYTE: 1082 case T_SHORT: 1083 case T_INT: 1084 if (int_args < Argument::n_int_register_parameters_c) { 1085 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 1086 } else { 1087 #ifdef __APPLE__ 1088 // Less-than word types are stored one after another. 1089 // The code is unable to handle this so bailout. 1090 return -1; 1091 #endif 1092 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 1093 stk_args += 2; 1094 } 1095 break; 1096 case T_LONG: 1097 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 1098 // fall through 1099 case T_OBJECT: 1100 case T_ARRAY: 1101 case T_ADDRESS: 1102 case T_METADATA: 1103 if (int_args < Argument::n_int_register_parameters_c) { 1104 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 1105 } else { 1106 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 1107 stk_args += 2; 1108 } 1109 break; 1110 case T_FLOAT: 1111 if (fp_args < Argument::n_float_register_parameters_c) { 1112 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 1113 } else { 1114 #ifdef __APPLE__ 1115 // Less-than word types are stored one after another. 1116 // The code is unable to handle this so bailout. 1117 return -1; 1118 #endif 1119 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 1120 stk_args += 2; 1121 } 1122 break; 1123 case T_DOUBLE: 1124 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half"); 1125 if (fp_args < Argument::n_float_register_parameters_c) { 1126 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 1127 } else { 1128 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 1129 stk_args += 2; 1130 } 1131 break; 1132 case T_VOID: // Halves of longs and doubles 1133 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 1134 regs[i].set_bad(); 1135 break; 1136 default: 1137 ShouldNotReachHere(); 1138 break; 1139 } 1140 } 1141 1142 return stk_args; 1143 } 1144 1145 int SharedRuntime::vector_calling_convention(VMRegPair *regs, 1146 uint num_bits, 1147 uint total_args_passed) { 1148 Unimplemented(); 1149 return 0; 1150 } 1151 1152 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 1153 VMRegPair *regs, 1154 int total_args_passed) 1155 { 1156 int result = c_calling_convention_priv(sig_bt, regs, total_args_passed); 1157 guarantee(result >= 0, "Unsupported arguments configuration"); 1158 return result; 1159 } 1160 1161 1162 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1163 // We always ignore the frame_slots arg and just use the space just below frame pointer 1164 // which by this time is free to use 1165 switch (ret_type) { 1166 case T_FLOAT: 1167 __ strs(v0, Address(rfp, -wordSize)); 1168 break; 1169 case T_DOUBLE: 1170 __ strd(v0, Address(rfp, -wordSize)); 1171 break; 1172 case T_VOID: break; 1173 default: { 1174 __ str(r0, Address(rfp, -wordSize)); 1175 } 1176 } 1177 } 1178 1179 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1180 // We always ignore the frame_slots arg and just use the space just below frame pointer 1181 // which by this time is free to use 1182 switch (ret_type) { 1183 case T_FLOAT: 1184 __ ldrs(v0, Address(rfp, -wordSize)); 1185 break; 1186 case T_DOUBLE: 1187 __ ldrd(v0, Address(rfp, -wordSize)); 1188 break; 1189 case T_VOID: break; 1190 default: { 1191 __ ldr(r0, Address(rfp, -wordSize)); 1192 } 1193 } 1194 } 1195 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1196 RegSet x; 1197 for ( int i = first_arg ; i < arg_count ; i++ ) { 1198 if (args[i].first()->is_Register()) { 1199 x = x + args[i].first()->as_Register(); 1200 } else if (args[i].first()->is_FloatRegister()) { 1201 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize))); 1202 } 1203 } 1204 __ push(x, sp); 1205 } 1206 1207 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1208 RegSet x; 1209 for ( int i = first_arg ; i < arg_count ; i++ ) { 1210 if (args[i].first()->is_Register()) { 1211 x = x + args[i].first()->as_Register(); 1212 } else { 1213 ; 1214 } 1215 } 1216 __ pop(x, sp); 1217 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) { 1218 if (args[i].first()->is_Register()) { 1219 ; 1220 } else if (args[i].first()->is_FloatRegister()) { 1221 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize))); 1222 } 1223 } 1224 } 1225 1226 static void verify_oop_args(MacroAssembler* masm, 1227 const methodHandle& method, 1228 const BasicType* sig_bt, 1229 const VMRegPair* regs) { 1230 Register temp_reg = r19; // not part of any compiled calling seq 1231 if (VerifyOops) { 1232 for (int i = 0; i < method->size_of_parameters(); i++) { 1233 if (sig_bt[i] == T_OBJECT || 1234 sig_bt[i] == T_ARRAY) { 1235 VMReg r = regs[i].first(); 1236 assert(r->is_valid(), "bad oop arg"); 1237 if (r->is_stack()) { 1238 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1239 __ verify_oop(temp_reg); 1240 } else { 1241 __ verify_oop(r->as_Register()); 1242 } 1243 } 1244 } 1245 } 1246 } 1247 1248 // on exit, sp points to the ContinuationEntry 1249 static OopMap* continuation_enter_setup(MacroAssembler* masm, int& stack_slots) { 1250 assert(ContinuationEntry::size() % VMRegImpl::stack_slot_size == 0, ""); 1251 assert(in_bytes(ContinuationEntry::cont_offset()) % VMRegImpl::stack_slot_size == 0, ""); 1252 assert(in_bytes(ContinuationEntry::chunk_offset()) % VMRegImpl::stack_slot_size == 0, ""); 1253 1254 stack_slots += (int)ContinuationEntry::size()/wordSize; 1255 __ sub(sp, sp, (int)ContinuationEntry::size()); // place Continuation metadata 1256 1257 OopMap* map = new OopMap(((int)ContinuationEntry::size() + wordSize)/ VMRegImpl::stack_slot_size, 0 /* arg_slots*/); 1258 1259 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1260 __ str(rscratch1, Address(sp, ContinuationEntry::parent_offset())); 1261 __ mov(rscratch1, sp); // we can't use sp as the source in str 1262 __ str(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1263 1264 return map; 1265 } 1266 1267 // on entry c_rarg1 points to the continuation 1268 // sp points to ContinuationEntry 1269 // c_rarg3 -- isVirtualThread 1270 static void fill_continuation_entry(MacroAssembler* masm) { 1271 #ifdef ASSERT 1272 __ movw(rscratch1, ContinuationEntry::cookie_value()); 1273 __ strw(rscratch1, Address(sp, ContinuationEntry::cookie_offset())); 1274 #endif 1275 1276 __ str (c_rarg1, Address(sp, ContinuationEntry::cont_offset())); 1277 __ strw(c_rarg3, Address(sp, ContinuationEntry::flags_offset())); 1278 __ str (zr, Address(sp, ContinuationEntry::chunk_offset())); 1279 __ strw(zr, Address(sp, ContinuationEntry::argsize_offset())); 1280 __ strw(zr, Address(sp, ContinuationEntry::pin_count_offset())); 1281 1282 __ ldr(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset())); 1283 __ str(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset())); 1284 __ ldr(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset())); 1285 __ str(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset())); 1286 1287 __ str(zr, Address(rthread, JavaThread::cont_fastpath_offset())); 1288 __ str(zr, Address(rthread, JavaThread::held_monitor_count_offset())); 1289 } 1290 1291 // on entry, sp points to the ContinuationEntry 1292 // on exit, rfp points to the spilled rfp in the entry frame 1293 static void continuation_enter_cleanup(MacroAssembler* masm) { 1294 #ifndef PRODUCT 1295 Label OK; 1296 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1297 __ cmp(sp, rscratch1); 1298 __ br(Assembler::EQ, OK); 1299 __ stop("incorrect sp1"); 1300 __ bind(OK); 1301 #endif 1302 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_cont_fastpath_offset())); 1303 __ str(rscratch1, Address(rthread, JavaThread::cont_fastpath_offset())); 1304 1305 if (CheckJNICalls) { 1306 // Check if this is a virtual thread continuation 1307 Label L_skip_vthread_code; 1308 __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset())); 1309 __ cbzw(rscratch1, L_skip_vthread_code); 1310 1311 // If the held monitor count is > 0 and this vthread is terminating then 1312 // it failed to release a JNI monitor. So we issue the same log message 1313 // that JavaThread::exit does. 1314 __ ldr(rscratch1, Address(rthread, JavaThread::jni_monitor_count_offset())); 1315 __ cbz(rscratch1, L_skip_vthread_code); 1316 1317 // Save return value potentially containing the exception oop in callee-saved R19. 1318 __ mov(r19, r0); 1319 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::log_jni_monitor_still_held)); 1320 // Restore potential return value. 1321 __ mov(r0, r19); 1322 1323 // For vthreads we have to explicitly zero the JNI monitor count of the carrier 1324 // on termination. The held count is implicitly zeroed below when we restore from 1325 // the parent held count (which has to be zero). 1326 __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset())); 1327 1328 __ bind(L_skip_vthread_code); 1329 } 1330 #ifdef ASSERT 1331 else { 1332 // Check if this is a virtual thread continuation 1333 Label L_skip_vthread_code; 1334 __ ldrw(rscratch1, Address(sp, ContinuationEntry::flags_offset())); 1335 __ cbzw(rscratch1, L_skip_vthread_code); 1336 1337 // See comment just above. If not checking JNI calls the JNI count is only 1338 // needed for assertion checking. 1339 __ str(zr, Address(rthread, JavaThread::jni_monitor_count_offset())); 1340 1341 __ bind(L_skip_vthread_code); 1342 } 1343 #endif 1344 1345 __ ldr(rscratch1, Address(sp, ContinuationEntry::parent_held_monitor_count_offset())); 1346 __ str(rscratch1, Address(rthread, JavaThread::held_monitor_count_offset())); 1347 1348 __ ldr(rscratch2, Address(sp, ContinuationEntry::parent_offset())); 1349 __ str(rscratch2, Address(rthread, JavaThread::cont_entry_offset())); 1350 __ add(rfp, sp, (int)ContinuationEntry::size()); 1351 } 1352 1353 // enterSpecial(Continuation c, boolean isContinue, boolean isVirtualThread) 1354 // On entry: c_rarg1 -- the continuation object 1355 // c_rarg2 -- isContinue 1356 // c_rarg3 -- isVirtualThread 1357 static void gen_continuation_enter(MacroAssembler* masm, 1358 const methodHandle& method, 1359 const BasicType* sig_bt, 1360 const VMRegPair* regs, 1361 int& exception_offset, 1362 OopMapSet*oop_maps, 1363 int& frame_complete, 1364 int& stack_slots, 1365 int& interpreted_entry_offset, 1366 int& compiled_entry_offset) { 1367 //verify_oop_args(masm, method, sig_bt, regs); 1368 Address resolve(SharedRuntime::get_resolve_static_call_stub(), relocInfo::static_call_type); 1369 1370 address start = __ pc(); 1371 1372 Label call_thaw, exit; 1373 1374 // i2i entry used at interp_only_mode only 1375 interpreted_entry_offset = __ pc() - start; 1376 { 1377 1378 #ifdef ASSERT 1379 Label is_interp_only; 1380 __ ldrw(rscratch1, Address(rthread, JavaThread::interp_only_mode_offset())); 1381 __ cbnzw(rscratch1, is_interp_only); 1382 __ stop("enterSpecial interpreter entry called when not in interp_only_mode"); 1383 __ bind(is_interp_only); 1384 #endif 1385 1386 // Read interpreter arguments into registers (this is an ad-hoc i2c adapter) 1387 __ ldr(c_rarg1, Address(esp, Interpreter::stackElementSize*2)); 1388 __ ldr(c_rarg2, Address(esp, Interpreter::stackElementSize*1)); 1389 __ ldr(c_rarg3, Address(esp, Interpreter::stackElementSize*0)); 1390 __ push_cont_fastpath(rthread); 1391 1392 __ enter(); 1393 stack_slots = 2; // will be adjusted in setup 1394 OopMap* map = continuation_enter_setup(masm, stack_slots); 1395 // The frame is complete here, but we only record it for the compiled entry, so the frame would appear unsafe, 1396 // but that's okay because at the very worst we'll miss an async sample, but we're in interp_only_mode anyway. 1397 1398 fill_continuation_entry(masm); 1399 1400 __ cbnz(c_rarg2, call_thaw); 1401 1402 const address tr_call = __ trampoline_call(resolve); 1403 if (tr_call == nullptr) { 1404 fatal("CodeCache is full at gen_continuation_enter"); 1405 } 1406 1407 oop_maps->add_gc_map(__ pc() - start, map); 1408 __ post_call_nop(); 1409 1410 __ b(exit); 1411 1412 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call); 1413 if (stub == nullptr) { 1414 fatal("CodeCache is full at gen_continuation_enter"); 1415 } 1416 } 1417 1418 // compiled entry 1419 __ align(CodeEntryAlignment); 1420 compiled_entry_offset = __ pc() - start; 1421 1422 __ enter(); 1423 stack_slots = 2; // will be adjusted in setup 1424 OopMap* map = continuation_enter_setup(masm, stack_slots); 1425 frame_complete = __ pc() - start; 1426 1427 fill_continuation_entry(masm); 1428 1429 __ cbnz(c_rarg2, call_thaw); 1430 1431 const address tr_call = __ trampoline_call(resolve); 1432 if (tr_call == nullptr) { 1433 fatal("CodeCache is full at gen_continuation_enter"); 1434 } 1435 1436 oop_maps->add_gc_map(__ pc() - start, map); 1437 __ post_call_nop(); 1438 1439 __ b(exit); 1440 1441 __ bind(call_thaw); 1442 1443 __ rt_call(CAST_FROM_FN_PTR(address, StubRoutines::cont_thaw())); 1444 oop_maps->add_gc_map(__ pc() - start, map->deep_copy()); 1445 ContinuationEntry::_return_pc_offset = __ pc() - start; 1446 __ post_call_nop(); 1447 1448 __ bind(exit); 1449 continuation_enter_cleanup(masm); 1450 __ leave(); 1451 __ ret(lr); 1452 1453 /// exception handling 1454 1455 exception_offset = __ pc() - start; 1456 { 1457 __ mov(r19, r0); // save return value contaning the exception oop in callee-saved R19 1458 1459 continuation_enter_cleanup(masm); 1460 1461 __ ldr(c_rarg1, Address(rfp, wordSize)); // return address 1462 __ authenticate_return_address(c_rarg1); 1463 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), rthread, c_rarg1); 1464 1465 // see OptoRuntime::generate_exception_blob: r0 -- exception oop, r3 -- exception pc 1466 1467 __ mov(r1, r0); // the exception handler 1468 __ mov(r0, r19); // restore return value contaning the exception oop 1469 __ verify_oop(r0); 1470 1471 __ leave(); 1472 __ mov(r3, lr); 1473 __ br(r1); // the exception handler 1474 } 1475 1476 address stub = CompiledDirectCall::emit_to_interp_stub(masm, tr_call); 1477 if (stub == nullptr) { 1478 fatal("CodeCache is full at gen_continuation_enter"); 1479 } 1480 } 1481 1482 static void gen_continuation_yield(MacroAssembler* masm, 1483 const methodHandle& method, 1484 const BasicType* sig_bt, 1485 const VMRegPair* regs, 1486 OopMapSet* oop_maps, 1487 int& frame_complete, 1488 int& stack_slots, 1489 int& compiled_entry_offset) { 1490 enum layout { 1491 rfp_off1, 1492 rfp_off2, 1493 lr_off, 1494 lr_off2, 1495 framesize // inclusive of return address 1496 }; 1497 // assert(is_even(framesize/2), "sp not 16-byte aligned"); 1498 stack_slots = framesize / VMRegImpl::slots_per_word; 1499 assert(stack_slots == 2, "recheck layout"); 1500 1501 address start = __ pc(); 1502 1503 compiled_entry_offset = __ pc() - start; 1504 __ enter(); 1505 1506 __ mov(c_rarg1, sp); 1507 1508 frame_complete = __ pc() - start; 1509 address the_pc = __ pc(); 1510 1511 __ post_call_nop(); // this must be exactly after the pc value that is pushed into the frame info, we use this nop for fast CodeBlob lookup 1512 1513 __ mov(c_rarg0, rthread); 1514 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 1515 __ call_VM_leaf(Continuation::freeze_entry(), 2); 1516 __ reset_last_Java_frame(true); 1517 1518 Label pinned; 1519 1520 __ cbnz(r0, pinned); 1521 1522 // We've succeeded, set sp to the ContinuationEntry 1523 __ ldr(rscratch1, Address(rthread, JavaThread::cont_entry_offset())); 1524 __ mov(sp, rscratch1); 1525 continuation_enter_cleanup(masm); 1526 1527 __ bind(pinned); // pinned -- return to caller 1528 1529 // handle pending exception thrown by freeze 1530 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 1531 Label ok; 1532 __ cbz(rscratch1, ok); 1533 __ leave(); 1534 __ lea(rscratch1, RuntimeAddress(StubRoutines::forward_exception_entry())); 1535 __ br(rscratch1); 1536 __ bind(ok); 1537 1538 __ leave(); 1539 __ ret(lr); 1540 1541 OopMap* map = new OopMap(framesize, 1); 1542 oop_maps->add_gc_map(the_pc - start, map); 1543 } 1544 1545 static void gen_special_dispatch(MacroAssembler* masm, 1546 const methodHandle& method, 1547 const BasicType* sig_bt, 1548 const VMRegPair* regs) { 1549 verify_oop_args(masm, method, sig_bt, regs); 1550 vmIntrinsics::ID iid = method->intrinsic_id(); 1551 1552 // Now write the args into the outgoing interpreter space 1553 bool has_receiver = false; 1554 Register receiver_reg = noreg; 1555 int member_arg_pos = -1; 1556 Register member_reg = noreg; 1557 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1558 if (ref_kind != 0) { 1559 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1560 member_reg = r19; // known to be free at this point 1561 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1562 } else if (iid == vmIntrinsics::_invokeBasic) { 1563 has_receiver = true; 1564 } else if (iid == vmIntrinsics::_linkToNative) { 1565 member_arg_pos = method->size_of_parameters() - 1; // trailing NativeEntryPoint argument 1566 member_reg = r19; // known to be free at this point 1567 } else { 1568 fatal("unexpected intrinsic id %d", vmIntrinsics::as_int(iid)); 1569 } 1570 1571 if (member_reg != noreg) { 1572 // Load the member_arg into register, if necessary. 1573 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1574 VMReg r = regs[member_arg_pos].first(); 1575 if (r->is_stack()) { 1576 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1577 } else { 1578 // no data motion is needed 1579 member_reg = r->as_Register(); 1580 } 1581 } 1582 1583 if (has_receiver) { 1584 // Make sure the receiver is loaded into a register. 1585 assert(method->size_of_parameters() > 0, "oob"); 1586 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1587 VMReg r = regs[0].first(); 1588 assert(r->is_valid(), "bad receiver arg"); 1589 if (r->is_stack()) { 1590 // Porting note: This assumes that compiled calling conventions always 1591 // pass the receiver oop in a register. If this is not true on some 1592 // platform, pick a temp and load the receiver from stack. 1593 fatal("receiver always in a register"); 1594 receiver_reg = r2; // known to be free at this point 1595 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1596 } else { 1597 // no data motion is needed 1598 receiver_reg = r->as_Register(); 1599 } 1600 } 1601 1602 // Figure out which address we are really jumping to: 1603 MethodHandles::generate_method_handle_dispatch(masm, iid, 1604 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1605 } 1606 1607 // --------------------------------------------------------------------------- 1608 // Generate a native wrapper for a given method. The method takes arguments 1609 // in the Java compiled code convention, marshals them to the native 1610 // convention (handlizes oops, etc), transitions to native, makes the call, 1611 // returns to java state (possibly blocking), unhandlizes any result and 1612 // returns. 1613 // 1614 // Critical native functions are a shorthand for the use of 1615 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1616 // functions. The wrapper is expected to unpack the arguments before 1617 // passing them to the callee. Critical native functions leave the state _in_Java, 1618 // since they block out GC. 1619 // Some other parts of JNI setup are skipped like the tear down of the JNI handle 1620 // block and the check for pending exceptions it's impossible for them 1621 // to be thrown. 1622 // 1623 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1624 const methodHandle& method, 1625 int compile_id, 1626 BasicType* in_sig_bt, 1627 VMRegPair* in_regs, 1628 BasicType ret_type) { 1629 if (method->is_continuation_native_intrinsic()) { 1630 int exception_offset = -1; 1631 OopMapSet* oop_maps = new OopMapSet(); 1632 int frame_complete = -1; 1633 int stack_slots = -1; 1634 int interpreted_entry_offset = -1; 1635 int vep_offset = -1; 1636 if (method->is_continuation_enter_intrinsic()) { 1637 gen_continuation_enter(masm, 1638 method, 1639 in_sig_bt, 1640 in_regs, 1641 exception_offset, 1642 oop_maps, 1643 frame_complete, 1644 stack_slots, 1645 interpreted_entry_offset, 1646 vep_offset); 1647 } else if (method->is_continuation_yield_intrinsic()) { 1648 gen_continuation_yield(masm, 1649 method, 1650 in_sig_bt, 1651 in_regs, 1652 oop_maps, 1653 frame_complete, 1654 stack_slots, 1655 vep_offset); 1656 } else { 1657 guarantee(false, "Unknown Continuation native intrinsic"); 1658 } 1659 1660 #ifdef ASSERT 1661 if (method->is_continuation_enter_intrinsic()) { 1662 assert(interpreted_entry_offset != -1, "Must be set"); 1663 assert(exception_offset != -1, "Must be set"); 1664 } else { 1665 assert(interpreted_entry_offset == -1, "Must be unset"); 1666 assert(exception_offset == -1, "Must be unset"); 1667 } 1668 assert(frame_complete != -1, "Must be set"); 1669 assert(stack_slots != -1, "Must be set"); 1670 assert(vep_offset != -1, "Must be set"); 1671 #endif 1672 1673 __ flush(); 1674 nmethod* nm = nmethod::new_native_nmethod(method, 1675 compile_id, 1676 masm->code(), 1677 vep_offset, 1678 frame_complete, 1679 stack_slots, 1680 in_ByteSize(-1), 1681 in_ByteSize(-1), 1682 oop_maps, 1683 exception_offset); 1684 if (nm == nullptr) return nm; 1685 if (method->is_continuation_enter_intrinsic()) { 1686 ContinuationEntry::set_enter_code(nm, interpreted_entry_offset); 1687 } else if (method->is_continuation_yield_intrinsic()) { 1688 _cont_doYield_stub = nm; 1689 } else { 1690 guarantee(false, "Unknown Continuation native intrinsic"); 1691 } 1692 return nm; 1693 } 1694 1695 if (method->is_method_handle_intrinsic()) { 1696 vmIntrinsics::ID iid = method->intrinsic_id(); 1697 intptr_t start = (intptr_t)__ pc(); 1698 int vep_offset = ((intptr_t)__ pc()) - start; 1699 1700 // First instruction must be a nop as it may need to be patched on deoptimisation 1701 __ nop(); 1702 gen_special_dispatch(masm, 1703 method, 1704 in_sig_bt, 1705 in_regs); 1706 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1707 __ flush(); 1708 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1709 return nmethod::new_native_nmethod(method, 1710 compile_id, 1711 masm->code(), 1712 vep_offset, 1713 frame_complete, 1714 stack_slots / VMRegImpl::slots_per_word, 1715 in_ByteSize(-1), 1716 in_ByteSize(-1), 1717 nullptr); 1718 } 1719 address native_func = method->native_function(); 1720 assert(native_func != nullptr, "must have function"); 1721 1722 // An OopMap for lock (and class if static) 1723 OopMapSet *oop_maps = new OopMapSet(); 1724 intptr_t start = (intptr_t)__ pc(); 1725 1726 // We have received a description of where all the java arg are located 1727 // on entry to the wrapper. We need to convert these args to where 1728 // the jni function will expect them. To figure out where they go 1729 // we convert the java signature to a C signature by inserting 1730 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1731 1732 const int total_in_args = method->size_of_parameters(); 1733 int total_c_args = total_in_args + (method->is_static() ? 2 : 1); 1734 1735 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1736 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1737 BasicType* in_elem_bt = nullptr; 1738 1739 int argc = 0; 1740 out_sig_bt[argc++] = T_ADDRESS; 1741 if (method->is_static()) { 1742 out_sig_bt[argc++] = T_OBJECT; 1743 } 1744 1745 for (int i = 0; i < total_in_args ; i++ ) { 1746 out_sig_bt[argc++] = in_sig_bt[i]; 1747 } 1748 1749 // Now figure out where the args must be stored and how much stack space 1750 // they require. 1751 int out_arg_slots; 1752 out_arg_slots = c_calling_convention_priv(out_sig_bt, out_regs, total_c_args); 1753 1754 if (out_arg_slots < 0) { 1755 return nullptr; 1756 } 1757 1758 // Compute framesize for the wrapper. We need to handlize all oops in 1759 // incoming registers 1760 1761 // Calculate the total number of stack slots we will need. 1762 1763 // First count the abi requirement plus all of the outgoing args 1764 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1765 1766 // Now the space for the inbound oop handle area 1767 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers 1768 1769 int oop_handle_offset = stack_slots; 1770 stack_slots += total_save_slots; 1771 1772 // Now any space we need for handlizing a klass if static method 1773 1774 int klass_slot_offset = 0; 1775 int klass_offset = -1; 1776 int lock_slot_offset = 0; 1777 bool is_static = false; 1778 1779 if (method->is_static()) { 1780 klass_slot_offset = stack_slots; 1781 stack_slots += VMRegImpl::slots_per_word; 1782 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1783 is_static = true; 1784 } 1785 1786 // Plus a lock if needed 1787 1788 if (method->is_synchronized()) { 1789 lock_slot_offset = stack_slots; 1790 stack_slots += VMRegImpl::slots_per_word; 1791 } 1792 1793 // Now a place (+2) to save return values or temp during shuffling 1794 // + 4 for return address (which we own) and saved rfp 1795 stack_slots += 6; 1796 1797 // Ok The space we have allocated will look like: 1798 // 1799 // 1800 // FP-> | | 1801 // |---------------------| 1802 // | 2 slots for moves | 1803 // |---------------------| 1804 // | lock box (if sync) | 1805 // |---------------------| <- lock_slot_offset 1806 // | klass (if static) | 1807 // |---------------------| <- klass_slot_offset 1808 // | oopHandle area | 1809 // |---------------------| <- oop_handle_offset (8 java arg registers) 1810 // | outbound memory | 1811 // | based arguments | 1812 // | | 1813 // |---------------------| 1814 // | | 1815 // SP-> | out_preserved_slots | 1816 // 1817 // 1818 1819 1820 // Now compute actual number of stack words we need rounding to make 1821 // stack properly aligned. 1822 stack_slots = align_up(stack_slots, StackAlignmentInSlots); 1823 1824 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1825 1826 // First thing make an ic check to see if we should even be here 1827 1828 // We are free to use all registers as temps without saving them and 1829 // restoring them except rfp. rfp is the only callee save register 1830 // as far as the interpreter and the compiler(s) are concerned. 1831 1832 const Register receiver = j_rarg0; 1833 1834 Label exception_pending; 1835 1836 assert_different_registers(receiver, rscratch1); 1837 __ verify_oop(receiver); 1838 __ ic_check(8 /* end_alignment */); 1839 1840 // Verified entry point must be aligned 1841 int vep_offset = ((intptr_t)__ pc()) - start; 1842 1843 // If we have to make this method not-entrant we'll overwrite its 1844 // first instruction with a jump. For this action to be legal we 1845 // must ensure that this first instruction is a B, BL, NOP, BKPT, 1846 // SVC, HVC, or SMC. Make it a NOP. 1847 __ nop(); 1848 1849 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) { 1850 Label L_skip_barrier; 1851 __ mov_metadata(rscratch2, method->method_holder()); // InstanceKlass* 1852 __ clinit_barrier(rscratch2, rscratch1, &L_skip_barrier); 1853 __ far_jump(RuntimeAddress(SharedRuntime::get_handle_wrong_method_stub())); 1854 1855 __ bind(L_skip_barrier); 1856 } 1857 1858 // Generate stack overflow check 1859 __ bang_stack_with_offset(checked_cast<int>(StackOverflow::stack_shadow_zone_size())); 1860 1861 // Generate a new frame for the wrapper. 1862 __ enter(); 1863 // -2 because return address is already present and so is saved rfp 1864 __ sub(sp, sp, stack_size - 2*wordSize); 1865 1866 BarrierSetAssembler* bs = BarrierSet::barrier_set()->barrier_set_assembler(); 1867 bs->nmethod_entry_barrier(masm, nullptr /* slow_path */, nullptr /* continuation */, nullptr /* guard */); 1868 1869 // Frame is now completed as far as size and linkage. 1870 int frame_complete = ((intptr_t)__ pc()) - start; 1871 1872 // We use r20 as the oop handle for the receiver/klass 1873 // It is callee save so it survives the call to native 1874 1875 const Register oop_handle_reg = r20; 1876 1877 // 1878 // We immediately shuffle the arguments so that any vm call we have to 1879 // make from here on out (sync slow path, jvmti, etc.) we will have 1880 // captured the oops from our caller and have a valid oopMap for 1881 // them. 1882 1883 // ----------------- 1884 // The Grand Shuffle 1885 1886 // The Java calling convention is either equal (linux) or denser (win64) than the 1887 // c calling convention. However the because of the jni_env argument the c calling 1888 // convention always has at least one more (and two for static) arguments than Java. 1889 // Therefore if we move the args from java -> c backwards then we will never have 1890 // a register->register conflict and we don't have to build a dependency graph 1891 // and figure out how to break any cycles. 1892 // 1893 1894 // Record esp-based slot for receiver on stack for non-static methods 1895 int receiver_offset = -1; 1896 1897 // This is a trick. We double the stack slots so we can claim 1898 // the oops in the caller's frame. Since we are sure to have 1899 // more args than the caller doubling is enough to make 1900 // sure we can capture all the incoming oop args from the 1901 // caller. 1902 // 1903 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1904 1905 // Mark location of rfp (someday) 1906 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp)); 1907 1908 1909 int float_args = 0; 1910 int int_args = 0; 1911 1912 #ifdef ASSERT 1913 bool reg_destroyed[Register::number_of_registers]; 1914 bool freg_destroyed[FloatRegister::number_of_registers]; 1915 for ( int r = 0 ; r < Register::number_of_registers ; r++ ) { 1916 reg_destroyed[r] = false; 1917 } 1918 for ( int f = 0 ; f < FloatRegister::number_of_registers ; f++ ) { 1919 freg_destroyed[f] = false; 1920 } 1921 1922 #endif /* ASSERT */ 1923 1924 // For JNI natives the incoming and outgoing registers are offset upwards. 1925 GrowableArray<int> arg_order(2 * total_in_args); 1926 VMRegPair tmp_vmreg; 1927 tmp_vmreg.set2(r19->as_VMReg()); 1928 1929 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { 1930 arg_order.push(i); 1931 arg_order.push(c_arg); 1932 } 1933 1934 int temploc = -1; 1935 for (int ai = 0; ai < arg_order.length(); ai += 2) { 1936 int i = arg_order.at(ai); 1937 int c_arg = arg_order.at(ai + 1); 1938 __ block_comment(err_msg("move %d -> %d", i, c_arg)); 1939 assert(c_arg != -1 && i != -1, "wrong order"); 1940 #ifdef ASSERT 1941 if (in_regs[i].first()->is_Register()) { 1942 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); 1943 } else if (in_regs[i].first()->is_FloatRegister()) { 1944 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!"); 1945 } 1946 if (out_regs[c_arg].first()->is_Register()) { 1947 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 1948 } else if (out_regs[c_arg].first()->is_FloatRegister()) { 1949 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true; 1950 } 1951 #endif /* ASSERT */ 1952 switch (in_sig_bt[i]) { 1953 case T_ARRAY: 1954 case T_OBJECT: 1955 __ object_move(map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 1956 ((i == 0) && (!is_static)), 1957 &receiver_offset); 1958 int_args++; 1959 break; 1960 case T_VOID: 1961 break; 1962 1963 case T_FLOAT: 1964 __ float_move(in_regs[i], out_regs[c_arg]); 1965 float_args++; 1966 break; 1967 1968 case T_DOUBLE: 1969 assert( i + 1 < total_in_args && 1970 in_sig_bt[i + 1] == T_VOID && 1971 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 1972 __ double_move(in_regs[i], out_regs[c_arg]); 1973 float_args++; 1974 break; 1975 1976 case T_LONG : 1977 __ long_move(in_regs[i], out_regs[c_arg]); 1978 int_args++; 1979 break; 1980 1981 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 1982 1983 default: 1984 __ move32_64(in_regs[i], out_regs[c_arg]); 1985 int_args++; 1986 } 1987 } 1988 1989 // point c_arg at the first arg that is already loaded in case we 1990 // need to spill before we call out 1991 int c_arg = total_c_args - total_in_args; 1992 1993 // Pre-load a static method's oop into c_rarg1. 1994 if (method->is_static()) { 1995 1996 // load oop into a register 1997 __ movoop(c_rarg1, 1998 JNIHandles::make_local(method->method_holder()->java_mirror())); 1999 2000 // Now handlize the static class mirror it's known not-null. 2001 __ str(c_rarg1, Address(sp, klass_offset)); 2002 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 2003 2004 // Now get the handle 2005 __ lea(c_rarg1, Address(sp, klass_offset)); 2006 // and protect the arg if we must spill 2007 c_arg--; 2008 } 2009 2010 // Change state to native (we save the return address in the thread, since it might not 2011 // be pushed on the stack when we do a stack traversal). 2012 // We use the same pc/oopMap repeatedly when we call out 2013 2014 Label native_return; 2015 __ set_last_Java_frame(sp, noreg, native_return, rscratch1); 2016 2017 Label dtrace_method_entry, dtrace_method_entry_done; 2018 if (DTraceMethodProbes) { 2019 __ b(dtrace_method_entry); 2020 __ bind(dtrace_method_entry_done); 2021 } 2022 2023 // RedefineClasses() tracing support for obsolete method entry 2024 if (log_is_enabled(Trace, redefine, class, obsolete)) { 2025 // protect the args we've loaded 2026 save_args(masm, total_c_args, c_arg, out_regs); 2027 __ mov_metadata(c_rarg1, method()); 2028 __ call_VM_leaf( 2029 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 2030 rthread, c_rarg1); 2031 restore_args(masm, total_c_args, c_arg, out_regs); 2032 } 2033 2034 // Lock a synchronized method 2035 2036 // Register definitions used by locking and unlocking 2037 2038 const Register swap_reg = r0; 2039 const Register obj_reg = r19; // Will contain the oop 2040 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) 2041 const Register old_hdr = r13; // value of old header at unlock time 2042 const Register lock_tmp = r14; // Temporary used by lightweight_lock/unlock 2043 const Register tmp = lr; 2044 2045 Label slow_path_lock; 2046 Label lock_done; 2047 2048 if (method->is_synchronized()) { 2049 Label count; 2050 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 2051 2052 // Get the handle (the 2nd argument) 2053 __ mov(oop_handle_reg, c_rarg1); 2054 2055 // Get address of the box 2056 2057 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2058 2059 // Load the oop from the handle 2060 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 2061 2062 if (LockingMode == LM_MONITOR) { 2063 __ b(slow_path_lock); 2064 } else if (LockingMode == LM_LEGACY) { 2065 // Load (object->mark() | 1) into swap_reg %r0 2066 __ ldr(rscratch1, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 2067 __ orr(swap_reg, rscratch1, 1); 2068 if (EnableValhalla) { 2069 // Mask inline_type bit such that we go to the slow path if object is an inline type 2070 __ andr(swap_reg, swap_reg, ~((int) markWord::inline_type_bit_in_place)); 2071 } 2072 2073 // Save (object->mark() | 1) into BasicLock's displaced header 2074 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 2075 2076 // src -> dest iff dest == r0 else r0 <- dest 2077 __ cmpxchg_obj_header(r0, lock_reg, obj_reg, rscratch1, count, /*fallthrough*/nullptr); 2078 2079 // Hmm should this move to the slow path code area??? 2080 2081 // Test if the oopMark is an obvious stack pointer, i.e., 2082 // 1) (mark & 3) == 0, and 2083 // 2) sp <= mark < mark + os::pagesize() 2084 // These 3 tests can be done by evaluating the following 2085 // expression: ((mark - sp) & (3 - os::vm_page_size())), 2086 // assuming both stack pointer and pagesize have their 2087 // least significant 2 bits clear. 2088 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg 2089 2090 __ sub(swap_reg, sp, swap_reg); 2091 __ neg(swap_reg, swap_reg); 2092 __ ands(swap_reg, swap_reg, 3 - (int)os::vm_page_size()); 2093 2094 // Save the test result, for recursive case, the result is zero 2095 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 2096 __ br(Assembler::NE, slow_path_lock); 2097 } else { 2098 assert(LockingMode == LM_LIGHTWEIGHT, "must be"); 2099 __ lightweight_lock(lock_reg, obj_reg, swap_reg, tmp, lock_tmp, slow_path_lock); 2100 } 2101 __ bind(count); 2102 __ increment(Address(rthread, JavaThread::held_monitor_count_offset())); 2103 2104 // Slow path will re-enter here 2105 __ bind(lock_done); 2106 } 2107 2108 2109 // Finally just about ready to make the JNI call 2110 2111 // get JNIEnv* which is first argument to native 2112 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset()))); 2113 2114 // Now set thread in native 2115 __ mov(rscratch1, _thread_in_native); 2116 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 2117 __ stlrw(rscratch1, rscratch2); 2118 2119 __ rt_call(native_func); 2120 2121 __ bind(native_return); 2122 2123 intptr_t return_pc = (intptr_t) __ pc(); 2124 oop_maps->add_gc_map(return_pc - start, map); 2125 2126 // Verify or restore cpu control state after JNI call 2127 __ restore_cpu_control_state_after_jni(rscratch1, rscratch2); 2128 2129 // Unpack native results. 2130 switch (ret_type) { 2131 case T_BOOLEAN: __ c2bool(r0); break; 2132 case T_CHAR : __ ubfx(r0, r0, 0, 16); break; 2133 case T_BYTE : __ sbfx(r0, r0, 0, 8); break; 2134 case T_SHORT : __ sbfx(r0, r0, 0, 16); break; 2135 case T_INT : __ sbfx(r0, r0, 0, 32); break; 2136 case T_DOUBLE : 2137 case T_FLOAT : 2138 // Result is in v0 we'll save as needed 2139 break; 2140 case T_ARRAY: // Really a handle 2141 case T_OBJECT: // Really a handle 2142 break; // can't de-handlize until after safepoint check 2143 case T_VOID: break; 2144 case T_LONG: break; 2145 default : ShouldNotReachHere(); 2146 } 2147 2148 Label safepoint_in_progress, safepoint_in_progress_done; 2149 Label after_transition; 2150 2151 // Switch thread to "native transition" state before reading the synchronization state. 2152 // This additional state is necessary because reading and testing the synchronization 2153 // state is not atomic w.r.t. GC, as this scenario demonstrates: 2154 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 2155 // VM thread changes sync state to synchronizing and suspends threads for GC. 2156 // Thread A is resumed to finish this native method, but doesn't block here since it 2157 // didn't see any synchronization is progress, and escapes. 2158 __ mov(rscratch1, _thread_in_native_trans); 2159 2160 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset())); 2161 2162 // Force this write out before the read below 2163 if (!UseSystemMemoryBarrier) { 2164 __ dmb(Assembler::ISH); 2165 } 2166 2167 __ verify_sve_vector_length(); 2168 2169 // Check for safepoint operation in progress and/or pending suspend requests. 2170 { 2171 // No need for acquire as Java threads always disarm themselves. 2172 __ safepoint_poll(safepoint_in_progress, true /* at_return */, false /* acquire */, false /* in_nmethod */); 2173 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset())); 2174 __ cbnzw(rscratch1, safepoint_in_progress); 2175 __ bind(safepoint_in_progress_done); 2176 } 2177 2178 // change thread state 2179 __ mov(rscratch1, _thread_in_Java); 2180 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 2181 __ stlrw(rscratch1, rscratch2); 2182 __ bind(after_transition); 2183 2184 Label reguard; 2185 Label reguard_done; 2186 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset())); 2187 __ cmpw(rscratch1, StackOverflow::stack_guard_yellow_reserved_disabled); 2188 __ br(Assembler::EQ, reguard); 2189 __ bind(reguard_done); 2190 2191 // native result if any is live 2192 2193 // Unlock 2194 Label unlock_done; 2195 Label slow_path_unlock; 2196 if (method->is_synchronized()) { 2197 2198 // Get locked oop from the handle we passed to jni 2199 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 2200 2201 Label done, not_recursive; 2202 2203 if (LockingMode == LM_LEGACY) { 2204 // Simple recursive lock? 2205 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2206 __ cbnz(rscratch1, not_recursive); 2207 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset())); 2208 __ b(done); 2209 } 2210 2211 __ bind(not_recursive); 2212 2213 // Must save r0 if if it is live now because cmpxchg must use it 2214 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2215 save_native_result(masm, ret_type, stack_slots); 2216 } 2217 2218 if (LockingMode == LM_MONITOR) { 2219 __ b(slow_path_unlock); 2220 } else if (LockingMode == LM_LEGACY) { 2221 // get address of the stack lock 2222 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2223 // get old displaced header 2224 __ ldr(old_hdr, Address(r0, 0)); 2225 2226 // Atomic swap old header if oop still contains the stack lock 2227 Label count; 2228 __ cmpxchg_obj_header(r0, old_hdr, obj_reg, rscratch1, count, &slow_path_unlock); 2229 __ bind(count); 2230 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset())); 2231 } else { 2232 assert(LockingMode == LM_LIGHTWEIGHT, ""); 2233 __ lightweight_unlock(obj_reg, old_hdr, swap_reg, lock_tmp, slow_path_unlock); 2234 __ decrement(Address(rthread, JavaThread::held_monitor_count_offset())); 2235 } 2236 2237 // slow path re-enters here 2238 __ bind(unlock_done); 2239 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2240 restore_native_result(masm, ret_type, stack_slots); 2241 } 2242 2243 __ bind(done); 2244 } 2245 2246 Label dtrace_method_exit, dtrace_method_exit_done; 2247 if (DTraceMethodProbes) { 2248 __ b(dtrace_method_exit); 2249 __ bind(dtrace_method_exit_done); 2250 } 2251 2252 __ reset_last_Java_frame(false); 2253 2254 // Unbox oop result, e.g. JNIHandles::resolve result. 2255 if (is_reference_type(ret_type)) { 2256 __ resolve_jobject(r0, r1, r2); 2257 } 2258 2259 if (CheckJNICalls) { 2260 // clear_pending_jni_exception_check 2261 __ str(zr, Address(rthread, JavaThread::pending_jni_exception_check_fn_offset())); 2262 } 2263 2264 // reset handle block 2265 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset())); 2266 __ str(zr, Address(r2, JNIHandleBlock::top_offset())); 2267 2268 __ leave(); 2269 2270 // Any exception pending? 2271 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2272 __ cbnz(rscratch1, exception_pending); 2273 2274 // We're done 2275 __ ret(lr); 2276 2277 // Unexpected paths are out of line and go here 2278 2279 // forward the exception 2280 __ bind(exception_pending); 2281 2282 // and forward the exception 2283 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2284 2285 // Slow path locking & unlocking 2286 if (method->is_synchronized()) { 2287 2288 __ block_comment("Slow path lock {"); 2289 __ bind(slow_path_lock); 2290 2291 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 2292 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2293 2294 // protect the args we've loaded 2295 save_args(masm, total_c_args, c_arg, out_regs); 2296 2297 __ mov(c_rarg0, obj_reg); 2298 __ mov(c_rarg1, lock_reg); 2299 __ mov(c_rarg2, rthread); 2300 2301 // Not a leaf but we have last_Java_frame setup as we want 2302 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); 2303 restore_args(masm, total_c_args, c_arg, out_regs); 2304 2305 #ifdef ASSERT 2306 { Label L; 2307 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2308 __ cbz(rscratch1, L); 2309 __ stop("no pending exception allowed on exit from monitorenter"); 2310 __ bind(L); 2311 } 2312 #endif 2313 __ b(lock_done); 2314 2315 __ block_comment("} Slow path lock"); 2316 2317 __ block_comment("Slow path unlock {"); 2318 __ bind(slow_path_unlock); 2319 2320 // If we haven't already saved the native result we must save it now as xmm registers 2321 // are still exposed. 2322 2323 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2324 save_native_result(masm, ret_type, stack_slots); 2325 } 2326 2327 __ mov(c_rarg2, rthread); 2328 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2329 __ mov(c_rarg0, obj_reg); 2330 2331 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 2332 // NOTE that obj_reg == r19 currently 2333 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2334 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2335 2336 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)); 2337 2338 #ifdef ASSERT 2339 { 2340 Label L; 2341 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2342 __ cbz(rscratch1, L); 2343 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 2344 __ bind(L); 2345 } 2346 #endif /* ASSERT */ 2347 2348 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2349 2350 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2351 restore_native_result(masm, ret_type, stack_slots); 2352 } 2353 __ b(unlock_done); 2354 2355 __ block_comment("} Slow path unlock"); 2356 2357 } // synchronized 2358 2359 // SLOW PATH Reguard the stack if needed 2360 2361 __ bind(reguard); 2362 save_native_result(masm, ret_type, stack_slots); 2363 __ rt_call(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)); 2364 restore_native_result(masm, ret_type, stack_slots); 2365 // and continue 2366 __ b(reguard_done); 2367 2368 // SLOW PATH safepoint 2369 { 2370 __ block_comment("safepoint {"); 2371 __ bind(safepoint_in_progress); 2372 2373 // Don't use call_VM as it will see a possible pending exception and forward it 2374 // and never return here preventing us from clearing _last_native_pc down below. 2375 // 2376 save_native_result(masm, ret_type, stack_slots); 2377 __ mov(c_rarg0, rthread); 2378 #ifndef PRODUCT 2379 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 2380 #endif 2381 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); 2382 __ blr(rscratch1); 2383 2384 // Restore any method result value 2385 restore_native_result(masm, ret_type, stack_slots); 2386 2387 __ b(safepoint_in_progress_done); 2388 __ block_comment("} safepoint"); 2389 } 2390 2391 // SLOW PATH dtrace support 2392 if (DTraceMethodProbes) { 2393 { 2394 __ block_comment("dtrace entry {"); 2395 __ bind(dtrace_method_entry); 2396 2397 // We have all of the arguments setup at this point. We must not touch any register 2398 // argument registers at this point (what if we save/restore them there are no oop? 2399 2400 save_args(masm, total_c_args, c_arg, out_regs); 2401 __ mov_metadata(c_rarg1, method()); 2402 __ call_VM_leaf( 2403 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 2404 rthread, c_rarg1); 2405 restore_args(masm, total_c_args, c_arg, out_regs); 2406 __ b(dtrace_method_entry_done); 2407 __ block_comment("} dtrace entry"); 2408 } 2409 2410 { 2411 __ block_comment("dtrace exit {"); 2412 __ bind(dtrace_method_exit); 2413 save_native_result(masm, ret_type, stack_slots); 2414 __ mov_metadata(c_rarg1, method()); 2415 __ call_VM_leaf( 2416 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 2417 rthread, c_rarg1); 2418 restore_native_result(masm, ret_type, stack_slots); 2419 __ b(dtrace_method_exit_done); 2420 __ block_comment("} dtrace exit"); 2421 } 2422 } 2423 2424 __ flush(); 2425 2426 nmethod *nm = nmethod::new_native_nmethod(method, 2427 compile_id, 2428 masm->code(), 2429 vep_offset, 2430 frame_complete, 2431 stack_slots / VMRegImpl::slots_per_word, 2432 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2433 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2434 oop_maps); 2435 2436 return nm; 2437 } 2438 2439 // this function returns the adjust size (in number of words) to a c2i adapter 2440 // activation for use during deoptimization 2441 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { 2442 assert(callee_locals >= callee_parameters, 2443 "test and remove; got more parms than locals"); 2444 if (callee_locals < callee_parameters) 2445 return 0; // No adjustment for negative locals 2446 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2447 // diff is counted in stack words 2448 return align_up(diff, 2); 2449 } 2450 2451 2452 //------------------------------generate_deopt_blob---------------------------- 2453 void SharedRuntime::generate_deopt_blob() { 2454 // Allocate space for the code 2455 ResourceMark rm; 2456 // Setup code generation tools 2457 int pad = 0; 2458 #if INCLUDE_JVMCI 2459 if (EnableJVMCI) { 2460 pad += 512; // Increase the buffer size when compiling for JVMCI 2461 } 2462 #endif 2463 CodeBuffer buffer("deopt_blob", 2048+pad, 1024); 2464 MacroAssembler* masm = new MacroAssembler(&buffer); 2465 int frame_size_in_words; 2466 OopMap* map = nullptr; 2467 OopMapSet *oop_maps = new OopMapSet(); 2468 RegisterSaver reg_save(COMPILER2_OR_JVMCI != 0); 2469 2470 // ------------- 2471 // This code enters when returning to a de-optimized nmethod. A return 2472 // address has been pushed on the stack, and return values are in 2473 // registers. 2474 // If we are doing a normal deopt then we were called from the patched 2475 // nmethod from the point we returned to the nmethod. So the return 2476 // address on the stack is wrong by NativeCall::instruction_size 2477 // We will adjust the value so it looks like we have the original return 2478 // address on the stack (like when we eagerly deoptimized). 2479 // In the case of an exception pending when deoptimizing, we enter 2480 // with a return address on the stack that points after the call we patched 2481 // into the exception handler. We have the following register state from, 2482 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). 2483 // r0: exception oop 2484 // r19: exception handler 2485 // r3: throwing pc 2486 // So in this case we simply jam r3 into the useless return address and 2487 // the stack looks just like we want. 2488 // 2489 // At this point we need to de-opt. We save the argument return 2490 // registers. We call the first C routine, fetch_unroll_info(). This 2491 // routine captures the return values and returns a structure which 2492 // describes the current frame size and the sizes of all replacement frames. 2493 // The current frame is compiled code and may contain many inlined 2494 // functions, each with their own JVM state. We pop the current frame, then 2495 // push all the new frames. Then we call the C routine unpack_frames() to 2496 // populate these frames. Finally unpack_frames() returns us the new target 2497 // address. Notice that callee-save registers are BLOWN here; they have 2498 // already been captured in the vframeArray at the time the return PC was 2499 // patched. 2500 address start = __ pc(); 2501 Label cont; 2502 2503 // Prolog for non exception case! 2504 2505 // Save everything in sight. 2506 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2507 2508 // Normal deoptimization. Save exec mode for unpack_frames. 2509 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved 2510 __ b(cont); 2511 2512 int reexecute_offset = __ pc() - start; 2513 #if INCLUDE_JVMCI && !defined(COMPILER1) 2514 if (EnableJVMCI && UseJVMCICompiler) { 2515 // JVMCI does not use this kind of deoptimization 2516 __ should_not_reach_here(); 2517 } 2518 #endif 2519 2520 // Reexecute case 2521 // return address is the pc describes what bci to do re-execute at 2522 2523 // No need to update map as each call to save_live_registers will produce identical oopmap 2524 (void) reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2525 2526 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved 2527 __ b(cont); 2528 2529 #if INCLUDE_JVMCI 2530 Label after_fetch_unroll_info_call; 2531 int implicit_exception_uncommon_trap_offset = 0; 2532 int uncommon_trap_offset = 0; 2533 2534 if (EnableJVMCI) { 2535 implicit_exception_uncommon_trap_offset = __ pc() - start; 2536 2537 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2538 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2539 2540 uncommon_trap_offset = __ pc() - start; 2541 2542 // Save everything in sight. 2543 reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2544 // fetch_unroll_info needs to call last_java_frame() 2545 Label retaddr; 2546 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2547 2548 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2549 __ movw(rscratch1, -1); 2550 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2551 2552 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute); 2553 __ mov(c_rarg0, rthread); 2554 __ movw(c_rarg2, rcpool); // exec mode 2555 __ lea(rscratch1, 2556 RuntimeAddress(CAST_FROM_FN_PTR(address, 2557 Deoptimization::uncommon_trap))); 2558 __ blr(rscratch1); 2559 __ bind(retaddr); 2560 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); 2561 2562 __ reset_last_Java_frame(false); 2563 2564 __ b(after_fetch_unroll_info_call); 2565 } // EnableJVMCI 2566 #endif // INCLUDE_JVMCI 2567 2568 int exception_offset = __ pc() - start; 2569 2570 // Prolog for exception case 2571 2572 // all registers are dead at this entry point, except for r0, and 2573 // r3 which contain the exception oop and exception pc 2574 // respectively. Set them in TLS and fall thru to the 2575 // unpack_with_exception_in_tls entry point. 2576 2577 __ str(r3, Address(rthread, JavaThread::exception_pc_offset())); 2578 __ str(r0, Address(rthread, JavaThread::exception_oop_offset())); 2579 2580 int exception_in_tls_offset = __ pc() - start; 2581 2582 // new implementation because exception oop is now passed in JavaThread 2583 2584 // Prolog for exception case 2585 // All registers must be preserved because they might be used by LinearScan 2586 // Exceptiop oop and throwing PC are passed in JavaThread 2587 // tos: stack at point of call to method that threw the exception (i.e. only 2588 // args are on the stack, no return address) 2589 2590 // The return address pushed by save_live_registers will be patched 2591 // later with the throwing pc. The correct value is not available 2592 // now because loading it from memory would destroy registers. 2593 2594 // NB: The SP at this point must be the SP of the method that is 2595 // being deoptimized. Deoptimization assumes that the frame created 2596 // here by save_live_registers is immediately below the method's SP. 2597 // This is a somewhat fragile mechanism. 2598 2599 // Save everything in sight. 2600 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2601 2602 // Now it is safe to overwrite any register 2603 2604 // Deopt during an exception. Save exec mode for unpack_frames. 2605 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved 2606 2607 // load throwing pc from JavaThread and patch it as the return address 2608 // of the current frame. Then clear the field in JavaThread 2609 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2610 __ protect_return_address(r3); 2611 __ str(r3, Address(rfp, wordSize)); 2612 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2613 2614 #ifdef ASSERT 2615 // verify that there is really an exception oop in JavaThread 2616 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2617 __ verify_oop(r0); 2618 2619 // verify that there is no pending exception 2620 Label no_pending_exception; 2621 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2622 __ cbz(rscratch1, no_pending_exception); 2623 __ stop("must not have pending exception here"); 2624 __ bind(no_pending_exception); 2625 #endif 2626 2627 __ bind(cont); 2628 2629 // Call C code. Need thread and this frame, but NOT official VM entry 2630 // crud. We cannot block on this call, no GC can happen. 2631 // 2632 // UnrollBlock* fetch_unroll_info(JavaThread* thread) 2633 2634 // fetch_unroll_info needs to call last_java_frame(). 2635 2636 Label retaddr; 2637 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2638 #ifdef ASSERT 2639 { Label L; 2640 __ ldr(rscratch1, Address(rthread, JavaThread::last_Java_fp_offset())); 2641 __ cbz(rscratch1, L); 2642 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); 2643 __ bind(L); 2644 } 2645 #endif // ASSERT 2646 __ mov(c_rarg0, rthread); 2647 __ mov(c_rarg1, rcpool); 2648 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2649 __ blr(rscratch1); 2650 __ bind(retaddr); 2651 2652 // Need to have an oopmap that tells fetch_unroll_info where to 2653 // find any register it might need. 2654 oop_maps->add_gc_map(__ pc() - start, map); 2655 2656 __ reset_last_Java_frame(false); 2657 2658 #if INCLUDE_JVMCI 2659 if (EnableJVMCI) { 2660 __ bind(after_fetch_unroll_info_call); 2661 } 2662 #endif 2663 2664 // Load UnrollBlock* into r5 2665 __ mov(r5, r0); 2666 2667 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset())); 2668 Label noException; 2669 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending? 2670 __ br(Assembler::NE, noException); 2671 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2672 // QQQ this is useless it was null above 2673 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2674 __ str(zr, Address(rthread, JavaThread::exception_oop_offset())); 2675 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2676 2677 __ verify_oop(r0); 2678 2679 // Overwrite the result registers with the exception results. 2680 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2681 // I think this is useless 2682 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2683 2684 __ bind(noException); 2685 2686 // Only register save data is on the stack. 2687 // Now restore the result registers. Everything else is either dead 2688 // or captured in the vframeArray. 2689 2690 // Restore fp result register 2691 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes())); 2692 // Restore integer result register 2693 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2694 2695 // Pop all of the register save area off the stack 2696 __ add(sp, sp, frame_size_in_words * wordSize); 2697 2698 // All of the register save area has been popped of the stack. Only the 2699 // return address remains. 2700 2701 // Pop all the frames we must move/replace. 2702 // 2703 // Frame picture (youngest to oldest) 2704 // 1: self-frame (no frame link) 2705 // 2: deopting frame (no frame link) 2706 // 3: caller of deopting frame (could be compiled/interpreted). 2707 // 2708 // Note: by leaving the return address of self-frame on the stack 2709 // and using the size of frame 2 to adjust the stack 2710 // when we are done the return to frame 3 will still be on the stack. 2711 2712 // Pop deoptimized frame 2713 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset())); 2714 __ sub(r2, r2, 2 * wordSize); 2715 __ add(sp, sp, r2); 2716 __ ldp(rfp, zr, __ post(sp, 2 * wordSize)); 2717 2718 #ifdef ASSERT 2719 // Compilers generate code that bang the stack by as much as the 2720 // interpreter would need. So this stack banging should never 2721 // trigger a fault. Verify that it does not on non product builds. 2722 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset())); 2723 __ bang_stack_size(r19, r2); 2724 #endif 2725 // Load address of array of frame pcs into r2 2726 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset())); 2727 2728 // Trash the old pc 2729 // __ addptr(sp, wordSize); FIXME ???? 2730 2731 // Load address of array of frame sizes into r4 2732 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset())); 2733 2734 // Load counter into r3 2735 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset())); 2736 2737 // Now adjust the caller's stack to make up for the extra locals 2738 // but record the original sp so that we can save it in the skeletal interpreter 2739 // frame and the stack walking of interpreter_sender will get the unextended sp 2740 // value and not the "real" sp value. 2741 2742 const Register sender_sp = r6; 2743 2744 __ mov(sender_sp, sp); 2745 __ ldrw(r19, Address(r5, 2746 Deoptimization::UnrollBlock:: 2747 caller_adjustment_offset())); 2748 __ sub(sp, sp, r19); 2749 2750 // Push interpreter frames in a loop 2751 __ mov(rscratch1, (uint64_t)0xDEADDEAD); // Make a recognizable pattern 2752 __ mov(rscratch2, rscratch1); 2753 Label loop; 2754 __ bind(loop); 2755 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size 2756 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand 2757 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc 2758 __ enter(); // Save old & set new fp 2759 __ sub(sp, sp, r19); // Prolog 2760 // This value is corrected by layout_activation_impl 2761 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); 2762 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable 2763 __ mov(sender_sp, sp); // Pass sender_sp to next frame 2764 __ sub(r3, r3, 1); // Decrement counter 2765 __ cbnz(r3, loop); 2766 2767 // Re-push self-frame 2768 __ ldr(lr, Address(r2)); 2769 __ enter(); 2770 2771 // Allocate a full sized register save area. We subtract 2 because 2772 // enter() just pushed 2 words 2773 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize); 2774 2775 // Restore frame locals after moving the frame 2776 __ strd(v0, Address(sp, reg_save.v0_offset_in_bytes())); 2777 __ str(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2778 2779 // Call C code. Need thread but NOT official VM entry 2780 // crud. We cannot block on this call, no GC can happen. Call should 2781 // restore return values to their stack-slots with the new SP. 2782 // 2783 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) 2784 2785 // Use rfp because the frames look interpreted now 2786 // Don't need the precise return PC here, just precise enough to point into this code blob. 2787 address the_pc = __ pc(); 2788 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 2789 2790 __ mov(c_rarg0, rthread); 2791 __ movw(c_rarg1, rcpool); // second arg: exec_mode 2792 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2793 __ blr(rscratch1); 2794 2795 // Set an oopmap for the call site 2796 // Use the same PC we used for the last java frame 2797 oop_maps->add_gc_map(the_pc - start, 2798 new OopMap( frame_size_in_words, 0 )); 2799 2800 // Clear fp AND pc 2801 __ reset_last_Java_frame(true); 2802 2803 // Collect return values 2804 __ ldrd(v0, Address(sp, reg_save.v0_offset_in_bytes())); 2805 __ ldr(r0, Address(sp, reg_save.r0_offset_in_bytes())); 2806 // I think this is useless (throwing pc?) 2807 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2808 2809 // Pop self-frame. 2810 __ leave(); // Epilog 2811 2812 // Jump to interpreter 2813 __ ret(lr); 2814 2815 // Make sure all code is generated 2816 masm->flush(); 2817 2818 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2819 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2820 #if INCLUDE_JVMCI 2821 if (EnableJVMCI) { 2822 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); 2823 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); 2824 } 2825 #endif 2826 } 2827 2828 // Number of stack slots between incoming argument block and the start of 2829 // a new frame. The PROLOG must add this many slots to the stack. The 2830 // EPILOG must remove this many slots. aarch64 needs two slots for 2831 // return address and fp. 2832 // TODO think this is correct but check 2833 uint SharedRuntime::in_preserve_stack_slots() { 2834 return 4; 2835 } 2836 2837 uint SharedRuntime::out_preserve_stack_slots() { 2838 return 0; 2839 } 2840 2841 2842 //------------------------------generate_handler_blob------ 2843 // 2844 // Generate a special Compile2Runtime blob that saves all registers, 2845 // and setup oopmap. 2846 // 2847 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 2848 ResourceMark rm; 2849 OopMapSet *oop_maps = new OopMapSet(); 2850 OopMap* map; 2851 2852 // Allocate space for the code. Setup code generation tools. 2853 CodeBuffer buffer("handler_blob", 2048, 1024); 2854 MacroAssembler* masm = new MacroAssembler(&buffer); 2855 2856 address start = __ pc(); 2857 address call_pc = nullptr; 2858 int frame_size_in_words; 2859 bool cause_return = (poll_type == POLL_AT_RETURN); 2860 RegisterSaver reg_save(poll_type == POLL_AT_VECTOR_LOOP /* save_vectors */); 2861 2862 // When the signal occurred, the LR was either signed and stored on the stack (in which 2863 // case it will be restored from the stack before being used) or unsigned and not stored 2864 // on the stack. Stipping ensures we get the right value. 2865 __ strip_return_address(); 2866 2867 // Save Integer and Float registers. 2868 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2869 2870 // The following is basically a call_VM. However, we need the precise 2871 // address of the call in order to generate an oopmap. Hence, we do all the 2872 // work ourselves. 2873 2874 Label retaddr; 2875 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2876 2877 // The return address must always be correct so that frame constructor never 2878 // sees an invalid pc. 2879 2880 if (!cause_return) { 2881 // overwrite the return address pushed by save_live_registers 2882 // Additionally, r20 is a callee-saved register so we can look at 2883 // it later to determine if someone changed the return address for 2884 // us! 2885 __ ldr(r20, Address(rthread, JavaThread::saved_exception_pc_offset())); 2886 __ protect_return_address(r20); 2887 __ str(r20, Address(rfp, wordSize)); 2888 } 2889 2890 // Do the call 2891 __ mov(c_rarg0, rthread); 2892 __ lea(rscratch1, RuntimeAddress(call_ptr)); 2893 __ blr(rscratch1); 2894 __ bind(retaddr); 2895 2896 // Set an oopmap for the call site. This oopmap will map all 2897 // oop-registers and debug-info registers as callee-saved. This 2898 // will allow deoptimization at this safepoint to find all possible 2899 // debug-info recordings, as well as let GC find all oops. 2900 2901 oop_maps->add_gc_map( __ pc() - start, map); 2902 2903 Label noException; 2904 2905 __ reset_last_Java_frame(false); 2906 2907 __ membar(Assembler::LoadLoad | Assembler::LoadStore); 2908 2909 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2910 __ cbz(rscratch1, noException); 2911 2912 // Exception pending 2913 2914 reg_save.restore_live_registers(masm); 2915 2916 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2917 2918 // No exception case 2919 __ bind(noException); 2920 2921 Label no_adjust, bail; 2922 if (!cause_return) { 2923 // If our stashed return pc was modified by the runtime we avoid touching it 2924 __ ldr(rscratch1, Address(rfp, wordSize)); 2925 __ cmp(r20, rscratch1); 2926 __ br(Assembler::NE, no_adjust); 2927 __ authenticate_return_address(r20); 2928 2929 #ifdef ASSERT 2930 // Verify the correct encoding of the poll we're about to skip. 2931 // See NativeInstruction::is_ldrw_to_zr() 2932 __ ldrw(rscratch1, Address(r20)); 2933 __ ubfx(rscratch2, rscratch1, 22, 10); 2934 __ cmpw(rscratch2, 0b1011100101); 2935 __ br(Assembler::NE, bail); 2936 __ ubfx(rscratch2, rscratch1, 0, 5); 2937 __ cmpw(rscratch2, 0b11111); 2938 __ br(Assembler::NE, bail); 2939 #endif 2940 // Adjust return pc forward to step over the safepoint poll instruction 2941 __ add(r20, r20, NativeInstruction::instruction_size); 2942 __ protect_return_address(r20); 2943 __ str(r20, Address(rfp, wordSize)); 2944 } 2945 2946 __ bind(no_adjust); 2947 // Normal exit, restore registers and exit. 2948 reg_save.restore_live_registers(masm); 2949 2950 __ ret(lr); 2951 2952 #ifdef ASSERT 2953 __ bind(bail); 2954 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected"); 2955 #endif 2956 2957 // Make sure all code is generated 2958 masm->flush(); 2959 2960 // Fill-out other meta info 2961 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 2962 } 2963 2964 // 2965 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 2966 // 2967 // Generate a stub that calls into vm to find out the proper destination 2968 // of a java call. All the argument registers are live at this point 2969 // but since this is generic code we don't know what they are and the caller 2970 // must do any gc of the args. 2971 // 2972 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 2973 assert (StubRoutines::forward_exception_entry() != nullptr, "must be generated before"); 2974 2975 // allocate space for the code 2976 ResourceMark rm; 2977 2978 CodeBuffer buffer(name, 1000, 512); 2979 MacroAssembler* masm = new MacroAssembler(&buffer); 2980 2981 int frame_size_in_words; 2982 RegisterSaver reg_save(false /* save_vectors */); 2983 2984 OopMapSet *oop_maps = new OopMapSet(); 2985 OopMap* map = nullptr; 2986 2987 int start = __ offset(); 2988 2989 map = reg_save.save_live_registers(masm, 0, &frame_size_in_words); 2990 2991 int frame_complete = __ offset(); 2992 2993 { 2994 Label retaddr; 2995 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2996 2997 __ mov(c_rarg0, rthread); 2998 __ lea(rscratch1, RuntimeAddress(destination)); 2999 3000 __ blr(rscratch1); 3001 __ bind(retaddr); 3002 } 3003 3004 // Set an oopmap for the call site. 3005 // We need this not only for callee-saved registers, but also for volatile 3006 // registers that the compiler might be keeping live across a safepoint. 3007 3008 oop_maps->add_gc_map( __ offset() - start, map); 3009 3010 // r0 contains the address we are going to jump to assuming no exception got installed 3011 3012 // clear last_Java_sp 3013 __ reset_last_Java_frame(false); 3014 // check for pending exceptions 3015 Label pending; 3016 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 3017 __ cbnz(rscratch1, pending); 3018 3019 // get the returned Method* 3020 __ get_vm_result_2(rmethod, rthread); 3021 __ str(rmethod, Address(sp, reg_save.reg_offset_in_bytes(rmethod))); 3022 3023 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch 3024 __ str(r0, Address(sp, reg_save.rscratch1_offset_in_bytes())); 3025 reg_save.restore_live_registers(masm); 3026 3027 // We are back to the original state on entry and ready to go. 3028 3029 __ br(rscratch1); 3030 3031 // Pending exception after the safepoint 3032 3033 __ bind(pending); 3034 3035 reg_save.restore_live_registers(masm); 3036 3037 // exception pending => remove activation and forward to exception handler 3038 3039 __ str(zr, Address(rthread, JavaThread::vm_result_offset())); 3040 3041 __ ldr(r0, Address(rthread, Thread::pending_exception_offset())); 3042 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3043 3044 // ------------- 3045 // make sure all code is generated 3046 masm->flush(); 3047 3048 // return the blob 3049 // frame_size_words or bytes?? 3050 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); 3051 } 3052 3053 BufferedInlineTypeBlob* SharedRuntime::generate_buffered_inline_type_adapter(const InlineKlass* vk) { 3054 BufferBlob* buf = BufferBlob::create("inline types pack/unpack", 16 * K); 3055 CodeBuffer buffer(buf); 3056 short buffer_locs[20]; 3057 buffer.insts()->initialize_shared_locs((relocInfo*)buffer_locs, 3058 sizeof(buffer_locs)/sizeof(relocInfo)); 3059 3060 MacroAssembler _masm(&buffer); 3061 MacroAssembler* masm = &_masm; 3062 3063 const Array<SigEntry>* sig_vk = vk->extended_sig(); 3064 const Array<VMRegPair>* regs = vk->return_regs(); 3065 3066 int pack_fields_jobject_off = __ offset(); 3067 // Resolve pre-allocated buffer from JNI handle. 3068 // We cannot do this in generate_call_stub() because it requires GC code to be initialized. 3069 Register Rresult = r14; // See StubGenerator::generate_call_stub(). 3070 __ ldr(r0, Address(Rresult)); 3071 __ resolve_jobject(r0 /* value */, 3072 rthread /* thread */, 3073 r12 /* tmp */); 3074 __ str(r0, Address(Rresult)); 3075 3076 int pack_fields_off = __ offset(); 3077 3078 int j = 1; 3079 for (int i = 0; i < sig_vk->length(); i++) { 3080 BasicType bt = sig_vk->at(i)._bt; 3081 if (bt == T_METADATA) { 3082 continue; 3083 } 3084 if (bt == T_VOID) { 3085 if (sig_vk->at(i-1)._bt == T_LONG || 3086 sig_vk->at(i-1)._bt == T_DOUBLE) { 3087 j++; 3088 } 3089 continue; 3090 } 3091 int off = sig_vk->at(i)._offset; 3092 VMRegPair pair = regs->at(j); 3093 VMReg r_1 = pair.first(); 3094 VMReg r_2 = pair.second(); 3095 Address to(r0, off); 3096 if (bt == T_FLOAT) { 3097 __ strs(r_1->as_FloatRegister(), to); 3098 } else if (bt == T_DOUBLE) { 3099 __ strd(r_1->as_FloatRegister(), to); 3100 } else { 3101 Register val = r_1->as_Register(); 3102 assert_different_registers(to.base(), val, r15, r16, r17); 3103 if (is_reference_type(bt)) { 3104 __ store_heap_oop(to, val, r15, r16, r17, IN_HEAP | ACCESS_WRITE | IS_DEST_UNINITIALIZED); 3105 } else { 3106 __ store_sized_value(to, r_1->as_Register(), type2aelembytes(bt)); 3107 } 3108 } 3109 j++; 3110 } 3111 assert(j == regs->length(), "missed a field?"); 3112 3113 __ ret(lr); 3114 3115 int unpack_fields_off = __ offset(); 3116 3117 Label skip; 3118 __ cbz(r0, skip); 3119 3120 j = 1; 3121 for (int i = 0; i < sig_vk->length(); i++) { 3122 BasicType bt = sig_vk->at(i)._bt; 3123 if (bt == T_METADATA) { 3124 continue; 3125 } 3126 if (bt == T_VOID) { 3127 if (sig_vk->at(i-1)._bt == T_LONG || 3128 sig_vk->at(i-1)._bt == T_DOUBLE) { 3129 j++; 3130 } 3131 continue; 3132 } 3133 int off = sig_vk->at(i)._offset; 3134 assert(off > 0, "offset in object should be positive"); 3135 VMRegPair pair = regs->at(j); 3136 VMReg r_1 = pair.first(); 3137 VMReg r_2 = pair.second(); 3138 Address from(r0, off); 3139 if (bt == T_FLOAT) { 3140 __ ldrs(r_1->as_FloatRegister(), from); 3141 } else if (bt == T_DOUBLE) { 3142 __ ldrd(r_1->as_FloatRegister(), from); 3143 } else if (bt == T_OBJECT || bt == T_ARRAY) { 3144 assert_different_registers(r0, r_1->as_Register()); 3145 __ load_heap_oop(r_1->as_Register(), from, rscratch1, rscratch2); 3146 } else { 3147 assert(is_java_primitive(bt), "unexpected basic type"); 3148 assert_different_registers(r0, r_1->as_Register()); 3149 3150 size_t size_in_bytes = type2aelembytes(bt); 3151 __ load_sized_value(r_1->as_Register(), from, size_in_bytes, bt != T_CHAR && bt != T_BOOLEAN); 3152 } 3153 j++; 3154 } 3155 assert(j == regs->length(), "missed a field?"); 3156 3157 __ bind(skip); 3158 3159 __ ret(lr); 3160 3161 __ flush(); 3162 3163 return BufferedInlineTypeBlob::create(&buffer, pack_fields_off, pack_fields_jobject_off, unpack_fields_off); 3164 } 3165 3166 // Continuation point for throwing of implicit exceptions that are 3167 // not handled in the current activation. Fabricates an exception 3168 // oop and initiates normal exception dispatching in this 3169 // frame. Since we need to preserve callee-saved values (currently 3170 // only for C2, but done for C1 as well) we need a callee-saved oop 3171 // map and therefore have to make these stubs into RuntimeStubs 3172 // rather than BufferBlobs. If the compiler needs all registers to 3173 // be preserved between the fault point and the exception handler 3174 // then it must assume responsibility for that in 3175 // AbstractCompiler::continuation_for_implicit_null_exception or 3176 // continuation_for_implicit_division_by_zero_exception. All other 3177 // implicit exceptions (e.g., NullPointerException or 3178 // AbstractMethodError on entry) are either at call sites or 3179 // otherwise assume that stack unwinding will be initiated, so 3180 // caller saved registers were assumed volatile in the compiler. 3181 3182 RuntimeStub* SharedRuntime::generate_throw_exception(const char* name, address runtime_entry) { 3183 // Information about frame layout at time of blocking runtime call. 3184 // Note that we only have to preserve callee-saved registers since 3185 // the compilers are responsible for supplying a continuation point 3186 // if they expect all registers to be preserved. 3187 // n.b. aarch64 asserts that frame::arg_reg_save_area_bytes == 0 3188 enum layout { 3189 rfp_off = 0, 3190 rfp_off2, 3191 return_off, 3192 return_off2, 3193 framesize // inclusive of return address 3194 }; 3195 3196 int insts_size = 512; 3197 int locs_size = 64; 3198 3199 ResourceMark rm; 3200 const char* timer_msg = "SharedRuntime generate_throw_exception"; 3201 TraceTime timer(timer_msg, TRACETIME_LOG(Info, startuptime)); 3202 3203 CodeBuffer code(name, insts_size, locs_size); 3204 OopMapSet* oop_maps = new OopMapSet(); 3205 MacroAssembler* masm = new MacroAssembler(&code); 3206 3207 address start = __ pc(); 3208 3209 // This is an inlined and slightly modified version of call_VM 3210 // which has the ability to fetch the return PC out of 3211 // thread-local storage and also sets up last_Java_sp slightly 3212 // differently than the real call_VM 3213 3214 __ enter(); // Save FP and LR before call 3215 3216 assert(is_even(framesize/2), "sp not 16-byte aligned"); 3217 3218 // lr and fp are already in place 3219 __ sub(sp, rfp, ((uint64_t)framesize-4) << LogBytesPerInt); // prolog 3220 3221 int frame_complete = __ pc() - start; 3222 3223 // Set up last_Java_sp and last_Java_fp 3224 address the_pc = __ pc(); 3225 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 3226 3227 __ mov(c_rarg0, rthread); 3228 BLOCK_COMMENT("call runtime_entry"); 3229 __ mov(rscratch1, runtime_entry); 3230 __ blr(rscratch1); 3231 3232 // Generate oop map 3233 OopMap* map = new OopMap(framesize, 0); 3234 3235 oop_maps->add_gc_map(the_pc - start, map); 3236 3237 __ reset_last_Java_frame(true); 3238 3239 // Reinitialize the ptrue predicate register, in case the external runtime 3240 // call clobbers ptrue reg, as we may return to SVE compiled code. 3241 __ reinitialize_ptrue(); 3242 3243 __ leave(); 3244 3245 // check for pending exceptions 3246 #ifdef ASSERT 3247 Label L; 3248 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 3249 __ cbnz(rscratch1, L); 3250 __ should_not_reach_here(); 3251 __ bind(L); 3252 #endif // ASSERT 3253 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3254 3255 // codeBlob framesize is in words (not VMRegImpl::slot_size) 3256 RuntimeStub* stub = 3257 RuntimeStub::new_runtime_stub(name, 3258 &code, 3259 frame_complete, 3260 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 3261 oop_maps, false); 3262 return stub; 3263 } 3264 3265 #if INCLUDE_JFR 3266 3267 static void jfr_prologue(address the_pc, MacroAssembler* masm, Register thread) { 3268 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 3269 __ mov(c_rarg0, thread); 3270 } 3271 3272 // The handle is dereferenced through a load barrier. 3273 static void jfr_epilogue(MacroAssembler* masm) { 3274 __ reset_last_Java_frame(true); 3275 } 3276 3277 // For c2: c_rarg0 is junk, call to runtime to write a checkpoint. 3278 // It returns a jobject handle to the event writer. 3279 // The handle is dereferenced and the return value is the event writer oop. 3280 RuntimeStub* SharedRuntime::generate_jfr_write_checkpoint() { 3281 enum layout { 3282 rbp_off, 3283 rbpH_off, 3284 return_off, 3285 return_off2, 3286 framesize // inclusive of return address 3287 }; 3288 3289 int insts_size = 1024; 3290 int locs_size = 64; 3291 CodeBuffer code("jfr_write_checkpoint", insts_size, locs_size); 3292 OopMapSet* oop_maps = new OopMapSet(); 3293 MacroAssembler* masm = new MacroAssembler(&code); 3294 3295 address start = __ pc(); 3296 __ enter(); 3297 int frame_complete = __ pc() - start; 3298 address the_pc = __ pc(); 3299 jfr_prologue(the_pc, masm, rthread); 3300 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::write_checkpoint), 1); 3301 jfr_epilogue(masm); 3302 __ resolve_global_jobject(r0, rscratch1, rscratch2); 3303 __ leave(); 3304 __ ret(lr); 3305 3306 OopMap* map = new OopMap(framesize, 1); // rfp 3307 oop_maps->add_gc_map(the_pc - start, map); 3308 3309 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size) 3310 RuntimeStub::new_runtime_stub("jfr_write_checkpoint", &code, frame_complete, 3311 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 3312 oop_maps, false); 3313 return stub; 3314 } 3315 3316 // For c2: call to return a leased buffer. 3317 RuntimeStub* SharedRuntime::generate_jfr_return_lease() { 3318 enum layout { 3319 rbp_off, 3320 rbpH_off, 3321 return_off, 3322 return_off2, 3323 framesize // inclusive of return address 3324 }; 3325 3326 int insts_size = 1024; 3327 int locs_size = 64; 3328 3329 CodeBuffer code("jfr_return_lease", insts_size, locs_size); 3330 OopMapSet* oop_maps = new OopMapSet(); 3331 MacroAssembler* masm = new MacroAssembler(&code); 3332 3333 address start = __ pc(); 3334 __ enter(); 3335 int frame_complete = __ pc() - start; 3336 address the_pc = __ pc(); 3337 jfr_prologue(the_pc, masm, rthread); 3338 __ call_VM_leaf(CAST_FROM_FN_PTR(address, JfrIntrinsicSupport::return_lease), 1); 3339 jfr_epilogue(masm); 3340 3341 __ leave(); 3342 __ ret(lr); 3343 3344 OopMap* map = new OopMap(framesize, 1); // rfp 3345 oop_maps->add_gc_map(the_pc - start, map); 3346 3347 RuntimeStub* stub = // codeBlob framesize is in words (not VMRegImpl::slot_size) 3348 RuntimeStub::new_runtime_stub("jfr_return_lease", &code, frame_complete, 3349 (framesize >> (LogBytesPerWord - LogBytesPerInt)), 3350 oop_maps, false); 3351 return stub; 3352 } 3353 3354 #endif // INCLUDE_JFR --- EOF ---